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Diffstat (limited to 'arch/arm/mach-pxa/zeus.c')
-rw-r--r--arch/arm/mach-pxa/zeus.c20
1 files changed, 10 insertions, 10 deletions
diff --git a/arch/arm/mach-pxa/zeus.c b/arch/arm/mach-pxa/zeus.c
index 9db35a7fcfc0..a4dd1c347050 100644
--- a/arch/arm/mach-pxa/zeus.c
+++ b/arch/arm/mach-pxa/zeus.c
@@ -233,7 +233,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
233 /* FIXME: Shared IRQs on COM1-COM4 will not work properly on v1i1 hardware. */ 233 /* FIXME: Shared IRQs on COM1-COM4 will not work properly on v1i1 hardware. */
234 { /* COM1 */ 234 { /* COM1 */
235 .mapbase = 0x10000000, 235 .mapbase = 0x10000000,
236 .irq = gpio_to_irq(ZEUS_UARTA_GPIO), 236 .irq = PXA_GPIO_TO_IRQ(ZEUS_UARTA_GPIO),
237 .irqflags = IRQF_TRIGGER_RISING, 237 .irqflags = IRQF_TRIGGER_RISING,
238 .uartclk = 14745600, 238 .uartclk = 14745600,
239 .regshift = 1, 239 .regshift = 1,
@@ -242,7 +242,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
242 }, 242 },
243 { /* COM2 */ 243 { /* COM2 */
244 .mapbase = 0x10800000, 244 .mapbase = 0x10800000,
245 .irq = gpio_to_irq(ZEUS_UARTB_GPIO), 245 .irq = PXA_GPIO_TO_IRQ(ZEUS_UARTB_GPIO),
246 .irqflags = IRQF_TRIGGER_RISING, 246 .irqflags = IRQF_TRIGGER_RISING,
247 .uartclk = 14745600, 247 .uartclk = 14745600,
248 .regshift = 1, 248 .regshift = 1,
@@ -251,7 +251,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
251 }, 251 },
252 { /* COM3 */ 252 { /* COM3 */
253 .mapbase = 0x11000000, 253 .mapbase = 0x11000000,
254 .irq = gpio_to_irq(ZEUS_UARTC_GPIO), 254 .irq = PXA_GPIO_TO_IRQ(ZEUS_UARTC_GPIO),
255 .irqflags = IRQF_TRIGGER_RISING, 255 .irqflags = IRQF_TRIGGER_RISING,
256 .uartclk = 14745600, 256 .uartclk = 14745600,
257 .regshift = 1, 257 .regshift = 1,
@@ -260,7 +260,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
260 }, 260 },
261 { /* COM4 */ 261 { /* COM4 */
262 .mapbase = 0x11800000, 262 .mapbase = 0x11800000,
263 .irq = gpio_to_irq(ZEUS_UARTD_GPIO), 263 .irq = PXA_GPIO_TO_IRQ(ZEUS_UARTD_GPIO),
264 .irqflags = IRQF_TRIGGER_RISING, 264 .irqflags = IRQF_TRIGGER_RISING,
265 .uartclk = 14745600, 265 .uartclk = 14745600,
266 .regshift = 1, 266 .regshift = 1,
@@ -321,8 +321,8 @@ static struct resource zeus_dm9k0_resource[] = {
321 .flags = IORESOURCE_MEM 321 .flags = IORESOURCE_MEM
322 }, 322 },
323 [2] = { 323 [2] = {
324 .start = gpio_to_irq(ZEUS_ETH0_GPIO), 324 .start = PXA_GPIO_TO_IRQ(ZEUS_ETH0_GPIO),
325 .end = gpio_to_irq(ZEUS_ETH0_GPIO), 325 .end = PXA_GPIO_TO_IRQ(ZEUS_ETH0_GPIO),
326 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE, 326 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
327 }, 327 },
328}; 328};
@@ -339,8 +339,8 @@ static struct resource zeus_dm9k1_resource[] = {
339 .flags = IORESOURCE_MEM, 339 .flags = IORESOURCE_MEM,
340 }, 340 },
341 [2] = { 341 [2] = {
342 .start = gpio_to_irq(ZEUS_ETH1_GPIO), 342 .start = PXA_GPIO_TO_IRQ(ZEUS_ETH1_GPIO),
343 .end = gpio_to_irq(ZEUS_ETH1_GPIO), 343 .end = PXA_GPIO_TO_IRQ(ZEUS_ETH1_GPIO),
344 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE, 344 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
345 }, 345 },
346}; 346};
@@ -423,7 +423,7 @@ static struct spi_board_info zeus_spi_board_info[] = {
423 [0] = { 423 [0] = {
424 .modalias = "mcp2515", 424 .modalias = "mcp2515",
425 .platform_data = &zeus_mcp2515_pdata, 425 .platform_data = &zeus_mcp2515_pdata,
426 .irq = gpio_to_irq(ZEUS_CAN_GPIO), 426 .irq = PXA_GPIO_TO_IRQ(ZEUS_CAN_GPIO),
427 .max_speed_hz = 1*1000*1000, 427 .max_speed_hz = 1*1000*1000,
428 .bus_num = 3, 428 .bus_num = 3,
429 .mode = SPI_MODE_0, 429 .mode = SPI_MODE_0,
@@ -753,7 +753,7 @@ static struct i2c_board_info __initdata zeus_i2c_devices[] = {
753 { 753 {
754 I2C_BOARD_INFO("pca9535", 0x20), 754 I2C_BOARD_INFO("pca9535", 0x20),
755 .platform_data = &zeus_pca953x_pdata[2], 755 .platform_data = &zeus_pca953x_pdata[2],
756 .irq = gpio_to_irq(ZEUS_EXTGPIO_GPIO), 756 .irq = PXA_GPIO_TO_IRQ(ZEUS_EXTGPIO_GPIO),
757 }, 757 },
758 { I2C_BOARD_INFO("lm75a", 0x48) }, 758 { I2C_BOARD_INFO("lm75a", 0x48) },
759 { I2C_BOARD_INFO("24c01", 0x50) }, 759 { I2C_BOARD_INFO("24c01", 0x50) },