diff options
Diffstat (limited to 'arch/arm/mach-pxa/smemc.c')
-rw-r--r-- | arch/arm/mach-pxa/smemc.c | 51 |
1 files changed, 17 insertions, 34 deletions
diff --git a/arch/arm/mach-pxa/smemc.c b/arch/arm/mach-pxa/smemc.c index d6f6904132a6..232b7316ec08 100644 --- a/arch/arm/mach-pxa/smemc.c +++ b/arch/arm/mach-pxa/smemc.c | |||
@@ -9,50 +9,37 @@ | |||
9 | #include <linux/sysdev.h> | 9 | #include <linux/sysdev.h> |
10 | 10 | ||
11 | #include <mach/hardware.h> | 11 | #include <mach/hardware.h> |
12 | 12 | #include <mach/smemc.h> | |
13 | #define SMEMC_PHYS_BASE (0x4A000000) | ||
14 | #define SMEMC_PHYS_SIZE (0x90) | ||
15 | |||
16 | #define MSC0 (0x08) /* Static Memory Controller Register 0 */ | ||
17 | #define MSC1 (0x0C) /* Static Memory Controller Register 1 */ | ||
18 | #define SXCNFG (0x1C) /* Synchronous Static Memory Control Register */ | ||
19 | #define MEMCLKCFG (0x68) /* Clock Configuration */ | ||
20 | #define CSADRCFG0 (0x80) /* Address Configuration Register for CS0 */ | ||
21 | #define CSADRCFG1 (0x84) /* Address Configuration Register for CS1 */ | ||
22 | #define CSADRCFG2 (0x88) /* Address Configuration Register for CS2 */ | ||
23 | #define CSADRCFG3 (0x8C) /* Address Configuration Register for CS3 */ | ||
24 | 13 | ||
25 | #ifdef CONFIG_PM | 14 | #ifdef CONFIG_PM |
26 | static void __iomem *smemc_mmio_base; | ||
27 | |||
28 | static unsigned long msc[2]; | 15 | static unsigned long msc[2]; |
29 | static unsigned long sxcnfg, memclkcfg; | 16 | static unsigned long sxcnfg, memclkcfg; |
30 | static unsigned long csadrcfg[4]; | 17 | static unsigned long csadrcfg[4]; |
31 | 18 | ||
32 | static int pxa3xx_smemc_suspend(struct sys_device *dev, pm_message_t state) | 19 | static int pxa3xx_smemc_suspend(struct sys_device *dev, pm_message_t state) |
33 | { | 20 | { |
34 | msc[0] = __raw_readl(smemc_mmio_base + MSC0); | 21 | msc[0] = __raw_readl(MSC0); |
35 | msc[1] = __raw_readl(smemc_mmio_base + MSC1); | 22 | msc[1] = __raw_readl(MSC1); |
36 | sxcnfg = __raw_readl(smemc_mmio_base + SXCNFG); | 23 | sxcnfg = __raw_readl(SXCNFG); |
37 | memclkcfg = __raw_readl(smemc_mmio_base + MEMCLKCFG); | 24 | memclkcfg = __raw_readl(MEMCLKCFG); |
38 | csadrcfg[0] = __raw_readl(smemc_mmio_base + CSADRCFG0); | 25 | csadrcfg[0] = __raw_readl(CSADRCFG0); |
39 | csadrcfg[1] = __raw_readl(smemc_mmio_base + CSADRCFG1); | 26 | csadrcfg[1] = __raw_readl(CSADRCFG1); |
40 | csadrcfg[2] = __raw_readl(smemc_mmio_base + CSADRCFG2); | 27 | csadrcfg[2] = __raw_readl(CSADRCFG2); |
41 | csadrcfg[3] = __raw_readl(smemc_mmio_base + CSADRCFG3); | 28 | csadrcfg[3] = __raw_readl(CSADRCFG3); |
42 | 29 | ||
43 | return 0; | 30 | return 0; |
44 | } | 31 | } |
45 | 32 | ||
46 | static int pxa3xx_smemc_resume(struct sys_device *dev) | 33 | static int pxa3xx_smemc_resume(struct sys_device *dev) |
47 | { | 34 | { |
48 | __raw_writel(msc[0], smemc_mmio_base + MSC0); | 35 | __raw_writel(msc[0], MSC0); |
49 | __raw_writel(msc[1], smemc_mmio_base + MSC1); | 36 | __raw_writel(msc[1], MSC1); |
50 | __raw_writel(sxcnfg, smemc_mmio_base + SXCNFG); | 37 | __raw_writel(sxcnfg, SXCNFG); |
51 | __raw_writel(memclkcfg, smemc_mmio_base + MEMCLKCFG); | 38 | __raw_writel(memclkcfg, MEMCLKCFG); |
52 | __raw_writel(csadrcfg[0], smemc_mmio_base + CSADRCFG0); | 39 | __raw_writel(csadrcfg[0], CSADRCFG0); |
53 | __raw_writel(csadrcfg[1], smemc_mmio_base + CSADRCFG1); | 40 | __raw_writel(csadrcfg[1], CSADRCFG1); |
54 | __raw_writel(csadrcfg[2], smemc_mmio_base + CSADRCFG2); | 41 | __raw_writel(csadrcfg[2], CSADRCFG2); |
55 | __raw_writel(csadrcfg[3], smemc_mmio_base + CSADRCFG3); | 42 | __raw_writel(csadrcfg[3], CSADRCFG3); |
56 | 43 | ||
57 | return 0; | 44 | return 0; |
58 | } | 45 | } |
@@ -73,10 +60,6 @@ static int __init smemc_init(void) | |||
73 | int ret = 0; | 60 | int ret = 0; |
74 | 61 | ||
75 | if (cpu_is_pxa3xx()) { | 62 | if (cpu_is_pxa3xx()) { |
76 | smemc_mmio_base = ioremap(SMEMC_PHYS_BASE, SMEMC_PHYS_SIZE); | ||
77 | if (smemc_mmio_base == NULL) | ||
78 | return -ENODEV; | ||
79 | |||
80 | ret = sysdev_class_register(&smemc_sysclass); | 63 | ret = sysdev_class_register(&smemc_sysclass); |
81 | if (ret) | 64 | if (ret) |
82 | return ret; | 65 | return ret; |