diff options
Diffstat (limited to 'arch/arm/mach-pxa/sleep.S')
-rw-r--r-- | arch/arm/mach-pxa/sleep.S | 7 |
1 files changed, 0 insertions, 7 deletions
diff --git a/arch/arm/mach-pxa/sleep.S b/arch/arm/mach-pxa/sleep.S index 2ed95f369cfc..52c30b01a671 100644 --- a/arch/arm/mach-pxa/sleep.S +++ b/arch/arm/mach-pxa/sleep.S | |||
@@ -339,10 +339,6 @@ ENTRY(pxa_cpu_resume) | |||
339 | mcr p15, 0, r1, c8, c7, 0 @ invalidate I & D TLBs | 339 | mcr p15, 0, r1, c8, c7, 0 @ invalidate I & D TLBs |
340 | mcr p15, 0, r1, c7, c7, 0 @ invalidate I & D caches, BTB | 340 | mcr p15, 0, r1, c7, c7, 0 @ invalidate I & D caches, BTB |
341 | 341 | ||
342 | #ifdef CONFIG_XSCALE_CACHE_ERRATA | ||
343 | bic r9, r9, #0x0004 @ see cpu_xscale_proc_init | ||
344 | #endif | ||
345 | |||
346 | mcr p14, 0, r3, c6, c0, 0 @ clock configuration, turbo mode. | 342 | mcr p14, 0, r3, c6, c0, 0 @ clock configuration, turbo mode. |
347 | mcr p15, 0, r4, c15, c1, 0 @ CP access reg | 343 | mcr p15, 0, r4, c15, c1, 0 @ CP access reg |
348 | mcr p15, 0, r5, c13, c0, 0 @ PID | 344 | mcr p15, 0, r5, c13, c0, 0 @ PID |
@@ -368,9 +364,6 @@ sleep_save_sp: | |||
368 | 364 | ||
369 | .text | 365 | .text |
370 | resume_after_mmu: | 366 | resume_after_mmu: |
371 | #ifdef CONFIG_XSCALE_CACHE_ERRATA | ||
372 | bl cpu_xscale_proc_init | ||
373 | #endif | ||
374 | ldmfd sp!, {r2, r3} | 367 | ldmfd sp!, {r2, r3} |
375 | #ifndef CONFIG_IWMMXT | 368 | #ifndef CONFIG_IWMMXT |
376 | mar acc0, r2, r3 | 369 | mar acc0, r2, r3 |