1 files changed, 19 insertions, 28 deletions

diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c
index 15685d2b8f8c..03cbc38103ed 100644
--- a/arch/arm/mach-pxa/pxa3xx.c
+++ b/arch/arm/mach-pxa/pxa3xx.c
@@ -22,12 +22,13 @@
 #include <linux/io.h>
 #include <linux/sysdev.h>
 
-#include <asm/hardware.h>
-#include <asm/arch/pxa3xx-regs.h>
-#include <asm/arch/ohci.h>
-#include <asm/arch/pm.h>
-#include <asm/arch/dma.h>
-#include <asm/arch/ssp.h>
+#include <mach/hardware.h>
+#include <mach/pxa3xx-regs.h>
+#include <mach/reset.h>
+#include <mach/ohci.h>
+#include <mach/pm.h>
+#include <mach/dma.h>
+#include <mach/ssp.h>
 
 #include "generic.h"
 #include "devices.h"
@@ -109,6 +110,12 @@ unsigned int pxa3xx_get_memclk_frequency_10khz(void)
         return (clk / 10000);
 }
 
+void pxa3xx_clear_reset_status(unsigned int mask)
+{
+        /* RESET_STATUS_* has a 1:1 mapping with ARSR */
+        ARSR = mask;
+}
+
 /*
  * Return the current AC97 clock frequency.
  */
@@ -144,7 +151,7 @@ static unsigned long clk_pxa3xx_hsio_getrate(struct clk *clk)
         return hsio_clk;
 }
 
-static void clk_pxa3xx_cken_enable(struct clk *clk)
+void clk_pxa3xx_cken_enable(struct clk *clk)
 {
         unsigned long mask = 1ul << (clk->cken & 0x1f);
 
@@ -154,7 +161,7 @@ static void clk_pxa3xx_cken_enable(struct clk *clk)
                 CKENB |= mask;
 }
 
-static void clk_pxa3xx_cken_disable(struct clk *clk)
+void clk_pxa3xx_cken_disable(struct clk *clk)
 {
         unsigned long mask = 1ul << (clk->cken & 0x1f);
 
@@ -164,7 +171,7 @@ static void clk_pxa3xx_cken_disable(struct clk *clk)
                 CKENB &= ~mask;
 }
 
-static const struct clkops clk_pxa3xx_cken_ops = {
+const struct clkops clk_pxa3xx_cken_ops = {
         .enable         = clk_pxa3xx_cken_enable,
         .disable        = clk_pxa3xx_cken_disable,
 };
@@ -196,24 +203,6 @@ static const struct clkops clk_pout_ops = {
         .disable        = clk_pout_disable,
 };
 
-#define PXA3xx_CKEN(_name, _cken, _rate, _delay, _dev)  \
-        {                                               \
-                .name   = _name,                        \
-                .dev    = _dev,                         \
-                .ops    = &clk_pxa3xx_cken_ops,         \
-                .rate   = _rate,                        \
-                .cken   = CKEN_##_cken,                 \
-                .delay  = _delay,                       \
-        }
-
-#define PXA3xx_CK(_name, _cken, _ops, _dev)             \
-        {                                               \
-                .name   = _name,                        \
-                .dev    = _dev,                         \
-                .ops    = _ops,                         \
-                .cken   = CKEN_##_cken,                 \
-        }
-
 static struct clk pxa3xx_clks[] = {
         {
                 .name           = "CLK_POUT",
@@ -244,7 +233,6 @@ static struct clk pxa3xx_clks[] = {
 
         PXA3xx_CKEN("MMCCLK", MMC1, 19500000, 0, &pxa_device_mci.dev),
         PXA3xx_CKEN("MMCCLK", MMC2, 19500000, 0, &pxa3xx_device_mci2.dev),
-        PXA3xx_CKEN("MMCCLK", MMC3, 19500000, 0, &pxa3xx_device_mci3.dev),
 };
 
 #ifdef CONFIG_PM
@@ -551,6 +539,9 @@ static int __init pxa3xx_init(void)
         int i, ret = 0;
 
         if (cpu_is_pxa3xx()) {
+
+                reset_status = ARSR;
+
                 /*
                  * clear RDH bit every time after reset
                  *