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1/*
2 * arch/arm/mach-pxa/pcm990-baseboard.c
3 * Support for the Phytec phyCORE-PXA270 Development Platform (PCM-990).
4 *
5 * Refer
6 * http://www.phytec.com/products/rdk/ARM-XScale/phyCORE-XScale-PXA270.html
7 * for additional hardware info
8 *
9 * Author: Juergen Kilb
10 * Created: April 05, 2005
11 * Copyright: Phytec Messtechnik GmbH
12 * e-Mail: armlinux@phytec.de
13 *
14 * based on Intel Mainstone Board
15 *
16 * Copyright 2007 Juergen Beisert @ Pengutronix (j.beisert@pengutronix.de)
17 *
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License version 2 as
20 * published by the Free Software Foundation.
21 */
22
23#include <linux/irq.h>
24#include <linux/platform_device.h>
25#include <linux/ide.h>
26#include <asm/mach/map.h>
27#include <asm/arch/pxa-regs.h>
28#include <asm/arch/mmc.h>
29#include <asm/arch/ohci.h>
30#include <asm/arch/pcm990_baseboard.h>
31
32/*
33 * The PCM-990 development baseboard uses PCM-027's hardeware in the
34 * following way:
35 *
36 * - LCD support is in use
37 * - GPIO16 is output for back light on/off with PWM
38 * - GPIO58 ... GPIO73 are outputs for display data
39 * - GPIO74 is output output for LCDFCLK
40 * - GPIO75 is output for LCDLCLK
41 * - GPIO76 is output for LCDPCLK
42 * - GPIO77 is output for LCDBIAS
43 * - MMC support is in use
44 * - GPIO32 is output for MMCCLK
45 * - GPIO92 is MMDAT0
46 * - GPIO109 is MMDAT1
47 * - GPIO110 is MMCS0
48 * - GPIO111 is MMCS1
49 * - GPIO112 is MMCMD
50 * - IDE/CF card is in use
51 * - GPIO48 is output /POE
52 * - GPIO49 is output /PWE
53 * - GPIO50 is output /PIOR
54 * - GPIO51 is output /PIOW
55 * - GPIO54 is output /PCE2
56 * - GPIO55 is output /PREG
57 * - GPIO56 is input /PWAIT
58 * - GPIO57 is output /PIOS16
59 * - GPIO79 is output PSKTSEL
60 * - GPIO85 is output /PCE1
61 * - FFUART is in use
62 * - GPIO34 is input FFRXD
63 * - GPIO35 is input FFCTS
64 * - GPIO36 is input FFDCD
65 * - GPIO37 is input FFDSR
66 * - GPIO38 is input FFRI
67 * - GPIO39 is output FFTXD
68 * - GPIO40 is output FFDTR
69 * - GPIO41 is output FFRTS
70 * - BTUART is in use
71 * - GPIO42 is input BTRXD
72 * - GPIO43 is output BTTXD
73 * - GPIO44 is input BTCTS
74 * - GPIO45 is output BTRTS
75 * - IRUART is in use
76 * - GPIO46 is input STDRXD
77 * - GPIO47 is output STDTXD
78 * - AC97 is in use*)
79 * - GPIO28 is input AC97CLK
80 * - GPIO29 is input AC97DatIn
81 * - GPIO30 is output AC97DatO
82 * - GPIO31 is output AC97SYNC
83 * - GPIO113 is output AC97_RESET
84 * - SSP is in use
85 * - GPIO23 is output SSPSCLK
86 * - GPIO24 is output chip select to Max7301
87 * - GPIO25 is output SSPTXD
88 * - GPIO26 is input SSPRXD
89 * - GPIO27 is input for Max7301 IRQ
90 * - GPIO53 is input SSPSYSCLK
91 * - SSP3 is in use
92 * - GPIO81 is output SSPTXD3
93 * - GPIO82 is input SSPRXD3
94 * - GPIO83 is output SSPSFRM
95 * - GPIO84 is output SSPCLK3
96 *
97 * Otherwise claimed GPIOs:
98 * GPIO1 -> IRQ from user switch
99 * GPIO9 -> IRQ from power management
100 * GPIO10 -> IRQ from WML9712 AC97 controller
101 * GPIO11 -> IRQ from IDE controller
102 * GPIO12 -> IRQ from CF controller
103 * GPIO13 -> IRQ from CF controller
104 * GPIO14 -> GPIO free
105 * GPIO15 -> /CS1 selects baseboard's Control CPLD (U7, 16 bit wide data path)
106 * GPIO19 -> GPIO free
107 * GPIO20 -> /SDCS2
108 * GPIO21 -> /CS3 PC card socket select
109 * GPIO33 -> /CS5 network controller select
110 * GPIO78 -> /CS2 (16 bit wide data path)
111 * GPIO80 -> /CS4 (16 bit wide data path)
112 * GPIO86 -> GPIO free
113 * GPIO87 -> GPIO free
114 * GPIO90 -> LED0 on CPU module
115 * GPIO91 -> LED1 on CPI module
116 * GPIO117 -> SCL
117 * GPIO118 -> SDA
118 */
119
120static unsigned long pcm990_irq_enabled;
121
122static void pcm990_mask_ack_irq(unsigned int irq)
123{
124 int pcm990_irq = (irq - PCM027_IRQ(0));
125 PCM990_INTMSKENA = (pcm990_irq_enabled &= ~(1 << pcm990_irq));
126}
127
128static void pcm990_unmask_irq(unsigned int irq)
129{
130 int pcm990_irq = (irq - PCM027_IRQ(0));
131 /* the irq can be acknowledged only if deasserted, so it's done here */
132 PCM990_INTSETCLR |= 1 << pcm990_irq;
133 PCM990_INTMSKENA = (pcm990_irq_enabled |= (1 << pcm990_irq));
134}
135
136static struct irq_chip pcm990_irq_chip = {
137 .mask_ack = pcm990_mask_ack_irq,
138 .unmask = pcm990_unmask_irq,
139};
140
141static void pcm990_irq_handler(unsigned int irq, struct irq_desc *desc)
142{
143 unsigned long pending = (~PCM990_INTSETCLR) & pcm990_irq_enabled;
144
145 do {
146 GEDR(PCM990_CTRL_INT_IRQ_GPIO) =
147 GPIO_bit(PCM990_CTRL_INT_IRQ_GPIO);
148 if (likely(pending)) {
149 irq = PCM027_IRQ(0) + __ffs(pending);
150 desc = irq_desc + irq;
151 desc_handle_irq(irq, desc);
152 }
153 pending = (~PCM990_INTSETCLR) & pcm990_irq_enabled;
154 } while (pending);
155}
156
157static void __init pcm990_init_irq(void)
158{
159 int irq;
160
161 /* setup extra PCM990 irqs */
162 for (irq = PCM027_IRQ(0); irq <= PCM027_IRQ(3); irq++) {
163 set_irq_chip(irq, &pcm990_irq_chip);
164 set_irq_handler(irq, handle_level_irq);
165 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
166 }
167
168 PCM990_INTMSKENA = 0x00; /* disable all Interrupts */
169 PCM990_INTSETCLR = 0xFF;
170
171 set_irq_chained_handler(PCM990_CTRL_INT_IRQ, pcm990_irq_handler);
172 set_irq_type(PCM990_CTRL_INT_IRQ, PCM990_CTRL_INT_IRQ_EDGE);
173}
174
175static int pcm990_mci_init(struct device *dev, irq_handler_t mci_detect_int,
176 void *data)
177{
178 int err;
179
180 /*
181 * enable GPIO for PXA27x MMC controller
182 */
183 pxa_gpio_mode(GPIO32_MMCCLK_MD);
184 pxa_gpio_mode(GPIO112_MMCCMD_MD);
185 pxa_gpio_mode(GPIO92_MMCDAT0_MD);
186 pxa_gpio_mode(GPIO109_MMCDAT1_MD);
187 pxa_gpio_mode(GPIO110_MMCDAT2_MD);
188 pxa_gpio_mode(GPIO111_MMCDAT3_MD);
189
190 err = request_irq(PCM027_MMCDET_IRQ, mci_detect_int, IRQF_DISABLED,
191 "MMC card detect", data);
192 if (err)
193 printk(KERN_ERR "pcm990_mci_init: MMC/SD: can't request MMC "
194 "card detect IRQ\n");
195
196 return err;
197}
198
199static void pcm990_mci_setpower(struct device *dev, unsigned int vdd)
200{
201 struct pxamci_platform_data *p_d = dev->platform_data;
202
203 if ((1 << vdd) & p_d->ocr_mask)
204 __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG5) =
205 PCM990_CTRL_MMC2PWR;
206 else
207 __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG5) =
208 ~PCM990_CTRL_MMC2PWR;
209}
210
211static void pcm990_mci_exit(struct device *dev, void *data)
212{
213 free_irq(PCM027_MMCDET_IRQ, data);
214}
215
216#define MSECS_PER_JIFFY (1000/HZ)
217
218static struct pxamci_platform_data pcm990_mci_platform_data = {
219 .detect_delay = 250 / MSECS_PER_JIFFY,
220 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
221 .init = pcm990_mci_init,
222 .setpower = pcm990_mci_setpower,
223 .exit = pcm990_mci_exit,
224};
225
226/*
227 * init OHCI hardware to work with
228 *
229 * Note: Only USB port 1 (host only) is connected
230 *
231 * GPIO88 (USBHPWR#1): overcurrent in, overcurrent when low
232 * GPIO89 (USBHPEN#1): power-on out, on when low
233 */
234static int pcm990_ohci_init(struct device *dev)
235{
236 pxa_gpio_mode(PCM990_USB_OVERCURRENT);
237 pxa_gpio_mode(PCM990_USB_PWR_EN);
238 /*
239 * disable USB port 2 and 3
240 * power sense is active low
241 */
242 UHCHR = ((UHCHR) | UHCHR_PCPL | UHCHR_PSPL | UHCHR_SSEP2 |
243 UHCHR_SSEP3) & ~(UHCHR_SSEP1 | UHCHR_SSE);
244 /*
245 * wait 10ms after Power on
246 * overcurrent per port
247 * power switch per port
248 */
249 UHCRHDA = (5<<24) | (1<<11) | (1<<8); /* FIXME: Required? */
250
251 return 0;
252}
253
254static struct pxaohci_platform_data pcm990_ohci_platform_data = {
255 .port_mode = PMM_PERPORT_MODE,
256 .init = pcm990_ohci_init,
257 .exit = NULL,
258};
259
260/*
261 * AC97 support
262 * Note: The connected AC97 mixer also reports interrupts at PCM990_AC97_IRQ
263 */
264static struct resource pxa27x_ac97_resources[] = {
265 [0] = {
266 .start = 0x40500000,
267 .end = 0x40500000 + 0xfff,
268 .flags = IORESOURCE_MEM,
269 },
270 [1] = {
271 .start = IRQ_AC97,
272 .end = IRQ_AC97,
273 .flags = IORESOURCE_IRQ,
274 },
275};
276
277static u64 pxa_ac97_dmamask = 0xffffffffUL;
278
279static struct platform_device pxa27x_device_ac97 = {
280 .name = "pxa2xx-ac97",
281 .id = -1,
282 .dev = {
283 .dma_mask = &pxa_ac97_dmamask,
284 .coherent_dma_mask = 0xffffffff,
285 },
286 .num_resources = ARRAY_SIZE(pxa27x_ac97_resources),
287 .resource = pxa27x_ac97_resources,
288};
289
290/*
291 * enable generic access to the base board control CPLDs U6 and U7
292 */
293static struct map_desc pcm990_io_desc[] __initdata = {
294 {
295 .virtual = PCM990_CTRL_BASE,
296 .pfn = __phys_to_pfn(PCM990_CTRL_PHYS),
297 .length = PCM990_CTRL_SIZE,
298 .type = MT_DEVICE /* CPLD */
299 }, {
300 .virtual = PCM990_CF_PLD_BASE,
301 .pfn = __phys_to_pfn(PCM990_CF_PLD_PHYS),
302 .length = PCM990_CF_PLD_SIZE,
303 .type = MT_DEVICE /* CPLD */
304 }
305};
306
307/*
308 * system init for baseboard usage. Will be called by pcm027 init.
309 *
310 * Add platform devices present on this baseboard and init
311 * them from CPU side as far as required to use them later on
312 */
313void __init pcm990_baseboard_init(void)
314{
315 /* register CPLD access */
316 iotable_init(pcm990_io_desc, ARRAY_SIZE(pcm990_io_desc));
317
318 /* register CPLD's IRQ controller */
319 pcm990_init_irq();
320
321 platform_device_register(&pxa27x_device_ac97);
322
323 /* MMC */
324 pxa_set_mci_info(&pcm990_mci_platform_data);
325
326 /* USB host */
327 pxa_set_ohci_info(&pcm990_ohci_platform_data);
328
329 printk(KERN_INFO"PCM-990 Evaluation baseboard initialized\n");
330}
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