diff options
Diffstat (limited to 'arch/arm/mach-pxa/irq.c')
-rw-r--r-- | arch/arm/mach-pxa/irq.c | 36 |
1 files changed, 34 insertions, 2 deletions
diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c index 32ed551bf9c5..b09e848eb6c6 100644 --- a/arch/arm/mach-pxa/irq.c +++ b/arch/arm/mach-pxa/irq.c | |||
@@ -37,6 +37,8 @@ | |||
37 | #define IPR(i) (((i) < 32) ? (0x01c + ((i) << 2)) : \ | 37 | #define IPR(i) (((i) < 32) ? (0x01c + ((i) << 2)) : \ |
38 | ((i) < 64) ? (0x0b0 + (((i) - 32) << 2)) : \ | 38 | ((i) < 64) ? (0x0b0 + (((i) - 32) << 2)) : \ |
39 | (0x144 + (((i) - 64) << 2))) | 39 | (0x144 + (((i) - 64) << 2))) |
40 | #define ICHP_VAL_IRQ (1 << 31) | ||
41 | #define ICHP_IRQ(i) (((i) >> 16) & 0x7fff) | ||
40 | #define IPR_VALID (1 << 31) | 42 | #define IPR_VALID (1 << 31) |
41 | #define IRQ_BIT(n) (((n) - PXA_IRQ(0)) & 0x1f) | 43 | #define IRQ_BIT(n) (((n) - PXA_IRQ(0)) & 0x1f) |
42 | 44 | ||
@@ -64,7 +66,7 @@ static inline void __iomem *irq_base(int i) | |||
64 | return (void __iomem *)io_p2v(phys_base[i]); | 66 | return (void __iomem *)io_p2v(phys_base[i]); |
65 | } | 67 | } |
66 | 68 | ||
67 | static void pxa_mask_irq(struct irq_data *d) | 69 | void pxa_mask_irq(struct irq_data *d) |
68 | { | 70 | { |
69 | void __iomem *base = irq_data_get_irq_chip_data(d); | 71 | void __iomem *base = irq_data_get_irq_chip_data(d); |
70 | uint32_t icmr = __raw_readl(base + ICMR); | 72 | uint32_t icmr = __raw_readl(base + ICMR); |
@@ -73,7 +75,7 @@ static void pxa_mask_irq(struct irq_data *d) | |||
73 | __raw_writel(icmr, base + ICMR); | 75 | __raw_writel(icmr, base + ICMR); |
74 | } | 76 | } |
75 | 77 | ||
76 | static void pxa_unmask_irq(struct irq_data *d) | 78 | void pxa_unmask_irq(struct irq_data *d) |
77 | { | 79 | { |
78 | void __iomem *base = irq_data_get_irq_chip_data(d); | 80 | void __iomem *base = irq_data_get_irq_chip_data(d); |
79 | uint32_t icmr = __raw_readl(base + ICMR); | 81 | uint32_t icmr = __raw_readl(base + ICMR); |
@@ -127,6 +129,36 @@ static struct irq_chip pxa_low_gpio_chip = { | |||
127 | .irq_set_type = pxa_set_low_gpio_type, | 129 | .irq_set_type = pxa_set_low_gpio_type, |
128 | }; | 130 | }; |
129 | 131 | ||
132 | asmlinkage void __exception_irq_entry icip_handle_irq(struct pt_regs *regs) | ||
133 | { | ||
134 | uint32_t icip, icmr, mask; | ||
135 | |||
136 | do { | ||
137 | icip = __raw_readl(IRQ_BASE + ICIP); | ||
138 | icmr = __raw_readl(IRQ_BASE + ICMR); | ||
139 | mask = icip & icmr; | ||
140 | |||
141 | if (mask == 0) | ||
142 | break; | ||
143 | |||
144 | handle_IRQ(PXA_IRQ(fls(mask) - 1), regs); | ||
145 | } while (1); | ||
146 | } | ||
147 | |||
148 | asmlinkage void __exception_irq_entry ichp_handle_irq(struct pt_regs *regs) | ||
149 | { | ||
150 | uint32_t ichp; | ||
151 | |||
152 | do { | ||
153 | __asm__ __volatile__("mrc p6, 0, %0, c5, c0, 0\n": "=r"(ichp)); | ||
154 | |||
155 | if ((ichp & ICHP_VAL_IRQ) == 0) | ||
156 | break; | ||
157 | |||
158 | handle_IRQ(PXA_IRQ(ICHP_IRQ(ichp)), regs); | ||
159 | } while (1); | ||
160 | } | ||
161 | |||
130 | static void __init pxa_init_low_gpio_irq(set_wake_t fn) | 162 | static void __init pxa_init_low_gpio_irq(set_wake_t fn) |
131 | { | 163 | { |
132 | int irq; | 164 | int irq; |