diff options
Diffstat (limited to 'arch/arm/mach-pxa/irq.c')
-rw-r--r-- | arch/arm/mach-pxa/irq.c | 61 |
1 files changed, 1 insertions, 60 deletions
diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c index 532c5d3a97d2..5dae15ea6718 100644 --- a/arch/arm/mach-pxa/irq.c +++ b/arch/arm/mach-pxa/irq.c | |||
@@ -22,7 +22,6 @@ | |||
22 | 22 | ||
23 | #include <mach/hardware.h> | 23 | #include <mach/hardware.h> |
24 | #include <mach/irqs.h> | 24 | #include <mach/irqs.h> |
25 | #include <mach/gpio-pxa.h> | ||
26 | 25 | ||
27 | #include "generic.h" | 26 | #include "generic.h" |
28 | 27 | ||
@@ -92,44 +91,6 @@ static struct irq_chip pxa_internal_irq_chip = { | |||
92 | .irq_unmask = pxa_unmask_irq, | 91 | .irq_unmask = pxa_unmask_irq, |
93 | }; | 92 | }; |
94 | 93 | ||
95 | /* | ||
96 | * GPIO IRQs for GPIO 0 and 1 | ||
97 | */ | ||
98 | static int pxa_set_low_gpio_type(struct irq_data *d, unsigned int type) | ||
99 | { | ||
100 | int gpio = d->irq - IRQ_GPIO0; | ||
101 | |||
102 | if (__gpio_is_occupied(gpio)) { | ||
103 | pr_err("%s failed: GPIO is configured\n", __func__); | ||
104 | return -EINVAL; | ||
105 | } | ||
106 | |||
107 | if (type & IRQ_TYPE_EDGE_RISING) | ||
108 | GRER0 |= GPIO_bit(gpio); | ||
109 | else | ||
110 | GRER0 &= ~GPIO_bit(gpio); | ||
111 | |||
112 | if (type & IRQ_TYPE_EDGE_FALLING) | ||
113 | GFER0 |= GPIO_bit(gpio); | ||
114 | else | ||
115 | GFER0 &= ~GPIO_bit(gpio); | ||
116 | |||
117 | return 0; | ||
118 | } | ||
119 | |||
120 | static void pxa_ack_low_gpio(struct irq_data *d) | ||
121 | { | ||
122 | GEDR0 = (1 << (d->irq - IRQ_GPIO0)); | ||
123 | } | ||
124 | |||
125 | static struct irq_chip pxa_low_gpio_chip = { | ||
126 | .name = "GPIO-l", | ||
127 | .irq_ack = pxa_ack_low_gpio, | ||
128 | .irq_mask = pxa_mask_irq, | ||
129 | .irq_unmask = pxa_unmask_irq, | ||
130 | .irq_set_type = pxa_set_low_gpio_type, | ||
131 | }; | ||
132 | |||
133 | asmlinkage void __exception_irq_entry icip_handle_irq(struct pt_regs *regs) | 94 | asmlinkage void __exception_irq_entry icip_handle_irq(struct pt_regs *regs) |
134 | { | 95 | { |
135 | uint32_t icip, icmr, mask; | 96 | uint32_t icip, icmr, mask; |
@@ -160,26 +121,7 @@ asmlinkage void __exception_irq_entry ichp_handle_irq(struct pt_regs *regs) | |||
160 | } while (1); | 121 | } while (1); |
161 | } | 122 | } |
162 | 123 | ||
163 | static void __init pxa_init_low_gpio_irq(set_wake_t fn) | 124 | void __init pxa_init_irq(int irq_nr, int (*fn)(struct irq_data *, unsigned int)) |
164 | { | ||
165 | int irq; | ||
166 | |||
167 | /* clear edge detection on GPIO 0 and 1 */ | ||
168 | GFER0 &= ~0x3; | ||
169 | GRER0 &= ~0x3; | ||
170 | GEDR0 = 0x3; | ||
171 | |||
172 | for (irq = IRQ_GPIO0; irq <= IRQ_GPIO1; irq++) { | ||
173 | irq_set_chip_and_handler(irq, &pxa_low_gpio_chip, | ||
174 | handle_edge_irq); | ||
175 | irq_set_chip_data(irq, irq_base(0)); | ||
176 | set_irq_flags(irq, IRQF_VALID); | ||
177 | } | ||
178 | |||
179 | pxa_low_gpio_chip.irq_set_wake = fn; | ||
180 | } | ||
181 | |||
182 | void __init pxa_init_irq(int irq_nr, set_wake_t fn) | ||
183 | { | 125 | { |
184 | int irq, i, n; | 126 | int irq, i, n; |
185 | 127 | ||
@@ -209,7 +151,6 @@ void __init pxa_init_irq(int irq_nr, set_wake_t fn) | |||
209 | __raw_writel(1, irq_base(0) + ICCR); | 151 | __raw_writel(1, irq_base(0) + ICCR); |
210 | 152 | ||
211 | pxa_internal_irq_chip.irq_set_wake = fn; | 153 | pxa_internal_irq_chip.irq_set_wake = fn; |
212 | pxa_init_low_gpio_irq(fn); | ||
213 | } | 154 | } |
214 | 155 | ||
215 | #ifdef CONFIG_PM | 156 | #ifdef CONFIG_PM |