1 files changed, 35 insertions, 48 deletions

diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c
index 54e91c9e71c8..2693e3c3776f 100644
--- a/arch/arm/mach-pxa/irq.c
+++ b/arch/arm/mach-pxa/irq.c
@@ -53,37 +53,48 @@ static inline int cpu_has_ipr(void)
         return !cpu_is_pxa25x();
 }
 
-static void pxa_mask_irq(unsigned int irq)
+static inline void __iomem *irq_base(int i)
+{
+        static unsigned long phys_base[] = {
+                0x40d00000,
+                0x40d0009c,
+                0x40d00130,
+        };
+
+        return (void __iomem *)io_p2v(phys_base[i]);
+}
+
+static void pxa_mask_irq(struct irq_data *d)
 {
-        void __iomem *base = get_irq_chip_data(irq);
+        void __iomem *base = irq_data_get_irq_chip_data(d);
         uint32_t icmr = __raw_readl(base + ICMR);
 
-        icmr &= ~(1 << IRQ_BIT(irq));
+        icmr &= ~(1 << IRQ_BIT(d->irq));
         __raw_writel(icmr, base + ICMR);
 }
 
-static void pxa_unmask_irq(unsigned int irq)
+static void pxa_unmask_irq(struct irq_data *d)
 {
-        void __iomem *base = get_irq_chip_data(irq);
+        void __iomem *base = irq_data_get_irq_chip_data(d);
         uint32_t icmr = __raw_readl(base + ICMR);
 
-        icmr |= 1 << IRQ_BIT(irq);
+        icmr |= 1 << IRQ_BIT(d->irq);
         __raw_writel(icmr, base + ICMR);
 }
 
 static struct irq_chip pxa_internal_irq_chip = {
         .name           = "SC",
-        .ack            = pxa_mask_irq,
-        .mask           = pxa_mask_irq,
-        .unmask         = pxa_unmask_irq,
+        .irq_ack        = pxa_mask_irq,
+        .irq_mask       = pxa_mask_irq,
+        .irq_unmask     = pxa_unmask_irq,
 };
 
 /*
  * GPIO IRQs for GPIO 0 and 1
  */
-static int pxa_set_low_gpio_type(unsigned int irq, unsigned int type)
+static int pxa_set_low_gpio_type(struct irq_data *d, unsigned int type)
 {
-        int gpio = irq - IRQ_GPIO0;
+        int gpio = d->irq - IRQ_GPIO0;
 
         if (__gpio_is_occupied(gpio)) {
                 pr_err("%s failed: GPIO is configured\n", __func__);
@@ -103,31 +114,17 @@ static int pxa_set_low_gpio_type(unsigned int irq, unsigned int type)
         return 0;
 }
 
-static void pxa_ack_low_gpio(unsigned int irq)
-{
-        GEDR0 = (1 << (irq - IRQ_GPIO0));
-}
-
-static void pxa_mask_low_gpio(unsigned int irq)
-{
-        struct irq_desc *desc = irq_to_desc(irq);
-
-        desc->chip->mask(irq);
-}
-
-static void pxa_unmask_low_gpio(unsigned int irq)
+static void pxa_ack_low_gpio(struct irq_data *d)
 {
-        struct irq_desc *desc = irq_to_desc(irq);
-
-        desc->chip->unmask(irq);
+        GEDR0 = (1 << (d->irq - IRQ_GPIO0));
 }
 
 static struct irq_chip pxa_low_gpio_chip = {
         .name           = "GPIO-l",
-        .ack            = pxa_ack_low_gpio,
-        .mask           = pxa_mask_low_gpio,
-        .unmask         = pxa_unmask_low_gpio,
-        .set_type       = pxa_set_low_gpio_type,
+        .irq_ack        = pxa_ack_low_gpio,
+        .irq_mask       = pxa_mask_irq,
+        .irq_unmask     = pxa_unmask_irq,
+        .irq_set_type   = pxa_set_low_gpio_type,
 };
 
 static void __init pxa_init_low_gpio_irq(set_wake_t fn)
@@ -141,22 +138,12 @@ static void __init pxa_init_low_gpio_irq(set_wake_t fn)
 
         for (irq = IRQ_GPIO0; irq <= IRQ_GPIO1; irq++) {
                 set_irq_chip(irq, &pxa_low_gpio_chip);
+                set_irq_chip_data(irq, irq_base(0));
                 set_irq_handler(irq, handle_edge_irq);
                 set_irq_flags(irq, IRQF_VALID);
         }
 
-        pxa_low_gpio_chip.set_wake = fn;
-}
-
-static inline void __iomem *irq_base(int i)
-{
-        static unsigned long phys_base[] = {
-                0x40d00000,
-                0x40d0009c,
-                0x40d00130,
-        };
-
-        return (void __iomem *)io_p2v(phys_base[i >> 5]);
+        pxa_low_gpio_chip.irq_set_wake = fn;
 }
 
 void __init pxa_init_irq(int irq_nr, set_wake_t fn)
@@ -168,7 +155,7 @@ void __init pxa_init_irq(int irq_nr, set_wake_t fn)
         pxa_internal_irq_nr = irq_nr;
 
         for (n = 0; n < irq_nr; n += 32) {
-                void __iomem *base = irq_base(n);
+                void __iomem *base = irq_base(n >> 5);
 
                 __raw_writel(0, base + ICMR);   /* disable all IRQs */
                 __raw_writel(0, base + ICLR);   /* all IRQs are IRQ, not FIQ */
@@ -188,7 +175,7 @@ void __init pxa_init_irq(int irq_nr, set_wake_t fn)
         /* only unmasked interrupts kick us out of idle */
         __raw_writel(1, irq_base(0) + ICCR);
 
-        pxa_internal_irq_chip.set_wake = fn;
+        pxa_internal_irq_chip.irq_set_wake = fn;
         pxa_init_low_gpio_irq(fn);
 }
 
@@ -200,7 +187,7 @@ static int pxa_irq_suspend(struct sys_device *dev, pm_message_t state)
 {
         int i;
 
-        for (i = 0; i < pxa_internal_irq_nr; i += 32) {
+        for (i = 0; i < pxa_internal_irq_nr / 32; i++) {
                 void __iomem *base = irq_base(i);
 
                 saved_icmr[i] = __raw_readl(base + ICMR);
@@ -219,14 +206,14 @@ static int pxa_irq_resume(struct sys_device *dev)
 {
         int i;
 
-        for (i = 0; i < pxa_internal_irq_nr; i += 32) {
+        for (i = 0; i < pxa_internal_irq_nr / 32; i++) {
                 void __iomem *base = irq_base(i);
 
                 __raw_writel(saved_icmr[i], base + ICMR);
                 __raw_writel(0, base + ICLR);
         }
 
-        if (!cpu_is_pxa25x())
+        if (cpu_has_ipr())
                 for (i = 0; i < pxa_internal_irq_nr; i++)
                         __raw_writel(saved_ipr[i], IRQ_BASE + IPR(i));