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-rw-r--r--arch/arm/mach-pxa/include/mach/balloon3.h6
-rw-r--r--arch/arm/mach-pxa/include/mach/corgi.h26
-rw-r--r--arch/arm/mach-pxa/include/mach/csb726.h4
-rw-r--r--arch/arm/mach-pxa/include/mach/gpio-pxa.h133
-rw-r--r--arch/arm/mach-pxa/include/mach/gpio.h20
-rw-r--r--arch/arm/mach-pxa/include/mach/gumstix.h20
-rw-r--r--arch/arm/mach-pxa/include/mach/hx4700.h2
-rw-r--r--arch/arm/mach-pxa/include/mach/idp.h16
-rw-r--r--arch/arm/mach-pxa/include/mach/irqs.h8
-rw-r--r--arch/arm/mach-pxa/include/mach/littleton.h4
-rw-r--r--arch/arm/mach-pxa/include/mach/magician.h2
-rw-r--r--arch/arm/mach-pxa/include/mach/palmld.h8
-rw-r--r--arch/arm/mach-pxa/include/mach/palmt5.h8
-rw-r--r--arch/arm/mach-pxa/include/mach/palmtc.h4
-rw-r--r--arch/arm/mach-pxa/include/mach/palmtx.h8
-rw-r--r--arch/arm/mach-pxa/include/mach/pcm027.h8
-rw-r--r--arch/arm/mach-pxa/include/mach/pcm990_baseboard.h14
-rw-r--r--arch/arm/mach-pxa/include/mach/poodle.h26
-rw-r--r--arch/arm/mach-pxa/include/mach/spitz.h40
-rw-r--r--arch/arm/mach-pxa/include/mach/tosa.h54
-rw-r--r--arch/arm/mach-pxa/include/mach/trizeps4.h16
21 files changed, 136 insertions, 291 deletions
diff --git a/arch/arm/mach-pxa/include/mach/balloon3.h b/arch/arm/mach-pxa/include/mach/balloon3.h
index 6d7eab3d0867..f02fa1e6ba86 100644
--- a/arch/arm/mach-pxa/include/mach/balloon3.h
+++ b/arch/arm/mach-pxa/include/mach/balloon3.h
@@ -172,9 +172,9 @@ enum balloon3_features {
172/* Balloon3 Interrupts */ 172/* Balloon3 Interrupts */
173#define BALLOON3_IRQ(x) (IRQ_BOARD_START + (x)) 173#define BALLOON3_IRQ(x) (IRQ_BOARD_START + (x))
174 174
175#define BALLOON3_AUX_NIRQ IRQ_GPIO(BALLOON3_GPIO_AUX_NIRQ) 175#define BALLOON3_AUX_NIRQ PXA_GPIO_TO_IRQ(BALLOON3_GPIO_AUX_NIRQ)
176#define BALLOON3_CODEC_IRQ IRQ_GPIO(BALLOON3_GPIO_CODEC_IRQ) 176#define BALLOON3_CODEC_IRQ PXA_GPIO_TO_IRQ(BALLOON3_GPIO_CODEC_IRQ)
177#define BALLOON3_S0_CD_IRQ IRQ_GPIO(BALLOON3_GPIO_S0_CD) 177#define BALLOON3_S0_CD_IRQ PXA_GPIO_TO_IRQ(BALLOON3_GPIO_S0_CD)
178 178
179#define BALLOON3_NR_IRQS (IRQ_BOARD_START + 16) 179#define BALLOON3_NR_IRQS (IRQ_BOARD_START + 16)
180 180
diff --git a/arch/arm/mach-pxa/include/mach/corgi.h b/arch/arm/mach-pxa/include/mach/corgi.h
index 5dfd1195a5a7..f3c3493b468d 100644
--- a/arch/arm/mach-pxa/include/mach/corgi.h
+++ b/arch/arm/mach-pxa/include/mach/corgi.h
@@ -66,18 +66,18 @@
66/* 66/*
67 * Corgi Interrupts 67 * Corgi Interrupts
68 */ 68 */
69#define CORGI_IRQ_GPIO_KEY_INT IRQ_GPIO(0) 69#define CORGI_IRQ_GPIO_KEY_INT PXA_GPIO_TO_IRQ(0)
70#define CORGI_IRQ_GPIO_AC_IN IRQ_GPIO(1) 70#define CORGI_IRQ_GPIO_AC_IN PXA_GPIO_TO_IRQ(1)
71#define CORGI_IRQ_GPIO_WAKEUP IRQ_GPIO(3) 71#define CORGI_IRQ_GPIO_WAKEUP PXA_GPIO_TO_IRQ(3)
72#define CORGI_IRQ_GPIO_AK_INT IRQ_GPIO(4) 72#define CORGI_IRQ_GPIO_AK_INT PXA_GPIO_TO_IRQ(4)
73#define CORGI_IRQ_GPIO_TP_INT IRQ_GPIO(5) 73#define CORGI_IRQ_GPIO_TP_INT PXA_GPIO_TO_IRQ(5)
74#define CORGI_IRQ_GPIO_nSD_DETECT IRQ_GPIO(9) 74#define CORGI_IRQ_GPIO_nSD_DETECT PXA_GPIO_TO_IRQ(9)
75#define CORGI_IRQ_GPIO_nSD_INT IRQ_GPIO(10) 75#define CORGI_IRQ_GPIO_nSD_INT PXA_GPIO_TO_IRQ(10)
76#define CORGI_IRQ_GPIO_MAIN_BAT_LOW IRQ_GPIO(11) 76#define CORGI_IRQ_GPIO_MAIN_BAT_LOW PXA_GPIO_TO_IRQ(11)
77#define CORGI_IRQ_GPIO_CF_CD IRQ_GPIO(14) 77#define CORGI_IRQ_GPIO_CF_CD PXA_GPIO_TO_IRQ(14)
78#define CORGI_IRQ_GPIO_CHRG_FULL IRQ_GPIO(16) /* Battery fully charged */ 78#define CORGI_IRQ_GPIO_CHRG_FULL PXA_GPIO_TO_IRQ(16) /* Battery fully charged */
79#define CORGI_IRQ_GPIO_CF_IRQ IRQ_GPIO(17) 79#define CORGI_IRQ_GPIO_CF_IRQ PXA_GPIO_TO_IRQ(17)
80#define CORGI_IRQ_GPIO_KEY_SENSE(a) IRQ_GPIO(58+(a)) /* Keyboard Sense lines */ 80#define CORGI_IRQ_GPIO_KEY_SENSE(a) PXA_GPIO_TO_IRQ(58+(a)) /* Keyboard Sense lines */
81 81
82 82
83/* 83/*
@@ -98,7 +98,7 @@
98 CORGI_SCP_MIC_BIAS ) 98 CORGI_SCP_MIC_BIAS )
99#define CORGI_SCOOP_IO_OUT ( CORGI_SCP_MUTE_L | CORGI_SCP_MUTE_R ) 99#define CORGI_SCOOP_IO_OUT ( CORGI_SCP_MUTE_L | CORGI_SCP_MUTE_R )
100 100
101#define CORGI_SCOOP_GPIO_BASE (NR_BUILTIN_GPIO) 101#define CORGI_SCOOP_GPIO_BASE (PXA_NR_BUILTIN_GPIO)
102#define CORGI_GPIO_LED_GREEN (CORGI_SCOOP_GPIO_BASE + 0) 102#define CORGI_GPIO_LED_GREEN (CORGI_SCOOP_GPIO_BASE + 0)
103#define CORGI_GPIO_SWA (CORGI_SCOOP_GPIO_BASE + 1) /* Hinge Switch A */ 103#define CORGI_GPIO_SWA (CORGI_SCOOP_GPIO_BASE + 1) /* Hinge Switch A */
104#define CORGI_GPIO_SWB (CORGI_SCOOP_GPIO_BASE + 2) /* Hinge Switch B */ 104#define CORGI_GPIO_SWB (CORGI_SCOOP_GPIO_BASE + 2) /* Hinge Switch B */
diff --git a/arch/arm/mach-pxa/include/mach/csb726.h b/arch/arm/mach-pxa/include/mach/csb726.h
index 747ab1a71f2f..2628e7b72116 100644
--- a/arch/arm/mach-pxa/include/mach/csb726.h
+++ b/arch/arm/mach-pxa/include/mach/csb726.h
@@ -19,8 +19,8 @@
19#define CSB726_FLASH_SIZE (64 * 1024 * 1024) 19#define CSB726_FLASH_SIZE (64 * 1024 * 1024)
20#define CSB726_FLASH_uMON (8 * 1024 * 1024) 20#define CSB726_FLASH_uMON (8 * 1024 * 1024)
21 21
22#define CSB726_IRQ_LAN gpio_to_irq(CSB726_GPIO_IRQ_LAN) 22#define CSB726_IRQ_LAN PXA_GPIO_TO_IRQ(CSB726_GPIO_IRQ_LAN)
23#define CSB726_IRQ_SM501 gpio_to_irq(CSB726_GPIO_IRQ_SM501) 23#define CSB726_IRQ_SM501 PXA_GPIO_TO_IRQ(CSB726_GPIO_IRQ_SM501)
24 24
25#endif 25#endif
26 26
diff --git a/arch/arm/mach-pxa/include/mach/gpio-pxa.h b/arch/arm/mach-pxa/include/mach/gpio-pxa.h
deleted file mode 100644
index 41b4c93a96c2..000000000000
--- a/arch/arm/mach-pxa/include/mach/gpio-pxa.h
+++ /dev/null
@@ -1,133 +0,0 @@
1/*
2 * Written by Philipp Zabel <philipp.zabel@gmail.com>
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 *
18 */
19#ifndef __MACH_PXA_GPIO_PXA_H
20#define __MACH_PXA_GPIO_PXA_H
21
22#include <mach/irqs.h>
23#include <mach/hardware.h>
24
25#define GPIO_REGS_VIRT io_p2v(0x40E00000)
26
27#define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
28#define GPIO_REG(x) (*(volatile u32 *)(GPIO_REGS_VIRT + (x)))
29
30/* GPIO Pin Level Registers */
31#define GPLR0 GPIO_REG(BANK_OFF(0) + 0x00)
32#define GPLR1 GPIO_REG(BANK_OFF(1) + 0x00)
33#define GPLR2 GPIO_REG(BANK_OFF(2) + 0x00)
34#define GPLR3 GPIO_REG(BANK_OFF(3) + 0x00)
35
36/* GPIO Pin Direction Registers */
37#define GPDR0 GPIO_REG(BANK_OFF(0) + 0x0c)
38#define GPDR1 GPIO_REG(BANK_OFF(1) + 0x0c)
39#define GPDR2 GPIO_REG(BANK_OFF(2) + 0x0c)
40#define GPDR3 GPIO_REG(BANK_OFF(3) + 0x0c)
41
42/* GPIO Pin Output Set Registers */
43#define GPSR0 GPIO_REG(BANK_OFF(0) + 0x18)
44#define GPSR1 GPIO_REG(BANK_OFF(1) + 0x18)
45#define GPSR2 GPIO_REG(BANK_OFF(2) + 0x18)
46#define GPSR3 GPIO_REG(BANK_OFF(3) + 0x18)
47
48/* GPIO Pin Output Clear Registers */
49#define GPCR0 GPIO_REG(BANK_OFF(0) + 0x24)
50#define GPCR1 GPIO_REG(BANK_OFF(1) + 0x24)
51#define GPCR2 GPIO_REG(BANK_OFF(2) + 0x24)
52#define GPCR3 GPIO_REG(BANK_OFF(3) + 0x24)
53
54/* GPIO Rising Edge Detect Registers */
55#define GRER0 GPIO_REG(BANK_OFF(0) + 0x30)
56#define GRER1 GPIO_REG(BANK_OFF(1) + 0x30)
57#define GRER2 GPIO_REG(BANK_OFF(2) + 0x30)
58#define GRER3 GPIO_REG(BANK_OFF(3) + 0x30)
59
60/* GPIO Falling Edge Detect Registers */
61#define GFER0 GPIO_REG(BANK_OFF(0) + 0x3c)
62#define GFER1 GPIO_REG(BANK_OFF(1) + 0x3c)
63#define GFER2 GPIO_REG(BANK_OFF(2) + 0x3c)
64#define GFER3 GPIO_REG(BANK_OFF(3) + 0x3c)
65
66/* GPIO Edge Detect Status Registers */
67#define GEDR0 GPIO_REG(BANK_OFF(0) + 0x48)
68#define GEDR1 GPIO_REG(BANK_OFF(1) + 0x48)
69#define GEDR2 GPIO_REG(BANK_OFF(2) + 0x48)
70#define GEDR3 GPIO_REG(BANK_OFF(3) + 0x48)
71
72/* GPIO Alternate Function Select Registers */
73#define GAFR0_L GPIO_REG(0x0054)
74#define GAFR0_U GPIO_REG(0x0058)
75#define GAFR1_L GPIO_REG(0x005C)
76#define GAFR1_U GPIO_REG(0x0060)
77#define GAFR2_L GPIO_REG(0x0064)
78#define GAFR2_U GPIO_REG(0x0068)
79#define GAFR3_L GPIO_REG(0x006C)
80#define GAFR3_U GPIO_REG(0x0070)
81
82/* More handy macros. The argument is a literal GPIO number. */
83
84#define GPIO_bit(x) (1 << ((x) & 0x1f))
85
86#define GPLR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x00)
87#define GPDR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x0c)
88#define GPSR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x18)
89#define GPCR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x24)
90#define GRER(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x30)
91#define GFER(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x3c)
92#define GEDR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x48)
93#define GAFR(x) GPIO_REG(0x54 + (((x) & 0x70) >> 2))
94
95
96#define NR_BUILTIN_GPIO PXA_GPIO_IRQ_NUM
97
98#define gpio_to_bank(gpio) ((gpio) >> 5)
99
100#ifdef CONFIG_CPU_PXA26x
101/* GPIO86/87/88/89 on PXA26x have their direction bits in GPDR2 inverted,
102 * as well as their Alternate Function value being '1' for GPIO in GAFRx.
103 */
104static inline int __gpio_is_inverted(unsigned gpio)
105{
106 return cpu_is_pxa25x() && gpio > 85;
107}
108#else
109static inline int __gpio_is_inverted(unsigned gpio) { return 0; }
110#endif
111
112/*
113 * On PXA25x and PXA27x, GAFRx and GPDRx together decide the alternate
114 * function of a GPIO, and GPDRx cannot be altered once configured. It
115 * is attributed as "occupied" here (I know this terminology isn't
116 * accurate, you are welcome to propose a better one :-)
117 */
118static inline int __gpio_is_occupied(unsigned gpio)
119{
120 if (cpu_is_pxa27x() || cpu_is_pxa25x()) {
121 int af = (GAFR(gpio) >> ((gpio & 0xf) * 2)) & 0x3;
122 int dir = GPDR(gpio) & GPIO_bit(gpio);
123
124 if (__gpio_is_inverted(gpio))
125 return af != 1 || dir == 0;
126 else
127 return af != 0 || dir != 0;
128 } else
129 return GPDR(gpio) & GPIO_bit(gpio);
130}
131
132#include <plat/gpio-pxa.h>
133#endif /* __MACH_PXA_GPIO_PXA_H */
diff --git a/arch/arm/mach-pxa/include/mach/gpio.h b/arch/arm/mach-pxa/include/mach/gpio.h
index 004cade7bb13..0248e433bc98 100644
--- a/arch/arm/mach-pxa/include/mach/gpio.h
+++ b/arch/arm/mach-pxa/include/mach/gpio.h
@@ -25,24 +25,8 @@
25#define __ASM_ARCH_PXA_GPIO_H 25#define __ASM_ARCH_PXA_GPIO_H
26 26
27#include <asm-generic/gpio.h> 27#include <asm-generic/gpio.h>
28/* The defines for the driver are needed for the accelerated accessors */
29#include "gpio-pxa.h"
30 28
31#define gpio_to_irq(gpio) IRQ_GPIO(gpio) 29#include <mach/irqs.h>
30#include <mach/hardware.h>
32 31
33static inline int irq_to_gpio(unsigned int irq)
34{
35 int gpio;
36
37 if (irq == IRQ_GPIO0 || irq == IRQ_GPIO1)
38 return irq - IRQ_GPIO0;
39
40 gpio = irq - PXA_GPIO_IRQ_BASE;
41 if (gpio >= 2 && gpio < NR_BUILTIN_GPIO)
42 return gpio;
43
44 return -1;
45}
46
47#include <plat/gpio.h>
48#endif 32#endif
diff --git a/arch/arm/mach-pxa/include/mach/gumstix.h b/arch/arm/mach-pxa/include/mach/gumstix.h
index 9b898680b206..dba14b6503ad 100644
--- a/arch/arm/mach-pxa/include/mach/gumstix.h
+++ b/arch/arm/mach-pxa/include/mach/gumstix.h
@@ -24,7 +24,7 @@ has detected a cable insertion; driven low otherwise. */
24#define GPIO_GUMSTIX_USB_GPIOx 41 24#define GPIO_GUMSTIX_USB_GPIOx 41
25 25
26/* usb state change */ 26/* usb state change */
27#define GUMSTIX_USB_INTR_IRQ IRQ_GPIO(GPIO_GUMSTIX_USB_GPIOn) 27#define GUMSTIX_USB_INTR_IRQ PXA_GPIO_TO_IRQ(GPIO_GUMSTIX_USB_GPIOn)
28 28
29#define GPIO_GUMSTIX_USB_GPIOn_MD (GPIO_GUMSTIX_USB_GPIOn | GPIO_IN) 29#define GPIO_GUMSTIX_USB_GPIOn_MD (GPIO_GUMSTIX_USB_GPIOn | GPIO_IN)
30#define GPIO_GUMSTIX_USB_GPIOx_CON_MD (GPIO_GUMSTIX_USB_GPIOx | GPIO_OUT) 30#define GPIO_GUMSTIX_USB_GPIOx_CON_MD (GPIO_GUMSTIX_USB_GPIOx | GPIO_OUT)
@@ -35,7 +35,7 @@ has detected a cable insertion; driven low otherwise. */
35 */ 35 */
36#define GUMSTIX_GPIO_nSD_WP 22 /* SD Write Protect */ 36#define GUMSTIX_GPIO_nSD_WP 22 /* SD Write Protect */
37#define GUMSTIX_GPIO_nSD_DETECT 11 /* MMC/SD Card Detect */ 37#define GUMSTIX_GPIO_nSD_DETECT 11 /* MMC/SD Card Detect */
38#define GUMSTIX_IRQ_GPIO_nSD_DETECT IRQ_GPIO(GUMSTIX_GPIO_nSD_DETECT) 38#define GUMSTIX_IRQ_GPIO_nSD_DETECT PXA_GPIO_TO_IRQ(GUMSTIX_GPIO_nSD_DETECT)
39 39
40/* 40/*
41 * SMC Ethernet definitions 41 * SMC Ethernet definitions
@@ -49,10 +49,10 @@ has detected a cable insertion; driven low otherwise. */
49 49
50#define GPIO_GUMSTIX_ETH0 36 50#define GPIO_GUMSTIX_ETH0 36
51#define GPIO_GUMSTIX_ETH0_MD (GPIO_GUMSTIX_ETH0 | GPIO_IN) 51#define GPIO_GUMSTIX_ETH0_MD (GPIO_GUMSTIX_ETH0 | GPIO_IN)
52#define GUMSTIX_ETH0_IRQ IRQ_GPIO(GPIO_GUMSTIX_ETH0) 52#define GUMSTIX_ETH0_IRQ PXA_GPIO_TO_IRQ(GPIO_GUMSTIX_ETH0)
53#define GPIO_GUMSTIX_ETH1 27 53#define GPIO_GUMSTIX_ETH1 27
54#define GPIO_GUMSTIX_ETH1_MD (GPIO_GUMSTIX_ETH1 | GPIO_IN) 54#define GPIO_GUMSTIX_ETH1_MD (GPIO_GUMSTIX_ETH1 | GPIO_IN)
55#define GUMSTIX_ETH1_IRQ IRQ_GPIO(GPIO_GUMSTIX_ETH1) 55#define GUMSTIX_ETH1_IRQ PXA_GPIO_TO_IRQ(GPIO_GUMSTIX_ETH1)
56 56
57 57
58/* CF reset line */ 58/* CF reset line */
@@ -63,18 +63,18 @@ has detected a cable insertion; driven low otherwise. */
63#define GPIO4_nSTSCHG GPIO4_nBVD1 63#define GPIO4_nSTSCHG GPIO4_nBVD1
64#define GPIO11_nCD 11 64#define GPIO11_nCD 11
65#define GPIO26_PRDY_nBSY 26 65#define GPIO26_PRDY_nBSY 26
66#define GUMSTIX_S0_nSTSCHG_IRQ IRQ_GPIO(GPIO4_nSTSCHG) 66#define GUMSTIX_S0_nSTSCHG_IRQ PXA_GPIO_TO_IRQ(GPIO4_nSTSCHG)
67#define GUMSTIX_S0_nCD_IRQ IRQ_GPIO(GPIO11_nCD) 67#define GUMSTIX_S0_nCD_IRQ PXA_GPIO_TO_IRQ(GPIO11_nCD)
68#define GUMSTIX_S0_PRDY_nBSY_IRQ IRQ_GPIO(GPIO26_PRDY_nBSY) 68#define GUMSTIX_S0_PRDY_nBSY_IRQ PXA_GPIO_TO_IRQ(GPIO26_PRDY_nBSY)
69 69
70/* CF slot 1 */ 70/* CF slot 1 */
71#define GPIO18_nBVD1 18 71#define GPIO18_nBVD1 18
72#define GPIO18_nSTSCHG GPIO18_nBVD1 72#define GPIO18_nSTSCHG GPIO18_nBVD1
73#define GPIO36_nCD 36 73#define GPIO36_nCD 36
74#define GPIO27_PRDY_nBSY 27 74#define GPIO27_PRDY_nBSY 27
75#define GUMSTIX_S1_nSTSCHG_IRQ IRQ_GPIO(GPIO18_nSTSCHG) 75#define GUMSTIX_S1_nSTSCHG_IRQ PXA_GPIO_TO_IRQ(GPIO18_nSTSCHG)
76#define GUMSTIX_S1_nCD_IRQ IRQ_GPIO(GPIO36_nCD) 76#define GUMSTIX_S1_nCD_IRQ PXA_GPIO_TO_IRQ(GPIO36_nCD)
77#define GUMSTIX_S1_PRDY_nBSY_IRQ IRQ_GPIO(GPIO27_PRDY_nBSY) 77#define GUMSTIX_S1_PRDY_nBSY_IRQ PXA_GPIO_TO_IRQ(GPIO27_PRDY_nBSY)
78 78
79/* CF GPIO line modes */ 79/* CF GPIO line modes */
80#define GPIO4_nSTSCHG_MD (GPIO4_nSTSCHG | GPIO_IN) 80#define GPIO4_nSTSCHG_MD (GPIO4_nSTSCHG | GPIO_IN)
diff --git a/arch/arm/mach-pxa/include/mach/hx4700.h b/arch/arm/mach-pxa/include/mach/hx4700.h
index 37408449ec25..8bc02913517c 100644
--- a/arch/arm/mach-pxa/include/mach/hx4700.h
+++ b/arch/arm/mach-pxa/include/mach/hx4700.h
@@ -15,7 +15,7 @@
15#include <linux/gpio.h> 15#include <linux/gpio.h>
16#include <linux/mfd/asic3.h> 16#include <linux/mfd/asic3.h>
17 17
18#define HX4700_ASIC3_GPIO_BASE NR_BUILTIN_GPIO 18#define HX4700_ASIC3_GPIO_BASE PXA_NR_BUILTIN_GPIO
19#define HX4700_EGPIO_BASE (HX4700_ASIC3_GPIO_BASE + ASIC3_NUM_GPIOS) 19#define HX4700_EGPIO_BASE (HX4700_ASIC3_GPIO_BASE + ASIC3_NUM_GPIOS)
20#define HX4700_NR_IRQS (IRQ_BOARD_START + 70) 20#define HX4700_NR_IRQS (IRQ_BOARD_START + 70)
21 21
diff --git a/arch/arm/mach-pxa/include/mach/idp.h b/arch/arm/mach-pxa/include/mach/idp.h
index 5eff96fcc944..22a96f87232b 100644
--- a/arch/arm/mach-pxa/include/mach/idp.h
+++ b/arch/arm/mach-pxa/include/mach/idp.h
@@ -131,28 +131,26 @@
131#define PCC_VS2 (1 << 1) 131#define PCC_VS2 (1 << 1)
132#define PCC_VS1 (1 << 0) 132#define PCC_VS1 (1 << 0)
133 133
134#define PCC_DETECT(x) (GPLR(7 + (x)) & GPIO_bit(7 + (x)))
135
136/* A listing of interrupts used by external hardware devices */ 134/* A listing of interrupts used by external hardware devices */
137 135
138#define TOUCH_PANEL_IRQ IRQ_GPIO(5) 136#define TOUCH_PANEL_IRQ PXA_GPIO_TO_IRQ(5)
139#define IDE_IRQ IRQ_GPIO(21) 137#define IDE_IRQ PXA_GPIO_TO_IRQ(21)
140 138
141#define TOUCH_PANEL_IRQ_EDGE IRQ_TYPE_EDGE_FALLING 139#define TOUCH_PANEL_IRQ_EDGE IRQ_TYPE_EDGE_FALLING
142 140
143#define ETHERNET_IRQ IRQ_GPIO(4) 141#define ETHERNET_IRQ PXA_GPIO_TO_IRQ(4)
144#define ETHERNET_IRQ_EDGE IRQ_TYPE_EDGE_RISING 142#define ETHERNET_IRQ_EDGE IRQ_TYPE_EDGE_RISING
145 143
146#define IDE_IRQ_EDGE IRQ_TYPE_EDGE_RISING 144#define IDE_IRQ_EDGE IRQ_TYPE_EDGE_RISING
147 145
148#define PCMCIA_S0_CD_VALID IRQ_GPIO(7) 146#define PCMCIA_S0_CD_VALID PXA_GPIO_TO_IRQ(7)
149#define PCMCIA_S0_CD_VALID_EDGE IRQ_TYPE_EDGE_BOTH 147#define PCMCIA_S0_CD_VALID_EDGE IRQ_TYPE_EDGE_BOTH
150 148
151#define PCMCIA_S1_CD_VALID IRQ_GPIO(8) 149#define PCMCIA_S1_CD_VALID PXA_GPIO_TO_IRQ(8)
152#define PCMCIA_S1_CD_VALID_EDGE IRQ_TYPE_EDGE_BOTH 150#define PCMCIA_S1_CD_VALID_EDGE IRQ_TYPE_EDGE_BOTH
153 151
154#define PCMCIA_S0_RDYINT IRQ_GPIO(19) 152#define PCMCIA_S0_RDYINT PXA_GPIO_TO_IRQ(19)
155#define PCMCIA_S1_RDYINT IRQ_GPIO(22) 153#define PCMCIA_S1_RDYINT PXA_GPIO_TO_IRQ(22)
156 154
157 155
158/* 156/*
diff --git a/arch/arm/mach-pxa/include/mach/irqs.h b/arch/arm/mach-pxa/include/mach/irqs.h
index 7cc5a781e99e..32975adf3ca4 100644
--- a/arch/arm/mach-pxa/include/mach/irqs.h
+++ b/arch/arm/mach-pxa/include/mach/irqs.h
@@ -88,10 +88,8 @@
88#define IRQ_U2P PXA_IRQ(93) /* USB PHY D+/D- Lines (PXA935) */ 88#define IRQ_U2P PXA_IRQ(93) /* USB PHY D+/D- Lines (PXA935) */
89 89
90#define PXA_GPIO_IRQ_BASE PXA_IRQ(96) 90#define PXA_GPIO_IRQ_BASE PXA_IRQ(96)
91#define PXA_GPIO_IRQ_NUM (192) 91#define PXA_NR_BUILTIN_GPIO (192)
92 92#define PXA_GPIO_TO_IRQ(x) (PXA_GPIO_IRQ_BASE + (x))
93#define GPIO_2_x_TO_IRQ(x) (PXA_GPIO_IRQ_BASE + (x))
94#define IRQ_GPIO(x) (((x) < 2) ? (IRQ_GPIO0 + (x)) : GPIO_2_x_TO_IRQ(x))
95 93
96/* 94/*
97 * The following interrupts are for board specific purposes. Since 95 * The following interrupts are for board specific purposes. Since
@@ -100,7 +98,7 @@
100 * By default, no board IRQ is reserved. It should be finished in 98 * By default, no board IRQ is reserved. It should be finished in
101 * custom board since sparse IRQ is already enabled. 99 * custom board since sparse IRQ is already enabled.
102 */ 100 */
103#define IRQ_BOARD_START (PXA_GPIO_IRQ_BASE + PXA_GPIO_IRQ_NUM) 101#define IRQ_BOARD_START (PXA_GPIO_IRQ_BASE + PXA_NR_BUILTIN_GPIO)
104 102
105#define NR_IRQS (IRQ_BOARD_START) 103#define NR_IRQS (IRQ_BOARD_START)
106 104
diff --git a/arch/arm/mach-pxa/include/mach/littleton.h b/arch/arm/mach-pxa/include/mach/littleton.h
index b6238cbd8aea..8066be54e9f5 100644
--- a/arch/arm/mach-pxa/include/mach/littleton.h
+++ b/arch/arm/mach-pxa/include/mach/littleton.h
@@ -1,13 +1,11 @@
1#ifndef __ASM_ARCH_LITTLETON_H 1#ifndef __ASM_ARCH_LITTLETON_H
2#define __ASM_ARCH_LITTLETON_H 2#define __ASM_ARCH_LITTLETON_H
3 3
4#include <mach/gpio-pxa.h>
5
6#define LITTLETON_ETH_PHYS 0x30000000 4#define LITTLETON_ETH_PHYS 0x30000000
7 5
8#define LITTLETON_GPIO_LCD_CS (17) 6#define LITTLETON_GPIO_LCD_CS (17)
9 7
10#define EXT0_GPIO_BASE (NR_BUILTIN_GPIO) 8#define EXT0_GPIO_BASE (PXA_NR_BUILTIN_GPIO)
11#define EXT0_GPIO(x) (EXT0_GPIO_BASE + (x)) 9#define EXT0_GPIO(x) (EXT0_GPIO_BASE + (x))
12 10
13#define LITTLETON_NR_IRQS (IRQ_BOARD_START + 8) 11#define LITTLETON_NR_IRQS (IRQ_BOARD_START + 8)
diff --git a/arch/arm/mach-pxa/include/mach/magician.h b/arch/arm/mach-pxa/include/mach/magician.h
index 7cbfc5d3f9df..ba6a6e1d29e9 100644
--- a/arch/arm/mach-pxa/include/mach/magician.h
+++ b/arch/arm/mach-pxa/include/mach/magician.h
@@ -78,7 +78,7 @@
78 * CPLD EGPIOs 78 * CPLD EGPIOs
79 */ 79 */
80 80
81#define MAGICIAN_EGPIO_BASE NR_BUILTIN_GPIO 81#define MAGICIAN_EGPIO_BASE PXA_NR_BUILTIN_GPIO
82#define MAGICIAN_EGPIO(reg,bit) \ 82#define MAGICIAN_EGPIO(reg,bit) \
83 (MAGICIAN_EGPIO_BASE + 8*reg + bit) 83 (MAGICIAN_EGPIO_BASE + 8*reg + bit)
84 84
diff --git a/arch/arm/mach-pxa/include/mach/palmld.h b/arch/arm/mach-pxa/include/mach/palmld.h
index ae536e86d8e8..2c4471336570 100644
--- a/arch/arm/mach-pxa/include/mach/palmld.h
+++ b/arch/arm/mach-pxa/include/mach/palmld.h
@@ -68,10 +68,10 @@
68/* 20, 53 and 86 are usb related too */ 68/* 20, 53 and 86 are usb related too */
69 69
70/* INTERRUPTS */ 70/* INTERRUPTS */
71#define IRQ_GPIO_PALMLD_GPIO_RESET IRQ_GPIO(GPIO_NR_PALMLD_GPIO_RESET) 71#define IRQ_GPIO_PALMLD_GPIO_RESET PXA_GPIO_TO_IRQ(GPIO_NR_PALMLD_GPIO_RESET)
72#define IRQ_GPIO_PALMLD_SD_DETECT_N IRQ_GPIO(GPIO_NR_PALMLD_SD_DETECT_N) 72#define IRQ_GPIO_PALMLD_SD_DETECT_N PXA_GPIO_TO_IRQ(GPIO_NR_PALMLD_SD_DETECT_N)
73#define IRQ_GPIO_PALMLD_WM9712_IRQ IRQ_GPIO(GPIO_NR_PALMLD_WM9712_IRQ) 73#define IRQ_GPIO_PALMLD_WM9712_IRQ PXA_GPIO_TO_IRQ(GPIO_NR_PALMLD_WM9712_IRQ)
74#define IRQ_GPIO_PALMLD_IDE_IRQ IRQ_GPIO(GPIO_NR_PALMLD_IDE_IRQ) 74#define IRQ_GPIO_PALMLD_IDE_IRQ PXA_GPIO_TO_IRQ(GPIO_NR_PALMLD_IDE_IRQ)
75 75
76 76
77/** HERE ARE INIT VALUES **/ 77/** HERE ARE INIT VALUES **/
diff --git a/arch/arm/mach-pxa/include/mach/palmt5.h b/arch/arm/mach-pxa/include/mach/palmt5.h
index 6baf7469d4ec..0bd4f036c72f 100644
--- a/arch/arm/mach-pxa/include/mach/palmt5.h
+++ b/arch/arm/mach-pxa/include/mach/palmt5.h
@@ -48,10 +48,10 @@
48#define GPIO_NR_PALMT5_BT_RESET 83 48#define GPIO_NR_PALMT5_BT_RESET 83
49 49
50/* INTERRUPTS */ 50/* INTERRUPTS */
51#define IRQ_GPIO_PALMT5_SD_DETECT_N IRQ_GPIO(GPIO_NR_PALMT5_SD_DETECT_N) 51#define IRQ_GPIO_PALMT5_SD_DETECT_N PXA_GPIO_TO_IRQ(GPIO_NR_PALMT5_SD_DETECT_N)
52#define IRQ_GPIO_PALMT5_WM9712_IRQ IRQ_GPIO(GPIO_NR_PALMT5_WM9712_IRQ) 52#define IRQ_GPIO_PALMT5_WM9712_IRQ PXA_GPIO_TO_IRQ(GPIO_NR_PALMT5_WM9712_IRQ)
53#define IRQ_GPIO_PALMT5_USB_DETECT IRQ_GPIO(GPIO_NR_PALMT5_USB_DETECT) 53#define IRQ_GPIO_PALMT5_USB_DETECT PXA_GPIO_TO_IRQ(GPIO_NR_PALMT5_USB_DETECT)
54#define IRQ_GPIO_PALMT5_GPIO_RESET IRQ_GPIO(GPIO_NR_PALMT5_GPIO_RESET) 54#define IRQ_GPIO_PALMT5_GPIO_RESET PXA_GPIO_TO_IRQ(GPIO_NR_PALMT5_GPIO_RESET)
55 55
56/** HERE ARE INIT VALUES **/ 56/** HERE ARE INIT VALUES **/
57 57
diff --git a/arch/arm/mach-pxa/include/mach/palmtc.h b/arch/arm/mach-pxa/include/mach/palmtc.h
index 3f9dd3fd4638..c383a21680b6 100644
--- a/arch/arm/mach-pxa/include/mach/palmtc.h
+++ b/arch/arm/mach-pxa/include/mach/palmtc.h
@@ -52,8 +52,8 @@
52#define GPIO_NR_PALMTC_IR_DISABLE 45 52#define GPIO_NR_PALMTC_IR_DISABLE 45
53 53
54/* IRQs */ 54/* IRQs */
55#define IRQ_GPIO_PALMTC_SD_DETECT_N IRQ_GPIO(GPIO_NR_PALMTC_SD_DETECT_N) 55#define IRQ_GPIO_PALMTC_SD_DETECT_N PXA_GPIO_TO_IRQ(GPIO_NR_PALMTC_SD_DETECT_N)
56#define IRQ_GPIO_PALMTC_WLAN_READY IRQ_GPIO(GPIO_NR_PALMTC_WLAN_READY) 56#define IRQ_GPIO_PALMTC_WLAN_READY PXA_GPIO_TO_IRQ(GPIO_NR_PALMTC_WLAN_READY)
57 57
58/* UCB1400 GPIOs */ 58/* UCB1400 GPIOs */
59#define GPIO_NR_PALMTC_POWER_DETECT (0x80 | 0x00) 59#define GPIO_NR_PALMTC_POWER_DETECT (0x80 | 0x00)
diff --git a/arch/arm/mach-pxa/include/mach/palmtx.h b/arch/arm/mach-pxa/include/mach/palmtx.h
index 7074a6ed46c6..f2e530380253 100644
--- a/arch/arm/mach-pxa/include/mach/palmtx.h
+++ b/arch/arm/mach-pxa/include/mach/palmtx.h
@@ -62,10 +62,10 @@
62#define GPIO_NR_PALMTX_NAND_BUFFER_DIR 79 62#define GPIO_NR_PALMTX_NAND_BUFFER_DIR 79
63 63
64/* INTERRUPTS */ 64/* INTERRUPTS */
65#define IRQ_GPIO_PALMTX_SD_DETECT_N IRQ_GPIO(GPIO_NR_PALMTX_SD_DETECT_N) 65#define IRQ_GPIO_PALMTX_SD_DETECT_N PXA_GPIO_TO_IRQ(GPIO_NR_PALMTX_SD_DETECT_N)
66#define IRQ_GPIO_PALMTX_WM9712_IRQ IRQ_GPIO(GPIO_NR_PALMTX_WM9712_IRQ) 66#define IRQ_GPIO_PALMTX_WM9712_IRQ PXA_GPIO_TO_IRQ(GPIO_NR_PALMTX_WM9712_IRQ)
67#define IRQ_GPIO_PALMTX_USB_DETECT IRQ_GPIO(GPIO_NR_PALMTX_USB_DETECT) 67#define IRQ_GPIO_PALMTX_USB_DETECT PXA_GPIO_TO_IRQ(GPIO_NR_PALMTX_USB_DETECT)
68#define IRQ_GPIO_PALMTX_GPIO_RESET IRQ_GPIO(GPIO_NR_PALMTX_GPIO_RESET) 68#define IRQ_GPIO_PALMTX_GPIO_RESET PXA_GPIO_TO_IRQ(GPIO_NR_PALMTX_GPIO_RESET)
69 69
70/** HERE ARE INIT VALUES **/ 70/** HERE ARE INIT VALUES **/
71 71
diff --git a/arch/arm/mach-pxa/include/mach/pcm027.h b/arch/arm/mach-pxa/include/mach/pcm027.h
index 4bac588478a8..6bf28de228bd 100644
--- a/arch/arm/mach-pxa/include/mach/pcm027.h
+++ b/arch/arm/mach-pxa/include/mach/pcm027.h
@@ -34,7 +34,7 @@
34 34
35/* I2C RTC */ 35/* I2C RTC */
36#define PCM027_RTC_IRQ_GPIO 0 36#define PCM027_RTC_IRQ_GPIO 0
37#define PCM027_RTC_IRQ IRQ_GPIO(PCM027_RTC_IRQ_GPIO) 37#define PCM027_RTC_IRQ PXA_GPIO_TO_IRQ(PCM027_RTC_IRQ_GPIO)
38#define PCM027_RTC_IRQ_EDGE IRQ_TYPE_EDGE_FALLING 38#define PCM027_RTC_IRQ_EDGE IRQ_TYPE_EDGE_FALLING
39#define ADR_PCM027_RTC 0x51 /* I2C address */ 39#define ADR_PCM027_RTC 0x51 /* I2C address */
40 40
@@ -43,21 +43,21 @@
43 43
44/* Ethernet chip (SMSC91C111) */ 44/* Ethernet chip (SMSC91C111) */
45#define PCM027_ETH_IRQ_GPIO 52 45#define PCM027_ETH_IRQ_GPIO 52
46#define PCM027_ETH_IRQ IRQ_GPIO(PCM027_ETH_IRQ_GPIO) 46#define PCM027_ETH_IRQ PXA_GPIO_TO_IRQ(PCM027_ETH_IRQ_GPIO)
47#define PCM027_ETH_IRQ_EDGE IRQ_TYPE_EDGE_RISING 47#define PCM027_ETH_IRQ_EDGE IRQ_TYPE_EDGE_RISING
48#define PCM027_ETH_PHYS PXA_CS5_PHYS 48#define PCM027_ETH_PHYS PXA_CS5_PHYS
49#define PCM027_ETH_SIZE (1*1024*1024) 49#define PCM027_ETH_SIZE (1*1024*1024)
50 50
51/* CAN controller SJA1000 (unsupported yet) */ 51/* CAN controller SJA1000 (unsupported yet) */
52#define PCM027_CAN_IRQ_GPIO 114 52#define PCM027_CAN_IRQ_GPIO 114
53#define PCM027_CAN_IRQ IRQ_GPIO(PCM027_CAN_IRQ_GPIO) 53#define PCM027_CAN_IRQ PXA_GPIO_TO_IRQ(PCM027_CAN_IRQ_GPIO)
54#define PCM027_CAN_IRQ_EDGE IRQ_TYPE_EDGE_FALLING 54#define PCM027_CAN_IRQ_EDGE IRQ_TYPE_EDGE_FALLING
55#define PCM027_CAN_PHYS 0x22000000 55#define PCM027_CAN_PHYS 0x22000000
56#define PCM027_CAN_SIZE 0x100 56#define PCM027_CAN_SIZE 0x100
57 57
58/* SPI GPIO expander (unsupported yet) */ 58/* SPI GPIO expander (unsupported yet) */
59#define PCM027_EGPIO_IRQ_GPIO 27 59#define PCM027_EGPIO_IRQ_GPIO 27
60#define PCM027_EGPIO_IRQ IRQ_GPIO(PCM027_EGPIO_IRQ_GPIO) 60#define PCM027_EGPIO_IRQ PXA_GPIO_TO_IRQ(PCM027_EGPIO_IRQ_GPIO)
61#define PCM027_EGPIO_IRQ_EDGE IRQ_TYPE_EDGE_FALLING 61#define PCM027_EGPIO_IRQ_EDGE IRQ_TYPE_EDGE_FALLING
62#define PCM027_EGPIO_CS 24 62#define PCM027_EGPIO_CS 24
63/* 63/*
diff --git a/arch/arm/mach-pxa/include/mach/pcm990_baseboard.h b/arch/arm/mach-pxa/include/mach/pcm990_baseboard.h
index 8a4383b776d7..d72791695b26 100644
--- a/arch/arm/mach-pxa/include/mach/pcm990_baseboard.h
+++ b/arch/arm/mach-pxa/include/mach/pcm990_baseboard.h
@@ -28,14 +28,14 @@
28 28
29/* CPLD's interrupt controller is connected to PCM-027 GPIO 9 */ 29/* CPLD's interrupt controller is connected to PCM-027 GPIO 9 */
30#define PCM990_CTRL_INT_IRQ_GPIO 9 30#define PCM990_CTRL_INT_IRQ_GPIO 9
31#define PCM990_CTRL_INT_IRQ IRQ_GPIO(PCM990_CTRL_INT_IRQ_GPIO) 31#define PCM990_CTRL_INT_IRQ PXA_GPIO_TO_IRQ(PCM990_CTRL_INT_IRQ_GPIO)
32#define PCM990_CTRL_INT_IRQ_EDGE IRQ_TYPE_EDGE_RISING 32#define PCM990_CTRL_INT_IRQ_EDGE IRQ_TYPE_EDGE_RISING
33#define PCM990_CTRL_PHYS PXA_CS1_PHYS /* 16-Bit */ 33#define PCM990_CTRL_PHYS PXA_CS1_PHYS /* 16-Bit */
34#define PCM990_CTRL_BASE 0xea000000 34#define PCM990_CTRL_BASE 0xea000000
35#define PCM990_CTRL_SIZE (1*1024*1024) 35#define PCM990_CTRL_SIZE (1*1024*1024)
36 36
37#define PCM990_CTRL_PWR_IRQ_GPIO 14 37#define PCM990_CTRL_PWR_IRQ_GPIO 14
38#define PCM990_CTRL_PWR_IRQ IRQ_GPIO(PCM990_CTRL_PWR_IRQ_GPIO) 38#define PCM990_CTRL_PWR_IRQ PXA_GPIO_TO_IRQ(PCM990_CTRL_PWR_IRQ_GPIO)
39#define PCM990_CTRL_PWR_IRQ_EDGE IRQ_TYPE_EDGE_RISING 39#define PCM990_CTRL_PWR_IRQ_EDGE IRQ_TYPE_EDGE_RISING
40 40
41/* visible CPLD (U7) registers */ 41/* visible CPLD (U7) registers */
@@ -132,7 +132,7 @@
132 * IDE 132 * IDE
133 */ 133 */
134#define PCM990_IDE_IRQ_GPIO 13 134#define PCM990_IDE_IRQ_GPIO 13
135#define PCM990_IDE_IRQ IRQ_GPIO(PCM990_IDE_IRQ_GPIO) 135#define PCM990_IDE_IRQ PXA_GPIO_TO_IRQ(PCM990_IDE_IRQ_GPIO)
136#define PCM990_IDE_IRQ_EDGE IRQ_TYPE_EDGE_RISING 136#define PCM990_IDE_IRQ_EDGE IRQ_TYPE_EDGE_RISING
137#define PCM990_IDE_PLD_PHYS 0x20000000 /* 16 bit wide */ 137#define PCM990_IDE_PLD_PHYS 0x20000000 /* 16 bit wide */
138#define PCM990_IDE_PLD_BASE 0xee000000 138#define PCM990_IDE_PLD_BASE 0xee000000
@@ -188,11 +188,11 @@
188 * Compact Flash 188 * Compact Flash
189 */ 189 */
190#define PCM990_CF_IRQ_GPIO 11 190#define PCM990_CF_IRQ_GPIO 11
191#define PCM990_CF_IRQ IRQ_GPIO(PCM990_CF_IRQ_GPIO) 191#define PCM990_CF_IRQ PXA_GPIO_TO_IRQ(PCM990_CF_IRQ_GPIO)
192#define PCM990_CF_IRQ_EDGE IRQ_TYPE_EDGE_RISING 192#define PCM990_CF_IRQ_EDGE IRQ_TYPE_EDGE_RISING
193 193
194#define PCM990_CF_CD_GPIO 12 194#define PCM990_CF_CD_GPIO 12
195#define PCM990_CF_CD IRQ_GPIO(PCM990_CF_CD_GPIO) 195#define PCM990_CF_CD PXA_GPIO_TO_IRQ(PCM990_CF_CD_GPIO)
196#define PCM990_CF_CD_EDGE IRQ_TYPE_EDGE_RISING 196#define PCM990_CF_CD_EDGE IRQ_TYPE_EDGE_RISING
197 197
198#define PCM990_CF_PLD_PHYS 0x30000000 /* 16 bit wide */ 198#define PCM990_CF_PLD_PHYS 0x30000000 /* 16 bit wide */
@@ -258,14 +258,14 @@
258 * Wolfson AC97 Touch 258 * Wolfson AC97 Touch
259 */ 259 */
260#define PCM990_AC97_IRQ_GPIO 10 260#define PCM990_AC97_IRQ_GPIO 10
261#define PCM990_AC97_IRQ IRQ_GPIO(PCM990_AC97_IRQ_GPIO) 261#define PCM990_AC97_IRQ PXA_GPIO_TO_IRQ(PCM990_AC97_IRQ_GPIO)
262#define PCM990_AC97_IRQ_EDGE IRQ_TYPE_EDGE_RISING 262#define PCM990_AC97_IRQ_EDGE IRQ_TYPE_EDGE_RISING
263 263
264/* 264/*
265 * MMC phyCORE 265 * MMC phyCORE
266 */ 266 */
267#define PCM990_MMC0_IRQ_GPIO 9 267#define PCM990_MMC0_IRQ_GPIO 9
268#define PCM990_MMC0_IRQ IRQ_GPIO(PCM990_MMC0_IRQ_GPIO) 268#define PCM990_MMC0_IRQ PXA_GPIO_TO_IRQ(PCM990_MMC0_IRQ_GPIO)
269#define PCM990_MMC0_IRQ_EDGE IRQ_TYPE_EDGE_FALLING 269#define PCM990_MMC0_IRQ_EDGE IRQ_TYPE_EDGE_FALLING
270 270
271/* 271/*
diff --git a/arch/arm/mach-pxa/include/mach/poodle.h b/arch/arm/mach-pxa/include/mach/poodle.h
index 83d1cfd00fc9..f32ff75dcca8 100644
--- a/arch/arm/mach-pxa/include/mach/poodle.h
+++ b/arch/arm/mach-pxa/include/mach/poodle.h
@@ -47,18 +47,18 @@
47#define POODLE_GPIO_DISCHARGE_ON (42) /* Enable battery discharge */ 47#define POODLE_GPIO_DISCHARGE_ON (42) /* Enable battery discharge */
48 48
49/* PXA GPIOs */ 49/* PXA GPIOs */
50#define POODLE_IRQ_GPIO_ON_KEY IRQ_GPIO(0) 50#define POODLE_IRQ_GPIO_ON_KEY PXA_GPIO_TO_IRQ(0)
51#define POODLE_IRQ_GPIO_AC_IN IRQ_GPIO(1) 51#define POODLE_IRQ_GPIO_AC_IN PXA_GPIO_TO_IRQ(1)
52#define POODLE_IRQ_GPIO_HP_IN IRQ_GPIO(4) 52#define POODLE_IRQ_GPIO_HP_IN PXA_GPIO_TO_IRQ(4)
53#define POODLE_IRQ_GPIO_CO IRQ_GPIO(16) 53#define POODLE_IRQ_GPIO_CO PXA_GPIO_TO_IRQ(16)
54#define POODLE_IRQ_GPIO_TP_INT IRQ_GPIO(5) 54#define POODLE_IRQ_GPIO_TP_INT PXA_GPIO_TO_IRQ(5)
55#define POODLE_IRQ_GPIO_WAKEUP IRQ_GPIO(11) 55#define POODLE_IRQ_GPIO_WAKEUP PXA_GPIO_TO_IRQ(11)
56#define POODLE_IRQ_GPIO_GA_INT IRQ_GPIO(10) 56#define POODLE_IRQ_GPIO_GA_INT PXA_GPIO_TO_IRQ(10)
57#define POODLE_IRQ_GPIO_CF_IRQ IRQ_GPIO(17) 57#define POODLE_IRQ_GPIO_CF_IRQ PXA_GPIO_TO_IRQ(17)
58#define POODLE_IRQ_GPIO_CF_CD IRQ_GPIO(14) 58#define POODLE_IRQ_GPIO_CF_CD PXA_GPIO_TO_IRQ(14)
59#define POODLE_IRQ_GPIO_nSD_INT IRQ_GPIO(8) 59#define POODLE_IRQ_GPIO_nSD_INT PXA_GPIO_TO_IRQ(8)
60#define POODLE_IRQ_GPIO_nSD_DETECT IRQ_GPIO(9) 60#define POODLE_IRQ_GPIO_nSD_DETECT PXA_GPIO_TO_IRQ(9)
61#define POODLE_IRQ_GPIO_MAIN_BAT_LOW IRQ_GPIO(13) 61#define POODLE_IRQ_GPIO_MAIN_BAT_LOW PXA_GPIO_TO_IRQ(13)
62 62
63/* SCOOP GPIOs */ 63/* SCOOP GPIOs */
64#define POODLE_SCOOP_CHARGE_ON SCOOP_GPCR_PA11 64#define POODLE_SCOOP_CHARGE_ON SCOOP_GPCR_PA11
@@ -71,7 +71,7 @@
71#define POODLE_SCOOP_IO_DIR ( POODLE_SCOOP_VPEN | POODLE_SCOOP_HS_OUT ) 71#define POODLE_SCOOP_IO_DIR ( POODLE_SCOOP_VPEN | POODLE_SCOOP_HS_OUT )
72#define POODLE_SCOOP_IO_OUT ( 0 ) 72#define POODLE_SCOOP_IO_OUT ( 0 )
73 73
74#define POODLE_SCOOP_GPIO_BASE (NR_BUILTIN_GPIO) 74#define POODLE_SCOOP_GPIO_BASE (PXA_NR_BUILTIN_GPIO)
75#define POODLE_GPIO_CHARGE_ON (POODLE_SCOOP_GPIO_BASE + 0) 75#define POODLE_GPIO_CHARGE_ON (POODLE_SCOOP_GPIO_BASE + 0)
76#define POODLE_GPIO_CP401 (POODLE_SCOOP_GPIO_BASE + 2) 76#define POODLE_GPIO_CP401 (POODLE_SCOOP_GPIO_BASE + 2)
77#define POODLE_GPIO_VPEN (POODLE_SCOOP_GPIO_BASE + 7) 77#define POODLE_GPIO_VPEN (POODLE_SCOOP_GPIO_BASE + 7)
diff --git a/arch/arm/mach-pxa/include/mach/spitz.h b/arch/arm/mach-pxa/include/mach/spitz.h
index 685749a51c42..0bfe6507c95d 100644
--- a/arch/arm/mach-pxa/include/mach/spitz.h
+++ b/arch/arm/mach-pxa/include/mach/spitz.h
@@ -108,7 +108,7 @@
108#define SPITZ_SCP_SUS_CLR (SPITZ_SCP_MUTE_L | SPITZ_SCP_MUTE_R | SPITZ_SCP_JK_A | SPITZ_SCP_ADC_TEMP_ON) 108#define SPITZ_SCP_SUS_CLR (SPITZ_SCP_MUTE_L | SPITZ_SCP_MUTE_R | SPITZ_SCP_JK_A | SPITZ_SCP_ADC_TEMP_ON)
109#define SPITZ_SCP_SUS_SET 0 109#define SPITZ_SCP_SUS_SET 0
110 110
111#define SPITZ_SCP_GPIO_BASE (NR_BUILTIN_GPIO) 111#define SPITZ_SCP_GPIO_BASE (PXA_NR_BUILTIN_GPIO)
112#define SPITZ_GPIO_LED_GREEN (SPITZ_SCP_GPIO_BASE + 0) 112#define SPITZ_GPIO_LED_GREEN (SPITZ_SCP_GPIO_BASE + 0)
113#define SPITZ_GPIO_JK_B (SPITZ_SCP_GPIO_BASE + 1) 113#define SPITZ_GPIO_JK_B (SPITZ_SCP_GPIO_BASE + 1)
114#define SPITZ_GPIO_CHRG_ON (SPITZ_SCP_GPIO_BASE + 2) 114#define SPITZ_GPIO_CHRG_ON (SPITZ_SCP_GPIO_BASE + 2)
@@ -140,7 +140,7 @@
140 SPITZ_SCP2_BACKLIGHT_CONT | SPITZ_SCP2_BACKLIGHT_ON | SPITZ_SCP2_MIC_BIAS) 140 SPITZ_SCP2_BACKLIGHT_CONT | SPITZ_SCP2_BACKLIGHT_ON | SPITZ_SCP2_MIC_BIAS)
141#define SPITZ_SCP2_SUS_SET (SPITZ_SCP2_IR_ON | SPITZ_SCP2_RESERVED_1) 141#define SPITZ_SCP2_SUS_SET (SPITZ_SCP2_IR_ON | SPITZ_SCP2_RESERVED_1)
142 142
143#define SPITZ_SCP2_GPIO_BASE (NR_BUILTIN_GPIO + 12) 143#define SPITZ_SCP2_GPIO_BASE (PXA_NR_BUILTIN_GPIO + 12)
144#define SPITZ_GPIO_IR_ON (SPITZ_SCP2_GPIO_BASE + 0) 144#define SPITZ_GPIO_IR_ON (SPITZ_SCP2_GPIO_BASE + 0)
145#define SPITZ_GPIO_AKIN_PULLUP (SPITZ_SCP2_GPIO_BASE + 1) 145#define SPITZ_GPIO_AKIN_PULLUP (SPITZ_SCP2_GPIO_BASE + 1)
146#define SPITZ_GPIO_RESERVED_1 (SPITZ_SCP2_GPIO_BASE + 2) 146#define SPITZ_GPIO_RESERVED_1 (SPITZ_SCP2_GPIO_BASE + 2)
@@ -152,7 +152,7 @@
152#define SPITZ_GPIO_MIC_BIAS (SPITZ_SCP2_GPIO_BASE + 8) 152#define SPITZ_GPIO_MIC_BIAS (SPITZ_SCP2_GPIO_BASE + 8)
153 153
154/* Akita IO Expander GPIOs */ 154/* Akita IO Expander GPIOs */
155#define AKITA_IOEXP_GPIO_BASE (NR_BUILTIN_GPIO + 12) 155#define AKITA_IOEXP_GPIO_BASE (PXA_NR_BUILTIN_GPIO + 12)
156#define AKITA_GPIO_RESERVED_0 (AKITA_IOEXP_GPIO_BASE + 0) 156#define AKITA_GPIO_RESERVED_0 (AKITA_IOEXP_GPIO_BASE + 0)
157#define AKITA_GPIO_RESERVED_1 (AKITA_IOEXP_GPIO_BASE + 1) 157#define AKITA_GPIO_RESERVED_1 (AKITA_IOEXP_GPIO_BASE + 1)
158#define AKITA_GPIO_MIC_BIAS (AKITA_IOEXP_GPIO_BASE + 2) 158#define AKITA_GPIO_MIC_BIAS (AKITA_IOEXP_GPIO_BASE + 2)
@@ -164,23 +164,23 @@
164 164
165/* Spitz IRQ Definitions */ 165/* Spitz IRQ Definitions */
166 166
167#define SPITZ_IRQ_GPIO_KEY_INT IRQ_GPIO(SPITZ_GPIO_KEY_INT) 167#define SPITZ_IRQ_GPIO_KEY_INT PXA_GPIO_TO_IRQ(SPITZ_GPIO_KEY_INT)
168#define SPITZ_IRQ_GPIO_AC_IN IRQ_GPIO(SPITZ_GPIO_AC_IN) 168#define SPITZ_IRQ_GPIO_AC_IN PXA_GPIO_TO_IRQ(SPITZ_GPIO_AC_IN)
169#define SPITZ_IRQ_GPIO_AK_INT IRQ_GPIO(SPITZ_GPIO_AK_INT) 169#define SPITZ_IRQ_GPIO_AK_INT PXA_GPIO_TO_IRQ(SPITZ_GPIO_AK_INT)
170#define SPITZ_IRQ_GPIO_HP_IN IRQ_GPIO(SPITZ_GPIO_HP_IN) 170#define SPITZ_IRQ_GPIO_HP_IN PXA_GPIO_TO_IRQ(SPITZ_GPIO_HP_IN)
171#define SPITZ_IRQ_GPIO_TP_INT IRQ_GPIO(SPITZ_GPIO_TP_INT) 171#define SPITZ_IRQ_GPIO_TP_INT PXA_GPIO_TO_IRQ(SPITZ_GPIO_TP_INT)
172#define SPITZ_IRQ_GPIO_SYNC IRQ_GPIO(SPITZ_GPIO_SYNC) 172#define SPITZ_IRQ_GPIO_SYNC PXA_GPIO_TO_IRQ(SPITZ_GPIO_SYNC)
173#define SPITZ_IRQ_GPIO_ON_KEY IRQ_GPIO(SPITZ_GPIO_ON_KEY) 173#define SPITZ_IRQ_GPIO_ON_KEY PXA_GPIO_TO_IRQ(SPITZ_GPIO_ON_KEY)
174#define SPITZ_IRQ_GPIO_SWA IRQ_GPIO(SPITZ_GPIO_SWA) 174#define SPITZ_IRQ_GPIO_SWA PXA_GPIO_TO_IRQ(SPITZ_GPIO_SWA)
175#define SPITZ_IRQ_GPIO_SWB IRQ_GPIO(SPITZ_GPIO_SWB) 175#define SPITZ_IRQ_GPIO_SWB PXA_GPIO_TO_IRQ(SPITZ_GPIO_SWB)
176#define SPITZ_IRQ_GPIO_BAT_COVER IRQ_GPIO(SPITZ_GPIO_BAT_COVER) 176#define SPITZ_IRQ_GPIO_BAT_COVER PXA_GPIO_TO_IRQ(SPITZ_GPIO_BAT_COVER)
177#define SPITZ_IRQ_GPIO_FATAL_BAT IRQ_GPIO(SPITZ_GPIO_FATAL_BAT) 177#define SPITZ_IRQ_GPIO_FATAL_BAT PXA_GPIO_TO_IRQ(SPITZ_GPIO_FATAL_BAT)
178#define SPITZ_IRQ_GPIO_CO IRQ_GPIO(SPITZ_GPIO_CO) 178#define SPITZ_IRQ_GPIO_CO PXA_GPIO_TO_IRQ(SPITZ_GPIO_CO)
179#define SPITZ_IRQ_GPIO_CF_IRQ IRQ_GPIO(SPITZ_GPIO_CF_IRQ) 179#define SPITZ_IRQ_GPIO_CF_IRQ PXA_GPIO_TO_IRQ(SPITZ_GPIO_CF_IRQ)
180#define SPITZ_IRQ_GPIO_CF_CD IRQ_GPIO(SPITZ_GPIO_CF_CD) 180#define SPITZ_IRQ_GPIO_CF_CD PXA_GPIO_TO_IRQ(SPITZ_GPIO_CF_CD)
181#define SPITZ_IRQ_GPIO_CF2_IRQ IRQ_GPIO(SPITZ_GPIO_CF2_IRQ) 181#define SPITZ_IRQ_GPIO_CF2_IRQ PXA_GPIO_TO_IRQ(SPITZ_GPIO_CF2_IRQ)
182#define SPITZ_IRQ_GPIO_nSD_INT IRQ_GPIO(SPITZ_GPIO_nSD_INT) 182#define SPITZ_IRQ_GPIO_nSD_INT PXA_GPIO_TO_IRQ(SPITZ_GPIO_nSD_INT)
183#define SPITZ_IRQ_GPIO_nSD_DETECT IRQ_GPIO(SPITZ_GPIO_nSD_DETECT) 183#define SPITZ_IRQ_GPIO_nSD_DETECT PXA_GPIO_TO_IRQ(SPITZ_GPIO_nSD_DETECT)
184 184
185/* 185/*
186 * Shared data structures 186 * Shared data structures
diff --git a/arch/arm/mach-pxa/include/mach/tosa.h b/arch/arm/mach-pxa/include/mach/tosa.h
index 1272c4b56ceb..2bb0e862598c 100644
--- a/arch/arm/mach-pxa/include/mach/tosa.h
+++ b/arch/arm/mach-pxa/include/mach/tosa.h
@@ -24,7 +24,7 @@
24/* 24/*
25 * SCOOP2 internal GPIOs 25 * SCOOP2 internal GPIOs
26 */ 26 */
27#define TOSA_SCOOP_GPIO_BASE NR_BUILTIN_GPIO 27#define TOSA_SCOOP_GPIO_BASE PXA_NR_BUILTIN_GPIO
28#define TOSA_SCOOP_PXA_VCORE1 SCOOP_GPCR_PA11 28#define TOSA_SCOOP_PXA_VCORE1 SCOOP_GPCR_PA11
29#define TOSA_GPIO_TC6393XB_REST_IN (TOSA_SCOOP_GPIO_BASE + 1) 29#define TOSA_GPIO_TC6393XB_REST_IN (TOSA_SCOOP_GPIO_BASE + 1)
30#define TOSA_GPIO_IR_POWERDWN (TOSA_SCOOP_GPIO_BASE + 2) 30#define TOSA_GPIO_IR_POWERDWN (TOSA_SCOOP_GPIO_BASE + 2)
@@ -42,7 +42,7 @@
42/* 42/*
43 * SCOOP2 jacket GPIOs 43 * SCOOP2 jacket GPIOs
44 */ 44 */
45#define TOSA_SCOOP_JC_GPIO_BASE (NR_BUILTIN_GPIO + 12) 45#define TOSA_SCOOP_JC_GPIO_BASE (PXA_NR_BUILTIN_GPIO + 12)
46#define TOSA_GPIO_BT_LED (TOSA_SCOOP_JC_GPIO_BASE + 0) 46#define TOSA_GPIO_BT_LED (TOSA_SCOOP_JC_GPIO_BASE + 0)
47#define TOSA_GPIO_NOTE_LED (TOSA_SCOOP_JC_GPIO_BASE + 1) 47#define TOSA_GPIO_NOTE_LED (TOSA_SCOOP_JC_GPIO_BASE + 1)
48#define TOSA_GPIO_CHRG_ERR_LED (TOSA_SCOOP_JC_GPIO_BASE + 2) 48#define TOSA_GPIO_CHRG_ERR_LED (TOSA_SCOOP_JC_GPIO_BASE + 2)
@@ -59,7 +59,7 @@
59/* 59/*
60 * TC6393XB GPIOs 60 * TC6393XB GPIOs
61 */ 61 */
62#define TOSA_TC6393XB_GPIO_BASE (NR_BUILTIN_GPIO + 2 * 12) 62#define TOSA_TC6393XB_GPIO_BASE (PXA_NR_BUILTIN_GPIO + 2 * 12)
63 63
64#define TOSA_GPIO_TG_ON (TOSA_TC6393XB_GPIO_BASE + 0) 64#define TOSA_GPIO_TG_ON (TOSA_TC6393XB_GPIO_BASE + 0)
65#define TOSA_GPIO_L_MUTE (TOSA_TC6393XB_GPIO_BASE + 1) 65#define TOSA_GPIO_L_MUTE (TOSA_TC6393XB_GPIO_BASE + 1)
@@ -141,30 +141,30 @@
141/* 141/*
142 * Interrupts 142 * Interrupts
143 */ 143 */
144#define TOSA_IRQ_GPIO_WAKEUP IRQ_GPIO(TOSA_GPIO_WAKEUP) 144#define TOSA_IRQ_GPIO_WAKEUP PXA_GPIO_TO_IRQ(TOSA_GPIO_WAKEUP)
145#define TOSA_IRQ_GPIO_AC_IN IRQ_GPIO(TOSA_GPIO_AC_IN) 145#define TOSA_IRQ_GPIO_AC_IN PXA_GPIO_TO_IRQ(TOSA_GPIO_AC_IN)
146#define TOSA_IRQ_GPIO_RECORD_BTN IRQ_GPIO(TOSA_GPIO_RECORD_BTN) 146#define TOSA_IRQ_GPIO_RECORD_BTN PXA_GPIO_TO_IRQ(TOSA_GPIO_RECORD_BTN)
147#define TOSA_IRQ_GPIO_SYNC IRQ_GPIO(TOSA_GPIO_SYNC) 147#define TOSA_IRQ_GPIO_SYNC PXA_GPIO_TO_IRQ(TOSA_GPIO_SYNC)
148#define TOSA_IRQ_GPIO_USB_IN IRQ_GPIO(TOSA_GPIO_USB_IN) 148#define TOSA_IRQ_GPIO_USB_IN PXA_GPIO_TO_IRQ(TOSA_GPIO_USB_IN)
149#define TOSA_IRQ_GPIO_JACKET_DETECT IRQ_GPIO(TOSA_GPIO_JACKET_DETECT) 149#define TOSA_IRQ_GPIO_JACKET_DETECT PXA_GPIO_TO_IRQ(TOSA_GPIO_JACKET_DETECT)
150#define TOSA_IRQ_GPIO_nSD_INT IRQ_GPIO(TOSA_GPIO_nSD_INT) 150#define TOSA_IRQ_GPIO_nSD_INT PXA_GPIO_TO_IRQ(TOSA_GPIO_nSD_INT)
151#define TOSA_IRQ_GPIO_nSD_DETECT IRQ_GPIO(TOSA_GPIO_nSD_DETECT) 151#define TOSA_IRQ_GPIO_nSD_DETECT PXA_GPIO_TO_IRQ(TOSA_GPIO_nSD_DETECT)
152#define TOSA_IRQ_GPIO_BAT1_CRG IRQ_GPIO(TOSA_GPIO_BAT1_CRG) 152#define TOSA_IRQ_GPIO_BAT1_CRG PXA_GPIO_TO_IRQ(TOSA_GPIO_BAT1_CRG)
153#define TOSA_IRQ_GPIO_CF_CD IRQ_GPIO(TOSA_GPIO_CF_CD) 153#define TOSA_IRQ_GPIO_CF_CD PXA_GPIO_TO_IRQ(TOSA_GPIO_CF_CD)
154#define TOSA_IRQ_GPIO_BAT0_CRG IRQ_GPIO(TOSA_GPIO_BAT0_CRG) 154#define TOSA_IRQ_GPIO_BAT0_CRG PXA_GPIO_TO_IRQ(TOSA_GPIO_BAT0_CRG)
155#define TOSA_IRQ_GPIO_TC6393XB_INT IRQ_GPIO(TOSA_GPIO_TC6393XB_INT) 155#define TOSA_IRQ_GPIO_TC6393XB_INT PXA_GPIO_TO_IRQ(TOSA_GPIO_TC6393XB_INT)
156#define TOSA_IRQ_GPIO_BAT0_LOW IRQ_GPIO(TOSA_GPIO_BAT0_LOW) 156#define TOSA_IRQ_GPIO_BAT0_LOW PXA_GPIO_TO_IRQ(TOSA_GPIO_BAT0_LOW)
157#define TOSA_IRQ_GPIO_EAR_IN IRQ_GPIO(TOSA_GPIO_EAR_IN) 157#define TOSA_IRQ_GPIO_EAR_IN PXA_GPIO_TO_IRQ(TOSA_GPIO_EAR_IN)
158#define TOSA_IRQ_GPIO_CF_IRQ IRQ_GPIO(TOSA_GPIO_CF_IRQ) 158#define TOSA_IRQ_GPIO_CF_IRQ PXA_GPIO_TO_IRQ(TOSA_GPIO_CF_IRQ)
159#define TOSA_IRQ_GPIO_ON_KEY IRQ_GPIO(TOSA_GPIO_ON_KEY) 159#define TOSA_IRQ_GPIO_ON_KEY PXA_GPIO_TO_IRQ(TOSA_GPIO_ON_KEY)
160#define TOSA_IRQ_GPIO_VGA_LINE IRQ_GPIO(TOSA_GPIO_VGA_LINE) 160#define TOSA_IRQ_GPIO_VGA_LINE PXA_GPIO_TO_IRQ(TOSA_GPIO_VGA_LINE)
161#define TOSA_IRQ_GPIO_TP_INT IRQ_GPIO(TOSA_GPIO_TP_INT) 161#define TOSA_IRQ_GPIO_TP_INT PXA_GPIO_TO_IRQ(TOSA_GPIO_TP_INT)
162#define TOSA_IRQ_GPIO_JC_CF_IRQ IRQ_GPIO(TOSA_GPIO_JC_CF_IRQ) 162#define TOSA_IRQ_GPIO_JC_CF_IRQ PXA_GPIO_TO_IRQ(TOSA_GPIO_JC_CF_IRQ)
163#define TOSA_IRQ_GPIO_BAT_LOCKED IRQ_GPIO(TOSA_GPIO_BAT_LOCKED) 163#define TOSA_IRQ_GPIO_BAT_LOCKED PXA_GPIO_TO_IRQ(TOSA_GPIO_BAT_LOCKED)
164#define TOSA_IRQ_GPIO_BAT1_LOW IRQ_GPIO(TOSA_GPIO_BAT1_LOW) 164#define TOSA_IRQ_GPIO_BAT1_LOW PXA_GPIO_TO_IRQ(TOSA_GPIO_BAT1_LOW)
165#define TOSA_IRQ_GPIO_KEY_SENSE(a) IRQ_GPIO(69+(a)) 165#define TOSA_IRQ_GPIO_KEY_SENSE(a) PXA_GPIO_TO_IRQ(69+(a))
166 166
167#define TOSA_IRQ_GPIO_MAIN_BAT_LOW IRQ_GPIO(TOSA_GPIO_MAIN_BAT_LOW) 167#define TOSA_IRQ_GPIO_MAIN_BAT_LOW PXA_GPIO_TO_IRQ(TOSA_GPIO_MAIN_BAT_LOW)
168 168
169#define TOSA_KEY_SYNC KEY_102ND /* ??? */ 169#define TOSA_KEY_SYNC KEY_102ND /* ??? */
170 170
diff --git a/arch/arm/mach-pxa/include/mach/trizeps4.h b/arch/arm/mach-pxa/include/mach/trizeps4.h
index 903e1a2e6641..d2ca01053f69 100644
--- a/arch/arm/mach-pxa/include/mach/trizeps4.h
+++ b/arch/arm/mach-pxa/include/mach/trizeps4.h
@@ -43,30 +43,30 @@
43 43
44/* Ethernet Controller Davicom DM9000 */ 44/* Ethernet Controller Davicom DM9000 */
45#define GPIO_DM9000 101 45#define GPIO_DM9000 101
46#define TRIZEPS4_ETH_IRQ IRQ_GPIO(GPIO_DM9000) 46#define TRIZEPS4_ETH_IRQ PXA_GPIO_TO_IRQ(GPIO_DM9000)
47 47
48/* UCB1400 audio / TS-controller */ 48/* UCB1400 audio / TS-controller */
49#define GPIO_UCB1400 1 49#define GPIO_UCB1400 1
50#define TRIZEPS4_UCB1400_IRQ IRQ_GPIO(GPIO_UCB1400) 50#define TRIZEPS4_UCB1400_IRQ PXA_GPIO_TO_IRQ(GPIO_UCB1400)
51 51
52/* PCMCIA socket Compact Flash */ 52/* PCMCIA socket Compact Flash */
53#define GPIO_PCD 11 /* PCMCIA Card Detect */ 53#define GPIO_PCD 11 /* PCMCIA Card Detect */
54#define TRIZEPS4_CD_IRQ IRQ_GPIO(GPIO_PCD) 54#define TRIZEPS4_CD_IRQ PXA_GPIO_TO_IRQ(GPIO_PCD)
55#define GPIO_PRDY 13 /* READY / nINT */ 55#define GPIO_PRDY 13 /* READY / nINT */
56#define TRIZEPS4_READY_NINT IRQ_GPIO(GPIO_PRDY) 56#define TRIZEPS4_READY_NINT PXA_GPIO_TO_IRQ(GPIO_PRDY)
57 57
58/* MMC socket */ 58/* MMC socket */
59#define GPIO_MMC_DET 12 59#define GPIO_MMC_DET 12
60#define TRIZEPS4_MMC_IRQ IRQ_GPIO(GPIO_MMC_DET) 60#define TRIZEPS4_MMC_IRQ PXA_GPIO_TO_IRQ(GPIO_MMC_DET)
61 61
62/* DOC NAND chip */ 62/* DOC NAND chip */
63#define GPIO_DOC_LOCK 94 63#define GPIO_DOC_LOCK 94
64#define GPIO_DOC_IRQ 93 64#define GPIO_DOC_IRQ 93
65#define TRIZEPS4_DOC_IRQ IRQ_GPIO(GPIO_DOC_IRQ) 65#define TRIZEPS4_DOC_IRQ PXA_GPIO_TO_IRQ(GPIO_DOC_IRQ)
66 66
67/* SPI interface */ 67/* SPI interface */
68#define GPIO_SPI 53 68#define GPIO_SPI 53
69#define TRIZEPS4_SPI_IRQ IRQ_GPIO(GPIO_SPI) 69#define TRIZEPS4_SPI_IRQ PXA_GPIO_TO_IRQ(GPIO_SPI)
70 70
71/* LEDS using tx2 / rx2 */ 71/* LEDS using tx2 / rx2 */
72#define GPIO_SYS_BUSY_LED 46 72#define GPIO_SYS_BUSY_LED 46
@@ -74,7 +74,7 @@
74 74
75/* Off-module PIC on ConXS board */ 75/* Off-module PIC on ConXS board */
76#define GPIO_PIC 0 76#define GPIO_PIC 0
77#define TRIZEPS4_PIC_IRQ IRQ_GPIO(GPIO_PIC) 77#define TRIZEPS4_PIC_IRQ PXA_GPIO_TO_IRQ(GPIO_PIC)
78 78
79#ifdef CONFIG_MACH_TRIZEPS_CONXS 79#ifdef CONFIG_MACH_TRIZEPS_CONXS
80/* for CONXS base board define these registers */ 80/* for CONXS base board define these registers */
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-10 05:27:30 -0400