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-rw-r--r--arch/arm/mach-pxa/include/mach/hx4700.h131
-rw-r--r--arch/arm/mach-pxa/include/mach/i2c.h82
-rw-r--r--arch/arm/mach-pxa/include/mach/irqs.h18
-rw-r--r--arch/arm/mach-pxa/include/mach/mfp-pxa320.h14
-rw-r--r--arch/arm/mach-pxa/include/mach/palmld.h1
-rw-r--r--arch/arm/mach-pxa/include/mach/pm.h2
-rw-r--r--arch/arm/mach-pxa/include/mach/pxa27x.h3
-rw-r--r--arch/arm/mach-pxa/include/mach/sharpsl_pm.h104
-rw-r--r--arch/arm/mach-pxa/include/mach/uncompress.h3
9 files changed, 269 insertions, 89 deletions
diff --git a/arch/arm/mach-pxa/include/mach/hx4700.h b/arch/arm/mach-pxa/include/mach/hx4700.h
new file mode 100644
index 000000000000..9eaeed1f87f1
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/hx4700.h
@@ -0,0 +1,131 @@
1/*
2 * GPIO and IRQ definitions for HP iPAQ hx4700
3 *
4 * Copyright (c) 2008 Philipp Zabel
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
12#ifndef _HX4700_H_
13#define _HX4700_H_
14
15#include <linux/gpio.h>
16#include <linux/mfd/asic3.h>
17
18#define HX4700_ASIC3_GPIO_BASE NR_BUILTIN_GPIO
19#define HX4700_EGPIO_BASE (HX4700_ASIC3_GPIO_BASE + ASIC3_NUM_GPIOS)
20
21/*
22 * PXA GPIOs
23 */
24
25#define GPIO0_HX4700_nKEY_POWER 0
26#define GPIO12_HX4700_ASIC3_IRQ 12
27#define GPIO13_HX4700_W3220_IRQ 13
28#define GPIO14_HX4700_nWLAN_IRQ 14
29#define GPIO18_HX4700_RDY 18
30#define GPIO22_HX4700_LCD_RL 22
31#define GPIO27_HX4700_CODEC_ON 27
32#define GPIO32_HX4700_RS232_ON 32
33#define GPIO52_HX4700_CPU_nBATT_FAULT 52
34#define GPIO58_HX4700_TSC2046_nPENIRQ 58
35#define GPIO59_HX4700_LCD_PC1 59
36#define GPIO60_HX4700_CF_RNB 60
37#define GPIO61_HX4700_W3220_nRESET 61
38#define GPIO62_HX4700_LCD_nRESET 62
39#define GPIO63_HX4700_CPU_SS_nRESET 63
40#define GPIO65_HX4700_TSC2046_PEN_PU 65
41#define GPIO66_HX4700_ASIC3_nSDIO_IRQ 66
42#define GPIO67_HX4700_EUART_PS 67
43#define GPIO70_HX4700_LCD_SLIN1 70
44#define GPIO71_HX4700_ASIC3_nRESET 71
45#define GPIO72_HX4700_BQ24022_nCHARGE_EN 72
46#define GPIO73_HX4700_LCD_UD_1 73
47#define GPIO75_HX4700_EARPHONE_nDET 75
48#define GPIO76_HX4700_USBC_PUEN 76
49#define GPIO81_HX4700_CPU_GP_nRESET 81
50#define GPIO82_HX4700_EUART_RESET 82
51#define GPIO83_HX4700_WLAN_nRESET 83
52#define GPIO84_HX4700_LCD_SQN 84
53#define GPIO85_HX4700_nPCE1 85
54#define GPIO88_HX4700_TSC2046_CS 88
55#define GPIO91_HX4700_FLASH_VPEN 91
56#define GPIO92_HX4700_HP_DRIVER 92
57#define GPIO93_HX4700_EUART_INT 93
58#define GPIO94_HX4700_KEY_MAIL 94
59#define GPIO95_HX4700_BATT_OFF 95
60#define GPIO96_HX4700_BQ24022_ISET2 96
61#define GPIO97_HX4700_nBL_DETECT 97
62#define GPIO99_HX4700_KEY_CONTACTS 99
63#define GPIO100_HX4700_AUTO_SENSE 100 /* BL auto brightness */
64#define GPIO102_HX4700_SYNAPTICS_POWER_ON 102
65#define GPIO103_HX4700_SYNAPTICS_INT 103
66#define GPIO105_HX4700_nIR_ON 105
67#define GPIO106_HX4700_CPU_BT_nRESET 106
68#define GPIO107_HX4700_SPK_nSD 107
69#define GPIO109_HX4700_CODEC_nPDN 109
70#define GPIO110_HX4700_LCD_LVDD_3V3_ON 110
71#define GPIO111_HX4700_LCD_AVDD_3V3_ON 111
72#define GPIO112_HX4700_LCD_N2V7_7V3_ON 112
73#define GPIO114_HX4700_CF_RESET 114
74#define GPIO116_HX4700_CPU_HW_nRESET 116
75
76/*
77 * ASIC3 GPIOs
78 */
79
80#define GPIOC_BASE (HX4700_ASIC3_GPIO_BASE + 32)
81#define GPIOD_BASE (HX4700_ASIC3_GPIO_BASE + 48)
82
83#define GPIOC0_LED_RED (GPIOC_BASE + 0)
84#define GPIOC1_LED_GREEN (GPIOC_BASE + 1)
85#define GPIOC2_LED_BLUE (GPIOC_BASE + 2)
86#define GPIOC3_nSD_CS (GPIOC_BASE + 3)
87#define GPIOC4_CF_nCD (GPIOC_BASE + 4) /* Input */
88#define GPIOC5_nCIOW (GPIOC_BASE + 5) /* Output, to CF */
89#define GPIOC6_nCIOR (GPIOC_BASE + 6) /* Output, to CF */
90#define GPIOC7_nPCE1 (GPIOC_BASE + 7) /* Input, from CPU */
91#define GPIOC8_nPCE2 (GPIOC_BASE + 8) /* Input, from CPU */
92#define GPIOC9_nPOE (GPIOC_BASE + 9) /* Input, from CPU */
93#define GPIOC10_CF_nPWE (GPIOC_BASE + 10) /* Input */
94#define GPIOC11_PSKTSEL (GPIOC_BASE + 11) /* Input, from CPU */
95#define GPIOC12_nPREG (GPIOC_BASE + 12) /* Input, from CPU */
96#define GPIOC13_nPWAIT (GPIOC_BASE + 13) /* Output, to CPU */
97#define GPIOC14_nPIOIS16 (GPIOC_BASE + 14) /* Output, to CPU */
98#define GPIOC15_nPIOR (GPIOC_BASE + 15) /* Input, from CPU */
99
100#define GPIOD0_CPU_SS_INT (GPIOD_BASE + 0) /* Input */
101#define GPIOD1_nKEY_CALENDAR (GPIOD_BASE + 1)
102#define GPIOD2_BLUETOOTH_WAKEUP (GPIOD_BASE + 2)
103#define GPIOD3_nKEY_HOME (GPIOD_BASE + 3)
104#define GPIOD4_CF_nCD (GPIOD_BASE + 4) /* Input, from CF */
105#define GPIOD5_nPIO (GPIOD_BASE + 5) /* Input */
106#define GPIOD6_nKEY_RECORD (GPIOD_BASE + 6)
107#define GPIOD7_nSDIO_DETECT (GPIOD_BASE + 7)
108#define GPIOD8_COM_DCD (GPIOD_BASE + 8) /* Input */
109#define GPIOD9_nAC_IN (GPIOD_BASE + 9)
110#define GPIOD10_nSDIO_IRQ (GPIOD_BASE + 10) /* Input */
111#define GPIOD11_nCIOIS16 (GPIOD_BASE + 11) /* Input, from CF */
112#define GPIOD12_nCWAIT (GPIOD_BASE + 12) /* Input, from CF */
113#define GPIOD13_CF_RNB (GPIOD_BASE + 13) /* Input */
114#define GPIOD14_nUSBC_DETECT (GPIOD_BASE + 14)
115#define GPIOD15_nPIOW (GPIOD_BASE + 15) /* Input, from CPU */
116
117/*
118 * EGPIOs
119 */
120
121#define EGPIO0_VCC_3V3_EN (HX4700_EGPIO_BASE + 0) /* WLAN support chip */
122#define EGPIO1_WL_VREG_EN (HX4700_EGPIO_BASE + 1) /* WLAN power */
123#define EGPIO2_VCC_2V1_WL_EN (HX4700_EGPIO_BASE + 2) /* unused */
124#define EGPIO3_SS_PWR_ON (HX4700_EGPIO_BASE + 3) /* smart slot power */
125#define EGPIO4_CF_3V3_ON (HX4700_EGPIO_BASE + 4) /* CF 3.3V enable */
126#define EGPIO5_BT_3V3_ON (HX4700_EGPIO_BASE + 5) /* BT 3.3V enable */
127#define EGPIO6_WL1V8_EN (HX4700_EGPIO_BASE + 6) /* WLAN 1.8V enable */
128#define EGPIO7_VCC_3V3_WL_EN (HX4700_EGPIO_BASE + 7) /* WLAN 3.3V enable */
129#define EGPIO8_USB_3V3_ON (HX4700_EGPIO_BASE + 8) /* unused */
130
131#endif /* _HX4700_H_ */
diff --git a/arch/arm/mach-pxa/include/mach/i2c.h b/arch/arm/mach-pxa/include/mach/i2c.h
deleted file mode 100644
index 1a9f65e6ec0f..000000000000
--- a/arch/arm/mach-pxa/include/mach/i2c.h
+++ /dev/null
@@ -1,82 +0,0 @@
1/*
2 * i2c_pxa.h
3 *
4 * Copyright (C) 2002 Intrinsyc Software Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11#ifndef _I2C_PXA_H_
12#define _I2C_PXA_H_
13
14#if 0
15#define DEF_TIMEOUT 3
16#else
17/* need a longer timeout if we're dealing with the fact we may well be
18 * looking at a multi-master environment
19*/
20#define DEF_TIMEOUT 32
21#endif
22
23#define BUS_ERROR (-EREMOTEIO)
24#define XFER_NAKED (-ECONNREFUSED)
25#define I2C_RETRY (-2000) /* an error has occurred retry transmit */
26
27/* ICR initialize bit values
28*
29* 15. FM 0 (100 Khz operation)
30* 14. UR 0 (No unit reset)
31* 13. SADIE 0 (Disables the unit from interrupting on slave addresses
32* matching its slave address)
33* 12. ALDIE 0 (Disables the unit from interrupt when it loses arbitration
34* in master mode)
35* 11. SSDIE 0 (Disables interrupts from a slave stop detected, in slave mode)
36* 10. BEIE 1 (Enable interrupts from detected bus errors, no ACK sent)
37* 9. IRFIE 1 (Enable interrupts from full buffer received)
38* 8. ITEIE 1 (Enables the I2C unit to interrupt when transmit buffer empty)
39* 7. GCD 1 (Disables i2c unit response to general call messages as a slave)
40* 6. IUE 0 (Disable unit until we change settings)
41* 5. SCLE 1 (Enables the i2c clock output for master mode (drives SCL)
42* 4. MA 0 (Only send stop with the ICR stop bit)
43* 3. TB 0 (We are not transmitting a byte initially)
44* 2. ACKNAK 0 (Send an ACK after the unit receives a byte)
45* 1. STOP 0 (Do not send a STOP)
46* 0. START 0 (Do not send a START)
47*
48*/
49#define I2C_ICR_INIT (ICR_BEIE | ICR_IRFIE | ICR_ITEIE | ICR_GCD | ICR_SCLE)
50
51/* I2C status register init values
52 *
53 * 10. BED 1 (Clear bus error detected)
54 * 9. SAD 1 (Clear slave address detected)
55 * 7. IRF 1 (Clear IDBR Receive Full)
56 * 6. ITE 1 (Clear IDBR Transmit Empty)
57 * 5. ALD 1 (Clear Arbitration Loss Detected)
58 * 4. SSD 1 (Clear Slave Stop Detected)
59 */
60#define I2C_ISR_INIT 0x7FF /* status register init */
61
62struct i2c_slave_client;
63
64struct i2c_pxa_platform_data {
65 unsigned int slave_addr;
66 struct i2c_slave_client *slave;
67 unsigned int class;
68 unsigned int use_pio :1;
69 unsigned int fast_mode :1;
70};
71
72extern void pxa_set_i2c_info(struct i2c_pxa_platform_data *info);
73
74#ifdef CONFIG_PXA27x
75extern void pxa27x_set_i2c_power_info(struct i2c_pxa_platform_data *info);
76#endif
77
78#ifdef CONFIG_PXA3xx
79extern void pxa3xx_set_i2c_power_info(struct i2c_pxa_platform_data *info);
80#endif
81
82#endif
diff --git a/arch/arm/mach-pxa/include/mach/irqs.h b/arch/arm/mach-pxa/include/mach/irqs.h
index 32bb4a2eb7f1..6a1d95993342 100644
--- a/arch/arm/mach-pxa/include/mach/irqs.h
+++ b/arch/arm/mach-pxa/include/mach/irqs.h
@@ -91,13 +91,23 @@
91#define IRQ_TO_GPIO(i) (((i) < IRQ_GPIO(2)) ? ((i) - IRQ_GPIO0) : IRQ_TO_GPIO_2_x(i)) 91#define IRQ_TO_GPIO(i) (((i) < IRQ_GPIO(2)) ? ((i) - IRQ_GPIO0) : IRQ_TO_GPIO_2_x(i))
92 92
93/* 93/*
94 * The next 16 interrupts are for board specific purposes. Since 94 * The following interrupts are for board specific purposes. Since
95 * the kernel can only run on one machine at a time, we can re-use 95 * the kernel can only run on one machine at a time, we can re-use
96 * these. If you need more, increase IRQ_BOARD_END, but keep it 96 * these. There will be 16 IRQs by default. If it is not enough,
97 * within sensible limits. 97 * IRQ_BOARD_END is allowed be customized for each board, but keep
98 * the numbers within sensible limits and in descending order, so
99 * when multiple config options are selected, the maximum will be
100 * used.
98 */ 101 */
99#define IRQ_BOARD_START (PXA_GPIO_IRQ_BASE + PXA_GPIO_IRQ_NUM) 102#define IRQ_BOARD_START (PXA_GPIO_IRQ_BASE + PXA_GPIO_IRQ_NUM)
103
104#if defined(CONFIG_MACH_H4700)
105#define IRQ_BOARD_END (IRQ_BOARD_START + 70)
106#elif defined(CONFIG_MACH_ZYLONITE)
107#define IRQ_BOARD_END (IRQ_BOARD_START + 32)
108#else
100#define IRQ_BOARD_END (IRQ_BOARD_START + 16) 109#define IRQ_BOARD_END (IRQ_BOARD_START + 16)
110#endif
101 111
102#define IRQ_SA1111_START (IRQ_BOARD_END) 112#define IRQ_SA1111_START (IRQ_BOARD_END)
103#define IRQ_GPAIN0 (IRQ_BOARD_END + 0) 113#define IRQ_GPAIN0 (IRQ_BOARD_END + 0)
@@ -188,8 +198,6 @@
188#define NR_IRQS (IRQ_LOCOMO_SPI_TEND + 1) 198#define NR_IRQS (IRQ_LOCOMO_SPI_TEND + 1)
189#elif defined(CONFIG_PXA_HAVE_BOARD_IRQS) 199#elif defined(CONFIG_PXA_HAVE_BOARD_IRQS)
190#define NR_IRQS (IRQ_BOARD_END) 200#define NR_IRQS (IRQ_BOARD_END)
191#elif defined(CONFIG_MACH_ZYLONITE)
192#define NR_IRQS (IRQ_BOARD_START + 32)
193#else 201#else
194#define NR_IRQS (IRQ_BOARD_START) 202#define NR_IRQS (IRQ_BOARD_START)
195#endif 203#endif
diff --git a/arch/arm/mach-pxa/include/mach/mfp-pxa320.h b/arch/arm/mach-pxa/include/mach/mfp-pxa320.h
index 07897e61d05a..3ce4682eabb6 100644
--- a/arch/arm/mach-pxa/include/mach/mfp-pxa320.h
+++ b/arch/arm/mach-pxa/include/mach/mfp-pxa320.h
@@ -283,6 +283,9 @@
283#define GPIO41_UART1_TXD MFP_CFG_LPM(GPIO41, AF4, FLOAT) 283#define GPIO41_UART1_TXD MFP_CFG_LPM(GPIO41, AF4, FLOAT)
284#define GPIO42_UART1_RXD MFP_CFG_LPM(GPIO42, AF4, FLOAT) 284#define GPIO42_UART1_RXD MFP_CFG_LPM(GPIO42, AF4, FLOAT)
285#define GPIO42_UART1_TXD MFP_CFG_LPM(GPIO42, AF2, FLOAT) 285#define GPIO42_UART1_TXD MFP_CFG_LPM(GPIO42, AF2, FLOAT)
286#define GPIO75_UART1_RXD MFP_CFG_LPM(GPIO75, AF1, FLOAT)
287#define GPIO76_UART1_RXD MFP_CFG_LPM(GPIO76, AF3, FLOAT)
288#define GPIO76_UART1_TXD MFP_CFG_LPM(GPIO76, AF1, FLOAT)
286#define GPIO97_UART1_RXD MFP_CFG_LPM(GPIO97, AF1, FLOAT) 289#define GPIO97_UART1_RXD MFP_CFG_LPM(GPIO97, AF1, FLOAT)
287#define GPIO97_UART1_TXD MFP_CFG_LPM(GPIO97, AF6, FLOAT) 290#define GPIO97_UART1_TXD MFP_CFG_LPM(GPIO97, AF6, FLOAT)
288#define GPIO98_UART1_RXD MFP_CFG_LPM(GPIO98, AF6, FLOAT) 291#define GPIO98_UART1_RXD MFP_CFG_LPM(GPIO98, AF6, FLOAT)
@@ -291,6 +294,9 @@
291#define GPIO43_UART1_RTS MFP_CFG_LPM(GPIO43, AF4, FLOAT) 294#define GPIO43_UART1_RTS MFP_CFG_LPM(GPIO43, AF4, FLOAT)
292#define GPIO48_UART1_CTS MFP_CFG_LPM(GPIO48, AF4, FLOAT) 295#define GPIO48_UART1_CTS MFP_CFG_LPM(GPIO48, AF4, FLOAT)
293#define GPIO48_UART1_RTS MFP_CFG_LPM(GPIO48, AF2, FLOAT) 296#define GPIO48_UART1_RTS MFP_CFG_LPM(GPIO48, AF2, FLOAT)
297#define GPIO77_UART1_CTS MFP_CFG_LPM(GPIO77, AF1, FLOAT)
298#define GPIO82_UART1_RTS MFP_CFG_LPM(GPIO82, AF1, FLOAT)
299#define GPIO82_UART1_CTS MFP_CFG_LPM(GPIO82, AF3, FLOAT)
294#define GPIO99_UART1_CTS MFP_CFG_LPM(GPIO99, AF1, FLOAT) 300#define GPIO99_UART1_CTS MFP_CFG_LPM(GPIO99, AF1, FLOAT)
295#define GPIO99_UART1_RTS MFP_CFG_LPM(GPIO99, AF6, FLOAT) 301#define GPIO99_UART1_RTS MFP_CFG_LPM(GPIO99, AF6, FLOAT)
296#define GPIO104_UART1_CTS MFP_CFG_LPM(GPIO104, AF6, FLOAT) 302#define GPIO104_UART1_CTS MFP_CFG_LPM(GPIO104, AF6, FLOAT)
@@ -299,13 +305,18 @@
299#define GPIO45_UART1_DSR MFP_CFG_LPM(GPIO45, AF2, FLOAT) 305#define GPIO45_UART1_DSR MFP_CFG_LPM(GPIO45, AF2, FLOAT)
300#define GPIO47_UART1_DTR MFP_CFG_LPM(GPIO47, AF2, FLOAT) 306#define GPIO47_UART1_DTR MFP_CFG_LPM(GPIO47, AF2, FLOAT)
301#define GPIO47_UART1_DSR MFP_CFG_LPM(GPIO47, AF4, FLOAT) 307#define GPIO47_UART1_DSR MFP_CFG_LPM(GPIO47, AF4, FLOAT)
308#define GPIO79_UART1_DSR MFP_CFG_LPM(GPIO79, AF1, FLOAT)
309#define GPIO81_UART1_DTR MFP_CFG_LPM(GPIO81, AF1, FLOAT)
310#define GPIO81_UART1_DSR MFP_CFG_LPM(GPIO81, AF3, FLOAT)
302#define GPIO101_UART1_DTR MFP_CFG_LPM(GPIO101, AF6, FLOAT) 311#define GPIO101_UART1_DTR MFP_CFG_LPM(GPIO101, AF6, FLOAT)
303#define GPIO101_UART1_DSR MFP_CFG_LPM(GPIO101, AF1, FLOAT) 312#define GPIO101_UART1_DSR MFP_CFG_LPM(GPIO101, AF1, FLOAT)
304#define GPIO103_UART1_DTR MFP_CFG_LPM(GPIO103, AF1, FLOAT) 313#define GPIO103_UART1_DTR MFP_CFG_LPM(GPIO103, AF1, FLOAT)
305#define GPIO103_UART1_DSR MFP_CFG_LPM(GPIO103, AF6, FLOAT) 314#define GPIO103_UART1_DSR MFP_CFG_LPM(GPIO103, AF6, FLOAT)
306#define GPIO44_UART1_DCD MFP_CFG_LPM(GPIO44, AF2, FLOAT) 315#define GPIO44_UART1_DCD MFP_CFG_LPM(GPIO44, AF2, FLOAT)
316#define GPIO78_UART1_DCD MFP_CFG_LPM(GPIO78, AF1, FLOAT)
307#define GPIO100_UART1_DCD MFP_CFG_LPM(GPIO100, AF1, FLOAT) 317#define GPIO100_UART1_DCD MFP_CFG_LPM(GPIO100, AF1, FLOAT)
308#define GPIO46_UART1_RI MFP_CFG_LPM(GPIO46, AF2, FLOAT) 318#define GPIO46_UART1_RI MFP_CFG_LPM(GPIO46, AF2, FLOAT)
319#define GPIO80_UART1_RI MFP_CFG_LPM(GPIO80, AF1, FLOAT)
309#define GPIO102_UART1_RI MFP_CFG_LPM(GPIO102, AF1, FLOAT) 320#define GPIO102_UART1_RI MFP_CFG_LPM(GPIO102, AF1, FLOAT)
310 321
311/* UART2 */ 322/* UART2 */
@@ -438,6 +449,9 @@
438 449
439#define GPIO2_RDY MFP_CFG(GPIO2, AF1) 450#define GPIO2_RDY MFP_CFG(GPIO2, AF1)
440#define GPIO5_NPIOR MFP_CFG(GPIO5, AF3) 451#define GPIO5_NPIOR MFP_CFG(GPIO5, AF3)
452#define GPIO6_NPIOW MFP_CFG(GPIO6, AF3)
453#define GPIO7_NPIOS16 MFP_CFG(GPIO7, AF3)
454#define GPIO8_NPWAIT MFP_CFG(GPIO8, AF3)
441 455
442#define GPIO11_PWM0_OUT MFP_CFG(GPIO11, AF1) 456#define GPIO11_PWM0_OUT MFP_CFG(GPIO11, AF1)
443#define GPIO12_PWM1_OUT MFP_CFG(GPIO12, AF1) 457#define GPIO12_PWM1_OUT MFP_CFG(GPIO12, AF1)
diff --git a/arch/arm/mach-pxa/include/mach/palmld.h b/arch/arm/mach-pxa/include/mach/palmld.h
index fb13c82ad6dc..8721b8010221 100644
--- a/arch/arm/mach-pxa/include/mach/palmld.h
+++ b/arch/arm/mach-pxa/include/mach/palmld.h
@@ -56,7 +56,6 @@
56#define GPIO_NR_PALMLD_LED_AMBER 94 56#define GPIO_NR_PALMLD_LED_AMBER 94
57 57
58/* IDE */ 58/* IDE */
59#define GPIO_NR_PALMLD_IDE_IRQ 95
60#define GPIO_NR_PALMLD_IDE_RESET 98 59#define GPIO_NR_PALMLD_IDE_RESET 98
61#define GPIO_NR_PALMLD_IDE_PWEN 115 60#define GPIO_NR_PALMLD_IDE_PWEN 115
62 61
diff --git a/arch/arm/mach-pxa/include/mach/pm.h b/arch/arm/mach-pxa/include/mach/pm.h
index a6eeef8a075f..fd8360c6839d 100644
--- a/arch/arm/mach-pxa/include/mach/pm.h
+++ b/arch/arm/mach-pxa/include/mach/pm.h
@@ -27,6 +27,8 @@ extern void pxa27x_cpu_suspend(unsigned int);
27extern void pxa_cpu_resume(void); 27extern void pxa_cpu_resume(void);
28 28
29extern int pxa_pm_enter(suspend_state_t state); 29extern int pxa_pm_enter(suspend_state_t state);
30extern int pxa_pm_prepare(void);
31extern void pxa_pm_finish(void);
30 32
31/* NOTE: this is for PM debugging on Lubbock, it's really a big 33/* NOTE: this is for PM debugging on Lubbock, it's really a big
32 * ugly, but let's keep the crap minimum here, instead of direct 34 * ugly, but let's keep the crap minimum here, instead of direct
diff --git a/arch/arm/mach-pxa/include/mach/pxa27x.h b/arch/arm/mach-pxa/include/mach/pxa27x.h
index 6876e16c2970..0b702693f458 100644
--- a/arch/arm/mach-pxa/include/mach/pxa27x.h
+++ b/arch/arm/mach-pxa/include/mach/pxa27x.h
@@ -16,4 +16,7 @@
16#define ARB_DMA_PARK (1<<25) /* Be parked with DMA when idle */ 16#define ARB_DMA_PARK (1<<25) /* Be parked with DMA when idle */
17#define ARB_CORE_PARK (1<<24) /* Be parked with core when idle */ 17#define ARB_CORE_PARK (1<<24) /* Be parked with core when idle */
18#define ARB_LOCK_FLAG (1<<23) /* Only Locking masters gain access to the bus */ 18#define ARB_LOCK_FLAG (1<<23) /* Only Locking masters gain access to the bus */
19
20extern int __init pxa27x_set_pwrmode(unsigned int mode);
21
19#endif /* __MACH_PXA27x_H */ 22#endif /* __MACH_PXA27x_H */
diff --git a/arch/arm/mach-pxa/include/mach/sharpsl_pm.h b/arch/arm/mach-pxa/include/mach/sharpsl_pm.h
new file mode 100644
index 000000000000..1920dc6b05dc
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/sharpsl_pm.h
@@ -0,0 +1,104 @@
1/*
2 * SharpSL Battery/PM Driver
3 *
4 * Copyright (c) 2004-2005 Richard Purdie
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11#ifndef _MACH_SHARPSL_PM
12#define _MACH_SHARPSL_PM
13
14struct sharpsl_charger_machinfo {
15 void (*init)(void);
16 void (*exit)(void);
17 int gpio_acin;
18 int gpio_batfull;
19 int batfull_irq;
20 int gpio_batlock;
21 int gpio_fatal;
22 void (*discharge)(int);
23 void (*discharge1)(int);
24 void (*charge)(int);
25 void (*measure_temp)(int);
26 void (*presuspend)(void);
27 void (*postsuspend)(void);
28 void (*earlyresume)(void);
29 unsigned long (*read_devdata)(int);
30#define SHARPSL_BATT_VOLT 1
31#define SHARPSL_BATT_TEMP 2
32#define SHARPSL_ACIN_VOLT 3
33#define SHARPSL_STATUS_ACIN 4
34#define SHARPSL_STATUS_LOCK 5
35#define SHARPSL_STATUS_CHRGFULL 6
36#define SHARPSL_STATUS_FATAL 7
37 unsigned long (*charger_wakeup)(void);
38 int (*should_wakeup)(unsigned int resume_on_alarm);
39 void (*backlight_limit)(int);
40 int (*backlight_get_status) (void);
41 int charge_on_volt;
42 int charge_on_temp;
43 int charge_acin_high;
44 int charge_acin_low;
45 int fatal_acin_volt;
46 int fatal_noacin_volt;
47 int bat_levels;
48 struct battery_thresh *bat_levels_noac;
49 struct battery_thresh *bat_levels_acin;
50 struct battery_thresh *bat_levels_noac_bl;
51 struct battery_thresh *bat_levels_acin_bl;
52 int status_high_acin;
53 int status_low_acin;
54 int status_high_noac;
55 int status_low_noac;
56};
57
58struct battery_thresh {
59 int voltage;
60 int percentage;
61};
62
63struct battery_stat {
64 int ac_status; /* APM AC Present/Not Present */
65 int mainbat_status; /* APM Main Battery Status */
66 int mainbat_percent; /* Main Battery Percentage Charge */
67 int mainbat_voltage; /* Main Battery Voltage */
68};
69
70struct sharpsl_pm_status {
71 struct device *dev;
72 struct timer_list ac_timer;
73 struct timer_list chrg_full_timer;
74
75 int charge_mode;
76#define CHRG_ERROR (-1)
77#define CHRG_OFF (0)
78#define CHRG_ON (1)
79#define CHRG_DONE (2)
80
81 unsigned int flags;
82#define SHARPSL_SUSPENDED (1 << 0) /* Device is Suspended */
83#define SHARPSL_ALARM_ACTIVE (1 << 1) /* Alarm is for charging event (not user) */
84#define SHARPSL_BL_LIMIT (1 << 2) /* Backlight Intensity Limited */
85#define SHARPSL_APM_QUEUED (1 << 3) /* APM Event Queued */
86#define SHARPSL_DO_OFFLINE_CHRG (1 << 4) /* Trigger the offline charger */
87
88 int full_count;
89 unsigned long charge_start_time;
90 struct sharpsl_charger_machinfo *machinfo;
91 struct battery_stat battstat;
92};
93
94extern struct sharpsl_pm_status sharpsl_pm;
95
96
97#define SHARPSL_LED_ERROR 2
98#define SHARPSL_LED_ON 1
99#define SHARPSL_LED_OFF 0
100
101void sharpsl_battery_kick(void);
102void sharpsl_pm_led(int val);
103
104#endif
diff --git a/arch/arm/mach-pxa/include/mach/uncompress.h b/arch/arm/mach-pxa/include/mach/uncompress.h
index 5706cea95d11..b54749413e96 100644
--- a/arch/arm/mach-pxa/include/mach/uncompress.h
+++ b/arch/arm/mach-pxa/include/mach/uncompress.h
@@ -36,7 +36,8 @@ static inline void flush(void)
36static inline void arch_decomp_setup(void) 36static inline void arch_decomp_setup(void)
37{ 37{
38 if (machine_is_littleton() || machine_is_intelmote2() 38 if (machine_is_littleton() || machine_is_intelmote2()
39 || machine_is_csb726()) 39 || machine_is_csb726() || machine_is_stargate2()
40 || machine_is_cm_x300())
40 UART = STUART; 41 UART = STUART;
41} 42}
42 43
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-20 21:52:45 -0500