diff options
Diffstat (limited to 'arch/arm/mach-pxa/include/mach/regs-u2d.h')
| -rw-r--r-- | arch/arm/mach-pxa/include/mach/regs-u2d.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/mach-pxa/include/mach/regs-u2d.h b/arch/arm/mach-pxa/include/mach/regs-u2d.h index 44b0b20b69a4..c15c0c57de08 100644 --- a/arch/arm/mach-pxa/include/mach/regs-u2d.h +++ b/arch/arm/mach-pxa/include/mach/regs-u2d.h | |||
| @@ -166,7 +166,8 @@ | |||
| 166 | #define U2DMACSR_BUSERRTYPE (7 << 10) /* PX Bus Error Type */ | 166 | #define U2DMACSR_BUSERRTYPE (7 << 10) /* PX Bus Error Type */ |
| 167 | #define U2DMACSR_EORINTR (1 << 9) /* End Of Receive */ | 167 | #define U2DMACSR_EORINTR (1 << 9) /* End Of Receive */ |
| 168 | #define U2DMACSR_REQPEND (1 << 8) /* Request Pending */ | 168 | #define U2DMACSR_REQPEND (1 << 8) /* Request Pending */ |
| 169 | #define U2DMACSR_RASINTR (1 << 4) /* Request After Channel Stopped (read / write 1 clear) */#define U2DMACSR_STOPINTR (1 << 3) /* Stop Interrupt (read only) */ | 169 | #define U2DMACSR_RASINTR (1 << 4) /* Request After Channel Stopped (read / write 1 clear) */ |
| 170 | #define U2DMACSR_STOPINTR (1 << 3) /* Stop Interrupt (read only) */ | ||
| 170 | #define U2DMACSR_ENDINTR (1 << 2) /* End Interrupt (read / write 1 clear) */ | 171 | #define U2DMACSR_ENDINTR (1 << 2) /* End Interrupt (read / write 1 clear) */ |
| 171 | #define U2DMACSR_STARTINTR (1 << 1) /* Start Interrupt (read / write 1 clear) */ | 172 | #define U2DMACSR_STARTINTR (1 << 1) /* Start Interrupt (read / write 1 clear) */ |
| 172 | #define U2DMACSR_BUSERRINTR (1 << 0) /* Bus Error Interrupt (read / write 1 clear) */ | 173 | #define U2DMACSR_BUSERRINTR (1 << 0) /* Bus Error Interrupt (read / write 1 clear) */ |