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-rw-r--r--arch/arm/mach-pxa/include/mach/dma.h33
1 files changed, 4 insertions, 29 deletions
diff --git a/arch/arm/mach-pxa/include/mach/dma.h b/arch/arm/mach-pxa/include/mach/dma.h
index 7804637a6df3..5bd55894a48d 100644
--- a/arch/arm/mach-pxa/include/mach/dma.h
+++ b/arch/arm/mach-pxa/include/mach/dma.h
@@ -12,35 +12,10 @@
12#ifndef __ASM_ARCH_DMA_H 12#ifndef __ASM_ARCH_DMA_H
13#define __ASM_ARCH_DMA_H 13#define __ASM_ARCH_DMA_H
14 14
15/* 15#include <mach/hardware.h>
16 * Descriptor structure for PXA's DMA engine
17 * Note: this structure must always be aligned to a 16-byte boundary.
18 */
19
20typedef struct pxa_dma_desc {
21 volatile u32 ddadr; /* Points to the next descriptor + flags */
22 volatile u32 dsadr; /* DSADR value for the current transfer */
23 volatile u32 dtadr; /* DTADR value for the current transfer */
24 volatile u32 dcmd; /* DCMD value for the current transfer */
25} pxa_dma_desc;
26
27typedef enum {
28 DMA_PRIO_HIGH = 0,
29 DMA_PRIO_MEDIUM = 1,
30 DMA_PRIO_LOW = 2
31} pxa_dma_prio;
32
33/*
34 * DMA registration
35 */
36
37int __init pxa_init_dma(int num_ch);
38
39int pxa_request_dma (char *name,
40 pxa_dma_prio prio,
41 void (*irq_handler)(int, void *),
42 void *data);
43 16
44void pxa_free_dma (int dma_ch); 17/* DMA Controller Registers Definitions */
18#define DMAC_REGS_VIRT io_p2v(0x40000000)
45 19
20#include <plat/dma.h>
46#endif /* _ASM_ARCH_DMA_H */ 21#endif /* _ASM_ARCH_DMA_H */