diff options
Diffstat (limited to 'arch/arm/mach-pxa/generic.c')
-rw-r--r-- | arch/arm/mach-pxa/generic.c | 48 |
1 files changed, 10 insertions, 38 deletions
diff --git a/arch/arm/mach-pxa/generic.c b/arch/arm/mach-pxa/generic.c index 6451e9c3a93f..d6e15f71fc09 100644 --- a/arch/arm/mach-pxa/generic.c +++ b/arch/arm/mach-pxa/generic.c | |||
@@ -28,6 +28,8 @@ | |||
28 | 28 | ||
29 | #include <mach/reset.h> | 29 | #include <mach/reset.h> |
30 | #include <mach/gpio.h> | 30 | #include <mach/gpio.h> |
31 | #include <mach/smemc.h> | ||
32 | #include <mach/pxa3xx-regs.h> | ||
31 | 33 | ||
32 | #include "generic.h" | 34 | #include "generic.h" |
33 | 35 | ||
@@ -35,9 +37,10 @@ void clear_reset_status(unsigned int mask) | |||
35 | { | 37 | { |
36 | if (cpu_is_pxa2xx()) | 38 | if (cpu_is_pxa2xx()) |
37 | pxa2xx_clear_reset_status(mask); | 39 | pxa2xx_clear_reset_status(mask); |
38 | 40 | else { | |
39 | if (cpu_is_pxa3xx()) | 41 | /* RESET_STATUS_* has a 1:1 mapping with ARSR */ |
40 | pxa3xx_clear_reset_status(mask); | 42 | ARSR = mask; |
43 | } | ||
41 | } | 44 | } |
42 | 45 | ||
43 | unsigned long get_clock_tick_rate(void) | 46 | unsigned long get_clock_tick_rate(void) |
@@ -71,47 +74,17 @@ unsigned int get_clk_frequency_khz(int info) | |||
71 | EXPORT_SYMBOL(get_clk_frequency_khz); | 74 | EXPORT_SYMBOL(get_clk_frequency_khz); |
72 | 75 | ||
73 | /* | 76 | /* |
74 | * Return the current memory clock frequency in units of 10kHz | ||
75 | */ | ||
76 | unsigned int get_memclk_frequency_10khz(void) | ||
77 | { | ||
78 | if (cpu_is_pxa25x()) | ||
79 | return pxa25x_get_memclk_frequency_10khz(); | ||
80 | else if (cpu_is_pxa27x()) | ||
81 | return pxa27x_get_memclk_frequency_10khz(); | ||
82 | return 0; | ||
83 | } | ||
84 | EXPORT_SYMBOL(get_memclk_frequency_10khz); | ||
85 | |||
86 | /* | ||
87 | * Intel PXA2xx internal register mapping. | 77 | * Intel PXA2xx internal register mapping. |
88 | * | 78 | * |
89 | * Note 1: not all PXA2xx variants implement all those addresses. | 79 | * Note: virtual 0xfffe0000-0xffffffff is reserved for the vector table |
90 | * | 80 | * and cache flush area. |
91 | * Note 2: virtual 0xfffe0000-0xffffffff is reserved for the vector table | ||
92 | * and cache flush area. | ||
93 | */ | 81 | */ |
94 | static struct map_desc standard_io_desc[] __initdata = { | 82 | static struct map_desc common_io_desc[] __initdata = { |
95 | { /* Devs */ | 83 | { /* Devs */ |
96 | .virtual = 0xf2000000, | 84 | .virtual = 0xf2000000, |
97 | .pfn = __phys_to_pfn(0x40000000), | 85 | .pfn = __phys_to_pfn(0x40000000), |
98 | .length = 0x02000000, | 86 | .length = 0x02000000, |
99 | .type = MT_DEVICE | 87 | .type = MT_DEVICE |
100 | }, { /* Mem Ctl */ | ||
101 | .virtual = 0xf6000000, | ||
102 | .pfn = __phys_to_pfn(0x48000000), | ||
103 | .length = 0x00200000, | ||
104 | .type = MT_DEVICE | ||
105 | }, { /* Camera */ | ||
106 | .virtual = 0xfa000000, | ||
107 | .pfn = __phys_to_pfn(0x50000000), | ||
108 | .length = 0x00100000, | ||
109 | .type = MT_DEVICE | ||
110 | }, { /* IMem ctl */ | ||
111 | .virtual = 0xfe000000, | ||
112 | .pfn = __phys_to_pfn(0x58000000), | ||
113 | .length = 0x00100000, | ||
114 | .type = MT_DEVICE | ||
115 | }, { /* UNCACHED_PHYS_0 */ | 88 | }, { /* UNCACHED_PHYS_0 */ |
116 | .virtual = 0xff000000, | 89 | .virtual = 0xff000000, |
117 | .pfn = __phys_to_pfn(0x00000000), | 90 | .pfn = __phys_to_pfn(0x00000000), |
@@ -122,6 +95,5 @@ static struct map_desc standard_io_desc[] __initdata = { | |||
122 | 95 | ||
123 | void __init pxa_map_io(void) | 96 | void __init pxa_map_io(void) |
124 | { | 97 | { |
125 | iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc)); | 98 | iotable_init(ARRAY_AND_SIZE(common_io_desc)); |
126 | get_clk_frequency_khz(1); | ||
127 | } | 99 | } |