1 files changed, 552 insertions, 0 deletions

diff --git a/arch/arm/mach-pxa/devices.c b/arch/arm/mach-pxa/devices.c
new file mode 100644
index 000000000000..75949eb3b7bd
--- /dev/null
+++ b/arch/arm/mach-pxa/devices.c
@@ -0,0 +1,552 @@
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/dma-mapping.h>
+
+#include <asm/arch/gpio.h>
+#include <asm/arch/udc.h>
+#include <asm/arch/pxafb.h>
+#include <asm/arch/mmc.h>
+#include <asm/arch/irda.h>
+#include <asm/arch/i2c.h>
+
+#include "devices.h"
+
+void __init pxa_register_device(struct platform_device *dev, void *data)
+{
+        int ret;
+
+        dev->dev.platform_data = data;
+
+        ret = platform_device_register(dev);
+        if (ret)
+                dev_err(&dev->dev, "unable to register device: %d\n", ret);
+}
+
+static struct resource pxamci_resources[] = {
+        [0] = {
+                .start  = 0x41100000,
+                .end    = 0x41100fff,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = IRQ_MMC,
+                .end    = IRQ_MMC,
+                .flags  = IORESOURCE_IRQ,
+        },
+        [2] = {
+                .start  = 21,
+                .end    = 21,
+                .flags  = IORESOURCE_DMA,
+        },
+        [3] = {
+                .start  = 22,
+                .end    = 22,
+                .flags  = IORESOURCE_DMA,
+        },
+};
+
+static u64 pxamci_dmamask = 0xffffffffUL;
+
+struct platform_device pxa_device_mci = {
+        .name           = "pxa2xx-mci",
+        .id             = -1,
+        .dev            = {
+                .dma_mask = &pxamci_dmamask,
+                .coherent_dma_mask = 0xffffffff,
+        },
+        .num_resources  = ARRAY_SIZE(pxamci_resources),
+        .resource       = pxamci_resources,
+};
+
+void __init pxa_set_mci_info(struct pxamci_platform_data *info)
+{
+        pxa_register_device(&pxa_device_mci, info);
+}
+
+
+static struct pxa2xx_udc_mach_info pxa_udc_info;
+
+void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info)
+{
+        memcpy(&pxa_udc_info, info, sizeof *info);
+}
+
+static struct resource pxa2xx_udc_resources[] = {
+        [0] = {
+                .start  = 0x40600000,
+                .end    = 0x4060ffff,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = IRQ_USB,
+                .end    = IRQ_USB,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static u64 udc_dma_mask = ~(u32)0;
+
+struct platform_device pxa_device_udc = {
+        .name           = "pxa2xx-udc",
+        .id             = -1,
+        .resource       = pxa2xx_udc_resources,
+        .num_resources  = ARRAY_SIZE(pxa2xx_udc_resources),
+        .dev            =  {
+                .platform_data  = &pxa_udc_info,
+                .dma_mask       = &udc_dma_mask,
+        }
+};
+
+static struct resource pxafb_resources[] = {
+        [0] = {
+                .start  = 0x44000000,
+                .end    = 0x4400ffff,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = IRQ_LCD,
+                .end    = IRQ_LCD,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static u64 fb_dma_mask = ~(u64)0;
+
+struct platform_device pxa_device_fb = {
+        .name           = "pxa2xx-fb",
+        .id             = -1,
+        .dev            = {
+                .dma_mask       = &fb_dma_mask,
+                .coherent_dma_mask = 0xffffffff,
+        },
+        .num_resources  = ARRAY_SIZE(pxafb_resources),
+        .resource       = pxafb_resources,
+};
+
+void __init set_pxa_fb_info(struct pxafb_mach_info *info)
+{
+        pxa_register_device(&pxa_device_fb, info);
+}
+
+void __init set_pxa_fb_parent(struct device *parent_dev)
+{
+        pxa_device_fb.dev.parent = parent_dev;
+}
+
+static struct resource pxa_resource_ffuart[] = {
+        {
+                .start  = __PREG(FFUART),
+                .end    = __PREG(FFUART) + 35,
+                .flags  = IORESOURCE_MEM,
+        }, {
+                .start  = IRQ_FFUART,
+                .end    = IRQ_FFUART,
+                .flags  = IORESOURCE_IRQ,
+        }
+};
+
+struct platform_device pxa_device_ffuart= {
+        .name           = "pxa2xx-uart",
+        .id             = 0,
+        .resource       = pxa_resource_ffuart,
+        .num_resources  = ARRAY_SIZE(pxa_resource_ffuart),
+};
+
+static struct resource pxa_resource_btuart[] = {
+        {
+                .start  = __PREG(BTUART),
+                .end    = __PREG(BTUART) + 35,
+                .flags  = IORESOURCE_MEM,
+        }, {
+                .start  = IRQ_BTUART,
+                .end    = IRQ_BTUART,
+                .flags  = IORESOURCE_IRQ,
+        }
+};
+
+struct platform_device pxa_device_btuart = {
+        .name           = "pxa2xx-uart",
+        .id             = 1,
+        .resource       = pxa_resource_btuart,
+        .num_resources  = ARRAY_SIZE(pxa_resource_btuart),
+};
+
+static struct resource pxa_resource_stuart[] = {
+        {
+                .start  = __PREG(STUART),
+                .end    = __PREG(STUART) + 35,
+                .flags  = IORESOURCE_MEM,
+        }, {
+                .start  = IRQ_STUART,
+                .end    = IRQ_STUART,
+                .flags  = IORESOURCE_IRQ,
+        }
+};
+
+struct platform_device pxa_device_stuart = {
+        .name           = "pxa2xx-uart",
+        .id             = 2,
+        .resource       = pxa_resource_stuart,
+        .num_resources  = ARRAY_SIZE(pxa_resource_stuart),
+};
+
+static struct resource pxa_resource_hwuart[] = {
+        {
+                .start  = __PREG(HWUART),
+                .end    = __PREG(HWUART) + 47,
+                .flags  = IORESOURCE_MEM,
+        }, {
+                .start  = IRQ_HWUART,
+                .end    = IRQ_HWUART,
+                .flags  = IORESOURCE_IRQ,
+        }
+};
+
+struct platform_device pxa_device_hwuart = {
+        .name           = "pxa2xx-uart",
+        .id             = 3,
+        .resource       = pxa_resource_hwuart,
+        .num_resources  = ARRAY_SIZE(pxa_resource_hwuart),
+};
+
+static struct resource pxai2c_resources[] = {
+        {
+                .start  = 0x40301680,
+                .end    = 0x403016a3,
+                .flags  = IORESOURCE_MEM,
+        }, {
+                .start  = IRQ_I2C,
+                .end    = IRQ_I2C,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+struct platform_device pxa_device_i2c = {
+        .name           = "pxa2xx-i2c",
+        .id             = 0,
+        .resource       = pxai2c_resources,
+        .num_resources  = ARRAY_SIZE(pxai2c_resources),
+};
+
+void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info)
+{
+        pxa_register_device(&pxa_device_i2c, info);
+}
+
+static struct resource pxai2s_resources[] = {
+        {
+                .start  = 0x40400000,
+                .end    = 0x40400083,
+                .flags  = IORESOURCE_MEM,
+        }, {
+                .start  = IRQ_I2S,
+                .end    = IRQ_I2S,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+struct platform_device pxa_device_i2s = {
+        .name           = "pxa2xx-i2s",
+        .id             = -1,
+        .resource       = pxai2s_resources,
+        .num_resources  = ARRAY_SIZE(pxai2s_resources),
+};
+
+static u64 pxaficp_dmamask = ~(u32)0;
+
+struct platform_device pxa_device_ficp = {
+        .name           = "pxa2xx-ir",
+        .id             = -1,
+        .dev            = {
+                .dma_mask = &pxaficp_dmamask,
+                .coherent_dma_mask = 0xffffffff,
+        },
+};
+
+void __init pxa_set_ficp_info(struct pxaficp_platform_data *info)
+{
+        pxa_register_device(&pxa_device_ficp, info);
+}
+
+struct platform_device pxa_device_rtc = {
+        .name           = "sa1100-rtc",
+        .id             = -1,
+};
+
+#ifdef CONFIG_PXA25x
+
+static u64 pxa25x_ssp_dma_mask = DMA_BIT_MASK(32);
+
+static struct resource pxa25x_resource_ssp[] = {
+        [0] = {
+                .start  = 0x41000000,
+                .end    = 0x4100001f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = IRQ_SSP,
+                .end    = IRQ_SSP,
+                .flags  = IORESOURCE_IRQ,
+        },
+        [2] = {
+                /* DRCMR for RX */
+                .start  = 13,
+                .end    = 13,
+                .flags  = IORESOURCE_DMA,
+        },
+        [3] = {
+                /* DRCMR for TX */
+                .start  = 14,
+                .end    = 14,
+                .flags  = IORESOURCE_DMA,
+        },
+};
+
+struct platform_device pxa25x_device_ssp = {
+        .name           = "pxa25x-ssp",
+        .id             = 0,
+        .dev            = {
+                .dma_mask = &pxa25x_ssp_dma_mask,
+                .coherent_dma_mask = DMA_BIT_MASK(32),
+        },
+        .resource       = pxa25x_resource_ssp,
+        .num_resources  = ARRAY_SIZE(pxa25x_resource_ssp),
+};
+
+static u64 pxa25x_nssp_dma_mask = DMA_BIT_MASK(32);
+
+static struct resource pxa25x_resource_nssp[] = {
+        [0] = {
+                .start  = 0x41400000,
+                .end    = 0x4140002f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = IRQ_NSSP,
+                .end    = IRQ_NSSP,
+                .flags  = IORESOURCE_IRQ,
+        },
+        [2] = {
+                /* DRCMR for RX */
+                .start  = 15,
+                .end    = 15,
+                .flags  = IORESOURCE_DMA,
+        },
+        [3] = {
+                /* DRCMR for TX */
+                .start  = 16,
+                .end    = 16,
+                .flags  = IORESOURCE_DMA,
+        },
+};
+
+struct platform_device pxa25x_device_nssp = {
+        .name           = "pxa25x-nssp",
+        .id             = 1,
+        .dev            = {
+                .dma_mask = &pxa25x_nssp_dma_mask,
+                .coherent_dma_mask = DMA_BIT_MASK(32),
+        },
+        .resource       = pxa25x_resource_nssp,
+        .num_resources  = ARRAY_SIZE(pxa25x_resource_nssp),
+};
+
+static u64 pxa25x_assp_dma_mask = DMA_BIT_MASK(32);
+
+static struct resource pxa25x_resource_assp[] = {
+        [0] = {
+                .start  = 0x41500000,
+                .end    = 0x4150002f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = IRQ_ASSP,
+                .end    = IRQ_ASSP,
+                .flags  = IORESOURCE_IRQ,
+        },
+        [2] = {
+                /* DRCMR for RX */
+                .start  = 23,
+                .end    = 23,
+                .flags  = IORESOURCE_DMA,
+        },
+        [3] = {
+                /* DRCMR for TX */
+                .start  = 24,
+                .end    = 24,
+                .flags  = IORESOURCE_DMA,
+        },
+};
+
+struct platform_device pxa25x_device_assp = {
+        /* ASSP is basically equivalent to NSSP */
+        .name           = "pxa25x-nssp",
+        .id             = 2,
+        .dev            = {
+                .dma_mask = &pxa25x_assp_dma_mask,
+                .coherent_dma_mask = DMA_BIT_MASK(32),
+        },
+        .resource       = pxa25x_resource_assp,
+        .num_resources  = ARRAY_SIZE(pxa25x_resource_assp),
+};
+#endif /* CONFIG_PXA25x */
+
+#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
+
+static u64 pxa27x_ssp1_dma_mask = DMA_BIT_MASK(32);
+
+static struct resource pxa27x_resource_ssp1[] = {
+        [0] = {
+                .start  = 0x41000000,
+                .end    = 0x4100003f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = IRQ_SSP,
+                .end    = IRQ_SSP,
+                .flags  = IORESOURCE_IRQ,
+        },
+        [2] = {
+                /* DRCMR for RX */
+                .start  = 13,
+                .end    = 13,
+                .flags  = IORESOURCE_DMA,
+        },
+        [3] = {
+                /* DRCMR for TX */
+                .start  = 14,
+                .end    = 14,
+                .flags  = IORESOURCE_DMA,
+        },
+};
+
+struct platform_device pxa27x_device_ssp1 = {
+        .name           = "pxa27x-ssp",
+        .id             = 0,
+        .dev            = {
+                .dma_mask = &pxa27x_ssp1_dma_mask,
+                .coherent_dma_mask = DMA_BIT_MASK(32),
+        },
+        .resource       = pxa27x_resource_ssp1,
+        .num_resources  = ARRAY_SIZE(pxa27x_resource_ssp1),
+};
+
+static u64 pxa27x_ssp2_dma_mask = DMA_BIT_MASK(32);
+
+static struct resource pxa27x_resource_ssp2[] = {
+        [0] = {
+                .start  = 0x41700000,
+                .end    = 0x4170003f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = IRQ_SSP2,
+                .end    = IRQ_SSP2,
+                .flags  = IORESOURCE_IRQ,
+        },
+        [2] = {
+                /* DRCMR for RX */
+                .start  = 15,
+                .end    = 15,
+                .flags  = IORESOURCE_DMA,
+        },
+        [3] = {
+                /* DRCMR for TX */
+                .start  = 16,
+                .end    = 16,
+                .flags  = IORESOURCE_DMA,
+        },
+};
+
+struct platform_device pxa27x_device_ssp2 = {
+        .name           = "pxa27x-ssp",
+        .id             = 1,
+        .dev            = {
+                .dma_mask = &pxa27x_ssp2_dma_mask,
+                .coherent_dma_mask = DMA_BIT_MASK(32),
+        },
+        .resource       = pxa27x_resource_ssp2,
+        .num_resources  = ARRAY_SIZE(pxa27x_resource_ssp2),
+};
+
+static u64 pxa27x_ssp3_dma_mask = DMA_BIT_MASK(32);
+
+static struct resource pxa27x_resource_ssp3[] = {
+        [0] = {
+                .start  = 0x41900000,
+                .end    = 0x4190003f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = IRQ_SSP3,
+                .end    = IRQ_SSP3,
+                .flags  = IORESOURCE_IRQ,
+        },
+        [2] = {
+                /* DRCMR for RX */
+                .start  = 66,
+                .end    = 66,
+                .flags  = IORESOURCE_DMA,
+        },
+        [3] = {
+                /* DRCMR for TX */
+                .start  = 67,
+                .end    = 67,
+                .flags  = IORESOURCE_DMA,
+        },
+};
+
+struct platform_device pxa27x_device_ssp3 = {
+        .name           = "pxa27x-ssp",
+        .id             = 2,
+        .dev            = {
+                .dma_mask = &pxa27x_ssp3_dma_mask,
+                .coherent_dma_mask = DMA_BIT_MASK(32),
+        },
+        .resource       = pxa27x_resource_ssp3,
+        .num_resources  = ARRAY_SIZE(pxa27x_resource_ssp3),
+};
+#endif /* CONFIG_PXA27x || CONFIG_PXA3xx */
+
+#ifdef CONFIG_PXA3xx
+static u64 pxa3xx_ssp4_dma_mask = DMA_BIT_MASK(32);
+
+static struct resource pxa3xx_resource_ssp4[] = {
+        [0] = {
+                .start  = 0x41a00000,
+                .end    = 0x41a0003f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = IRQ_SSP4,
+                .end    = IRQ_SSP4,
+                .flags  = IORESOURCE_IRQ,
+        },
+        [2] = {
+                /* DRCMR for RX */
+                .start  = 2,
+                .end    = 2,
+                .flags  = IORESOURCE_DMA,
+        },
+        [3] = {
+                /* DRCMR for TX */
+                .start  = 3,
+                .end    = 3,
+                .flags  = IORESOURCE_DMA,
+        },
+};
+
+struct platform_device pxa3xx_device_ssp4 = {
+        /* PXA3xx SSP is basically equivalent to PXA27x */
+        .name           = "pxa27x-ssp",
+        .id             = 3,
+        .dev            = {
+                .dma_mask = &pxa3xx_ssp4_dma_mask,
+                .coherent_dma_mask = DMA_BIT_MASK(32),
+        },
+        .resource       = pxa3xx_resource_ssp4,
+        .num_resources  = ARRAY_SIZE(pxa3xx_resource_ssp4),
+};
+#endif /* CONFIG_PXA3xx */