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-rw-r--r--arch/arm/mach-pxa/balloon3.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/arm/mach-pxa/balloon3.c b/arch/arm/mach-pxa/balloon3.c
index 7765d677adbb..fc0b8544e174 100644
--- a/arch/arm/mach-pxa/balloon3.c
+++ b/arch/arm/mach-pxa/balloon3.c
@@ -591,7 +591,7 @@ static void balloon3_nand_cmd_ctl(struct mtd_info *mtd, int cmd, unsigned int ct
591 BALLOON3_NAND_CONTROL_REG); 591 BALLOON3_NAND_CONTROL_REG);
592 if (balloon3_ctl_set) 592 if (balloon3_ctl_set)
593 __raw_writel(balloon3_ctl_set, 593 __raw_writel(balloon3_ctl_set,
594 BALLOON3_NAND_CONTROL_REG | 594 BALLOON3_NAND_CONTROL_REG +
595 BALLOON3_FPGA_SETnCLR); 595 BALLOON3_FPGA_SETnCLR);
596 } 596 }
597 597
@@ -608,7 +608,7 @@ static void balloon3_nand_select_chip(struct mtd_info *mtd, int chip)
608 __raw_writew( 608 __raw_writew(
609 BALLOON3_NAND_CONTROL_FLCE0 | BALLOON3_NAND_CONTROL_FLCE1 | 609 BALLOON3_NAND_CONTROL_FLCE0 | BALLOON3_NAND_CONTROL_FLCE1 |
610 BALLOON3_NAND_CONTROL_FLCE2 | BALLOON3_NAND_CONTROL_FLCE3, 610 BALLOON3_NAND_CONTROL_FLCE2 | BALLOON3_NAND_CONTROL_FLCE3,
611 BALLOON3_NAND_CONTROL_REG | BALLOON3_FPGA_SETnCLR); 611 BALLOON3_NAND_CONTROL_REG + BALLOON3_FPGA_SETnCLR);
612 612
613 /* Deassert correct nCE line */ 613 /* Deassert correct nCE line */
614 __raw_writew(BALLOON3_NAND_CONTROL_FLCE0 << chip, 614 __raw_writew(BALLOON3_NAND_CONTROL_FLCE0 << chip,
@@ -626,7 +626,7 @@ static int balloon3_nand_probe(struct platform_device *pdev)
626 int ret; 626 int ret;
627 627
628 __raw_writew(BALLOON3_NAND_CONTROL2_16BIT, 628 __raw_writew(BALLOON3_NAND_CONTROL2_16BIT,
629 BALLOON3_NAND_CONTROL2_REG | BALLOON3_FPGA_SETnCLR); 629 BALLOON3_NAND_CONTROL2_REG + BALLOON3_FPGA_SETnCLR);
630 630
631 ver = __raw_readw(BALLOON3_FPGA_VER); 631 ver = __raw_readw(BALLOON3_FPGA_VER);
632 if (ver < 0x4f08) 632 if (ver < 0x4f08)
@@ -649,7 +649,7 @@ static int balloon3_nand_probe(struct platform_device *pdev)
649 BALLOON3_NAND_CONTROL_FLCE0 | BALLOON3_NAND_CONTROL_FLCE1 | 649 BALLOON3_NAND_CONTROL_FLCE0 | BALLOON3_NAND_CONTROL_FLCE1 |
650 BALLOON3_NAND_CONTROL_FLCE2 | BALLOON3_NAND_CONTROL_FLCE3 | 650 BALLOON3_NAND_CONTROL_FLCE2 | BALLOON3_NAND_CONTROL_FLCE3 |
651 BALLOON3_NAND_CONTROL_FLWP, 651 BALLOON3_NAND_CONTROL_FLWP,
652 BALLOON3_NAND_CONTROL_REG | BALLOON3_FPGA_SETnCLR); 652 BALLOON3_NAND_CONTROL_REG + BALLOON3_FPGA_SETnCLR);
653 return 0; 653 return 0;
654 654
655err2: 655err2:
@@ -807,7 +807,7 @@ static void __init balloon3_init(void)
807 807
808static struct map_desc balloon3_io_desc[] __initdata = { 808static struct map_desc balloon3_io_desc[] __initdata = {
809 { /* CPLD/FPGA */ 809 { /* CPLD/FPGA */
810 .virtual = BALLOON3_FPGA_VIRT, 810 .virtual = (unsigned long)BALLOON3_FPGA_VIRT,
811 .pfn = __phys_to_pfn(BALLOON3_FPGA_PHYS), 811 .pfn = __phys_to_pfn(BALLOON3_FPGA_PHYS),
812 .length = BALLOON3_FPGA_LENGTH, 812 .length = BALLOON3_FPGA_LENGTH,
813 .type = MT_DEVICE, 813 .type = MT_DEVICE,