diff options
Diffstat (limited to 'arch/arm/mach-prima2')
-rw-r--r-- | arch/arm/mach-prima2/Kconfig | 7 | ||||
-rw-r--r-- | arch/arm/mach-prima2/common.c | 11 | ||||
-rw-r--r-- | arch/arm/mach-prima2/common.h | 1 | ||||
-rw-r--r-- | arch/arm/mach-prima2/l2x0.c | 9 | ||||
-rw-r--r-- | arch/arm/mach-prima2/platsmp.c | 6 | ||||
-rw-r--r-- | arch/arm/mach-prima2/rstc.c | 99 | ||||
-rw-r--r-- | arch/arm/mach-prima2/rtciobrg.c | 2 |
7 files changed, 77 insertions, 58 deletions
diff --git a/arch/arm/mach-prima2/Kconfig b/arch/arm/mach-prima2/Kconfig index 6988b117fc17..3e8189186a5b 100644 --- a/arch/arm/mach-prima2/Kconfig +++ b/arch/arm/mach-prima2/Kconfig | |||
@@ -1,9 +1,8 @@ | |||
1 | config ARCH_SIRF | 1 | config ARCH_SIRF |
2 | bool "CSR SiRF" if ARCH_MULTI_V7 | 2 | bool "CSR SiRF" if ARCH_MULTI_V7 |
3 | select ARCH_HAS_RESET_CONTROLLER | ||
3 | select ARCH_REQUIRE_GPIOLIB | 4 | select ARCH_REQUIRE_GPIOLIB |
4 | select GENERIC_CLOCKEVENTS | ||
5 | select GENERIC_IRQ_CHIP | 5 | select GENERIC_IRQ_CHIP |
6 | select MIGHT_HAVE_CACHE_L2X0 | ||
7 | select NO_IOPORT | 6 | select NO_IOPORT |
8 | select PINCTRL | 7 | select PINCTRL |
9 | select PINCTRL_SIRF | 8 | select PINCTRL_SIRF |
@@ -17,7 +16,6 @@ menu "CSR SiRF atlas6/primaII/Marco/Polo Specific Features" | |||
17 | config ARCH_ATLAS6 | 16 | config ARCH_ATLAS6 |
18 | bool "CSR SiRFSoC ATLAS6 ARM Cortex A9 Platform" | 17 | bool "CSR SiRFSoC ATLAS6 ARM Cortex A9 Platform" |
19 | default y | 18 | default y |
20 | select CPU_V7 | ||
21 | select SIRF_IRQ | 19 | select SIRF_IRQ |
22 | help | 20 | help |
23 | Support for CSR SiRFSoC ARM Cortex A9 Platform | 21 | Support for CSR SiRFSoC ARM Cortex A9 Platform |
@@ -25,7 +23,6 @@ config ARCH_ATLAS6 | |||
25 | config ARCH_PRIMA2 | 23 | config ARCH_PRIMA2 |
26 | bool "CSR SiRFSoC PRIMA2 ARM Cortex A9 Platform" | 24 | bool "CSR SiRFSoC PRIMA2 ARM Cortex A9 Platform" |
27 | default y | 25 | default y |
28 | select CPU_V7 | ||
29 | select SIRF_IRQ | 26 | select SIRF_IRQ |
30 | select ZONE_DMA | 27 | select ZONE_DMA |
31 | help | 28 | help |
@@ -35,9 +32,7 @@ config ARCH_MARCO | |||
35 | bool "CSR SiRFSoC MARCO ARM Cortex A9 Platform" | 32 | bool "CSR SiRFSoC MARCO ARM Cortex A9 Platform" |
36 | default y | 33 | default y |
37 | select ARM_GIC | 34 | select ARM_GIC |
38 | select CPU_V7 | ||
39 | select HAVE_ARM_SCU if SMP | 35 | select HAVE_ARM_SCU if SMP |
40 | select HAVE_SMP | ||
41 | select SMP_ON_UP if SMP | 36 | select SMP_ON_UP if SMP |
42 | help | 37 | help |
43 | Support for CSR SiRFSoC ARM Cortex A9 Platform | 38 | Support for CSR SiRFSoC ARM Cortex A9 Platform |
diff --git a/arch/arm/mach-prima2/common.c b/arch/arm/mach-prima2/common.c index d49aff74de98..47c7819edb9b 100644 --- a/arch/arm/mach-prima2/common.c +++ b/arch/arm/mach-prima2/common.c | |||
@@ -15,7 +15,7 @@ | |||
15 | #include <linux/of_platform.h> | 15 | #include <linux/of_platform.h> |
16 | #include "common.h" | 16 | #include "common.h" |
17 | 17 | ||
18 | void __init sirfsoc_init_late(void) | 18 | static void __init sirfsoc_init_late(void) |
19 | { | 19 | { |
20 | sirfsoc_pm_init(); | 20 | sirfsoc_pm_init(); |
21 | } | 21 | } |
@@ -27,7 +27,7 @@ static __init void sirfsoc_map_io(void) | |||
27 | } | 27 | } |
28 | 28 | ||
29 | #ifdef CONFIG_ARCH_ATLAS6 | 29 | #ifdef CONFIG_ARCH_ATLAS6 |
30 | static const char *atlas6_dt_match[] __initdata = { | 30 | static const char *atlas6_dt_match[] __initconst = { |
31 | "sirf,atlas6", | 31 | "sirf,atlas6", |
32 | NULL | 32 | NULL |
33 | }; | 33 | }; |
@@ -37,12 +37,11 @@ DT_MACHINE_START(ATLAS6_DT, "Generic ATLAS6 (Flattened Device Tree)") | |||
37 | .map_io = sirfsoc_map_io, | 37 | .map_io = sirfsoc_map_io, |
38 | .init_late = sirfsoc_init_late, | 38 | .init_late = sirfsoc_init_late, |
39 | .dt_compat = atlas6_dt_match, | 39 | .dt_compat = atlas6_dt_match, |
40 | .restart = sirfsoc_restart, | ||
41 | MACHINE_END | 40 | MACHINE_END |
42 | #endif | 41 | #endif |
43 | 42 | ||
44 | #ifdef CONFIG_ARCH_PRIMA2 | 43 | #ifdef CONFIG_ARCH_PRIMA2 |
45 | static const char *prima2_dt_match[] __initdata = { | 44 | static const char *prima2_dt_match[] __initconst = { |
46 | "sirf,prima2", | 45 | "sirf,prima2", |
47 | NULL | 46 | NULL |
48 | }; | 47 | }; |
@@ -53,12 +52,11 @@ DT_MACHINE_START(PRIMA2_DT, "Generic PRIMA2 (Flattened Device Tree)") | |||
53 | .dma_zone_size = SZ_256M, | 52 | .dma_zone_size = SZ_256M, |
54 | .init_late = sirfsoc_init_late, | 53 | .init_late = sirfsoc_init_late, |
55 | .dt_compat = prima2_dt_match, | 54 | .dt_compat = prima2_dt_match, |
56 | .restart = sirfsoc_restart, | ||
57 | MACHINE_END | 55 | MACHINE_END |
58 | #endif | 56 | #endif |
59 | 57 | ||
60 | #ifdef CONFIG_ARCH_MARCO | 58 | #ifdef CONFIG_ARCH_MARCO |
61 | static const char *marco_dt_match[] __initdata = { | 59 | static const char *marco_dt_match[] __initconst = { |
62 | "sirf,marco", | 60 | "sirf,marco", |
63 | NULL | 61 | NULL |
64 | }; | 62 | }; |
@@ -69,6 +67,5 @@ DT_MACHINE_START(MARCO_DT, "Generic MARCO (Flattened Device Tree)") | |||
69 | .map_io = sirfsoc_map_io, | 67 | .map_io = sirfsoc_map_io, |
70 | .init_late = sirfsoc_init_late, | 68 | .init_late = sirfsoc_init_late, |
71 | .dt_compat = marco_dt_match, | 69 | .dt_compat = marco_dt_match, |
72 | .restart = sirfsoc_restart, | ||
73 | MACHINE_END | 70 | MACHINE_END |
74 | #endif | 71 | #endif |
diff --git a/arch/arm/mach-prima2/common.h b/arch/arm/mach-prima2/common.h index 4b768060a858..07d3e5ed9264 100644 --- a/arch/arm/mach-prima2/common.h +++ b/arch/arm/mach-prima2/common.h | |||
@@ -23,7 +23,6 @@ extern void sirfsoc_secondary_startup(void); | |||
23 | extern void sirfsoc_cpu_die(unsigned int cpu); | 23 | extern void sirfsoc_cpu_die(unsigned int cpu); |
24 | 24 | ||
25 | extern void __init sirfsoc_of_irq_init(void); | 25 | extern void __init sirfsoc_of_irq_init(void); |
26 | extern void sirfsoc_restart(enum reboot_mode, const char *); | ||
27 | extern asmlinkage void __exception_irq_entry sirfsoc_handle_irq(struct pt_regs *regs); | 26 | extern asmlinkage void __exception_irq_entry sirfsoc_handle_irq(struct pt_regs *regs); |
28 | 27 | ||
29 | #ifndef CONFIG_DEBUG_LL | 28 | #ifndef CONFIG_DEBUG_LL |
diff --git a/arch/arm/mach-prima2/l2x0.c b/arch/arm/mach-prima2/l2x0.c index cbcbe9cb094c..c7102539c0b0 100644 --- a/arch/arm/mach-prima2/l2x0.c +++ b/arch/arm/mach-prima2/l2x0.c | |||
@@ -11,24 +11,23 @@ | |||
11 | #include <linux/of.h> | 11 | #include <linux/of.h> |
12 | #include <asm/hardware/cache-l2x0.h> | 12 | #include <asm/hardware/cache-l2x0.h> |
13 | 13 | ||
14 | struct l2x0_aux | 14 | struct l2x0_aux { |
15 | { | ||
16 | u32 val; | 15 | u32 val; |
17 | u32 mask; | 16 | u32 mask; |
18 | }; | 17 | }; |
19 | 18 | ||
20 | static struct l2x0_aux prima2_l2x0_aux __initconst = { | 19 | static const struct l2x0_aux prima2_l2x0_aux __initconst = { |
21 | .val = 2 << L2X0_AUX_CTRL_WAY_SIZE_SHIFT, | 20 | .val = 2 << L2X0_AUX_CTRL_WAY_SIZE_SHIFT, |
22 | .mask = 0, | 21 | .mask = 0, |
23 | }; | 22 | }; |
24 | 23 | ||
25 | static struct l2x0_aux marco_l2x0_aux __initconst = { | 24 | static const struct l2x0_aux marco_l2x0_aux __initconst = { |
26 | .val = (2 << L2X0_AUX_CTRL_WAY_SIZE_SHIFT) | | 25 | .val = (2 << L2X0_AUX_CTRL_WAY_SIZE_SHIFT) | |
27 | (1 << L2X0_AUX_CTRL_ASSOCIATIVITY_SHIFT), | 26 | (1 << L2X0_AUX_CTRL_ASSOCIATIVITY_SHIFT), |
28 | .mask = L2X0_AUX_CTRL_MASK, | 27 | .mask = L2X0_AUX_CTRL_MASK, |
29 | }; | 28 | }; |
30 | 29 | ||
31 | static struct of_device_id sirf_l2x0_ids[] __initconst = { | 30 | static const struct of_device_id sirf_l2x0_ids[] __initconst = { |
32 | { .compatible = "sirf,prima2-pl310-cache", .data = &prima2_l2x0_aux, }, | 31 | { .compatible = "sirf,prima2-pl310-cache", .data = &prima2_l2x0_aux, }, |
33 | { .compatible = "sirf,marco-pl310-cache", .data = &marco_l2x0_aux, }, | 32 | { .compatible = "sirf,marco-pl310-cache", .data = &marco_l2x0_aux, }, |
34 | {}, | 33 | {}, |
diff --git a/arch/arm/mach-prima2/platsmp.c b/arch/arm/mach-prima2/platsmp.c index e358b0736dea..335c12e92262 100644 --- a/arch/arm/mach-prima2/platsmp.c +++ b/arch/arm/mach-prima2/platsmp.c | |||
@@ -138,9 +138,9 @@ static void __init sirfsoc_smp_prepare_cpus(unsigned int max_cpus) | |||
138 | } | 138 | } |
139 | 139 | ||
140 | struct smp_operations sirfsoc_smp_ops __initdata = { | 140 | struct smp_operations sirfsoc_smp_ops __initdata = { |
141 | .smp_prepare_cpus = sirfsoc_smp_prepare_cpus, | 141 | .smp_prepare_cpus = sirfsoc_smp_prepare_cpus, |
142 | .smp_secondary_init = sirfsoc_secondary_init, | 142 | .smp_secondary_init = sirfsoc_secondary_init, |
143 | .smp_boot_secondary = sirfsoc_boot_secondary, | 143 | .smp_boot_secondary = sirfsoc_boot_secondary, |
144 | #ifdef CONFIG_HOTPLUG_CPU | 144 | #ifdef CONFIG_HOTPLUG_CPU |
145 | .cpu_die = sirfsoc_cpu_die, | 145 | .cpu_die = sirfsoc_cpu_die, |
146 | #endif | 146 | #endif |
diff --git a/arch/arm/mach-prima2/rstc.c b/arch/arm/mach-prima2/rstc.c index ccb53391147a..4887a2a4c698 100644 --- a/arch/arm/mach-prima2/rstc.c +++ b/arch/arm/mach-prima2/rstc.c | |||
@@ -13,57 +13,38 @@ | |||
13 | #include <linux/device.h> | 13 | #include <linux/device.h> |
14 | #include <linux/of.h> | 14 | #include <linux/of.h> |
15 | #include <linux/of_address.h> | 15 | #include <linux/of_address.h> |
16 | #include <linux/platform_device.h> | ||
16 | #include <linux/reboot.h> | 17 | #include <linux/reboot.h> |
18 | #include <linux/reset-controller.h> | ||
17 | 19 | ||
18 | void __iomem *sirfsoc_rstc_base; | 20 | #include <asm/system_misc.h> |
19 | static DEFINE_MUTEX(rstc_lock); | ||
20 | |||
21 | static struct of_device_id rstc_ids[] = { | ||
22 | { .compatible = "sirf,prima2-rstc" }, | ||
23 | { .compatible = "sirf,marco-rstc" }, | ||
24 | {}, | ||
25 | }; | ||
26 | 21 | ||
27 | static int __init sirfsoc_of_rstc_init(void) | 22 | #define SIRFSOC_RSTBIT_NUM 64 |
28 | { | ||
29 | struct device_node *np; | ||
30 | 23 | ||
31 | np = of_find_matching_node(NULL, rstc_ids); | 24 | static void __iomem *sirfsoc_rstc_base; |
32 | if (!np) { | 25 | static DEFINE_MUTEX(rstc_lock); |
33 | pr_err("unable to find compatible sirf rstc node in dtb\n"); | ||
34 | return -ENOENT; | ||
35 | } | ||
36 | |||
37 | sirfsoc_rstc_base = of_iomap(np, 0); | ||
38 | if (!sirfsoc_rstc_base) | ||
39 | panic("unable to map rstc cpu registers\n"); | ||
40 | |||
41 | of_node_put(np); | ||
42 | |||
43 | return 0; | ||
44 | } | ||
45 | early_initcall(sirfsoc_of_rstc_init); | ||
46 | 26 | ||
47 | int sirfsoc_reset_device(struct device *dev) | 27 | static int sirfsoc_reset_module(struct reset_controller_dev *rcdev, |
28 | unsigned long sw_reset_idx) | ||
48 | { | 29 | { |
49 | u32 reset_bit; | 30 | u32 reset_bit = sw_reset_idx; |
50 | 31 | ||
51 | if (of_property_read_u32(dev->of_node, "reset-bit", &reset_bit)) | 32 | if (reset_bit >= SIRFSOC_RSTBIT_NUM) |
52 | return -EINVAL; | 33 | return -EINVAL; |
53 | 34 | ||
54 | mutex_lock(&rstc_lock); | 35 | mutex_lock(&rstc_lock); |
55 | 36 | ||
56 | if (of_device_is_compatible(dev->of_node, "sirf,prima2-rstc")) { | 37 | if (of_device_is_compatible(rcdev->of_node, "sirf,prima2-rstc")) { |
57 | /* | 38 | /* |
58 | * Writing 1 to this bit resets corresponding block. Writing 0 to this | 39 | * Writing 1 to this bit resets corresponding block. Writing 0 to this |
59 | * bit de-asserts reset signal of the corresponding block. | 40 | * bit de-asserts reset signal of the corresponding block. |
60 | * datasheet doesn't require explicit delay between the set and clear | 41 | * datasheet doesn't require explicit delay between the set and clear |
61 | * of reset bit. it could be shorter if tests pass. | 42 | * of reset bit. it could be shorter if tests pass. |
62 | */ | 43 | */ |
63 | writel(readl(sirfsoc_rstc_base + (reset_bit / 32) * 4) | reset_bit, | 44 | writel(readl(sirfsoc_rstc_base + (reset_bit / 32) * 4) | (1 << reset_bit), |
64 | sirfsoc_rstc_base + (reset_bit / 32) * 4); | 45 | sirfsoc_rstc_base + (reset_bit / 32) * 4); |
65 | msleep(10); | 46 | msleep(10); |
66 | writel(readl(sirfsoc_rstc_base + (reset_bit / 32) * 4) & ~reset_bit, | 47 | writel(readl(sirfsoc_rstc_base + (reset_bit / 32) * 4) & ~(1 << reset_bit), |
67 | sirfsoc_rstc_base + (reset_bit / 32) * 4); | 48 | sirfsoc_rstc_base + (reset_bit / 32) * 4); |
68 | } else { | 49 | } else { |
69 | /* | 50 | /* |
@@ -73,9 +54,9 @@ int sirfsoc_reset_device(struct device *dev) | |||
73 | * datasheet doesn't require explicit delay between the set and clear | 54 | * datasheet doesn't require explicit delay between the set and clear |
74 | * of reset bit. it could be shorter if tests pass. | 55 | * of reset bit. it could be shorter if tests pass. |
75 | */ | 56 | */ |
76 | writel(reset_bit, sirfsoc_rstc_base + (reset_bit / 32) * 8); | 57 | writel(1 << reset_bit, sirfsoc_rstc_base + (reset_bit / 32) * 8); |
77 | msleep(10); | 58 | msleep(10); |
78 | writel(reset_bit, sirfsoc_rstc_base + (reset_bit / 32) * 8 + 4); | 59 | writel(1 << reset_bit, sirfsoc_rstc_base + (reset_bit / 32) * 8 + 4); |
79 | } | 60 | } |
80 | 61 | ||
81 | mutex_unlock(&rstc_lock); | 62 | mutex_unlock(&rstc_lock); |
@@ -83,9 +64,57 @@ int sirfsoc_reset_device(struct device *dev) | |||
83 | return 0; | 64 | return 0; |
84 | } | 65 | } |
85 | 66 | ||
67 | static struct reset_control_ops sirfsoc_rstc_ops = { | ||
68 | .reset = sirfsoc_reset_module, | ||
69 | }; | ||
70 | |||
71 | static struct reset_controller_dev sirfsoc_reset_controller = { | ||
72 | .ops = &sirfsoc_rstc_ops, | ||
73 | .nr_resets = SIRFSOC_RSTBIT_NUM, | ||
74 | }; | ||
75 | |||
86 | #define SIRFSOC_SYS_RST_BIT BIT(31) | 76 | #define SIRFSOC_SYS_RST_BIT BIT(31) |
87 | 77 | ||
88 | void sirfsoc_restart(enum reboot_mode mode, const char *cmd) | 78 | static void sirfsoc_restart(enum reboot_mode mode, const char *cmd) |
89 | { | 79 | { |
90 | writel(SIRFSOC_SYS_RST_BIT, sirfsoc_rstc_base); | 80 | writel(SIRFSOC_SYS_RST_BIT, sirfsoc_rstc_base); |
91 | } | 81 | } |
82 | |||
83 | static int sirfsoc_rstc_probe(struct platform_device *pdev) | ||
84 | { | ||
85 | struct device_node *np = pdev->dev.of_node; | ||
86 | sirfsoc_rstc_base = of_iomap(np, 0); | ||
87 | if (!sirfsoc_rstc_base) { | ||
88 | dev_err(&pdev->dev, "unable to map rstc cpu registers\n"); | ||
89 | return -ENOMEM; | ||
90 | } | ||
91 | |||
92 | sirfsoc_reset_controller.of_node = np; | ||
93 | arm_pm_restart = sirfsoc_restart; | ||
94 | |||
95 | if (IS_ENABLED(CONFIG_RESET_CONTROLLER)) | ||
96 | reset_controller_register(&sirfsoc_reset_controller); | ||
97 | |||
98 | return 0; | ||
99 | } | ||
100 | |||
101 | static const struct of_device_id rstc_ids[] = { | ||
102 | { .compatible = "sirf,prima2-rstc" }, | ||
103 | { .compatible = "sirf,marco-rstc" }, | ||
104 | {}, | ||
105 | }; | ||
106 | |||
107 | static struct platform_driver sirfsoc_rstc_driver = { | ||
108 | .probe = sirfsoc_rstc_probe, | ||
109 | .driver = { | ||
110 | .name = "sirfsoc_rstc", | ||
111 | .owner = THIS_MODULE, | ||
112 | .of_match_table = rstc_ids, | ||
113 | }, | ||
114 | }; | ||
115 | |||
116 | static int __init sirfsoc_rstc_init(void) | ||
117 | { | ||
118 | return platform_driver_register(&sirfsoc_rstc_driver); | ||
119 | } | ||
120 | subsys_initcall(sirfsoc_rstc_init); | ||
diff --git a/arch/arm/mach-prima2/rtciobrg.c b/arch/arm/mach-prima2/rtciobrg.c index 9f2da2eec4dc..a17c88b74fa1 100644 --- a/arch/arm/mach-prima2/rtciobrg.c +++ b/arch/arm/mach-prima2/rtciobrg.c | |||
@@ -137,4 +137,4 @@ postcore_initcall(sirfsoc_rtciobrg_init); | |||
137 | MODULE_AUTHOR("Zhiwu Song <zhiwu.song@csr.com>, " | 137 | MODULE_AUTHOR("Zhiwu Song <zhiwu.song@csr.com>, " |
138 | "Barry Song <baohua.song@csr.com>"); | 138 | "Barry Song <baohua.song@csr.com>"); |
139 | MODULE_DESCRIPTION("CSR SiRFprimaII rtc io bridge"); | 139 | MODULE_DESCRIPTION("CSR SiRFprimaII rtc io bridge"); |
140 | MODULE_LICENSE("GPL"); | 140 | MODULE_LICENSE("GPL v2"); |