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-rw-r--r--arch/arm/mach-orion5x/addr-map.c2
-rw-r--r--arch/arm/mach-orion5x/common.c4
-rw-r--r--arch/arm/mach-orion5x/db88f5281-setup.c6
-rw-r--r--arch/arm/mach-orion5x/dns323-setup.c2
-rw-r--r--arch/arm/mach-orion5x/gpio.c2
-rw-r--r--arch/arm/mach-orion5x/include/mach/debug-macro.S22
-rw-r--r--arch/arm/mach-orion5x/include/mach/dma.h1
-rw-r--r--arch/arm/mach-orion5x/include/mach/entry-macro.S31
-rw-r--r--arch/arm/mach-orion5x/include/mach/gpio.h28
-rw-r--r--arch/arm/mach-orion5x/include/mach/hardware.h21
-rw-r--r--arch/arm/mach-orion5x/include/mach/io.h63
-rw-r--r--arch/arm/mach-orion5x/include/mach/irqs.h62
-rw-r--r--arch/arm/mach-orion5x/include/mach/memory.h16
-rw-r--r--arch/arm/mach-orion5x/include/mach/orion5x.h162
-rw-r--r--arch/arm/mach-orion5x/include/mach/system.h32
-rw-r--r--arch/arm/mach-orion5x/include/mach/timex.h13
-rw-r--r--arch/arm/mach-orion5x/include/mach/uncompress.h49
-rw-r--r--arch/arm/mach-orion5x/include/mach/vmalloc.h5
-rw-r--r--arch/arm/mach-orion5x/irq.c14
-rw-r--r--arch/arm/mach-orion5x/kurobox_pro-setup.c2
-rw-r--r--arch/arm/mach-orion5x/mpp.c2
-rw-r--r--arch/arm/mach-orion5x/mss2-setup.c2
-rw-r--r--arch/arm/mach-orion5x/mv2120-setup.c2
-rw-r--r--arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c5
-rw-r--r--arch/arm/mach-orion5x/rd88f5181l-ge-setup.c5
-rw-r--r--arch/arm/mach-orion5x/rd88f5182-setup.c6
-rw-r--r--arch/arm/mach-orion5x/ts209-setup.c6
-rw-r--r--arch/arm/mach-orion5x/ts409-setup.c2
-rw-r--r--arch/arm/mach-orion5x/ts78xx-setup.c2
-rw-r--r--arch/arm/mach-orion5x/wnr854t-setup.c5
-rw-r--r--arch/arm/mach-orion5x/wrt350n-v2-setup.c5
31 files changed, 548 insertions, 31 deletions
diff --git a/arch/arm/mach-orion5x/addr-map.c b/arch/arm/mach-orion5x/addr-map.c
index 6f0dbda6c44c..bea37972120a 100644
--- a/arch/arm/mach-orion5x/addr-map.c
+++ b/arch/arm/mach-orion5x/addr-map.c
@@ -13,7 +13,7 @@
13#include <linux/kernel.h> 13#include <linux/kernel.h>
14#include <linux/init.h> 14#include <linux/init.h>
15#include <linux/mbus.h> 15#include <linux/mbus.h>
16#include <asm/hardware.h> 16#include <mach/hardware.h>
17#include <asm/io.h> 17#include <asm/io.h>
18#include "common.h" 18#include "common.h"
19 19
diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c
index faf4e3211918..168eeacaa4c0 100644
--- a/arch/arm/mach-orion5x/common.c
+++ b/arch/arm/mach-orion5x/common.c
@@ -24,8 +24,8 @@
24#include <asm/mach/arch.h> 24#include <asm/mach/arch.h>
25#include <asm/mach/map.h> 25#include <asm/mach/map.h>
26#include <asm/mach/time.h> 26#include <asm/mach/time.h>
27#include <asm/arch/hardware.h> 27#include <mach/hardware.h>
28#include <asm/arch/orion5x.h> 28#include <mach/orion5x.h>
29#include <asm/plat-orion/ehci-orion.h> 29#include <asm/plat-orion/ehci-orion.h>
30#include <asm/plat-orion/orion_nand.h> 30#include <asm/plat-orion/orion_nand.h>
31#include <asm/plat-orion/time.h> 31#include <asm/plat-orion/time.h>
diff --git a/arch/arm/mach-orion5x/db88f5281-setup.c b/arch/arm/mach-orion5x/db88f5281-setup.c
index 88405e74e5e3..48ce6d0e0020 100644
--- a/arch/arm/mach-orion5x/db88f5281-setup.c
+++ b/arch/arm/mach-orion5x/db88f5281-setup.c
@@ -24,7 +24,7 @@
24#include <asm/gpio.h> 24#include <asm/gpio.h>
25#include <asm/mach/arch.h> 25#include <asm/mach/arch.h>
26#include <asm/mach/pci.h> 26#include <asm/mach/pci.h>
27#include <asm/arch/orion5x.h> 27#include <mach/orion5x.h>
28#include <asm/plat-orion/orion_nand.h> 28#include <asm/plat-orion/orion_nand.h>
29#include "common.h" 29#include "common.h"
30#include "mpp.h" 30#include "mpp.h"
@@ -213,7 +213,7 @@ void __init db88f5281_pci_preinit(void)
213 pin = DB88F5281_PCI_SLOT0_IRQ_PIN; 213 pin = DB88F5281_PCI_SLOT0_IRQ_PIN;
214 if (gpio_request(pin, "PCI Int1") == 0) { 214 if (gpio_request(pin, "PCI Int1") == 0) {
215 if (gpio_direction_input(pin) == 0) { 215 if (gpio_direction_input(pin) == 0) {
216 set_irq_type(gpio_to_irq(pin), IRQT_LOW); 216 set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
217 } else { 217 } else {
218 printk(KERN_ERR "db88f5281_pci_preinit faield to " 218 printk(KERN_ERR "db88f5281_pci_preinit faield to "
219 "set_irq_type pin %d\n", pin); 219 "set_irq_type pin %d\n", pin);
@@ -226,7 +226,7 @@ void __init db88f5281_pci_preinit(void)
226 pin = DB88F5281_PCI_SLOT1_SLOT2_IRQ_PIN; 226 pin = DB88F5281_PCI_SLOT1_SLOT2_IRQ_PIN;
227 if (gpio_request(pin, "PCI Int2") == 0) { 227 if (gpio_request(pin, "PCI Int2") == 0) {
228 if (gpio_direction_input(pin) == 0) { 228 if (gpio_direction_input(pin) == 0) {
229 set_irq_type(gpio_to_irq(pin), IRQT_LOW); 229 set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
230 } else { 230 } else {
231 printk(KERN_ERR "db88f5281_pci_preinit faield " 231 printk(KERN_ERR "db88f5281_pci_preinit faield "
232 "to set_irq_type pin %d\n", pin); 232 "to set_irq_type pin %d\n", pin);
diff --git a/arch/arm/mach-orion5x/dns323-setup.c b/arch/arm/mach-orion5x/dns323-setup.c
index 3791ca6f001a..1a1d84b80a65 100644
--- a/arch/arm/mach-orion5x/dns323-setup.c
+++ b/arch/arm/mach-orion5x/dns323-setup.c
@@ -25,7 +25,7 @@
25#include <asm/gpio.h> 25#include <asm/gpio.h>
26#include <asm/mach/arch.h> 26#include <asm/mach/arch.h>
27#include <asm/mach/pci.h> 27#include <asm/mach/pci.h>
28#include <asm/arch/orion5x.h> 28#include <mach/orion5x.h>
29#include "common.h" 29#include "common.h"
30#include "mpp.h" 30#include "mpp.h"
31 31
diff --git a/arch/arm/mach-orion5x/gpio.c b/arch/arm/mach-orion5x/gpio.c
index d09797990f41..cd8a16f67d2b 100644
--- a/arch/arm/mach-orion5x/gpio.c
+++ b/arch/arm/mach-orion5x/gpio.c
@@ -17,7 +17,7 @@
17#include <linux/bitops.h> 17#include <linux/bitops.h>
18#include <asm/gpio.h> 18#include <asm/gpio.h>
19#include <asm/io.h> 19#include <asm/io.h>
20#include <asm/arch/orion5x.h> 20#include <mach/orion5x.h>
21#include "common.h" 21#include "common.h"
22 22
23static DEFINE_SPINLOCK(gpio_lock); 23static DEFINE_SPINLOCK(gpio_lock);
diff --git a/arch/arm/mach-orion5x/include/mach/debug-macro.S b/arch/arm/mach-orion5x/include/mach/debug-macro.S
new file mode 100644
index 000000000000..c7f808bfe272
--- /dev/null
+++ b/arch/arm/mach-orion5x/include/mach/debug-macro.S
@@ -0,0 +1,22 @@
1/*
2 * arch/arm/mach-orion5x/include/mach/debug-macro.S
3 *
4 * Debugging macro include header
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9*/
10
11#include <mach/orion5x.h>
12
13 .macro addruart,rx
14 mrc p15, 0, \rx, c1, c0
15 tst \rx, #1 @ MMU enabled?
16 ldreq \rx, =ORION5X_REGS_PHYS_BASE
17 ldrne \rx, =ORION5X_REGS_VIRT_BASE
18 orr \rx, \rx, #0x00012000
19 .endm
20
21#define UART_SHIFT 2
22#include <asm/hardware/debug-8250.S>
diff --git a/arch/arm/mach-orion5x/include/mach/dma.h b/arch/arm/mach-orion5x/include/mach/dma.h
new file mode 100644
index 000000000000..40a8c178f10d
--- /dev/null
+++ b/arch/arm/mach-orion5x/include/mach/dma.h
@@ -0,0 +1 @@
/* empty */
diff --git a/arch/arm/mach-orion5x/include/mach/entry-macro.S b/arch/arm/mach-orion5x/include/mach/entry-macro.S
new file mode 100644
index 000000000000..4351937035cd
--- /dev/null
+++ b/arch/arm/mach-orion5x/include/mach/entry-macro.S
@@ -0,0 +1,31 @@
1/*
2 * arch/arm/mach-orion5x/include/mach/entry-macro.S
3 *
4 * Low-level IRQ helper macros for Orion platforms
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#include <mach/orion5x.h>
12
13 .macro disable_fiq
14 .endm
15
16 .macro arch_ret_to_user, tmp1, tmp2
17 .endm
18
19 .macro get_irqnr_preamble, base, tmp
20 ldr \base, =MAIN_IRQ_CAUSE
21 .endm
22
23 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
24 ldr \irqstat, [\base, #0] @ main cause
25 ldr \tmp, [\base, #(MAIN_IRQ_MASK - MAIN_IRQ_CAUSE)] @ main mask
26 mov \irqnr, #0 @ default irqnr
27 @ find cause bits that are unmasked
28 ands \irqstat, \irqstat, \tmp @ clear Z flag if any
29 clzne \irqnr, \irqstat @ calc irqnr
30 rsbne \irqnr, \irqnr, #31
31 .endm
diff --git a/arch/arm/mach-orion5x/include/mach/gpio.h b/arch/arm/mach-orion5x/include/mach/gpio.h
new file mode 100644
index 000000000000..65dc136a86f7
--- /dev/null
+++ b/arch/arm/mach-orion5x/include/mach/gpio.h
@@ -0,0 +1,28 @@
1/*
2 * arch/arm/mach-orion5x/include/mach/gpio.h
3 *
4 * This file is licensed under the terms of the GNU General Public
5 * License version 2. This program is licensed "as is" without any
6 * warranty of any kind, whether express or implied.
7 */
8
9extern int gpio_request(unsigned pin, const char *label);
10extern void gpio_free(unsigned pin);
11extern int gpio_direction_input(unsigned pin);
12extern int gpio_direction_output(unsigned pin, int value);
13extern int gpio_get_value(unsigned pin);
14extern void gpio_set_value(unsigned pin, int value);
15extern void orion5x_gpio_set_blink(unsigned pin, int blink);
16extern void gpio_display(void); /* debug */
17
18static inline int gpio_to_irq(int pin)
19{
20 return pin + IRQ_ORION5X_GPIO_START;
21}
22
23static inline int irq_to_gpio(int irq)
24{
25 return irq - IRQ_ORION5X_GPIO_START;
26}
27
28#include <asm-generic/gpio.h> /* cansleep wrappers */
diff --git a/arch/arm/mach-orion5x/include/mach/hardware.h b/arch/arm/mach-orion5x/include/mach/hardware.h
new file mode 100644
index 000000000000..e51aaf4bf2b5
--- /dev/null
+++ b/arch/arm/mach-orion5x/include/mach/hardware.h
@@ -0,0 +1,21 @@
1/*
2 * arch/arm/mach-orion5x/include/mach/hardware.h
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#ifndef __ASM_ARCH_HARDWARE_H
10#define __ASM_ARCH_HARDWARE_H
11
12#include "orion5x.h"
13
14#define pcibios_assign_all_busses() 1
15
16#define PCIBIOS_MIN_IO 0x00001000
17#define PCIBIOS_MIN_MEM 0x01000000
18#define PCIMEM_BASE ORION5X_PCIE_MEM_PHYS_BASE
19
20
21#endif
diff --git a/arch/arm/mach-orion5x/include/mach/io.h b/arch/arm/mach-orion5x/include/mach/io.h
new file mode 100644
index 000000000000..f24b2513f7f3
--- /dev/null
+++ b/arch/arm/mach-orion5x/include/mach/io.h
@@ -0,0 +1,63 @@
1/*
2 * arch/arm/mach-orion5x/include/mach/io.h
3 *
4 * Tzachi Perelstein <tzachi@marvell.com>
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#ifndef __ASM_ARCH_IO_H
12#define __ASM_ARCH_IO_H
13
14#include "orion5x.h"
15
16#define IO_SPACE_LIMIT 0xffffffff
17
18static inline void __iomem *
19__arch_ioremap(unsigned long paddr, size_t size, unsigned int mtype)
20{
21 void __iomem *retval;
22 unsigned long offs = paddr - ORION5X_REGS_PHYS_BASE;
23 if (mtype == MT_DEVICE && size && offs < ORION5X_REGS_SIZE &&
24 size <= ORION5X_REGS_SIZE && offs + size <= ORION5X_REGS_SIZE) {
25 retval = (void __iomem *)ORION5X_REGS_VIRT_BASE + offs;
26 } else {
27 retval = __arm_ioremap(paddr, size, mtype);
28 }
29
30 return retval;
31}
32
33static inline void
34__arch_iounmap(void __iomem *addr)
35{
36 if (addr < (void __iomem *)ORION5X_REGS_VIRT_BASE ||
37 addr >= (void __iomem *)(ORION5X_REGS_VIRT_BASE + ORION5X_REGS_SIZE))
38 __iounmap(addr);
39}
40
41static inline void __iomem *__io(unsigned long addr)
42{
43 return (void __iomem *)addr;
44}
45
46#define __arch_ioremap(p, s, m) __arch_ioremap(p, s, m)
47#define __arch_iounmap(a) __arch_iounmap(a)
48#define __io(a) __io(a)
49#define __mem_pci(a) (a)
50
51
52/*****************************************************************************
53 * Helpers to access Orion registers
54 ****************************************************************************/
55/*
56 * These are not preempt-safe. Locks, if needed, must be taken
57 * care of by the caller.
58 */
59#define orion5x_setbits(r, mask) writel(readl(r) | (mask), (r))
60#define orion5x_clrbits(r, mask) writel(readl(r) & ~(mask), (r))
61
62
63#endif
diff --git a/arch/arm/mach-orion5x/include/mach/irqs.h b/arch/arm/mach-orion5x/include/mach/irqs.h
new file mode 100644
index 000000000000..d5b0fbf6b965
--- /dev/null
+++ b/arch/arm/mach-orion5x/include/mach/irqs.h
@@ -0,0 +1,62 @@
1/*
2 * arch/arm/mach-orion5x/include/mach/irqs.h
3 *
4 * IRQ definitions for Orion SoC
5 *
6 * Maintainer: Tzachi Perelstein <tzachi@marvell.com>
7 *
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
11 */
12
13#ifndef __ASM_ARCH_IRQS_H
14#define __ASM_ARCH_IRQS_H
15
16#include "orion5x.h" /* need GPIO_MAX */
17
18/*
19 * Orion Main Interrupt Controller
20 */
21#define IRQ_ORION5X_BRIDGE 0
22#define IRQ_ORION5X_DOORBELL_H2C 1
23#define IRQ_ORION5X_DOORBELL_C2H 2
24#define IRQ_ORION5X_UART0 3
25#define IRQ_ORION5X_UART1 4
26#define IRQ_ORION5X_I2C 5
27#define IRQ_ORION5X_GPIO_0_7 6
28#define IRQ_ORION5X_GPIO_8_15 7
29#define IRQ_ORION5X_GPIO_16_23 8
30#define IRQ_ORION5X_GPIO_24_31 9
31#define IRQ_ORION5X_PCIE0_ERR 10
32#define IRQ_ORION5X_PCIE0_INT 11
33#define IRQ_ORION5X_USB1_CTRL 12
34#define IRQ_ORION5X_DEV_BUS_ERR 14
35#define IRQ_ORION5X_PCI_ERR 15
36#define IRQ_ORION5X_USB_BR_ERR 16
37#define IRQ_ORION5X_USB0_CTRL 17
38#define IRQ_ORION5X_ETH_RX 18
39#define IRQ_ORION5X_ETH_TX 19
40#define IRQ_ORION5X_ETH_MISC 20
41#define IRQ_ORION5X_ETH_SUM 21
42#define IRQ_ORION5X_ETH_ERR 22
43#define IRQ_ORION5X_IDMA_ERR 23
44#define IRQ_ORION5X_IDMA_0 24
45#define IRQ_ORION5X_IDMA_1 25
46#define IRQ_ORION5X_IDMA_2 26
47#define IRQ_ORION5X_IDMA_3 27
48#define IRQ_ORION5X_CESA 28
49#define IRQ_ORION5X_SATA 29
50#define IRQ_ORION5X_XOR0 30
51#define IRQ_ORION5X_XOR1 31
52
53/*
54 * Orion General Purpose Pins
55 */
56#define IRQ_ORION5X_GPIO_START 32
57#define NR_GPIO_IRQS GPIO_MAX
58
59#define NR_IRQS (IRQ_ORION5X_GPIO_START + NR_GPIO_IRQS)
60
61
62#endif
diff --git a/arch/arm/mach-orion5x/include/mach/memory.h b/arch/arm/mach-orion5x/include/mach/memory.h
new file mode 100644
index 000000000000..54dd76b013f2
--- /dev/null
+++ b/arch/arm/mach-orion5x/include/mach/memory.h
@@ -0,0 +1,16 @@
1/*
2 * arch/arm/mach-orion5x/include/mach/memory.h
3 *
4 * Marvell Orion memory definitions
5 */
6
7#ifndef __ASM_ARCH_MEMORY_H
8#define __ASM_ARCH_MEMORY_H
9
10#define PHYS_OFFSET UL(0x00000000)
11
12#define __virt_to_bus(x) __virt_to_phys(x)
13#define __bus_to_virt(x) __phys_to_virt(x)
14
15
16#endif
diff --git a/arch/arm/mach-orion5x/include/mach/orion5x.h b/arch/arm/mach-orion5x/include/mach/orion5x.h
new file mode 100644
index 000000000000..f52a7d65bec2
--- /dev/null
+++ b/arch/arm/mach-orion5x/include/mach/orion5x.h
@@ -0,0 +1,162 @@
1/*
2 * arch/arm/mach-orion5x/include/mach/orion5x.h
3 *
4 * Generic definitions of Orion SoC flavors:
5 * Orion-1, Orion-VoIP, Orion-NAS, and Orion-2.
6 *
7 * Maintainer: Tzachi Perelstein <tzachi@marvell.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __ASM_ARCH_ORION5X_H
15#define __ASM_ARCH_ORION5X_H
16
17/*****************************************************************************
18 * Orion Address Maps
19 *
20 * phys
21 * e0000000 PCIe MEM space
22 * e8000000 PCI MEM space
23 * f0000000 PCIe WA space (Orion-1/Orion-NAS only)
24 * f1000000 on-chip peripheral registers
25 * f2000000 PCIe I/O space
26 * f2100000 PCI I/O space
27 * f4000000 device bus mappings (boot)
28 * fa000000 device bus mappings (cs0)
29 * fa800000 device bus mappings (cs2)
30 * fc000000 device bus mappings (cs0/cs1)
31 *
32 * virt phys size
33 * fdd00000 f1000000 1M on-chip peripheral registers
34 * fde00000 f2000000 1M PCIe I/O space
35 * fdf00000 f2100000 1M PCI I/O space
36 * fe000000 f0000000 16M PCIe WA space (Orion-1/Orion-NAS only)
37 ****************************************************************************/
38#define ORION5X_REGS_PHYS_BASE 0xf1000000
39#define ORION5X_REGS_VIRT_BASE 0xfdd00000
40#define ORION5X_REGS_SIZE SZ_1M
41
42#define ORION5X_PCIE_IO_PHYS_BASE 0xf2000000
43#define ORION5X_PCIE_IO_VIRT_BASE 0xfde00000
44#define ORION5X_PCIE_IO_BUS_BASE 0x00000000
45#define ORION5X_PCIE_IO_SIZE SZ_1M
46
47#define ORION5X_PCI_IO_PHYS_BASE 0xf2100000
48#define ORION5X_PCI_IO_VIRT_BASE 0xfdf00000
49#define ORION5X_PCI_IO_BUS_BASE 0x00100000
50#define ORION5X_PCI_IO_SIZE SZ_1M
51
52/* Relevant only for Orion-1/Orion-NAS */
53#define ORION5X_PCIE_WA_PHYS_BASE 0xf0000000
54#define ORION5X_PCIE_WA_VIRT_BASE 0xfe000000
55#define ORION5X_PCIE_WA_SIZE SZ_16M
56
57#define ORION5X_PCIE_MEM_PHYS_BASE 0xe0000000
58#define ORION5X_PCIE_MEM_SIZE SZ_128M
59
60#define ORION5X_PCI_MEM_PHYS_BASE 0xe8000000
61#define ORION5X_PCI_MEM_SIZE SZ_128M
62
63/*******************************************************************************
64 * Supported Devices & Revisions
65 ******************************************************************************/
66/* Orion-1 (88F5181) and Orion-VoIP (88F5181L) */
67#define MV88F5181_DEV_ID 0x5181
68#define MV88F5181_REV_B1 3
69#define MV88F5181L_REV_A0 8
70#define MV88F5181L_REV_A1 9
71/* Orion-NAS (88F5182) */
72#define MV88F5182_DEV_ID 0x5182
73#define MV88F5182_REV_A2 2
74/* Orion-2 (88F5281) */
75#define MV88F5281_DEV_ID 0x5281
76#define MV88F5281_REV_D1 5
77#define MV88F5281_REV_D2 6
78
79/*******************************************************************************
80 * Orion Registers Map
81 ******************************************************************************/
82#define ORION5X_DDR_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x00000)
83#define ORION5X_DDR_REG(x) (ORION5X_DDR_VIRT_BASE | (x))
84
85#define ORION5X_DEV_BUS_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0x10000)
86#define ORION5X_DEV_BUS_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x10000)
87#define ORION5X_DEV_BUS_REG(x) (ORION5X_DEV_BUS_VIRT_BASE | (x))
88#define I2C_PHYS_BASE (ORION5X_DEV_BUS_PHYS_BASE | 0x1000)
89#define UART0_PHYS_BASE (ORION5X_DEV_BUS_PHYS_BASE | 0x2000)
90#define UART0_VIRT_BASE (ORION5X_DEV_BUS_VIRT_BASE | 0x2000)
91#define UART1_PHYS_BASE (ORION5X_DEV_BUS_PHYS_BASE | 0x2100)
92#define UART1_VIRT_BASE (ORION5X_DEV_BUS_VIRT_BASE | 0x2100)
93
94#define ORION5X_BRIDGE_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x20000)
95#define ORION5X_BRIDGE_REG(x) (ORION5X_BRIDGE_VIRT_BASE | (x))
96#define TIMER_VIRT_BASE (ORION5X_BRIDGE_VIRT_BASE | 0x300)
97
98#define ORION5X_PCI_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x30000)
99#define ORION5X_PCI_REG(x) (ORION5X_PCI_VIRT_BASE | (x))
100
101#define ORION5X_PCIE_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x40000)
102#define ORION5X_PCIE_REG(x) (ORION5X_PCIE_VIRT_BASE | (x))
103
104#define ORION5X_USB0_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0x50000)
105#define ORION5X_USB0_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x50000)
106#define ORION5X_USB0_REG(x) (ORION5X_USB0_VIRT_BASE | (x))
107
108#define ORION5X_ETH_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0x70000)
109#define ORION5X_ETH_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x70000)
110#define ORION5X_ETH_REG(x) (ORION5X_ETH_VIRT_BASE | (x))
111
112#define ORION5X_SATA_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0x80000)
113#define ORION5X_SATA_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x80000)
114#define ORION5X_SATA_REG(x) (ORION5X_SATA_VIRT_BASE | (x))
115
116#define ORION5X_USB1_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0xa0000)
117#define ORION5X_USB1_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0xa0000)
118#define ORION5X_USB1_REG(x) (ORION5X_USB1_VIRT_BASE | (x))
119
120/*******************************************************************************
121 * Device Bus Registers
122 ******************************************************************************/
123#define MPP_0_7_CTRL ORION5X_DEV_BUS_REG(0x000)
124#define MPP_8_15_CTRL ORION5X_DEV_BUS_REG(0x004)
125#define MPP_16_19_CTRL ORION5X_DEV_BUS_REG(0x050)
126#define MPP_DEV_CTRL ORION5X_DEV_BUS_REG(0x008)
127#define MPP_RESET_SAMPLE ORION5X_DEV_BUS_REG(0x010)
128#define GPIO_OUT ORION5X_DEV_BUS_REG(0x100)
129#define GPIO_IO_CONF ORION5X_DEV_BUS_REG(0x104)
130#define GPIO_BLINK_EN ORION5X_DEV_BUS_REG(0x108)
131#define GPIO_IN_POL ORION5X_DEV_BUS_REG(0x10c)
132#define GPIO_DATA_IN ORION5X_DEV_BUS_REG(0x110)
133#define GPIO_EDGE_CAUSE ORION5X_DEV_BUS_REG(0x114)
134#define GPIO_EDGE_MASK ORION5X_DEV_BUS_REG(0x118)
135#define GPIO_LEVEL_MASK ORION5X_DEV_BUS_REG(0x11c)
136#define DEV_BANK_0_PARAM ORION5X_DEV_BUS_REG(0x45c)
137#define DEV_BANK_1_PARAM ORION5X_DEV_BUS_REG(0x460)
138#define DEV_BANK_2_PARAM ORION5X_DEV_BUS_REG(0x464)
139#define DEV_BANK_BOOT_PARAM ORION5X_DEV_BUS_REG(0x46c)
140#define DEV_BUS_CTRL ORION5X_DEV_BUS_REG(0x4c0)
141#define DEV_BUS_INT_CAUSE ORION5X_DEV_BUS_REG(0x4d0)
142#define DEV_BUS_INT_MASK ORION5X_DEV_BUS_REG(0x4d4)
143#define GPIO_MAX 32
144
145/***************************************************************************
146 * Orion CPU Bridge Registers
147 **************************************************************************/
148#define CPU_CONF ORION5X_BRIDGE_REG(0x100)
149#define CPU_CTRL ORION5X_BRIDGE_REG(0x104)
150#define CPU_RESET_MASK ORION5X_BRIDGE_REG(0x108)
151#define CPU_SOFT_RESET ORION5X_BRIDGE_REG(0x10c)
152#define POWER_MNG_CTRL_REG ORION5X_BRIDGE_REG(0x11C)
153#define BRIDGE_CAUSE ORION5X_BRIDGE_REG(0x110)
154#define BRIDGE_MASK ORION5X_BRIDGE_REG(0x114)
155#define BRIDGE_INT_TIMER0 0x0002
156#define BRIDGE_INT_TIMER1 0x0004
157#define BRIDGE_INT_TIMER1_CLR (~0x0004)
158#define MAIN_IRQ_CAUSE ORION5X_BRIDGE_REG(0x200)
159#define MAIN_IRQ_MASK ORION5X_BRIDGE_REG(0x204)
160
161
162#endif
diff --git a/arch/arm/mach-orion5x/include/mach/system.h b/arch/arm/mach-orion5x/include/mach/system.h
new file mode 100644
index 000000000000..08e430757890
--- /dev/null
+++ b/arch/arm/mach-orion5x/include/mach/system.h
@@ -0,0 +1,32 @@
1/*
2 * arch/arm/mach-orion5x/include/mach/system.h
3 *
4 * Tzachi Perelstein <tzachi@marvell.com>
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#ifndef __ASM_ARCH_SYSTEM_H
12#define __ASM_ARCH_SYSTEM_H
13
14#include <mach/hardware.h>
15#include <mach/orion5x.h>
16
17static inline void arch_idle(void)
18{
19 cpu_do_idle();
20}
21
22static inline void arch_reset(char mode)
23{
24 /*
25 * Enable and issue soft reset
26 */
27 orion5x_setbits(CPU_RESET_MASK, (1 << 2));
28 orion5x_setbits(CPU_SOFT_RESET, 1);
29}
30
31
32#endif
diff --git a/arch/arm/mach-orion5x/include/mach/timex.h b/arch/arm/mach-orion5x/include/mach/timex.h
new file mode 100644
index 000000000000..e82e44db7629
--- /dev/null
+++ b/arch/arm/mach-orion5x/include/mach/timex.h
@@ -0,0 +1,13 @@
1/*
2 * arch/arm/mach-orion5x/include/mach/timex.h
3 *
4 * Tzachi Perelstein <tzachi@marvell.com>
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#define CLOCK_TICK_RATE (100 * HZ)
12
13#define ORION5X_TCLK 166666667
diff --git a/arch/arm/mach-orion5x/include/mach/uncompress.h b/arch/arm/mach-orion5x/include/mach/uncompress.h
new file mode 100644
index 000000000000..4322dba468a4
--- /dev/null
+++ b/arch/arm/mach-orion5x/include/mach/uncompress.h
@@ -0,0 +1,49 @@
1/*
2 * arch/arm/mach-orion5x/include/mach/uncompress.h
3 *
4 * Tzachi Perelstein <tzachi@marvell.com>
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#include <linux/serial_reg.h>
12#include <mach/orion5x.h>
13
14#define SERIAL_BASE ((unsigned char *)UART0_PHYS_BASE)
15
16static void putc(const char c)
17{
18 unsigned char *base = SERIAL_BASE;
19 int i;
20
21 for (i = 0; i < 0x1000; i++) {
22 if (base[UART_LSR << 2] & UART_LSR_THRE)
23 break;
24 barrier();
25 }
26
27 base[UART_TX << 2] = c;
28}
29
30static void flush(void)
31{
32 unsigned char *base = SERIAL_BASE;
33 unsigned char mask;
34 int i;
35
36 mask = UART_LSR_TEMT | UART_LSR_THRE;
37
38 for (i = 0; i < 0x1000; i++) {
39 if ((base[UART_LSR << 2] & mask) == mask)
40 break;
41 barrier();
42 }
43}
44
45/*
46 * nothing to do
47 */
48#define arch_decomp_setup()
49#define arch_decomp_wdog()
diff --git a/arch/arm/mach-orion5x/include/mach/vmalloc.h b/arch/arm/mach-orion5x/include/mach/vmalloc.h
new file mode 100644
index 000000000000..7147a297e97f
--- /dev/null
+++ b/arch/arm/mach-orion5x/include/mach/vmalloc.h
@@ -0,0 +1,5 @@
1/*
2 * arch/arm/mach-orion5x/include/mach/vmalloc.h
3 */
4
5#define VMALLOC_END 0xfd800000
diff --git a/arch/arm/mach-orion5x/irq.c b/arch/arm/mach-orion5x/irq.c
index e2a0084ab4a3..cc2a017fd2a9 100644
--- a/arch/arm/mach-orion5x/irq.c
+++ b/arch/arm/mach-orion5x/irq.c
@@ -15,7 +15,7 @@
15#include <linux/irq.h> 15#include <linux/irq.h>
16#include <asm/gpio.h> 16#include <asm/gpio.h>
17#include <asm/io.h> 17#include <asm/io.h>
18#include <asm/arch/orion5x.h> 18#include <mach/orion5x.h>
19#include <asm/plat-orion/irq.h> 19#include <asm/plat-orion/irq.h>
20#include "common.h" 20#include "common.h"
21 21
@@ -91,27 +91,27 @@ static int orion5x_gpio_set_irq_type(u32 irq, u32 type)
91 desc = irq_desc + irq; 91 desc = irq_desc + irq;
92 92
93 switch (type) { 93 switch (type) {
94 case IRQT_HIGH: 94 case IRQ_TYPE_LEVEL_HIGH:
95 desc->handle_irq = handle_level_irq; 95 desc->handle_irq = handle_level_irq;
96 desc->status |= IRQ_LEVEL; 96 desc->status |= IRQ_LEVEL;
97 orion5x_clrbits(GPIO_IN_POL, (1 << pin)); 97 orion5x_clrbits(GPIO_IN_POL, (1 << pin));
98 break; 98 break;
99 case IRQT_LOW: 99 case IRQ_TYPE_LEVEL_LOW:
100 desc->handle_irq = handle_level_irq; 100 desc->handle_irq = handle_level_irq;
101 desc->status |= IRQ_LEVEL; 101 desc->status |= IRQ_LEVEL;
102 orion5x_setbits(GPIO_IN_POL, (1 << pin)); 102 orion5x_setbits(GPIO_IN_POL, (1 << pin));
103 break; 103 break;
104 case IRQT_RISING: 104 case IRQ_TYPE_EDGE_RISING:
105 desc->handle_irq = handle_edge_irq; 105 desc->handle_irq = handle_edge_irq;
106 desc->status &= ~IRQ_LEVEL; 106 desc->status &= ~IRQ_LEVEL;
107 orion5x_clrbits(GPIO_IN_POL, (1 << pin)); 107 orion5x_clrbits(GPIO_IN_POL, (1 << pin));
108 break; 108 break;
109 case IRQT_FALLING: 109 case IRQ_TYPE_EDGE_FALLING:
110 desc->handle_irq = handle_edge_irq; 110 desc->handle_irq = handle_edge_irq;
111 desc->status &= ~IRQ_LEVEL; 111 desc->status &= ~IRQ_LEVEL;
112 orion5x_setbits(GPIO_IN_POL, (1 << pin)); 112 orion5x_setbits(GPIO_IN_POL, (1 << pin));
113 break; 113 break;
114 case IRQT_BOTHEDGE: 114 case IRQ_TYPE_EDGE_BOTH:
115 desc->handle_irq = handle_edge_irq; 115 desc->handle_irq = handle_edge_irq;
116 desc->status &= ~IRQ_LEVEL; 116 desc->status &= ~IRQ_LEVEL;
117 /* 117 /*
@@ -156,7 +156,7 @@ static void orion5x_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
156 if (cause & (1 << pin)) { 156 if (cause & (1 << pin)) {
157 irq = gpio_to_irq(pin); 157 irq = gpio_to_irq(pin);
158 desc = irq_desc + irq; 158 desc = irq_desc + irq;
159 if ((desc->status & IRQ_TYPE_SENSE_MASK) == IRQT_BOTHEDGE) { 159 if ((desc->status & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH) {
160 /* Swap polarity (race with GPIO line) */ 160 /* Swap polarity (race with GPIO line) */
161 u32 polarity = readl(GPIO_IN_POL); 161 u32 polarity = readl(GPIO_IN_POL);
162 polarity ^= 1 << pin; 162 polarity ^= 1 << pin;
diff --git a/arch/arm/mach-orion5x/kurobox_pro-setup.c b/arch/arm/mach-orion5x/kurobox_pro-setup.c
index 84feac4a1fe2..0caaaac74bc1 100644
--- a/arch/arm/mach-orion5x/kurobox_pro-setup.c
+++ b/arch/arm/mach-orion5x/kurobox_pro-setup.c
@@ -24,7 +24,7 @@
24#include <asm/gpio.h> 24#include <asm/gpio.h>
25#include <asm/mach/arch.h> 25#include <asm/mach/arch.h>
26#include <asm/mach/pci.h> 26#include <asm/mach/pci.h>
27#include <asm/arch/orion5x.h> 27#include <mach/orion5x.h>
28#include <asm/plat-orion/orion_nand.h> 28#include <asm/plat-orion/orion_nand.h>
29#include "common.h" 29#include "common.h"
30#include "mpp.h" 30#include "mpp.h"
diff --git a/arch/arm/mach-orion5x/mpp.c b/arch/arm/mach-orion5x/mpp.c
index a48cadb01590..c04ab0e16ea1 100644
--- a/arch/arm/mach-orion5x/mpp.c
+++ b/arch/arm/mach-orion5x/mpp.c
@@ -11,7 +11,7 @@
11#include <linux/kernel.h> 11#include <linux/kernel.h>
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/mbus.h> 13#include <linux/mbus.h>
14#include <asm/hardware.h> 14#include <mach/hardware.h>
15#include <asm/io.h> 15#include <asm/io.h>
16#include "common.h" 16#include "common.h"
17#include "mpp.h" 17#include "mpp.h"
diff --git a/arch/arm/mach-orion5x/mss2-setup.c b/arch/arm/mach-orion5x/mss2-setup.c
index 7ce9e407d9d1..4403cc963d66 100644
--- a/arch/arm/mach-orion5x/mss2-setup.c
+++ b/arch/arm/mach-orion5x/mss2-setup.c
@@ -25,7 +25,7 @@
25#include <asm/mach-types.h> 25#include <asm/mach-types.h>
26#include <asm/mach/arch.h> 26#include <asm/mach/arch.h>
27#include <asm/mach/pci.h> 27#include <asm/mach/pci.h>
28#include <asm/arch/orion5x.h> 28#include <mach/orion5x.h>
29#include "common.h" 29#include "common.h"
30#include "mpp.h" 30#include "mpp.h"
31 31
diff --git a/arch/arm/mach-orion5x/mv2120-setup.c b/arch/arm/mach-orion5x/mv2120-setup.c
index 55f3b0fdef8b..67b2c0df615f 100644
--- a/arch/arm/mach-orion5x/mv2120-setup.c
+++ b/arch/arm/mach-orion5x/mv2120-setup.c
@@ -22,7 +22,7 @@
22#include <asm/mach-types.h> 22#include <asm/mach-types.h>
23#include <asm/gpio.h> 23#include <asm/gpio.h>
24#include <asm/mach/arch.h> 24#include <asm/mach/arch.h>
25#include <asm/arch/orion5x.h> 25#include <mach/orion5x.h>
26#include "common.h" 26#include "common.h"
27#include "mpp.h" 27#include "mpp.h"
28 28
diff --git a/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c b/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c
index d50e3650a09e..e72fe1e065e8 100644
--- a/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c
+++ b/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c
@@ -15,12 +15,13 @@
15#include <linux/irq.h> 15#include <linux/irq.h>
16#include <linux/mtd/physmap.h> 16#include <linux/mtd/physmap.h>
17#include <linux/mv643xx_eth.h> 17#include <linux/mv643xx_eth.h>
18#include <linux/ethtool.h>
18#include <asm/mach-types.h> 19#include <asm/mach-types.h>
19#include <asm/gpio.h> 20#include <asm/gpio.h>
20#include <asm/leds.h> 21#include <asm/leds.h>
21#include <asm/mach/arch.h> 22#include <asm/mach/arch.h>
22#include <asm/mach/pci.h> 23#include <asm/mach/pci.h>
23#include <asm/arch/orion5x.h> 24#include <mach/orion5x.h>
24#include "common.h" 25#include "common.h"
25#include "mpp.h" 26#include "mpp.h"
26 27
@@ -88,6 +89,8 @@ static struct orion5x_mpp_mode rd88f5181l_fxo_mpp_modes[] __initdata = {
88 89
89static struct mv643xx_eth_platform_data rd88f5181l_fxo_eth_data = { 90static struct mv643xx_eth_platform_data rd88f5181l_fxo_eth_data = {
90 .phy_addr = -1, 91 .phy_addr = -1,
92 .speed = SPEED_1000,
93 .duplex = DUPLEX_FULL,
91}; 94};
92 95
93static void __init rd88f5181l_fxo_init(void) 96static void __init rd88f5181l_fxo_init(void)
diff --git a/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c b/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c
index b56447d32e17..a1fe3257320d 100644
--- a/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c
+++ b/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c
@@ -15,13 +15,14 @@
15#include <linux/irq.h> 15#include <linux/irq.h>
16#include <linux/mtd/physmap.h> 16#include <linux/mtd/physmap.h>
17#include <linux/mv643xx_eth.h> 17#include <linux/mv643xx_eth.h>
18#include <linux/ethtool.h>
18#include <linux/i2c.h> 19#include <linux/i2c.h>
19#include <asm/mach-types.h> 20#include <asm/mach-types.h>
20#include <asm/gpio.h> 21#include <asm/gpio.h>
21#include <asm/leds.h> 22#include <asm/leds.h>
22#include <asm/mach/arch.h> 23#include <asm/mach/arch.h>
23#include <asm/mach/pci.h> 24#include <asm/mach/pci.h>
24#include <asm/arch/orion5x.h> 25#include <mach/orion5x.h>
25#include "common.h" 26#include "common.h"
26#include "mpp.h" 27#include "mpp.h"
27 28
@@ -89,6 +90,8 @@ static struct orion5x_mpp_mode rd88f5181l_ge_mpp_modes[] __initdata = {
89 90
90static struct mv643xx_eth_platform_data rd88f5181l_ge_eth_data = { 91static struct mv643xx_eth_platform_data rd88f5181l_ge_eth_data = {
91 .phy_addr = -1, 92 .phy_addr = -1,
93 .speed = SPEED_1000,
94 .duplex = DUPLEX_FULL,
92}; 95};
93 96
94static struct i2c_board_info __initdata rd88f5181l_ge_i2c_rtc = { 97static struct i2c_board_info __initdata rd88f5181l_ge_i2c_rtc = {
diff --git a/arch/arm/mach-orion5x/rd88f5182-setup.c b/arch/arm/mach-orion5x/rd88f5182-setup.c
index 10ae62864269..8771cb76f0dc 100644
--- a/arch/arm/mach-orion5x/rd88f5182-setup.c
+++ b/arch/arm/mach-orion5x/rd88f5182-setup.c
@@ -24,7 +24,7 @@
24#include <asm/leds.h> 24#include <asm/leds.h>
25#include <asm/mach/arch.h> 25#include <asm/mach/arch.h>
26#include <asm/mach/pci.h> 26#include <asm/mach/pci.h>
27#include <asm/arch/orion5x.h> 27#include <mach/orion5x.h>
28#include "common.h" 28#include "common.h"
29#include "mpp.h" 29#include "mpp.h"
30 30
@@ -148,7 +148,7 @@ void __init rd88f5182_pci_preinit(void)
148 pin = RD88F5182_PCI_SLOT0_IRQ_A_PIN; 148 pin = RD88F5182_PCI_SLOT0_IRQ_A_PIN;
149 if (gpio_request(pin, "PCI IntA") == 0) { 149 if (gpio_request(pin, "PCI IntA") == 0) {
150 if (gpio_direction_input(pin) == 0) { 150 if (gpio_direction_input(pin) == 0) {
151 set_irq_type(gpio_to_irq(pin), IRQT_LOW); 151 set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
152 } else { 152 } else {
153 printk(KERN_ERR "rd88f5182_pci_preinit faield to " 153 printk(KERN_ERR "rd88f5182_pci_preinit faield to "
154 "set_irq_type pin %d\n", pin); 154 "set_irq_type pin %d\n", pin);
@@ -161,7 +161,7 @@ void __init rd88f5182_pci_preinit(void)
161 pin = RD88F5182_PCI_SLOT0_IRQ_B_PIN; 161 pin = RD88F5182_PCI_SLOT0_IRQ_B_PIN;
162 if (gpio_request(pin, "PCI IntB") == 0) { 162 if (gpio_request(pin, "PCI IntB") == 0) {
163 if (gpio_direction_input(pin) == 0) { 163 if (gpio_direction_input(pin) == 0) {
164 set_irq_type(gpio_to_irq(pin), IRQT_LOW); 164 set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
165 } else { 165 } else {
166 printk(KERN_ERR "rd88f5182_pci_preinit faield to " 166 printk(KERN_ERR "rd88f5182_pci_preinit faield to "
167 "set_irq_type pin %d\n", pin); 167 "set_irq_type pin %d\n", pin);
diff --git a/arch/arm/mach-orion5x/ts209-setup.c b/arch/arm/mach-orion5x/ts209-setup.c
index a9cef9703d5b..809132de31d2 100644
--- a/arch/arm/mach-orion5x/ts209-setup.c
+++ b/arch/arm/mach-orion5x/ts209-setup.c
@@ -26,7 +26,7 @@
26#include <asm/gpio.h> 26#include <asm/gpio.h>
27#include <asm/mach/arch.h> 27#include <asm/mach/arch.h>
28#include <asm/mach/pci.h> 28#include <asm/mach/pci.h>
29#include <asm/arch/orion5x.h> 29#include <mach/orion5x.h>
30#include "common.h" 30#include "common.h"
31#include "mpp.h" 31#include "mpp.h"
32#include "tsx09-common.h" 32#include "tsx09-common.h"
@@ -117,7 +117,7 @@ void __init qnap_ts209_pci_preinit(void)
117 pin = QNAP_TS209_PCI_SLOT0_IRQ_PIN; 117 pin = QNAP_TS209_PCI_SLOT0_IRQ_PIN;
118 if (gpio_request(pin, "PCI Int1") == 0) { 118 if (gpio_request(pin, "PCI Int1") == 0) {
119 if (gpio_direction_input(pin) == 0) { 119 if (gpio_direction_input(pin) == 0) {
120 set_irq_type(gpio_to_irq(pin), IRQT_LOW); 120 set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
121 } else { 121 } else {
122 printk(KERN_ERR "qnap_ts209_pci_preinit failed to " 122 printk(KERN_ERR "qnap_ts209_pci_preinit failed to "
123 "set_irq_type pin %d\n", pin); 123 "set_irq_type pin %d\n", pin);
@@ -131,7 +131,7 @@ void __init qnap_ts209_pci_preinit(void)
131 pin = QNAP_TS209_PCI_SLOT1_IRQ_PIN; 131 pin = QNAP_TS209_PCI_SLOT1_IRQ_PIN;
132 if (gpio_request(pin, "PCI Int2") == 0) { 132 if (gpio_request(pin, "PCI Int2") == 0) {
133 if (gpio_direction_input(pin) == 0) { 133 if (gpio_direction_input(pin) == 0) {
134 set_irq_type(gpio_to_irq(pin), IRQT_LOW); 134 set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
135 } else { 135 } else {
136 printk(KERN_ERR "qnap_ts209_pci_preinit failed " 136 printk(KERN_ERR "qnap_ts209_pci_preinit failed "
137 "to set_irq_type pin %d\n", pin); 137 "to set_irq_type pin %d\n", pin);
diff --git a/arch/arm/mach-orion5x/ts409-setup.c b/arch/arm/mach-orion5x/ts409-setup.c
index 32f0ff073b7e..6053e76ac967 100644
--- a/arch/arm/mach-orion5x/ts409-setup.c
+++ b/arch/arm/mach-orion5x/ts409-setup.c
@@ -24,7 +24,7 @@
24#include <asm/gpio.h> 24#include <asm/gpio.h>
25#include <asm/mach/arch.h> 25#include <asm/mach/arch.h>
26#include <asm/mach/pci.h> 26#include <asm/mach/pci.h>
27#include <asm/arch/orion5x.h> 27#include <mach/orion5x.h>
28#include "common.h" 28#include "common.h"
29#include "mpp.h" 29#include "mpp.h"
30#include "tsx09-common.h" 30#include "tsx09-common.h"
diff --git a/arch/arm/mach-orion5x/ts78xx-setup.c b/arch/arm/mach-orion5x/ts78xx-setup.c
index 77e9f351f07a..014916a28fdc 100644
--- a/arch/arm/mach-orion5x/ts78xx-setup.c
+++ b/arch/arm/mach-orion5x/ts78xx-setup.c
@@ -18,7 +18,7 @@
18#include <asm/mach-types.h> 18#include <asm/mach-types.h>
19#include <asm/mach/arch.h> 19#include <asm/mach/arch.h>
20#include <asm/mach/map.h> 20#include <asm/mach/map.h>
21#include <asm/arch/orion5x.h> 21#include <mach/orion5x.h>
22#include "common.h" 22#include "common.h"
23#include "mpp.h" 23#include "mpp.h"
24 24
diff --git a/arch/arm/mach-orion5x/wnr854t-setup.c b/arch/arm/mach-orion5x/wnr854t-setup.c
index 1af093ff8cf3..b6bc43e07eed 100644
--- a/arch/arm/mach-orion5x/wnr854t-setup.c
+++ b/arch/arm/mach-orion5x/wnr854t-setup.c
@@ -14,11 +14,12 @@
14#include <linux/delay.h> 14#include <linux/delay.h>
15#include <linux/mtd/physmap.h> 15#include <linux/mtd/physmap.h>
16#include <linux/mv643xx_eth.h> 16#include <linux/mv643xx_eth.h>
17#include <linux/ethtool.h>
17#include <asm/mach-types.h> 18#include <asm/mach-types.h>
18#include <asm/gpio.h> 19#include <asm/gpio.h>
19#include <asm/mach/arch.h> 20#include <asm/mach/arch.h>
20#include <asm/mach/pci.h> 21#include <asm/mach/pci.h>
21#include <asm/arch/orion5x.h> 22#include <mach/orion5x.h>
22#include "common.h" 23#include "common.h"
23#include "mpp.h" 24#include "mpp.h"
24 25
@@ -92,6 +93,8 @@ static struct platform_device wnr854t_nor_flash = {
92 93
93static struct mv643xx_eth_platform_data wnr854t_eth_data = { 94static struct mv643xx_eth_platform_data wnr854t_eth_data = {
94 .phy_addr = -1, 95 .phy_addr = -1,
96 .speed = SPEED_1000,
97 .duplex = DUPLEX_FULL,
95}; 98};
96 99
97static void __init wnr854t_init(void) 100static void __init wnr854t_init(void)
diff --git a/arch/arm/mach-orion5x/wrt350n-v2-setup.c b/arch/arm/mach-orion5x/wrt350n-v2-setup.c
index aeab55c6a82d..b10da17b3fbd 100644
--- a/arch/arm/mach-orion5x/wrt350n-v2-setup.c
+++ b/arch/arm/mach-orion5x/wrt350n-v2-setup.c
@@ -14,11 +14,12 @@
14#include <linux/delay.h> 14#include <linux/delay.h>
15#include <linux/mtd/physmap.h> 15#include <linux/mtd/physmap.h>
16#include <linux/mv643xx_eth.h> 16#include <linux/mv643xx_eth.h>
17#include <linux/ethtool.h>
17#include <asm/mach-types.h> 18#include <asm/mach-types.h>
18#include <asm/gpio.h> 19#include <asm/gpio.h>
19#include <asm/mach/arch.h> 20#include <asm/mach/arch.h>
20#include <asm/mach/pci.h> 21#include <asm/mach/pci.h>
21#include <asm/arch/orion5x.h> 22#include <mach/orion5x.h>
22#include "common.h" 23#include "common.h"
23#include "mpp.h" 24#include "mpp.h"
24 25
@@ -100,6 +101,8 @@ static struct platform_device wrt350n_v2_nor_flash = {
100 101
101static struct mv643xx_eth_platform_data wrt350n_v2_eth_data = { 102static struct mv643xx_eth_platform_data wrt350n_v2_eth_data = {
102 .phy_addr = -1, 103 .phy_addr = -1,
104 .speed = SPEED_1000,
105 .duplex = DUPLEX_FULL,
103}; 106};
104 107
105static void __init wrt350n_v2_init(void) 108static void __init wrt350n_v2_init(void)
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-25 00:03:52 -0500