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-rw-r--r--arch/arm/mach-orion5x/common.c7
-rw-r--r--arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c1
-rw-r--r--arch/arm/mach-orion5x/rd88f5181l-ge-setup.c1
-rw-r--r--arch/arm/mach-orion5x/rd88f5182-setup.c72
-rw-r--r--arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c1
-rw-r--r--arch/arm/mach-orion5x/ts78xx-setup.c12
6 files changed, 35 insertions, 59 deletions
diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c
index 3e07f52f2127..b3eb3da01160 100644
--- a/arch/arm/mach-orion5x/common.c
+++ b/arch/arm/mach-orion5x/common.c
@@ -194,6 +194,13 @@ void __init orion5x_wdt_init(void)
194void __init orion5x_init_early(void) 194void __init orion5x_init_early(void)
195{ 195{
196 orion_time_set_base(TIMER_VIRT_BASE); 196 orion_time_set_base(TIMER_VIRT_BASE);
197
198 /*
199 * Some Orion5x devices allocate their coherent buffers from atomic
200 * context. Increase size of atomic coherent pool to make sure such
201 * the allocations won't fail.
202 */
203 init_dma_coherent_pool_size(SZ_1M);
197} 204}
198 205
199int orion5x_tclk; 206int orion5x_tclk;
diff --git a/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c b/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c
index 78a6a11d8216..9b1c95310291 100644
--- a/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c
+++ b/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c
@@ -18,7 +18,6 @@
18#include <linux/ethtool.h> 18#include <linux/ethtool.h>
19#include <net/dsa.h> 19#include <net/dsa.h>
20#include <asm/mach-types.h> 20#include <asm/mach-types.h>
21#include <asm/leds.h>
22#include <asm/mach/arch.h> 21#include <asm/mach/arch.h>
23#include <asm/mach/pci.h> 22#include <asm/mach/pci.h>
24#include <mach/orion5x.h> 23#include <mach/orion5x.h>
diff --git a/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c b/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c
index 2f5dc54cd4cd..51ba2b81a10b 100644
--- a/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c
+++ b/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c
@@ -19,7 +19,6 @@
19#include <linux/i2c.h> 19#include <linux/i2c.h>
20#include <net/dsa.h> 20#include <net/dsa.h>
21#include <asm/mach-types.h> 21#include <asm/mach-types.h>
22#include <asm/leds.h>
23#include <asm/mach/arch.h> 22#include <asm/mach/arch.h>
24#include <asm/mach/pci.h> 23#include <asm/mach/pci.h>
25#include <mach/orion5x.h> 24#include <mach/orion5x.h>
diff --git a/arch/arm/mach-orion5x/rd88f5182-setup.c b/arch/arm/mach-orion5x/rd88f5182-setup.c
index 399130fac0b6..0a56b9444f1b 100644
--- a/arch/arm/mach-orion5x/rd88f5182-setup.c
+++ b/arch/arm/mach-orion5x/rd88f5182-setup.c
@@ -19,8 +19,8 @@
19#include <linux/mv643xx_eth.h> 19#include <linux/mv643xx_eth.h>
20#include <linux/ata_platform.h> 20#include <linux/ata_platform.h>
21#include <linux/i2c.h> 21#include <linux/i2c.h>
22#include <linux/leds.h>
22#include <asm/mach-types.h> 23#include <asm/mach-types.h>
23#include <asm/leds.h>
24#include <asm/mach/arch.h> 24#include <asm/mach/arch.h>
25#include <asm/mach/pci.h> 25#include <asm/mach/pci.h>
26#include <mach/orion5x.h> 26#include <mach/orion5x.h>
@@ -53,12 +53,6 @@
53#define RD88F5182_PCI_SLOT0_IRQ_A_PIN 7 53#define RD88F5182_PCI_SLOT0_IRQ_A_PIN 7
54#define RD88F5182_PCI_SLOT0_IRQ_B_PIN 6 54#define RD88F5182_PCI_SLOT0_IRQ_B_PIN 6
55 55
56/*
57 * GPIO Debug LED
58 */
59
60#define RD88F5182_GPIO_DBG_LED 0
61
62/***************************************************************************** 56/*****************************************************************************
63 * 16M NOR Flash on Device bus CS1 57 * 16M NOR Flash on Device bus CS1
64 ****************************************************************************/ 58 ****************************************************************************/
@@ -83,55 +77,32 @@ static struct platform_device rd88f5182_nor_flash = {
83 .resource = &rd88f5182_nor_flash_resource, 77 .resource = &rd88f5182_nor_flash_resource,
84}; 78};
85 79
86#ifdef CONFIG_LEDS
87
88/***************************************************************************** 80/*****************************************************************************
89 * Use GPIO debug led as CPU active indication 81 * Use GPIO LED as CPU active indication
90 ****************************************************************************/ 82 ****************************************************************************/
91 83
92static void rd88f5182_dbgled_event(led_event_t evt) 84#define RD88F5182_GPIO_LED 0
93{
94 int val;
95
96 if (evt == led_idle_end)
97 val = 1;
98 else if (evt == led_idle_start)
99 val = 0;
100 else
101 return;
102
103 gpio_set_value(RD88F5182_GPIO_DBG_LED, val);
104}
105
106static int __init rd88f5182_dbgled_init(void)
107{
108 int pin;
109
110 if (machine_is_rd88f5182()) {
111 pin = RD88F5182_GPIO_DBG_LED;
112 85
113 if (gpio_request(pin, "DBGLED") == 0) { 86static struct gpio_led rd88f5182_gpio_led_pins[] = {
114 if (gpio_direction_output(pin, 0) != 0) { 87 {
115 printk(KERN_ERR "rd88f5182_dbgled_init failed " 88 .name = "rd88f5182:cpu",
116 "to set output pin %d\n", pin); 89 .default_trigger = "cpu0",
117 gpio_free(pin); 90 .gpio = RD88F5182_GPIO_LED,
118 return 0; 91 },
119 } 92};
120 } else {
121 printk(KERN_ERR "rd88f5182_dbgled_init failed "
122 "to request gpio %d\n", pin);
123 return 0;
124 }
125
126 leds_event = rd88f5182_dbgled_event;
127 }
128
129 return 0;
130}
131 93
132__initcall(rd88f5182_dbgled_init); 94static struct gpio_led_platform_data rd88f5182_gpio_led_data = {
95 .leds = rd88f5182_gpio_led_pins,
96 .num_leds = ARRAY_SIZE(rd88f5182_gpio_led_pins),
97};
133 98
134#endif 99static struct platform_device rd88f5182_gpio_leds = {
100 .name = "leds-gpio",
101 .id = -1,
102 .dev = {
103 .platform_data = &rd88f5182_gpio_led_data,
104 },
105};
135 106
136/***************************************************************************** 107/*****************************************************************************
137 * PCI 108 * PCI
@@ -298,6 +269,7 @@ static void __init rd88f5182_init(void)
298 269
299 orion5x_setup_dev1_win(RD88F5182_NOR_BASE, RD88F5182_NOR_SIZE); 270 orion5x_setup_dev1_win(RD88F5182_NOR_BASE, RD88F5182_NOR_SIZE);
300 platform_device_register(&rd88f5182_nor_flash); 271 platform_device_register(&rd88f5182_nor_flash);
272 platform_device_register(&rd88f5182_gpio_leds);
301 273
302 i2c_register_board_info(0, &rd88f5182_i2c_rtc, 1); 274 i2c_register_board_info(0, &rd88f5182_i2c_rtc, 1);
303} 275}
diff --git a/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c b/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c
index 92df49c1b62a..ed50910b08a4 100644
--- a/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c
+++ b/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c
@@ -20,7 +20,6 @@
20#include <linux/ethtool.h> 20#include <linux/ethtool.h>
21#include <net/dsa.h> 21#include <net/dsa.h>
22#include <asm/mach-types.h> 22#include <asm/mach-types.h>
23#include <asm/leds.h>
24#include <asm/mach/arch.h> 23#include <asm/mach/arch.h>
25#include <asm/mach/pci.h> 24#include <asm/mach/pci.h>
26#include <mach/orion5x.h> 25#include <mach/orion5x.h>
diff --git a/arch/arm/mach-orion5x/ts78xx-setup.c b/arch/arm/mach-orion5x/ts78xx-setup.c
index b4203277f3cd..b0727dcd1ef9 100644
--- a/arch/arm/mach-orion5x/ts78xx-setup.c
+++ b/arch/arm/mach-orion5x/ts78xx-setup.c
@@ -36,7 +36,7 @@
36 * FPGA - lives where the PCI bus would be at ORION5X_PCI_MEM_PHYS_BASE 36 * FPGA - lives where the PCI bus would be at ORION5X_PCI_MEM_PHYS_BASE
37 */ 37 */
38#define TS78XX_FPGA_REGS_PHYS_BASE 0xe8000000 38#define TS78XX_FPGA_REGS_PHYS_BASE 0xe8000000
39#define TS78XX_FPGA_REGS_VIRT_BASE 0xff900000 39#define TS78XX_FPGA_REGS_VIRT_BASE IOMEM(0xff900000)
40#define TS78XX_FPGA_REGS_SIZE SZ_1M 40#define TS78XX_FPGA_REGS_SIZE SZ_1M
41 41
42static struct ts78xx_fpga_data ts78xx_fpga = { 42static struct ts78xx_fpga_data ts78xx_fpga = {
@@ -50,7 +50,7 @@ static struct ts78xx_fpga_data ts78xx_fpga = {
50 ****************************************************************************/ 50 ****************************************************************************/
51static struct map_desc ts78xx_io_desc[] __initdata = { 51static struct map_desc ts78xx_io_desc[] __initdata = {
52 { 52 {
53 .virtual = TS78XX_FPGA_REGS_VIRT_BASE, 53 .virtual = (unsigned long)TS78XX_FPGA_REGS_VIRT_BASE,
54 .pfn = __phys_to_pfn(TS78XX_FPGA_REGS_PHYS_BASE), 54 .pfn = __phys_to_pfn(TS78XX_FPGA_REGS_PHYS_BASE),
55 .length = TS78XX_FPGA_REGS_SIZE, 55 .length = TS78XX_FPGA_REGS_SIZE,
56 .type = MT_DEVICE, 56 .type = MT_DEVICE,
@@ -80,8 +80,8 @@ static struct mv_sata_platform_data ts78xx_sata_data = {
80/***************************************************************************** 80/*****************************************************************************
81 * RTC M48T86 - nicked^Wborrowed from arch/arm/mach-ep93xx/ts72xx.c 81 * RTC M48T86 - nicked^Wborrowed from arch/arm/mach-ep93xx/ts72xx.c
82 ****************************************************************************/ 82 ****************************************************************************/
83#define TS_RTC_CTRL (TS78XX_FPGA_REGS_VIRT_BASE | 0x808) 83#define TS_RTC_CTRL (TS78XX_FPGA_REGS_VIRT_BASE + 0x808)
84#define TS_RTC_DATA (TS78XX_FPGA_REGS_VIRT_BASE | 0x80c) 84#define TS_RTC_DATA (TS78XX_FPGA_REGS_VIRT_BASE + 0x80c)
85 85
86static unsigned char ts78xx_ts_rtc_readbyte(unsigned long addr) 86static unsigned char ts78xx_ts_rtc_readbyte(unsigned long addr)
87{ 87{
@@ -162,8 +162,8 @@ static void ts78xx_ts_rtc_unload(void)
162/***************************************************************************** 162/*****************************************************************************
163 * NAND Flash 163 * NAND Flash
164 ****************************************************************************/ 164 ****************************************************************************/
165#define TS_NAND_CTRL (TS78XX_FPGA_REGS_VIRT_BASE | 0x800) /* VIRT */ 165#define TS_NAND_CTRL (TS78XX_FPGA_REGS_VIRT_BASE + 0x800) /* VIRT */
166#define TS_NAND_DATA (TS78XX_FPGA_REGS_PHYS_BASE | 0x804) /* PHYS */ 166#define TS_NAND_DATA (TS78XX_FPGA_REGS_PHYS_BASE + 0x804) /* PHYS */
167 167
168/* 168/*
169 * hardware specific access to control-lines 169 * hardware specific access to control-lines