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-rw-r--r--arch/arm/mach-omap2/board-devkit8000.c1
-rw-r--r--arch/arm/mach-omap2/board-generic.c8
-rw-r--r--arch/arm/mach-omap2/board-h4.c122
-rw-r--r--arch/arm/mach-omap2/clkt_dpll.c51
-rw-r--r--arch/arm/mach-omap2/clock.h2
-rw-r--r--arch/arm/mach-omap2/clock2420_data.c12
-rw-r--r--arch/arm/mach-omap2/clock2430_data.c12
-rw-r--r--arch/arm/mach-omap2/clock3xxx_data.c12
-rw-r--r--arch/arm/mach-omap2/clock44xx.h7
-rw-r--r--arch/arm/mach-omap2/clock44xx_data.c43
-rw-r--r--arch/arm/mach-omap2/devices.c17
-rw-r--r--arch/arm/mach-omap2/dpll3xxx.c9
-rw-r--r--arch/arm/mach-omap2/dpll44xx.c69
-rw-r--r--arch/arm/mach-omap2/dsp.c1
-rw-r--r--arch/arm/mach-omap2/hsmmc.c16
-rw-r--r--arch/arm/mach-omap2/id.c5
-rw-r--r--arch/arm/mach-omap2/include/mach/ctrl_module_pad_core_44xx.h8
-rw-r--r--arch/arm/mach-omap2/io.c6
-rw-r--r--arch/arm/mach-omap2/mailbox.c1
-rw-r--r--arch/arm/mach-omap2/omap-iommu.c1
-rw-r--r--arch/arm/mach-omap2/omap_hwmod.c2
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_3xxx_data.c17
-rw-r--r--arch/arm/mach-omap2/omap_l3_noc.c1
-rw-r--r--arch/arm/mach-omap2/pm34xx.c70
-rw-r--r--arch/arm/mach-omap2/powerdomain.c14
-rw-r--r--arch/arm/mach-omap2/powerdomain.h2
-rw-r--r--arch/arm/mach-omap2/smartreflex.c1
-rw-r--r--arch/arm/mach-omap2/timer.c12
-rw-r--r--arch/arm/mach-omap2/usb-musb.c38
29 files changed, 304 insertions, 256 deletions
diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c
index 42918940c530..90154e411da0 100644
--- a/arch/arm/mach-omap2/board-devkit8000.c
+++ b/arch/arm/mach-omap2/board-devkit8000.c
@@ -226,7 +226,6 @@ static int devkit8000_twl_gpio_setup(struct device *dev,
226{ 226{
227 int ret; 227 int ret;
228 228
229 omap_mux_init_gpio(29, OMAP_PIN_INPUT);
230 /* gpio + 0 is "mmc0_cd" (input/IRQ) */ 229 /* gpio + 0 is "mmc0_cd" (input/IRQ) */
231 mmc[0].gpio_cd = gpio + 0; 230 mmc[0].gpio_cd = gpio + 0;
232 omap2_hsmmc_init(mmc); 231 omap2_hsmmc_init(mmc);
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
index 0cc9094e5ee0..fb55fa3dad5a 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -28,6 +28,7 @@
28 * XXX: Still needed to boot until the i2c & twl driver is adapted to 28 * XXX: Still needed to boot until the i2c & twl driver is adapted to
29 * device-tree 29 * device-tree
30 */ 30 */
31#ifdef CONFIG_ARCH_OMAP4
31static struct twl4030_platform_data sdp4430_twldata = { 32static struct twl4030_platform_data sdp4430_twldata = {
32 .irq_base = TWL6030_IRQ_BASE, 33 .irq_base = TWL6030_IRQ_BASE,
33 .irq_end = TWL6030_IRQ_END, 34 .irq_end = TWL6030_IRQ_END,
@@ -37,7 +38,9 @@ static void __init omap4_i2c_init(void)
37{ 38{
38 omap4_pmic_init("twl6030", &sdp4430_twldata); 39 omap4_pmic_init("twl6030", &sdp4430_twldata);
39} 40}
41#endif
40 42
43#ifdef CONFIG_ARCH_OMAP3
41static struct twl4030_platform_data beagle_twldata = { 44static struct twl4030_platform_data beagle_twldata = {
42 .irq_base = TWL4030_IRQ_BASE, 45 .irq_base = TWL4030_IRQ_BASE,
43 .irq_end = TWL4030_IRQ_END, 46 .irq_end = TWL4030_IRQ_END,
@@ -47,6 +50,7 @@ static void __init omap3_i2c_init(void)
47{ 50{
48 omap3_pmic_init("twl4030", &beagle_twldata); 51 omap3_pmic_init("twl4030", &beagle_twldata);
49} 52}
53#endif
50 54
51static struct of_device_id omap_dt_match_table[] __initdata = { 55static struct of_device_id omap_dt_match_table[] __initdata = {
52 { .compatible = "simple-bus", }, 56 { .compatible = "simple-bus", },
@@ -72,17 +76,21 @@ static void __init omap_generic_init(void)
72 of_platform_populate(NULL, omap_dt_match_table, NULL, NULL); 76 of_platform_populate(NULL, omap_dt_match_table, NULL, NULL);
73} 77}
74 78
79#ifdef CONFIG_ARCH_OMAP4
75static void __init omap4_init(void) 80static void __init omap4_init(void)
76{ 81{
77 omap4_i2c_init(); 82 omap4_i2c_init();
78 omap_generic_init(); 83 omap_generic_init();
79} 84}
85#endif
80 86
87#ifdef CONFIG_ARCH_OMAP3
81static void __init omap3_init(void) 88static void __init omap3_init(void)
82{ 89{
83 omap3_i2c_init(); 90 omap3_i2c_init();
84 omap_generic_init(); 91 omap_generic_init();
85} 92}
93#endif
86 94
87#if defined(CONFIG_SOC_OMAP2420) 95#if defined(CONFIG_SOC_OMAP2420)
88static const char *omap242x_boards_compat[] __initdata = { 96static const char *omap242x_boards_compat[] __initdata = {
diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c
index c12666ee7017..8b351d92a1cc 100644
--- a/arch/arm/mach-omap2/board-h4.c
+++ b/arch/arm/mach-omap2/board-h4.c
@@ -25,6 +25,7 @@
25#include <linux/err.h> 25#include <linux/err.h>
26#include <linux/clk.h> 26#include <linux/clk.h>
27#include <linux/io.h> 27#include <linux/io.h>
28#include <linux/input/matrix_keypad.h>
28 29
29#include <mach/hardware.h> 30#include <mach/hardware.h>
30#include <asm/mach-types.h> 31#include <asm/mach-types.h>
@@ -34,7 +35,6 @@
34#include <plat/usb.h> 35#include <plat/usb.h>
35#include <plat/board.h> 36#include <plat/board.h>
36#include <plat/common.h> 37#include <plat/common.h>
37#include <plat/keypad.h>
38#include <plat/menelaus.h> 38#include <plat/menelaus.h>
39#include <plat/dma.h> 39#include <plat/dma.h>
40#include <plat/gpmc.h> 40#include <plat/gpmc.h>
@@ -50,10 +50,8 @@
50 50
51#define H4_ETHR_GPIO_IRQ 92 51#define H4_ETHR_GPIO_IRQ 92
52 52
53static unsigned int row_gpios[6] = { 88, 89, 124, 11, 6, 96 }; 53#if defined(CONFIG_KEYBOARD_MATRIX) || defined(CONFIG_KEYBOARD_MATRIX_MODULE)
54static unsigned int col_gpios[7] = { 90, 91, 100, 36, 12, 97, 98 }; 54static const uint32_t board_matrix_keys[] = {
55
56static const unsigned int h4_keymap[] = {
57 KEY(0, 0, KEY_LEFT), 55 KEY(0, 0, KEY_LEFT),
58 KEY(1, 0, KEY_RIGHT), 56 KEY(1, 0, KEY_RIGHT),
59 KEY(2, 0, KEY_A), 57 KEY(2, 0, KEY_A),
@@ -86,6 +84,71 @@ static const unsigned int h4_keymap[] = {
86 KEY(4, 5, KEY_ENTER), 84 KEY(4, 5, KEY_ENTER),
87}; 85};
88 86
87static const struct matrix_keymap_data board_keymap_data = {
88 .keymap = board_matrix_keys,
89 .keymap_size = ARRAY_SIZE(board_matrix_keys),
90};
91
92static unsigned int board_keypad_row_gpios[] = {
93 88, 89, 124, 11, 6, 96
94};
95
96static unsigned int board_keypad_col_gpios[] = {
97 90, 91, 100, 36, 12, 97, 98
98};
99
100static struct matrix_keypad_platform_data board_keypad_platform_data = {
101 .keymap_data = &board_keymap_data,
102 .row_gpios = board_keypad_row_gpios,
103 .num_row_gpios = ARRAY_SIZE(board_keypad_row_gpios),
104 .col_gpios = board_keypad_col_gpios,
105 .num_col_gpios = ARRAY_SIZE(board_keypad_col_gpios),
106 .active_low = 1,
107
108 .debounce_ms = 20,
109 .col_scan_delay_us = 5,
110};
111
112static struct platform_device board_keyboard = {
113 .name = "matrix-keypad",
114 .id = -1,
115 .dev = {
116 .platform_data = &board_keypad_platform_data,
117 },
118};
119static void __init board_mkp_init(void)
120{
121 omap_mux_init_gpio(88, OMAP_PULL_ENA | OMAP_PULL_UP);
122 omap_mux_init_gpio(89, OMAP_PULL_ENA | OMAP_PULL_UP);
123 omap_mux_init_gpio(124, OMAP_PULL_ENA | OMAP_PULL_UP);
124 omap_mux_init_signal("mcbsp2_dr.gpio_11", OMAP_PULL_ENA | OMAP_PULL_UP);
125 if (omap_has_menelaus()) {
126 omap_mux_init_signal("sdrc_a14.gpio0",
127 OMAP_PULL_ENA | OMAP_PULL_UP);
128 omap_mux_init_signal("vlynq_rx0.gpio_15", 0);
129 omap_mux_init_signal("gpio_98", 0);
130 board_keypad_row_gpios[5] = 0;
131 board_keypad_col_gpios[2] = 15;
132 board_keypad_col_gpios[6] = 18;
133 } else {
134 omap_mux_init_signal("gpio_96", OMAP_PULL_ENA | OMAP_PULL_UP);
135 omap_mux_init_signal("gpio_100", 0);
136 omap_mux_init_signal("gpio_98", 0);
137 }
138 omap_mux_init_signal("gpio_90", 0);
139 omap_mux_init_signal("gpio_91", 0);
140 omap_mux_init_signal("gpio_36", 0);
141 omap_mux_init_signal("mcbsp2_clkx.gpio_12", 0);
142 omap_mux_init_signal("gpio_97", 0);
143
144 platform_device_register(&board_keyboard);
145}
146#else
147static inline void board_mkp_init(void)
148{
149}
150#endif
151
89static struct mtd_partition h4_partitions[] = { 152static struct mtd_partition h4_partitions[] = {
90 /* bootloader (U-Boot, etc) in first sector */ 153 /* bootloader (U-Boot, etc) in first sector */
91 { 154 {
@@ -137,31 +200,8 @@ static struct platform_device h4_flash_device = {
137 .resource = &h4_flash_resource, 200 .resource = &h4_flash_resource,
138}; 201};
139 202
140static const struct matrix_keymap_data h4_keymap_data = {
141 .keymap = h4_keymap,
142 .keymap_size = ARRAY_SIZE(h4_keymap),
143};
144
145static struct omap_kp_platform_data h4_kp_data = {
146 .rows = 6,
147 .cols = 7,
148 .keymap_data = &h4_keymap_data,
149 .rep = true,
150 .row_gpios = row_gpios,
151 .col_gpios = col_gpios,
152};
153
154static struct platform_device h4_kp_device = {
155 .name = "omap-keypad",
156 .id = -1,
157 .dev = {
158 .platform_data = &h4_kp_data,
159 },
160};
161
162static struct platform_device *h4_devices[] __initdata = { 203static struct platform_device *h4_devices[] __initdata = {
163 &h4_flash_device, 204 &h4_flash_device,
164 &h4_kp_device,
165}; 205};
166 206
167static struct panel_generic_dpi_data h4_panel_data = { 207static struct panel_generic_dpi_data h4_panel_data = {
@@ -336,31 +376,7 @@ static void __init omap_h4_init(void)
336 * if not needed. 376 * if not needed.
337 */ 377 */
338 378
339#if defined(CONFIG_KEYBOARD_OMAP) || defined(CONFIG_KEYBOARD_OMAP_MODULE) 379 board_mkp_init();
340 omap_mux_init_gpio(88, OMAP_PULL_ENA | OMAP_PULL_UP);
341 omap_mux_init_gpio(89, OMAP_PULL_ENA | OMAP_PULL_UP);
342 omap_mux_init_gpio(124, OMAP_PULL_ENA | OMAP_PULL_UP);
343 omap_mux_init_signal("mcbsp2_dr.gpio_11", OMAP_PULL_ENA | OMAP_PULL_UP);
344 if (omap_has_menelaus()) {
345 omap_mux_init_signal("sdrc_a14.gpio0",
346 OMAP_PULL_ENA | OMAP_PULL_UP);
347 omap_mux_init_signal("vlynq_rx0.gpio_15", 0);
348 omap_mux_init_signal("gpio_98", 0);
349 row_gpios[5] = 0;
350 col_gpios[2] = 15;
351 col_gpios[6] = 18;
352 } else {
353 omap_mux_init_signal("gpio_96", OMAP_PULL_ENA | OMAP_PULL_UP);
354 omap_mux_init_signal("gpio_100", 0);
355 omap_mux_init_signal("gpio_98", 0);
356 }
357 omap_mux_init_signal("gpio_90", 0);
358 omap_mux_init_signal("gpio_91", 0);
359 omap_mux_init_signal("gpio_36", 0);
360 omap_mux_init_signal("mcbsp2_clkx.gpio_12", 0);
361 omap_mux_init_signal("gpio_97", 0);
362#endif
363
364 i2c_register_board_info(1, h4_i2c_board_info, 380 i2c_register_board_info(1, h4_i2c_board_info,
365 ARRAY_SIZE(h4_i2c_board_info)); 381 ARRAY_SIZE(h4_i2c_board_info));
366 382
diff --git a/arch/arm/mach-omap2/clkt_dpll.c b/arch/arm/mach-omap2/clkt_dpll.c
index bcffee001bfa..e069a9be93df 100644
--- a/arch/arm/mach-omap2/clkt_dpll.c
+++ b/arch/arm/mach-omap2/clkt_dpll.c
@@ -46,10 +46,19 @@
46 (DPLL_SCALE_FACTOR / DPLL_SCALE_BASE)) 46 (DPLL_SCALE_FACTOR / DPLL_SCALE_BASE))
47 47
48/* DPLL valid Fint frequency band limits - from 34xx TRM Section 4.7.6.2 */ 48/* DPLL valid Fint frequency band limits - from 34xx TRM Section 4.7.6.2 */
49#define DPLL_FINT_BAND1_MIN 750000 49#define OMAP3430_DPLL_FINT_BAND1_MIN 750000
50#define DPLL_FINT_BAND1_MAX 2100000 50#define OMAP3430_DPLL_FINT_BAND1_MAX 2100000
51#define DPLL_FINT_BAND2_MIN 7500000 51#define OMAP3430_DPLL_FINT_BAND2_MIN 7500000
52#define DPLL_FINT_BAND2_MAX 21000000 52#define OMAP3430_DPLL_FINT_BAND2_MAX 21000000
53
54/*
55 * DPLL valid Fint frequency range for OMAP36xx and OMAP4xxx.
56 * From device data manual section 4.3 "DPLL and DLL Specifications".
57 */
58#define OMAP3PLUS_DPLL_FINT_JTYPE_MIN 500000
59#define OMAP3PLUS_DPLL_FINT_JTYPE_MAX 2500000
60#define OMAP3PLUS_DPLL_FINT_MIN 32000
61#define OMAP3PLUS_DPLL_FINT_MAX 52000000
53 62
54/* _dpll_test_fint() return codes */ 63/* _dpll_test_fint() return codes */
55#define DPLL_FINT_UNDERFLOW -1 64#define DPLL_FINT_UNDERFLOW -1
@@ -71,33 +80,43 @@
71static int _dpll_test_fint(struct clk *clk, u8 n) 80static int _dpll_test_fint(struct clk *clk, u8 n)
72{ 81{
73 struct dpll_data *dd; 82 struct dpll_data *dd;
74 long fint; 83 long fint, fint_min, fint_max;
75 int ret = 0; 84 int ret = 0;
76 85
77 dd = clk->dpll_data; 86 dd = clk->dpll_data;
78 87
79 /* DPLL divider must result in a valid jitter correction val */ 88 /* DPLL divider must result in a valid jitter correction val */
80 fint = clk->parent->rate / n; 89 fint = clk->parent->rate / n;
81 if (fint < DPLL_FINT_BAND1_MIN) {
82 90
91 if (cpu_is_omap24xx()) {
92 /* Should not be called for OMAP2, so warn if it is called */
93 WARN(1, "No fint limits available for OMAP2!\n");
94 return DPLL_FINT_INVALID;
95 } else if (cpu_is_omap3430()) {
96 fint_min = OMAP3430_DPLL_FINT_BAND1_MIN;
97 fint_max = OMAP3430_DPLL_FINT_BAND2_MAX;
98 } else if (dd->flags & DPLL_J_TYPE) {
99 fint_min = OMAP3PLUS_DPLL_FINT_JTYPE_MIN;
100 fint_max = OMAP3PLUS_DPLL_FINT_JTYPE_MAX;
101 } else {
102 fint_min = OMAP3PLUS_DPLL_FINT_MIN;
103 fint_max = OMAP3PLUS_DPLL_FINT_MAX;
104 }
105
106 if (fint < fint_min) {
83 pr_debug("rejecting n=%d due to Fint failure, " 107 pr_debug("rejecting n=%d due to Fint failure, "
84 "lowering max_divider\n", n); 108 "lowering max_divider\n", n);
85 dd->max_divider = n; 109 dd->max_divider = n;
86 ret = DPLL_FINT_UNDERFLOW; 110 ret = DPLL_FINT_UNDERFLOW;
87 111 } else if (fint > fint_max) {
88 } else if (fint > DPLL_FINT_BAND1_MAX &&
89 fint < DPLL_FINT_BAND2_MIN) {
90
91 pr_debug("rejecting n=%d due to Fint failure\n", n);
92 ret = DPLL_FINT_INVALID;
93
94 } else if (fint > DPLL_FINT_BAND2_MAX) {
95
96 pr_debug("rejecting n=%d due to Fint failure, " 112 pr_debug("rejecting n=%d due to Fint failure, "
97 "boosting min_divider\n", n); 113 "boosting min_divider\n", n);
98 dd->min_divider = n; 114 dd->min_divider = n;
99 ret = DPLL_FINT_INVALID; 115 ret = DPLL_FINT_INVALID;
100 116 } else if (cpu_is_omap3430() && fint > OMAP3430_DPLL_FINT_BAND1_MAX &&
117 fint < OMAP3430_DPLL_FINT_BAND2_MIN) {
118 pr_debug("rejecting n=%d due to Fint failure\n", n);
119 ret = DPLL_FINT_INVALID;
101 } 120 }
102 121
103 return ret; 122 return ret;
diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h
index 48ac568881bd..2311bc217226 100644
--- a/arch/arm/mach-omap2/clock.h
+++ b/arch/arm/mach-omap2/clock.h
@@ -66,6 +66,8 @@ void omap3_noncore_dpll_disable(struct clk *clk);
66int omap4_dpllmx_gatectrl_read(struct clk *clk); 66int omap4_dpllmx_gatectrl_read(struct clk *clk);
67void omap4_dpllmx_allow_gatectrl(struct clk *clk); 67void omap4_dpllmx_allow_gatectrl(struct clk *clk);
68void omap4_dpllmx_deny_gatectrl(struct clk *clk); 68void omap4_dpllmx_deny_gatectrl(struct clk *clk);
69long omap4_dpll_regm4xen_round_rate(struct clk *clk, unsigned long target_rate);
70unsigned long omap4_dpll_regm4xen_recalc(struct clk *clk);
69 71
70#ifdef CONFIG_OMAP_RESET_CLOCKS 72#ifdef CONFIG_OMAP_RESET_CLOCKS
71void omap2_clk_disable_unused(struct clk *clk); 73void omap2_clk_disable_unused(struct clk *clk);
diff --git a/arch/arm/mach-omap2/clock2420_data.c b/arch/arm/mach-omap2/clock2420_data.c
index 14a6277dd184..61ad3855f10a 100644
--- a/arch/arm/mach-omap2/clock2420_data.c
+++ b/arch/arm/mach-omap2/clock2420_data.c
@@ -1898,18 +1898,6 @@ static struct omap_clk omap2420_clks[] = {
1898 CLK(NULL, "pka_ick", &pka_ick, CK_242X), 1898 CLK(NULL, "pka_ick", &pka_ick, CK_242X),
1899 CLK(NULL, "usb_fck", &usb_fck, CK_242X), 1899 CLK(NULL, "usb_fck", &usb_fck, CK_242X),
1900 CLK("musb-hdrc", "fck", &osc_ck, CK_242X), 1900 CLK("musb-hdrc", "fck", &osc_ck, CK_242X),
1901 CLK("omap_timer.1", "fck", &gpt1_fck, CK_242X),
1902 CLK("omap_timer.2", "fck", &gpt2_fck, CK_242X),
1903 CLK("omap_timer.3", "fck", &gpt3_fck, CK_242X),
1904 CLK("omap_timer.4", "fck", &gpt4_fck, CK_242X),
1905 CLK("omap_timer.5", "fck", &gpt5_fck, CK_242X),
1906 CLK("omap_timer.6", "fck", &gpt6_fck, CK_242X),
1907 CLK("omap_timer.7", "fck", &gpt7_fck, CK_242X),
1908 CLK("omap_timer.8", "fck", &gpt8_fck, CK_242X),
1909 CLK("omap_timer.9", "fck", &gpt9_fck, CK_242X),
1910 CLK("omap_timer.10", "fck", &gpt10_fck, CK_242X),
1911 CLK("omap_timer.11", "fck", &gpt11_fck, CK_242X),
1912 CLK("omap_timer.12", "fck", &gpt12_fck, CK_242X),
1913 CLK("omap_timer.1", "32k_ck", &func_32k_ck, CK_243X), 1901 CLK("omap_timer.1", "32k_ck", &func_32k_ck, CK_243X),
1914 CLK("omap_timer.2", "32k_ck", &func_32k_ck, CK_243X), 1902 CLK("omap_timer.2", "32k_ck", &func_32k_ck, CK_243X),
1915 CLK("omap_timer.3", "32k_ck", &func_32k_ck, CK_243X), 1903 CLK("omap_timer.3", "32k_ck", &func_32k_ck, CK_243X),
diff --git a/arch/arm/mach-omap2/clock2430_data.c b/arch/arm/mach-omap2/clock2430_data.c
index ea6717cfa3c8..0cc12879e7b9 100644
--- a/arch/arm/mach-omap2/clock2430_data.c
+++ b/arch/arm/mach-omap2/clock2430_data.c
@@ -1998,18 +1998,6 @@ static struct omap_clk omap2430_clks[] = {
1998 CLK(NULL, "mdm_intc_ick", &mdm_intc_ick, CK_243X), 1998 CLK(NULL, "mdm_intc_ick", &mdm_intc_ick, CK_243X),
1999 CLK("omap_hsmmc.0", "mmchsdb_fck", &mmchsdb1_fck, CK_243X), 1999 CLK("omap_hsmmc.0", "mmchsdb_fck", &mmchsdb1_fck, CK_243X),
2000 CLK("omap_hsmmc.1", "mmchsdb_fck", &mmchsdb2_fck, CK_243X), 2000 CLK("omap_hsmmc.1", "mmchsdb_fck", &mmchsdb2_fck, CK_243X),
2001 CLK("omap_timer.1", "fck", &gpt1_fck, CK_243X),
2002 CLK("omap_timer.2", "fck", &gpt2_fck, CK_243X),
2003 CLK("omap_timer.3", "fck", &gpt3_fck, CK_243X),
2004 CLK("omap_timer.4", "fck", &gpt4_fck, CK_243X),
2005 CLK("omap_timer.5", "fck", &gpt5_fck, CK_243X),
2006 CLK("omap_timer.6", "fck", &gpt6_fck, CK_243X),
2007 CLK("omap_timer.7", "fck", &gpt7_fck, CK_243X),
2008 CLK("omap_timer.8", "fck", &gpt8_fck, CK_243X),
2009 CLK("omap_timer.9", "fck", &gpt9_fck, CK_243X),
2010 CLK("omap_timer.10", "fck", &gpt10_fck, CK_243X),
2011 CLK("omap_timer.11", "fck", &gpt11_fck, CK_243X),
2012 CLK("omap_timer.12", "fck", &gpt12_fck, CK_243X),
2013 CLK("omap_timer.1", "32k_ck", &func_32k_ck, CK_243X), 2001 CLK("omap_timer.1", "32k_ck", &func_32k_ck, CK_243X),
2014 CLK("omap_timer.2", "32k_ck", &func_32k_ck, CK_243X), 2002 CLK("omap_timer.2", "32k_ck", &func_32k_ck, CK_243X),
2015 CLK("omap_timer.3", "32k_ck", &func_32k_ck, CK_243X), 2003 CLK("omap_timer.3", "32k_ck", &func_32k_ck, CK_243X),
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c
index 65dd363163bc..5d0064a4fb5a 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -3464,18 +3464,6 @@ static struct omap_clk omap3xxx_clks[] = {
3464 CLK("musb-am35x", "fck", &hsotgusb_fck_am35xx, CK_AM35XX), 3464 CLK("musb-am35x", "fck", &hsotgusb_fck_am35xx, CK_AM35XX),
3465 CLK(NULL, "hecc_ck", &hecc_ck, CK_AM35XX), 3465 CLK(NULL, "hecc_ck", &hecc_ck, CK_AM35XX),
3466 CLK(NULL, "uart4_ick", &uart4_ick_am35xx, CK_AM35XX), 3466 CLK(NULL, "uart4_ick", &uart4_ick_am35xx, CK_AM35XX),
3467 CLK("omap_timer.1", "fck", &gpt1_fck, CK_3XXX),
3468 CLK("omap_timer.2", "fck", &gpt2_fck, CK_3XXX),
3469 CLK("omap_timer.3", "fck", &gpt3_fck, CK_3XXX),
3470 CLK("omap_timer.4", "fck", &gpt4_fck, CK_3XXX),
3471 CLK("omap_timer.5", "fck", &gpt5_fck, CK_3XXX),
3472 CLK("omap_timer.6", "fck", &gpt6_fck, CK_3XXX),
3473 CLK("omap_timer.7", "fck", &gpt7_fck, CK_3XXX),
3474 CLK("omap_timer.8", "fck", &gpt8_fck, CK_3XXX),
3475 CLK("omap_timer.9", "fck", &gpt9_fck, CK_3XXX),
3476 CLK("omap_timer.10", "fck", &gpt10_fck, CK_3XXX),
3477 CLK("omap_timer.11", "fck", &gpt11_fck, CK_3XXX),
3478 CLK("omap_timer.12", "fck", &gpt12_fck, CK_3XXX),
3479 CLK("omap_timer.1", "32k_ck", &omap_32k_fck, CK_3XXX), 3467 CLK("omap_timer.1", "32k_ck", &omap_32k_fck, CK_3XXX),
3480 CLK("omap_timer.2", "32k_ck", &omap_32k_fck, CK_3XXX), 3468 CLK("omap_timer.2", "32k_ck", &omap_32k_fck, CK_3XXX),
3481 CLK("omap_timer.3", "32k_ck", &omap_32k_fck, CK_3XXX), 3469 CLK("omap_timer.3", "32k_ck", &omap_32k_fck, CK_3XXX),
diff --git a/arch/arm/mach-omap2/clock44xx.h b/arch/arm/mach-omap2/clock44xx.h
index 7ceb870e7ab8..287a46f78d97 100644
--- a/arch/arm/mach-omap2/clock44xx.h
+++ b/arch/arm/mach-omap2/clock44xx.h
@@ -8,6 +8,13 @@
8#ifndef __ARCH_ARM_MACH_OMAP2_CLOCK44XX_H 8#ifndef __ARCH_ARM_MACH_OMAP2_CLOCK44XX_H
9#define __ARCH_ARM_MACH_OMAP2_CLOCK44XX_H 9#define __ARCH_ARM_MACH_OMAP2_CLOCK44XX_H
10 10
11/*
12 * OMAP4430_REGM4XEN_MULT: If the CM_CLKMODE_DPLL_ABE.DPLL_REGM4XEN bit is
13 * set, then the DPLL's lock frequency is multiplied by 4 (OMAP4430 TRM
14 * vV Section 3.6.3.3.1 "DPLLs Output Clocks Parameters")
15 */
16#define OMAP4430_REGM4XEN_MULT 4
17
11int omap4xxx_clk_init(void); 18int omap4xxx_clk_init(void);
12 19
13#endif 20#endif
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
index 946bf04a956d..0798a802497a 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -270,8 +270,8 @@ static struct clk dpll_abe_ck = {
270 .dpll_data = &dpll_abe_dd, 270 .dpll_data = &dpll_abe_dd,
271 .init = &omap2_init_dpll_parent, 271 .init = &omap2_init_dpll_parent,
272 .ops = &clkops_omap3_noncore_dpll_ops, 272 .ops = &clkops_omap3_noncore_dpll_ops,
273 .recalc = &omap3_dpll_recalc, 273 .recalc = &omap4_dpll_regm4xen_recalc,
274 .round_rate = &omap2_dpll_round_rate, 274 .round_rate = &omap4_dpll_regm4xen_round_rate,
275 .set_rate = &omap3_noncore_dpll_set_rate, 275 .set_rate = &omap3_noncore_dpll_set_rate,
276}; 276};
277 277
@@ -1195,11 +1195,25 @@ static struct clk l4_wkup_clk_mux_ck = {
1195 .recalc = &omap2_clksel_recalc, 1195 .recalc = &omap2_clksel_recalc,
1196}; 1196};
1197 1197
1198static const struct clksel_rate div2_2to1_rates[] = {
1199 { .div = 1, .val = 1, .flags = RATE_IN_4430 },
1200 { .div = 2, .val = 0, .flags = RATE_IN_4430 },
1201 { .div = 0 },
1202};
1203
1204static const struct clksel ocp_abe_iclk_div[] = {
1205 { .parent = &aess_fclk, .rates = div2_2to1_rates },
1206 { .parent = NULL },
1207};
1208
1198static struct clk ocp_abe_iclk = { 1209static struct clk ocp_abe_iclk = {
1199 .name = "ocp_abe_iclk", 1210 .name = "ocp_abe_iclk",
1200 .parent = &aess_fclk, 1211 .parent = &aess_fclk,
1212 .clksel = ocp_abe_iclk_div,
1213 .clksel_reg = OMAP4430_CM1_ABE_AESS_CLKCTRL,
1214 .clksel_mask = OMAP4430_CLKSEL_AESS_FCLK_MASK,
1201 .ops = &clkops_null, 1215 .ops = &clkops_null,
1202 .recalc = &followparent_recalc, 1216 .recalc = &omap2_clksel_recalc,
1203}; 1217};
1204 1218
1205static struct clk per_abe_24m_fclk = { 1219static struct clk per_abe_24m_fclk = {
@@ -1398,9 +1412,9 @@ static struct clk dss_dss_clk = {
1398}; 1412};
1399 1413
1400static const struct clksel_rate div3_8to32_rates[] = { 1414static const struct clksel_rate div3_8to32_rates[] = {
1401 { .div = 8, .val = 0, .flags = RATE_IN_44XX }, 1415 { .div = 8, .val = 0, .flags = RATE_IN_4460 },
1402 { .div = 16, .val = 1, .flags = RATE_IN_44XX }, 1416 { .div = 16, .val = 1, .flags = RATE_IN_4460 },
1403 { .div = 32, .val = 2, .flags = RATE_IN_44XX }, 1417 { .div = 32, .val = 2, .flags = RATE_IN_4460 },
1404 { .div = 0 }, 1418 { .div = 0 },
1405}; 1419};
1406 1420
@@ -3363,17 +3377,6 @@ static struct omap_clk omap44xx_clks[] = {
3363 CLK("usbhs-omap.0", "usbhost_ick", &dummy_ck, CK_443X), 3377 CLK("usbhs-omap.0", "usbhost_ick", &dummy_ck, CK_443X),
3364 CLK("usbhs-omap.0", "usbtll_fck", &dummy_ck, CK_443X), 3378 CLK("usbhs-omap.0", "usbtll_fck", &dummy_ck, CK_443X),
3365 CLK("omap_wdt", "ick", &dummy_ck, CK_443X), 3379 CLK("omap_wdt", "ick", &dummy_ck, CK_443X),
3366 CLK("omap_timer.1", "fck", &timer1_fck, CK_443X),
3367 CLK("omap_timer.2", "fck", &timer2_fck, CK_443X),
3368 CLK("omap_timer.3", "fck", &timer3_fck, CK_443X),
3369 CLK("omap_timer.4", "fck", &timer4_fck, CK_443X),
3370 CLK("omap_timer.5", "fck", &timer5_fck, CK_443X),
3371 CLK("omap_timer.6", "fck", &timer6_fck, CK_443X),
3372 CLK("omap_timer.7", "fck", &timer7_fck, CK_443X),
3373 CLK("omap_timer.8", "fck", &timer8_fck, CK_443X),
3374 CLK("omap_timer.9", "fck", &timer9_fck, CK_443X),
3375 CLK("omap_timer.10", "fck", &timer10_fck, CK_443X),
3376 CLK("omap_timer.11", "fck", &timer11_fck, CK_443X),
3377 CLK("omap_timer.1", "32k_ck", &sys_32k_ck, CK_443X), 3380 CLK("omap_timer.1", "32k_ck", &sys_32k_ck, CK_443X),
3378 CLK("omap_timer.2", "32k_ck", &sys_32k_ck, CK_443X), 3381 CLK("omap_timer.2", "32k_ck", &sys_32k_ck, CK_443X),
3379 CLK("omap_timer.3", "32k_ck", &sys_32k_ck, CK_443X), 3382 CLK("omap_timer.3", "32k_ck", &sys_32k_ck, CK_443X),
@@ -3403,12 +3406,12 @@ int __init omap4xxx_clk_init(void)
3403 struct omap_clk *c; 3406 struct omap_clk *c;
3404 u32 cpu_clkflg; 3407 u32 cpu_clkflg;
3405 3408
3406 if (cpu_is_omap44xx()) { 3409 if (cpu_is_omap443x()) {
3407 cpu_mask = RATE_IN_4430; 3410 cpu_mask = RATE_IN_4430;
3408 cpu_clkflg = CK_443X; 3411 cpu_clkflg = CK_443X;
3409 } else if (cpu_is_omap446x()) { 3412 } else if (cpu_is_omap446x()) {
3410 cpu_mask = RATE_IN_4460; 3413 cpu_mask = RATE_IN_4460 | RATE_IN_4430;
3411 cpu_clkflg = CK_446X; 3414 cpu_clkflg = CK_446X | CK_443X;
3412 } else { 3415 } else {
3413 return 0; 3416 return 0;
3414 } 3417 }
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 68ec03152d5f..c15cfada5f13 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -318,18 +318,10 @@ static inline void omap_init_audio(void) {}
318#if defined(CONFIG_SND_OMAP_SOC_MCPDM) || \ 318#if defined(CONFIG_SND_OMAP_SOC_MCPDM) || \
319 defined(CONFIG_SND_OMAP_SOC_MCPDM_MODULE) 319 defined(CONFIG_SND_OMAP_SOC_MCPDM_MODULE)
320 320
321static struct omap_device_pm_latency omap_mcpdm_latency[] = {
322 {
323 .deactivate_func = omap_device_idle_hwmods,
324 .activate_func = omap_device_enable_hwmods,
325 .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
326 },
327};
328
329static void omap_init_mcpdm(void) 321static void omap_init_mcpdm(void)
330{ 322{
331 struct omap_hwmod *oh; 323 struct omap_hwmod *oh;
332 struct omap_device *od; 324 struct platform_device *pdev;
333 325
334 oh = omap_hwmod_lookup("mcpdm"); 326 oh = omap_hwmod_lookup("mcpdm");
335 if (!oh) { 327 if (!oh) {
@@ -337,11 +329,8 @@ static void omap_init_mcpdm(void)
337 return; 329 return;
338 } 330 }
339 331
340 od = omap_device_build("omap-mcpdm", -1, oh, NULL, 0, 332 pdev = omap_device_build("omap-mcpdm", -1, oh, NULL, 0, NULL, 0, 0);
341 omap_mcpdm_latency, 333 WARN(IS_ERR(pdev), "Can't build omap_device for omap-mcpdm.\n");
342 ARRAY_SIZE(omap_mcpdm_latency), 0);
343 if (IS_ERR(od))
344 printk(KERN_ERR "Could not build omap_device for omap-mcpdm-dai\n");
345} 334}
346#else 335#else
347static inline void omap_init_mcpdm(void) {} 336static inline void omap_init_mcpdm(void) {}
diff --git a/arch/arm/mach-omap2/dpll3xxx.c b/arch/arm/mach-omap2/dpll3xxx.c
index f77022be783d..fc56745676fa 100644
--- a/arch/arm/mach-omap2/dpll3xxx.c
+++ b/arch/arm/mach-omap2/dpll3xxx.c
@@ -390,7 +390,8 @@ int omap3_noncore_dpll_enable(struct clk *clk)
390 * propagating? 390 * propagating?
391 */ 391 */
392 if (!r) 392 if (!r)
393 clk->rate = omap2_get_dpll_rate(clk); 393 clk->rate = (clk->recalc) ? clk->recalc(clk) :
394 omap2_get_dpll_rate(clk);
394 395
395 return r; 396 return r;
396} 397}
@@ -424,6 +425,7 @@ void omap3_noncore_dpll_disable(struct clk *clk)
424int omap3_noncore_dpll_set_rate(struct clk *clk, unsigned long rate) 425int omap3_noncore_dpll_set_rate(struct clk *clk, unsigned long rate)
425{ 426{
426 struct clk *new_parent = NULL; 427 struct clk *new_parent = NULL;
428 unsigned long hw_rate;
427 u16 freqsel = 0; 429 u16 freqsel = 0;
428 struct dpll_data *dd; 430 struct dpll_data *dd;
429 int ret; 431 int ret;
@@ -435,7 +437,8 @@ int omap3_noncore_dpll_set_rate(struct clk *clk, unsigned long rate)
435 if (!dd) 437 if (!dd)
436 return -EINVAL; 438 return -EINVAL;
437 439
438 if (rate == omap2_get_dpll_rate(clk)) 440 hw_rate = (clk->recalc) ? clk->recalc(clk) : omap2_get_dpll_rate(clk);
441 if (rate == hw_rate)
439 return 0; 442 return 0;
440 443
441 /* 444 /*
@@ -455,7 +458,7 @@ int omap3_noncore_dpll_set_rate(struct clk *clk, unsigned long rate)
455 new_parent = dd->clk_bypass; 458 new_parent = dd->clk_bypass;
456 } else { 459 } else {
457 if (dd->last_rounded_rate != rate) 460 if (dd->last_rounded_rate != rate)
458 omap2_dpll_round_rate(clk, rate); 461 rate = clk->round_rate(clk, rate);
459 462
460 if (dd->last_rounded_rate == 0) 463 if (dd->last_rounded_rate == 0)
461 return -EINVAL; 464 return -EINVAL;
diff --git a/arch/arm/mach-omap2/dpll44xx.c b/arch/arm/mach-omap2/dpll44xx.c
index 4e4da6160d05..9c6a296b3dc3 100644
--- a/arch/arm/mach-omap2/dpll44xx.c
+++ b/arch/arm/mach-omap2/dpll44xx.c
@@ -19,6 +19,7 @@
19#include <plat/clock.h> 19#include <plat/clock.h>
20 20
21#include "clock.h" 21#include "clock.h"
22#include "clock44xx.h"
22#include "cm-regbits-44xx.h" 23#include "cm-regbits-44xx.h"
23 24
24/* Supported only on OMAP4 */ 25/* Supported only on OMAP4 */
@@ -82,3 +83,71 @@ const struct clkops clkops_omap4_dpllmx_ops = {
82 .deny_idle = omap4_dpllmx_deny_gatectrl, 83 .deny_idle = omap4_dpllmx_deny_gatectrl,
83}; 84};
84 85
86/**
87 * omap4_dpll_regm4xen_recalc - compute DPLL rate, considering REGM4XEN bit
88 * @clk: struct clk * of the DPLL to compute the rate for
89 *
90 * Compute the output rate for the OMAP4 DPLL represented by @clk.
91 * Takes the REGM4XEN bit into consideration, which is needed for the
92 * OMAP4 ABE DPLL. Returns the DPLL's output rate (before M-dividers)
93 * upon success, or 0 upon error.
94 */
95unsigned long omap4_dpll_regm4xen_recalc(struct clk *clk)
96{
97 u32 v;
98 unsigned long rate;
99 struct dpll_data *dd;
100
101 if (!clk || !clk->dpll_data)
102 return 0;
103
104 dd = clk->dpll_data;
105
106 rate = omap2_get_dpll_rate(clk);
107
108 /* regm4xen adds a multiplier of 4 to DPLL calculations */
109 v = __raw_readl(dd->control_reg);
110 if (v & OMAP4430_DPLL_REGM4XEN_MASK)
111 rate *= OMAP4430_REGM4XEN_MULT;
112
113 return rate;
114}
115
116/**
117 * omap4_dpll_regm4xen_round_rate - round DPLL rate, considering REGM4XEN bit
118 * @clk: struct clk * of the DPLL to round a rate for
119 * @target_rate: the desired rate of the DPLL
120 *
121 * Compute the rate that would be programmed into the DPLL hardware
122 * for @clk if set_rate() were to be provided with the rate
123 * @target_rate. Takes the REGM4XEN bit into consideration, which is
124 * needed for the OMAP4 ABE DPLL. Returns the rounded rate (before
125 * M-dividers) upon success, -EINVAL if @clk is null or not a DPLL, or
126 * ~0 if an error occurred in omap2_dpll_round_rate().
127 */
128long omap4_dpll_regm4xen_round_rate(struct clk *clk, unsigned long target_rate)
129{
130 u32 v;
131 struct dpll_data *dd;
132 long r;
133
134 if (!clk || !clk->dpll_data)
135 return -EINVAL;
136
137 dd = clk->dpll_data;
138
139 /* regm4xen adds a multiplier of 4 to DPLL calculations */
140 v = __raw_readl(dd->control_reg) & OMAP4430_DPLL_REGM4XEN_MASK;
141
142 if (v)
143 target_rate = target_rate / OMAP4430_REGM4XEN_MULT;
144
145 r = omap2_dpll_round_rate(clk, target_rate);
146 if (r == ~0)
147 return r;
148
149 if (v)
150 clk->dpll_data->last_rounded_rate *= OMAP4430_REGM4XEN_MULT;
151
152 return clk->dpll_data->last_rounded_rate;
153}
diff --git a/arch/arm/mach-omap2/dsp.c b/arch/arm/mach-omap2/dsp.c
index 911cd2e68d46..74f18f2952df 100644
--- a/arch/arm/mach-omap2/dsp.c
+++ b/arch/arm/mach-omap2/dsp.c
@@ -18,6 +18,7 @@
18 * of the OMAP PM core code. 18 * of the OMAP PM core code.
19 */ 19 */
20 20
21#include <linux/module.h>
21#include <linux/platform_device.h> 22#include <linux/platform_device.h>
22#include "cm2xxx_3xxx.h" 23#include "cm2xxx_3xxx.h"
23#include "prm2xxx_3xxx.h" 24#include "prm2xxx_3xxx.h"
diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c
index 77085847e4e7..f4a1020559a7 100644
--- a/arch/arm/mach-omap2/hsmmc.c
+++ b/arch/arm/mach-omap2/hsmmc.c
@@ -129,15 +129,11 @@ static void omap4_hsmmc1_before_set_reg(struct device *dev, int slot,
129 * Assume we power both OMAP VMMC1 (for CMD, CLK, DAT0..3) and the 129 * Assume we power both OMAP VMMC1 (for CMD, CLK, DAT0..3) and the
130 * card with Vcc regulator (from twl4030 or whatever). OMAP has both 130 * card with Vcc regulator (from twl4030 or whatever). OMAP has both
131 * 1.8V and 3.0V modes, controlled by the PBIAS register. 131 * 1.8V and 3.0V modes, controlled by the PBIAS register.
132 *
133 * In 8-bit modes, OMAP VMMC1A (for DAT4..7) needs a supply, which
134 * is most naturally TWL VSIM; those pins also use PBIAS.
135 *
136 * FIXME handle VMMC1A as needed ...
137 */ 132 */
138 reg = omap4_ctrl_pad_readl(control_pbias_offset); 133 reg = omap4_ctrl_pad_readl(control_pbias_offset);
139 reg &= ~(OMAP4_MMC1_PBIASLITE_PWRDNZ_MASK | 134 reg &= ~(OMAP4_MMC1_PBIASLITE_PWRDNZ_MASK |
140 OMAP4_MMC1_PWRDNZ_MASK); 135 OMAP4_MMC1_PWRDNZ_MASK |
136 OMAP4_MMC1_PBIASLITE_VMODE_MASK);
141 omap4_ctrl_pad_writel(reg, control_pbias_offset); 137 omap4_ctrl_pad_writel(reg, control_pbias_offset);
142} 138}
143 139
@@ -172,12 +168,6 @@ static void omap4_hsmmc1_after_set_reg(struct device *dev, int slot,
172 reg &= ~(OMAP4_MMC1_PWRDNZ_MASK); 168 reg &= ~(OMAP4_MMC1_PWRDNZ_MASK);
173 omap4_ctrl_pad_writel(reg, control_pbias_offset); 169 omap4_ctrl_pad_writel(reg, control_pbias_offset);
174 } 170 }
175 } else {
176 reg = omap4_ctrl_pad_readl(control_pbias_offset);
177 reg |= (OMAP4_MMC1_PBIASLITE_PWRDNZ_MASK |
178 OMAP4_MMC1_PWRDNZ_MASK |
179 OMAP4_MMC1_PBIASLITE_VMODE_MASK);
180 omap4_ctrl_pad_writel(reg, control_pbias_offset);
181 } 171 }
182} 172}
183 173
@@ -489,7 +479,7 @@ void __init omap2_hsmmc_init(struct omap2_hsmmc_info *controllers)
489 OMAP4_SDMMC1_PUSTRENGTH_GRP1_MASK); 479 OMAP4_SDMMC1_PUSTRENGTH_GRP1_MASK);
490 reg &= ~(OMAP4_SDMMC1_PUSTRENGTH_GRP2_MASK | 480 reg &= ~(OMAP4_SDMMC1_PUSTRENGTH_GRP2_MASK |
491 OMAP4_SDMMC1_PUSTRENGTH_GRP3_MASK); 481 OMAP4_SDMMC1_PUSTRENGTH_GRP3_MASK);
492 reg |= (OMAP4_USBC1_DR0_SPEEDCTRL_MASK| 482 reg |= (OMAP4_SDMMC1_DR0_SPEEDCTRL_MASK |
493 OMAP4_SDMMC1_DR1_SPEEDCTRL_MASK | 483 OMAP4_SDMMC1_DR1_SPEEDCTRL_MASK |
494 OMAP4_SDMMC1_DR2_SPEEDCTRL_MASK); 484 OMAP4_SDMMC1_DR2_SPEEDCTRL_MASK);
495 omap4_ctrl_pad_writel(reg, control_mmc1); 485 omap4_ctrl_pad_writel(reg, control_mmc1);
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index d27daf921c7e..7f47092a193f 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -187,8 +187,11 @@ static void __init omap3_check_features(void)
187 OMAP3_CHECK_FEATURE(status, ISP); 187 OMAP3_CHECK_FEATURE(status, ISP);
188 if (cpu_is_omap3630()) 188 if (cpu_is_omap3630())
189 omap_features |= OMAP3_HAS_192MHZ_CLK; 189 omap_features |= OMAP3_HAS_192MHZ_CLK;
190 if (!cpu_is_omap3505() && !cpu_is_omap3517()) 190 if (cpu_is_omap3430() || cpu_is_omap3630())
191 omap_features |= OMAP3_HAS_IO_WAKEUP; 191 omap_features |= OMAP3_HAS_IO_WAKEUP;
192 if (cpu_is_omap3630() || omap_rev() == OMAP3430_REV_ES3_1 ||
193 omap_rev() == OMAP3430_REV_ES3_1_2)
194 omap_features |= OMAP3_HAS_IO_CHAIN_CTRL;
192 195
193 omap_features |= OMAP3_HAS_SDRC; 196 omap_features |= OMAP3_HAS_SDRC;
194 197
diff --git a/arch/arm/mach-omap2/include/mach/ctrl_module_pad_core_44xx.h b/arch/arm/mach-omap2/include/mach/ctrl_module_pad_core_44xx.h
index c88420de1151..1e2d3322f33e 100644
--- a/arch/arm/mach-omap2/include/mach/ctrl_module_pad_core_44xx.h
+++ b/arch/arm/mach-omap2/include/mach/ctrl_module_pad_core_44xx.h
@@ -941,10 +941,10 @@
941#define OMAP4_DSI2_LANEENABLE_MASK (0x7 << 29) 941#define OMAP4_DSI2_LANEENABLE_MASK (0x7 << 29)
942#define OMAP4_DSI1_LANEENABLE_SHIFT 24 942#define OMAP4_DSI1_LANEENABLE_SHIFT 24
943#define OMAP4_DSI1_LANEENABLE_MASK (0x1f << 24) 943#define OMAP4_DSI1_LANEENABLE_MASK (0x1f << 24)
944#define OMAP4_DSI1_PIPD_SHIFT 19 944#define OMAP4_DSI2_PIPD_SHIFT 19
945#define OMAP4_DSI1_PIPD_MASK (0x1f << 19) 945#define OMAP4_DSI2_PIPD_MASK (0x1f << 19)
946#define OMAP4_DSI2_PIPD_SHIFT 14 946#define OMAP4_DSI1_PIPD_SHIFT 14
947#define OMAP4_DSI2_PIPD_MASK (0x1f << 14) 947#define OMAP4_DSI1_PIPD_MASK (0x1f << 14)
948 948
949/* CONTROL_MCBSPLP */ 949/* CONTROL_MCBSPLP */
950#define OMAP4_ALBCTRLRX_FSX_SHIFT 31 950#define OMAP4_ALBCTRLRX_FSX_SHIFT 31
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index a5d8dce2a70b..25d20ced03e1 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -359,6 +359,7 @@ static void __init omap_hwmod_init_postsetup(void)
359 omap_pm_if_early_init(); 359 omap_pm_if_early_init();
360} 360}
361 361
362#ifdef CONFIG_ARCH_OMAP2
362void __init omap2420_init_early(void) 363void __init omap2420_init_early(void)
363{ 364{
364 omap2_set_globals_242x(); 365 omap2_set_globals_242x();
@@ -382,11 +383,13 @@ void __init omap2430_init_early(void)
382 omap_hwmod_init_postsetup(); 383 omap_hwmod_init_postsetup();
383 omap2430_clk_init(); 384 omap2430_clk_init();
384} 385}
386#endif
385 387
386/* 388/*
387 * Currently only board-omap3beagle.c should call this because of the 389 * Currently only board-omap3beagle.c should call this because of the
388 * same machine_id for 34xx and 36xx beagle.. Will get fixed with DT. 390 * same machine_id for 34xx and 36xx beagle.. Will get fixed with DT.
389 */ 391 */
392#ifdef CONFIG_ARCH_OMAP3
390void __init omap3_init_early(void) 393void __init omap3_init_early(void)
391{ 394{
392 omap2_set_globals_3xxx(); 395 omap2_set_globals_3xxx();
@@ -430,7 +433,9 @@ void __init ti816x_init_early(void)
430 omap_hwmod_init_postsetup(); 433 omap_hwmod_init_postsetup();
431 omap3xxx_clk_init(); 434 omap3xxx_clk_init();
432} 435}
436#endif
433 437
438#ifdef CONFIG_ARCH_OMAP4
434void __init omap4430_init_early(void) 439void __init omap4430_init_early(void)
435{ 440{
436 omap2_set_globals_443x(); 441 omap2_set_globals_443x();
@@ -442,6 +447,7 @@ void __init omap4430_init_early(void)
442 omap_hwmod_init_postsetup(); 447 omap_hwmod_init_postsetup();
443 omap4xxx_clk_init(); 448 omap4xxx_clk_init();
444} 449}
450#endif
445 451
446void __init omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0, 452void __init omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
447 struct omap_sdrc_params *sdrc_cs1) 453 struct omap_sdrc_params *sdrc_cs1)
diff --git a/arch/arm/mach-omap2/mailbox.c b/arch/arm/mach-omap2/mailbox.c
index 86d564a640bb..609ea2ded7e3 100644
--- a/arch/arm/mach-omap2/mailbox.c
+++ b/arch/arm/mach-omap2/mailbox.c
@@ -10,6 +10,7 @@
10 * for more details. 10 * for more details.
11 */ 11 */
12 12
13#include <linux/module.h>
13#include <linux/clk.h> 14#include <linux/clk.h>
14#include <linux/err.h> 15#include <linux/err.h>
15#include <linux/platform_device.h> 16#include <linux/platform_device.h>
diff --git a/arch/arm/mach-omap2/omap-iommu.c b/arch/arm/mach-omap2/omap-iommu.c
index e61feadcda4e..b8822048e409 100644
--- a/arch/arm/mach-omap2/omap-iommu.c
+++ b/arch/arm/mach-omap2/omap-iommu.c
@@ -10,6 +10,7 @@
10 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
11 */ 11 */
12 12
13#include <linux/module.h>
13#include <linux/platform_device.h> 14#include <linux/platform_device.h>
14 15
15#include <plat/iommu.h> 16#include <plat/iommu.h>
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index d71380705080..6b3088db83b7 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -2625,7 +2625,7 @@ ohsps_unlock:
2625 * Returns the context loss count of the powerdomain assocated with @oh 2625 * Returns the context loss count of the powerdomain assocated with @oh
2626 * upon success, or zero if no powerdomain exists for @oh. 2626 * upon success, or zero if no powerdomain exists for @oh.
2627 */ 2627 */
2628u32 omap_hwmod_get_context_loss_count(struct omap_hwmod *oh) 2628int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
2629{ 2629{
2630 struct powerdomain *pwrdm; 2630 struct powerdomain *pwrdm;
2631 int ret = 0; 2631 int ret = 0;
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index 3008e1672c7a..bc9035ec87fc 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -3159,7 +3159,6 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
3159 &omap3xxx_mmc2_hwmod, 3159 &omap3xxx_mmc2_hwmod,
3160 &omap3xxx_mmc3_hwmod, 3160 &omap3xxx_mmc3_hwmod,
3161 &omap3xxx_mpu_hwmod, 3161 &omap3xxx_mpu_hwmod,
3162 &omap3xxx_iva_hwmod,
3163 3162
3164 &omap3xxx_timer1_hwmod, 3163 &omap3xxx_timer1_hwmod,
3165 &omap3xxx_timer2_hwmod, 3164 &omap3xxx_timer2_hwmod,
@@ -3188,8 +3187,6 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
3188 &omap3xxx_i2c1_hwmod, 3187 &omap3xxx_i2c1_hwmod,
3189 &omap3xxx_i2c2_hwmod, 3188 &omap3xxx_i2c2_hwmod,
3190 &omap3xxx_i2c3_hwmod, 3189 &omap3xxx_i2c3_hwmod,
3191 &omap34xx_sr1_hwmod,
3192 &omap34xx_sr2_hwmod,
3193 3190
3194 /* gpio class */ 3191 /* gpio class */
3195 &omap3xxx_gpio1_hwmod, 3192 &omap3xxx_gpio1_hwmod,
@@ -3211,8 +3208,6 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
3211 &omap3xxx_mcbsp2_sidetone_hwmod, 3208 &omap3xxx_mcbsp2_sidetone_hwmod,
3212 &omap3xxx_mcbsp3_sidetone_hwmod, 3209 &omap3xxx_mcbsp3_sidetone_hwmod,
3213 3210
3214 /* mailbox class */
3215 &omap3xxx_mailbox_hwmod,
3216 3211
3217 /* mcspi class */ 3212 /* mcspi class */
3218 &omap34xx_mcspi1, 3213 &omap34xx_mcspi1,
@@ -3225,31 +3220,39 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
3225 3220
3226/* 3430ES1-only hwmods */ 3221/* 3430ES1-only hwmods */
3227static __initdata struct omap_hwmod *omap3430es1_hwmods[] = { 3222static __initdata struct omap_hwmod *omap3430es1_hwmods[] = {
3223 &omap3xxx_iva_hwmod,
3228 &omap3430es1_dss_core_hwmod, 3224 &omap3430es1_dss_core_hwmod,
3225 &omap3xxx_mailbox_hwmod,
3229 NULL 3226 NULL
3230}; 3227};
3231 3228
3232/* 3430ES2+-only hwmods */ 3229/* 3430ES2+-only hwmods */
3233static __initdata struct omap_hwmod *omap3430es2plus_hwmods[] = { 3230static __initdata struct omap_hwmod *omap3430es2plus_hwmods[] = {
3231 &omap3xxx_iva_hwmod,
3234 &omap3xxx_dss_core_hwmod, 3232 &omap3xxx_dss_core_hwmod,
3235 &omap3xxx_usbhsotg_hwmod, 3233 &omap3xxx_usbhsotg_hwmod,
3234 &omap3xxx_mailbox_hwmod,
3236 NULL 3235 NULL
3237}; 3236};
3238 3237
3239/* 34xx-only hwmods (all ES revisions) */ 3238/* 34xx-only hwmods (all ES revisions) */
3240static __initdata struct omap_hwmod *omap34xx_hwmods[] = { 3239static __initdata struct omap_hwmod *omap34xx_hwmods[] = {
3240 &omap3xxx_iva_hwmod,
3241 &omap34xx_sr1_hwmod, 3241 &omap34xx_sr1_hwmod,
3242 &omap34xx_sr2_hwmod, 3242 &omap34xx_sr2_hwmod,
3243 &omap3xxx_mailbox_hwmod,
3243 NULL 3244 NULL
3244}; 3245};
3245 3246
3246/* 36xx-only hwmods (all ES revisions) */ 3247/* 36xx-only hwmods (all ES revisions) */
3247static __initdata struct omap_hwmod *omap36xx_hwmods[] = { 3248static __initdata struct omap_hwmod *omap36xx_hwmods[] = {
3249 &omap3xxx_iva_hwmod,
3248 &omap3xxx_uart4_hwmod, 3250 &omap3xxx_uart4_hwmod,
3249 &omap3xxx_dss_core_hwmod, 3251 &omap3xxx_dss_core_hwmod,
3250 &omap36xx_sr1_hwmod, 3252 &omap36xx_sr1_hwmod,
3251 &omap36xx_sr2_hwmod, 3253 &omap36xx_sr2_hwmod,
3252 &omap3xxx_usbhsotg_hwmod, 3254 &omap3xxx_usbhsotg_hwmod,
3255 &omap3xxx_mailbox_hwmod,
3253 NULL 3256 NULL
3254}; 3257};
3255 3258
@@ -3267,7 +3270,7 @@ int __init omap3xxx_hwmod_init(void)
3267 3270
3268 /* Register hwmods common to all OMAP3 */ 3271 /* Register hwmods common to all OMAP3 */
3269 r = omap_hwmod_register(omap3xxx_hwmods); 3272 r = omap_hwmod_register(omap3xxx_hwmods);
3270 if (!r) 3273 if (r < 0)
3271 return r; 3274 return r;
3272 3275
3273 rev = omap_rev(); 3276 rev = omap_rev();
@@ -3292,7 +3295,7 @@ int __init omap3xxx_hwmod_init(void)
3292 }; 3295 };
3293 3296
3294 r = omap_hwmod_register(h); 3297 r = omap_hwmod_register(h);
3295 if (!r) 3298 if (r < 0)
3296 return r; 3299 return r;
3297 3300
3298 /* 3301 /*
diff --git a/arch/arm/mach-omap2/omap_l3_noc.c b/arch/arm/mach-omap2/omap_l3_noc.c
index c8b1bef92e5a..6a66aa5e2a5b 100644
--- a/arch/arm/mach-omap2/omap_l3_noc.c
+++ b/arch/arm/mach-omap2/omap_l3_noc.c
@@ -20,6 +20,7 @@
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
21 * USA 21 * USA
22 */ 22 */
23#include <linux/module.h>
23#include <linux/init.h> 24#include <linux/init.h>
24#include <linux/io.h> 25#include <linux/io.h>
25#include <linux/platform_device.h> 26#include <linux/platform_device.h>
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index c8cbd00a41af..efa66494c1e3 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -99,31 +99,27 @@ static void omap3_enable_io_chain(void)
99{ 99{
100 int timeout = 0; 100 int timeout = 0;
101 101
102 if (omap_rev() >= OMAP3430_REV_ES3_1) { 102 omap2_prm_set_mod_reg_bits(OMAP3430_EN_IO_CHAIN_MASK, WKUP_MOD,
103 omap2_prm_set_mod_reg_bits(OMAP3430_EN_IO_CHAIN_MASK, WKUP_MOD, 103 PM_WKEN);
104 PM_WKEN); 104 /* Do a readback to assure write has been done */
105 /* Do a readback to assure write has been done */ 105 omap2_prm_read_mod_reg(WKUP_MOD, PM_WKEN);
106 omap2_prm_read_mod_reg(WKUP_MOD, PM_WKEN); 106
107 107 while (!(omap2_prm_read_mod_reg(WKUP_MOD, PM_WKEN) &
108 while (!(omap2_prm_read_mod_reg(WKUP_MOD, PM_WKEN) & 108 OMAP3430_ST_IO_CHAIN_MASK)) {
109 OMAP3430_ST_IO_CHAIN_MASK)) { 109 timeout++;
110 timeout++; 110 if (timeout > 1000) {
111 if (timeout > 1000) { 111 pr_err("Wake up daisy chain activation failed.\n");
112 printk(KERN_ERR "Wake up daisy chain " 112 return;
113 "activation failed.\n");
114 return;
115 }
116 omap2_prm_set_mod_reg_bits(OMAP3430_ST_IO_CHAIN_MASK,
117 WKUP_MOD, PM_WKEN);
118 } 113 }
114 omap2_prm_set_mod_reg_bits(OMAP3430_ST_IO_CHAIN_MASK,
115 WKUP_MOD, PM_WKEN);
119 } 116 }
120} 117}
121 118
122static void omap3_disable_io_chain(void) 119static void omap3_disable_io_chain(void)
123{ 120{
124 if (omap_rev() >= OMAP3430_REV_ES3_1) 121 omap2_prm_clear_mod_reg_bits(OMAP3430_EN_IO_CHAIN_MASK, WKUP_MOD,
125 omap2_prm_clear_mod_reg_bits(OMAP3430_EN_IO_CHAIN_MASK, WKUP_MOD, 122 PM_WKEN);
126 PM_WKEN);
127} 123}
128 124
129static void omap3_core_save_context(void) 125static void omap3_core_save_context(void)
@@ -363,7 +359,6 @@ void omap_sram_idle(void)
363 printk(KERN_ERR "Invalid mpu state in sram_idle\n"); 359 printk(KERN_ERR "Invalid mpu state in sram_idle\n");
364 return; 360 return;
365 } 361 }
366 pwrdm_pre_transition();
367 362
368 /* NEON control */ 363 /* NEON control */
369 if (pwrdm_read_pwrst(neon_pwrdm) == PWRDM_POWER_ON) 364 if (pwrdm_read_pwrst(neon_pwrdm) == PWRDM_POWER_ON)
@@ -376,7 +371,8 @@ void omap_sram_idle(void)
376 (per_next_state < PWRDM_POWER_ON || 371 (per_next_state < PWRDM_POWER_ON ||
377 core_next_state < PWRDM_POWER_ON)) { 372 core_next_state < PWRDM_POWER_ON)) {
378 omap2_prm_set_mod_reg_bits(OMAP3430_EN_IO_MASK, WKUP_MOD, PM_WKEN); 373 omap2_prm_set_mod_reg_bits(OMAP3430_EN_IO_MASK, WKUP_MOD, PM_WKEN);
379 omap3_enable_io_chain(); 374 if (omap3_has_io_chain_ctrl())
375 omap3_enable_io_chain();
380 } 376 }
381 377
382 /* Block console output in case it is on one of the OMAP UARTs */ 378 /* Block console output in case it is on one of the OMAP UARTs */
@@ -386,6 +382,8 @@ void omap_sram_idle(void)
386 if (!console_trylock()) 382 if (!console_trylock())
387 goto console_still_active; 383 goto console_still_active;
388 384
385 pwrdm_pre_transition();
386
389 /* PER */ 387 /* PER */
390 if (per_next_state < PWRDM_POWER_ON) { 388 if (per_next_state < PWRDM_POWER_ON) {
391 per_going_off = (per_next_state == PWRDM_POWER_OFF) ? 1 : 0; 389 per_going_off = (per_next_state == PWRDM_POWER_OFF) ? 1 : 0;
@@ -409,13 +407,14 @@ void omap_sram_idle(void)
409 omap3_intc_prepare_idle(); 407 omap3_intc_prepare_idle();
410 408
411 /* 409 /*
412 * On EMU/HS devices ROM code restores a SRDC value 410 * On EMU/HS devices ROM code restores a SRDC value
413 * from scratchpad which has automatic self refresh on timeout 411 * from scratchpad which has automatic self refresh on timeout
414 * of AUTO_CNT = 1 enabled. This takes care of erratum ID i443. 412 * of AUTO_CNT = 1 enabled. This takes care of erratum ID i443.
415 * Hence store/restore the SDRC_POWER register here. 413 * Hence store/restore the SDRC_POWER register here.
416 */ 414 */
417 if (omap_rev() >= OMAP3430_REV_ES3_0 && 415 if (cpu_is_omap3430() && omap_rev() >= OMAP3430_REV_ES3_0 &&
418 omap_type() != OMAP2_DEVICE_TYPE_GP && 416 (omap_type() == OMAP2_DEVICE_TYPE_EMU ||
417 omap_type() == OMAP2_DEVICE_TYPE_SEC) &&
419 core_next_state == PWRDM_POWER_OFF) 418 core_next_state == PWRDM_POWER_OFF)
420 sdrc_pwr = sdrc_read_reg(SDRC_POWER); 419 sdrc_pwr = sdrc_read_reg(SDRC_POWER);
421 420
@@ -432,8 +431,9 @@ void omap_sram_idle(void)
432 omap34xx_do_sram_idle(save_state); 431 omap34xx_do_sram_idle(save_state);
433 432
434 /* Restore normal SDRC POWER settings */ 433 /* Restore normal SDRC POWER settings */
435 if (omap_rev() >= OMAP3430_REV_ES3_0 && 434 if (cpu_is_omap3430() && omap_rev() >= OMAP3430_REV_ES3_0 &&
436 omap_type() != OMAP2_DEVICE_TYPE_GP && 435 (omap_type() == OMAP2_DEVICE_TYPE_EMU ||
436 omap_type() == OMAP2_DEVICE_TYPE_SEC) &&
437 core_next_state == PWRDM_POWER_OFF) 437 core_next_state == PWRDM_POWER_OFF)
438 sdrc_write_reg(sdrc_pwr, SDRC_POWER); 438 sdrc_write_reg(sdrc_pwr, SDRC_POWER);
439 439
@@ -455,6 +455,8 @@ void omap_sram_idle(void)
455 } 455 }
456 omap3_intc_resume_idle(); 456 omap3_intc_resume_idle();
457 457
458 pwrdm_post_transition();
459
458 /* PER */ 460 /* PER */
459 if (per_next_state < PWRDM_POWER_ON) { 461 if (per_next_state < PWRDM_POWER_ON) {
460 per_prev_state = pwrdm_read_prev_pwrst(per_pwrdm); 462 per_prev_state = pwrdm_read_prev_pwrst(per_pwrdm);
@@ -475,11 +477,10 @@ console_still_active:
475 core_next_state < PWRDM_POWER_ON)) { 477 core_next_state < PWRDM_POWER_ON)) {
476 omap2_prm_clear_mod_reg_bits(OMAP3430_EN_IO_MASK, WKUP_MOD, 478 omap2_prm_clear_mod_reg_bits(OMAP3430_EN_IO_MASK, WKUP_MOD,
477 PM_WKEN); 479 PM_WKEN);
478 omap3_disable_io_chain(); 480 if (omap3_has_io_chain_ctrl())
481 omap3_disable_io_chain();
479 } 482 }
480 483
481 pwrdm_post_transition();
482
483 clkdm_allow_idle(mpu_pwrdm->pwrdm_clkdms[0]); 484 clkdm_allow_idle(mpu_pwrdm->pwrdm_clkdms[0]);
484} 485}
485 486
@@ -870,6 +871,9 @@ static int __init omap3_pm_init(void)
870 if (!cpu_is_omap34xx()) 871 if (!cpu_is_omap34xx())
871 return -ENODEV; 872 return -ENODEV;
872 873
874 if (!omap3_has_io_chain_ctrl())
875 pr_warning("PM: no software I/O chain control; some wakeups may be lost\n");
876
873 pm_errata_configure(); 877 pm_errata_configure();
874 878
875 /* XXX prcm_setup_regs needs to be before enabling hw 879 /* XXX prcm_setup_regs needs to be before enabling hw
diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c
index 5164d587ef52..8a18d1bd61c8 100644
--- a/arch/arm/mach-omap2/powerdomain.c
+++ b/arch/arm/mach-omap2/powerdomain.c
@@ -1002,16 +1002,16 @@ int pwrdm_post_transition(void)
1002 * @pwrdm: struct powerdomain * to wait for 1002 * @pwrdm: struct powerdomain * to wait for
1003 * 1003 *
1004 * Context loss count is the sum of powerdomain off-mode counter, the 1004 * Context loss count is the sum of powerdomain off-mode counter, the
1005 * logic off counter and the per-bank memory off counter. Returns 0 1005 * logic off counter and the per-bank memory off counter. Returns negative
1006 * (and WARNs) upon error, otherwise, returns the context loss count. 1006 * (and WARNs) upon error, otherwise, returns the context loss count.
1007 */ 1007 */
1008u32 pwrdm_get_context_loss_count(struct powerdomain *pwrdm) 1008int pwrdm_get_context_loss_count(struct powerdomain *pwrdm)
1009{ 1009{
1010 int i, count; 1010 int i, count;
1011 1011
1012 if (!pwrdm) { 1012 if (!pwrdm) {
1013 WARN(1, "powerdomain: %s: pwrdm is null\n", __func__); 1013 WARN(1, "powerdomain: %s: pwrdm is null\n", __func__);
1014 return 0; 1014 return -ENODEV;
1015 } 1015 }
1016 1016
1017 count = pwrdm->state_counter[PWRDM_POWER_OFF]; 1017 count = pwrdm->state_counter[PWRDM_POWER_OFF];
@@ -1020,7 +1020,13 @@ u32 pwrdm_get_context_loss_count(struct powerdomain *pwrdm)
1020 for (i = 0; i < pwrdm->banks; i++) 1020 for (i = 0; i < pwrdm->banks; i++)
1021 count += pwrdm->ret_mem_off_counter[i]; 1021 count += pwrdm->ret_mem_off_counter[i];
1022 1022
1023 pr_debug("powerdomain: %s: context loss count = %u\n", 1023 /*
1024 * Context loss count has to be a non-negative value. Clear the sign
1025 * bit to get a value range from 0 to INT_MAX.
1026 */
1027 count &= INT_MAX;
1028
1029 pr_debug("powerdomain: %s: context loss count = %d\n",
1024 pwrdm->name, count); 1030 pwrdm->name, count);
1025 1031
1026 return count; 1032 return count;
diff --git a/arch/arm/mach-omap2/powerdomain.h b/arch/arm/mach-omap2/powerdomain.h
index 42e6dd8f2a78..0d72a8a8ce4d 100644
--- a/arch/arm/mach-omap2/powerdomain.h
+++ b/arch/arm/mach-omap2/powerdomain.h
@@ -217,7 +217,7 @@ int pwrdm_clkdm_state_switch(struct clockdomain *clkdm);
217int pwrdm_pre_transition(void); 217int pwrdm_pre_transition(void);
218int pwrdm_post_transition(void); 218int pwrdm_post_transition(void);
219int pwrdm_set_lowpwrstchange(struct powerdomain *pwrdm); 219int pwrdm_set_lowpwrstchange(struct powerdomain *pwrdm);
220u32 pwrdm_get_context_loss_count(struct powerdomain *pwrdm); 220int pwrdm_get_context_loss_count(struct powerdomain *pwrdm);
221bool pwrdm_can_ever_lose_context(struct powerdomain *pwrdm); 221bool pwrdm_can_ever_lose_context(struct powerdomain *pwrdm);
222 222
223extern void omap242x_powerdomains_init(void); 223extern void omap242x_powerdomains_init(void);
diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c
index 0347b93211e6..6a4f6839a7d9 100644
--- a/arch/arm/mach-omap2/smartreflex.c
+++ b/arch/arm/mach-omap2/smartreflex.c
@@ -17,6 +17,7 @@
17 * published by the Free Software Foundation. 17 * published by the Free Software Foundation.
18 */ 18 */
19 19
20#include <linux/module.h>
20#include <linux/interrupt.h> 21#include <linux/interrupt.h>
21#include <linux/clk.h> 22#include <linux/clk.h>
22#include <linux/io.h> 23#include <linux/io.h>
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index e49fc7be2229..037b0d7d4e05 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -408,14 +408,6 @@ static int omap2_dm_timer_set_src(struct platform_device *pdev, int source)
408 return ret; 408 return ret;
409} 409}
410 410
411struct omap_device_pm_latency omap2_dmtimer_latency[] = {
412 {
413 .deactivate_func = omap_device_idle_hwmods,
414 .activate_func = omap_device_enable_hwmods,
415 .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
416 },
417};
418
419/** 411/**
420 * omap_timer_init - build and register timer device with an 412 * omap_timer_init - build and register timer device with an
421 * associated timer hwmod 413 * associated timer hwmod
@@ -477,9 +469,7 @@ static int __init omap_timer_init(struct omap_hwmod *oh, void *unused)
477 pdata->get_context_loss_count = omap_pm_get_dev_context_loss_count; 469 pdata->get_context_loss_count = omap_pm_get_dev_context_loss_count;
478#endif 470#endif
479 pdev = omap_device_build(name, id, oh, pdata, sizeof(*pdata), 471 pdev = omap_device_build(name, id, oh, pdata, sizeof(*pdata),
480 omap2_dmtimer_latency, 472 NULL, 0, 0);
481 ARRAY_SIZE(omap2_dmtimer_latency),
482 0);
483 473
484 if (IS_ERR(pdev)) { 474 if (IS_ERR(pdev)) {
485 pr_err("%s: Can't build omap_device for %s: %s.\n", 475 pr_err("%s: Can't build omap_device for %s: %s.\n",
diff --git a/arch/arm/mach-omap2/usb-musb.c b/arch/arm/mach-omap2/usb-musb.c
index 47fb5d607630..267975086a7b 100644
--- a/arch/arm/mach-omap2/usb-musb.c
+++ b/arch/arm/mach-omap2/usb-musb.c
@@ -60,44 +60,6 @@ static struct musb_hdrc_platform_data musb_plat = {
60 60
61static u64 musb_dmamask = DMA_BIT_MASK(32); 61static u64 musb_dmamask = DMA_BIT_MASK(32);
62 62
63static void usb_musb_mux_init(struct omap_musb_board_data *board_data)
64{
65 switch (board_data->interface_type) {
66 case MUSB_INTERFACE_UTMI:
67 omap_mux_init_signal("usba0_otg_dp", OMAP_PIN_INPUT);
68 omap_mux_init_signal("usba0_otg_dm", OMAP_PIN_INPUT);
69 break;
70 case MUSB_INTERFACE_ULPI:
71 omap_mux_init_signal("usba0_ulpiphy_clk",
72 OMAP_PIN_INPUT_PULLDOWN);
73 omap_mux_init_signal("usba0_ulpiphy_stp",
74 OMAP_PIN_INPUT_PULLDOWN);
75 omap_mux_init_signal("usba0_ulpiphy_dir",
76 OMAP_PIN_INPUT_PULLDOWN);
77 omap_mux_init_signal("usba0_ulpiphy_nxt",
78 OMAP_PIN_INPUT_PULLDOWN);
79 omap_mux_init_signal("usba0_ulpiphy_dat0",
80 OMAP_PIN_INPUT_PULLDOWN);
81 omap_mux_init_signal("usba0_ulpiphy_dat1",
82 OMAP_PIN_INPUT_PULLDOWN);
83 omap_mux_init_signal("usba0_ulpiphy_dat2",
84 OMAP_PIN_INPUT_PULLDOWN);
85 omap_mux_init_signal("usba0_ulpiphy_dat3",
86 OMAP_PIN_INPUT_PULLDOWN);
87 omap_mux_init_signal("usba0_ulpiphy_dat4",
88 OMAP_PIN_INPUT_PULLDOWN);
89 omap_mux_init_signal("usba0_ulpiphy_dat5",
90 OMAP_PIN_INPUT_PULLDOWN);
91 omap_mux_init_signal("usba0_ulpiphy_dat6",
92 OMAP_PIN_INPUT_PULLDOWN);
93 omap_mux_init_signal("usba0_ulpiphy_dat7",
94 OMAP_PIN_INPUT_PULLDOWN);
95 break;
96 default:
97 break;
98 }
99}
100
101static struct omap_musb_board_data musb_default_board_data = { 63static struct omap_musb_board_data musb_default_board_data = {
102 .interface_type = MUSB_INTERFACE_ULPI, 64 .interface_type = MUSB_INTERFACE_ULPI,
103 .mode = MUSB_OTG, 65 .mode = MUSB_OTG,
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-28 21:43:36 -0500