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-rw-r--r--arch/arm/mach-omap2/board-apollon.c64
-rw-r--r--arch/arm/mach-omap2/board-ldp.c2
-rw-r--r--arch/arm/mach-omap2/board-omap3beagle.c9
-rw-r--r--arch/arm/mach-omap2/devices.c11
-rw-r--r--arch/arm/mach-omap2/id.c6
-rw-r--r--arch/arm/mach-omap2/irq.c1
-rw-r--r--arch/arm/mach-omap2/mcbsp.c146
-rw-r--r--arch/arm/mach-omap2/sleep24xx.S3
-rw-r--r--arch/arm/mach-omap2/timer-gp.c3
9 files changed, 54 insertions, 191 deletions
diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c
index bf1e5d32c2a3..0a7b24ba1652 100644
--- a/arch/arm/mach-omap2/board-apollon.c
+++ b/arch/arm/mach-omap2/board-apollon.c
@@ -22,8 +22,6 @@
22#include <linux/mtd/mtd.h> 22#include <linux/mtd/mtd.h>
23#include <linux/mtd/partitions.h> 23#include <linux/mtd/partitions.h>
24#include <linux/mtd/onenand.h> 24#include <linux/mtd/onenand.h>
25#include <linux/irq.h>
26#include <linux/interrupt.h>
27#include <linux/delay.h> 25#include <linux/delay.h>
28#include <linux/leds.h> 26#include <linux/leds.h>
29#include <linux/err.h> 27#include <linux/err.h>
@@ -282,65 +280,16 @@ static void __init apollon_led_init(void)
282{ 280{
283 /* LED0 - AA10 */ 281 /* LED0 - AA10 */
284 omap_cfg_reg(AA10_242X_GPIO13); 282 omap_cfg_reg(AA10_242X_GPIO13);
285 omap_request_gpio(LED0_GPIO13); 283 gpio_request(LED0_GPIO13, "LED0");
286 omap_set_gpio_direction(LED0_GPIO13, 0); 284 gpio_direction_output(LED0_GPIO13, 0);
287 omap_set_gpio_dataout(LED0_GPIO13, 0);
288 /* LED1 - AA6 */ 285 /* LED1 - AA6 */
289 omap_cfg_reg(AA6_242X_GPIO14); 286 omap_cfg_reg(AA6_242X_GPIO14);
290 omap_request_gpio(LED1_GPIO14); 287 gpio_request(LED1_GPIO14, "LED1");
291 omap_set_gpio_direction(LED1_GPIO14, 0); 288 gpio_direction_output(LED1_GPIO14, 0);
292 omap_set_gpio_dataout(LED1_GPIO14, 0);
293 /* LED2 - AA4 */ 289 /* LED2 - AA4 */
294 omap_cfg_reg(AA4_242X_GPIO15); 290 omap_cfg_reg(AA4_242X_GPIO15);
295 omap_request_gpio(LED2_GPIO15); 291 gpio_request(LED2_GPIO15, "LED2");
296 omap_set_gpio_direction(LED2_GPIO15, 0); 292 gpio_direction_output(LED2_GPIO15, 0);
297 omap_set_gpio_dataout(LED2_GPIO15, 0);
298}
299
300static irqreturn_t apollon_sw_interrupt(int irq, void *ignored)
301{
302 static unsigned int led0, led1, led2;
303
304 if (irq == OMAP_GPIO_IRQ(SW_ENTER_GPIO16))
305 omap_set_gpio_dataout(LED0_GPIO13, led0 ^= 1);
306 else if (irq == OMAP_GPIO_IRQ(SW_UP_GPIO17))
307 omap_set_gpio_dataout(LED1_GPIO14, led1 ^= 1);
308 else if (irq == OMAP_GPIO_IRQ(SW_DOWN_GPIO58))
309 omap_set_gpio_dataout(LED2_GPIO15, led2 ^= 1);
310
311 return IRQ_HANDLED;
312}
313
314static void __init apollon_sw_init(void)
315{
316 /* Enter SW - Y11 */
317 omap_cfg_reg(Y11_242X_GPIO16);
318 omap_request_gpio(SW_ENTER_GPIO16);
319 gpio_direction_input(SW_ENTER_GPIO16);
320 /* Up SW - AA12 */
321 omap_cfg_reg(AA12_242X_GPIO17);
322 omap_request_gpio(SW_UP_GPIO17);
323 gpio_direction_input(SW_UP_GPIO17);
324 /* Down SW - AA8 */
325 omap_cfg_reg(AA8_242X_GPIO58);
326 omap_request_gpio(SW_DOWN_GPIO58);
327 gpio_direction_input(SW_DOWN_GPIO58);
328
329 set_irq_type(OMAP_GPIO_IRQ(SW_ENTER_GPIO16), IRQ_TYPE_EDGE_RISING);
330 if (request_irq(OMAP_GPIO_IRQ(SW_ENTER_GPIO16), &apollon_sw_interrupt,
331 IRQF_SHARED, "enter sw",
332 &apollon_sw_interrupt))
333 return;
334 set_irq_type(OMAP_GPIO_IRQ(SW_UP_GPIO17), IRQ_TYPE_EDGE_RISING);
335 if (request_irq(OMAP_GPIO_IRQ(SW_UP_GPIO17), &apollon_sw_interrupt,
336 IRQF_SHARED, "up sw",
337 &apollon_sw_interrupt))
338 return;
339 set_irq_type(OMAP_GPIO_IRQ(SW_DOWN_GPIO58), IRQ_TYPE_EDGE_RISING);
340 if (request_irq(OMAP_GPIO_IRQ(SW_DOWN_GPIO58), &apollon_sw_interrupt,
341 IRQF_SHARED, "down sw",
342 &apollon_sw_interrupt))
343 return;
344} 293}
345 294
346static void __init apollon_usb_init(void) 295static void __init apollon_usb_init(void)
@@ -357,7 +306,6 @@ static void __init omap_apollon_init(void)
357 u32 v; 306 u32 v;
358 307
359 apollon_led_init(); 308 apollon_led_init();
360 apollon_sw_init();
361 apollon_flash_init(); 309 apollon_flash_init();
362 apollon_usb_init(); 310 apollon_usb_init();
363 311
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c
index aa6972781e4a..f6a13451d1fd 100644
--- a/arch/arm/mach-omap2/board-ldp.c
+++ b/arch/arm/mach-omap2/board-ldp.c
@@ -88,7 +88,7 @@ static inline void __init ldp_init_smc911x(void)
88 88
89 ldp_smc911x_resources[1].start = OMAP_GPIO_IRQ(eth_gpio); 89 ldp_smc911x_resources[1].start = OMAP_GPIO_IRQ(eth_gpio);
90 90
91 if (omap_request_gpio(eth_gpio) < 0) { 91 if (gpio_request(eth_gpio, "smc911x irq") < 0) {
92 printk(KERN_ERR "Failed to request GPIO%d for smc911x IRQ\n", 92 printk(KERN_ERR "Failed to request GPIO%d for smc911x IRQ\n",
93 eth_gpio); 93 eth_gpio);
94 return; 94 return;
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
index 9e5ada01b5fa..38c88fbe658d 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -28,6 +28,8 @@
28#include <linux/mtd/partitions.h> 28#include <linux/mtd/partitions.h>
29#include <linux/mtd/nand.h> 29#include <linux/mtd/nand.h>
30 30
31#include <linux/i2c/twl4030.h>
32
31#include <mach/hardware.h> 33#include <mach/hardware.h>
32#include <asm/mach-types.h> 34#include <asm/mach-types.h>
33#include <asm/mach/arch.h> 35#include <asm/mach/arch.h>
@@ -120,6 +122,9 @@ static int beagle_twl_gpio_setup(struct device *dev,
120 unsigned gpio, unsigned ngpio) 122 unsigned gpio, unsigned ngpio)
121{ 123{
122 /* gpio + 0 is "mmc0_cd" (input/IRQ) */ 124 /* gpio + 0 is "mmc0_cd" (input/IRQ) */
125 omap_cfg_reg(AH8_34XX_GPIO29);
126 mmc[0].gpio_cd = gpio + 0;
127 twl4030_mmc_init(mmc);
123 128
124 /* REVISIT: need ehci-omap hooks for external VBUS 129 /* REVISIT: need ehci-omap hooks for external VBUS
125 * power switch and overcurrent detect 130 * power switch and overcurrent detect
@@ -304,10 +309,6 @@ static void __init omap3_beagle_init(void)
304 omap_board_config_size = ARRAY_SIZE(omap3_beagle_config); 309 omap_board_config_size = ARRAY_SIZE(omap3_beagle_config);
305 omap_serial_init(); 310 omap_serial_init();
306 311
307 omap_cfg_reg(AH8_34XX_GPIO29);
308 mmc[0].gpio_cd = gpio + 0;
309 twl4030_mmc_init(mmc);
310
311 omap_cfg_reg(J25_34XX_GPIO170); 312 omap_cfg_reg(J25_34XX_GPIO170);
312 gpio_request(170, "DVI_nPD"); 313 gpio_request(170, "DVI_nPD");
313 /* REVISIT leave DVI powered down until it's needed ... */ 314 /* REVISIT leave DVI powered down until it's needed ... */
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 9d7216ff6c9f..ce03fa750775 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -421,6 +421,7 @@ void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
421 int nr_controllers) 421 int nr_controllers)
422{ 422{
423 int i; 423 int i;
424 char *name;
424 425
425 for (i = 0; i < nr_controllers; i++) { 426 for (i = 0; i < nr_controllers; i++) {
426 unsigned long base, size; 427 unsigned long base, size;
@@ -450,12 +451,14 @@ void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
450 continue; 451 continue;
451 } 452 }
452 453
453 if (cpu_is_omap2420()) 454 if (cpu_is_omap2420()) {
454 size = OMAP2420_MMC_SIZE; 455 size = OMAP2420_MMC_SIZE;
455 else 456 name = "mmci-omap";
457 } else {
456 size = HSMMC_SIZE; 458 size = HSMMC_SIZE;
457 459 name = "mmci-omap-hs";
458 omap_mmc_add(i, base, size, irq, mmc_data[i]); 460 }
461 omap_mmc_add(name, i, base, size, irq, mmc_data[i]);
459 }; 462 };
460} 463}
461 464
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index b0f8e7d62798..b52a02fc7cd6 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -172,9 +172,13 @@ void __init omap34xx_check_revision(void)
172 omap_revision = OMAP3430_REV_ES3_0; 172 omap_revision = OMAP3430_REV_ES3_0;
173 rev_name = "ES3.0"; 173 rev_name = "ES3.0";
174 break; 174 break;
175 case 4:
176 omap_revision = OMAP3430_REV_ES3_1;
177 rev_name = "ES3.1";
178 break;
175 default: 179 default:
176 /* Use the latest known revision as default */ 180 /* Use the latest known revision as default */
177 omap_revision = OMAP3430_REV_ES3_0; 181 omap_revision = OMAP3430_REV_ES3_1;
178 rev_name = "Unknown revision\n"; 182 rev_name = "Unknown revision\n";
179 } 183 }
180 } 184 }
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index 636e2821af7d..9ba20d985dda 100644
--- a/arch/arm/mach-omap2/irq.c
+++ b/arch/arm/mach-omap2/irq.c
@@ -134,6 +134,7 @@ static struct irq_chip omap_irq_chip = {
134 .ack = omap_mask_ack_irq, 134 .ack = omap_mask_ack_irq,
135 .mask = omap_mask_irq, 135 .mask = omap_mask_irq,
136 .unmask = omap_unmask_irq, 136 .unmask = omap_unmask_irq,
137 .disable = omap_mask_irq,
137}; 138};
138 139
139static void __init omap_irq_bank_init_one(struct omap_irq_bank *bank) 140static void __init omap_irq_bank_init_one(struct omap_irq_bank *bank)
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c
index acdc709901cd..a9e631fc1134 100644
--- a/arch/arm/mach-omap2/mcbsp.c
+++ b/arch/arm/mach-omap2/mcbsp.c
@@ -17,112 +17,14 @@
17#include <linux/io.h> 17#include <linux/io.h>
18#include <linux/platform_device.h> 18#include <linux/platform_device.h>
19 19
20#include <mach/irqs.h>
20#include <mach/dma.h> 21#include <mach/dma.h>
21#include <mach/irqs.h> 22#include <mach/irqs.h>
22#include <mach/mux.h> 23#include <mach/mux.h>
23#include <mach/cpu.h> 24#include <mach/cpu.h>
24#include <mach/mcbsp.h> 25#include <mach/mcbsp.h>
25 26
26struct mcbsp_internal_clk { 27const char *clk_names[] = { "mcbsp_ick", "mcbsp_fck" };
27 struct clk clk;
28 struct clk **childs;
29 int n_childs;
30};
31
32#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
33static void omap_mcbsp_clk_init(struct mcbsp_internal_clk *mclk)
34{
35 const char *clk_names[] = { "mcbsp_ick", "mcbsp_fck" };
36 int i;
37
38 mclk->n_childs = ARRAY_SIZE(clk_names);
39 mclk->childs = kzalloc(mclk->n_childs * sizeof(struct clk *),
40 GFP_KERNEL);
41
42 for (i = 0; i < mclk->n_childs; i++) {
43 /* We fake a platform device to get correct device id */
44 struct platform_device pdev;
45
46 pdev.dev.bus = &platform_bus_type;
47 pdev.id = mclk->clk.id;
48 mclk->childs[i] = clk_get(&pdev.dev, clk_names[i]);
49 if (IS_ERR(mclk->childs[i]))
50 printk(KERN_ERR "Could not get clock %s (%d).\n",
51 clk_names[i], mclk->clk.id);
52 }
53}
54
55static int omap_mcbsp_clk_enable(struct clk *clk)
56{
57 struct mcbsp_internal_clk *mclk = container_of(clk,
58 struct mcbsp_internal_clk, clk);
59 int i;
60
61 for (i = 0; i < mclk->n_childs; i++)
62 clk_enable(mclk->childs[i]);
63 return 0;
64}
65
66static void omap_mcbsp_clk_disable(struct clk *clk)
67{
68 struct mcbsp_internal_clk *mclk = container_of(clk,
69 struct mcbsp_internal_clk, clk);
70 int i;
71
72 for (i = 0; i < mclk->n_childs; i++)
73 clk_disable(mclk->childs[i]);
74}
75
76static struct mcbsp_internal_clk omap_mcbsp_clks[] = {
77 {
78 .clk = {
79 .name = "mcbsp_clk",
80 .id = 1,
81 .enable = omap_mcbsp_clk_enable,
82 .disable = omap_mcbsp_clk_disable,
83 },
84 },
85 {
86 .clk = {
87 .name = "mcbsp_clk",
88 .id = 2,
89 .enable = omap_mcbsp_clk_enable,
90 .disable = omap_mcbsp_clk_disable,
91 },
92 },
93 {
94 .clk = {
95 .name = "mcbsp_clk",
96 .id = 3,
97 .enable = omap_mcbsp_clk_enable,
98 .disable = omap_mcbsp_clk_disable,
99 },
100 },
101 {
102 .clk = {
103 .name = "mcbsp_clk",
104 .id = 4,
105 .enable = omap_mcbsp_clk_enable,
106 .disable = omap_mcbsp_clk_disable,
107 },
108 },
109 {
110 .clk = {
111 .name = "mcbsp_clk",
112 .id = 5,
113 .enable = omap_mcbsp_clk_enable,
114 .disable = omap_mcbsp_clk_disable,
115 },
116 },
117};
118
119#define omap_mcbsp_clks_size ARRAY_SIZE(omap_mcbsp_clks)
120#else
121#define omap_mcbsp_clks_size 0
122static struct mcbsp_internal_clk __initdata *omap_mcbsp_clks;
123static inline void omap_mcbsp_clk_init(struct clk *clk)
124{ }
125#endif
126 28
127static void omap2_mcbsp2_mux_setup(void) 29static void omap2_mcbsp2_mux_setup(void)
128{ 30{
@@ -155,7 +57,8 @@ static struct omap_mcbsp_platform_data omap2420_mcbsp_pdata[] = {
155 .rx_irq = INT_24XX_MCBSP1_IRQ_RX, 57 .rx_irq = INT_24XX_MCBSP1_IRQ_RX,
156 .tx_irq = INT_24XX_MCBSP1_IRQ_TX, 58 .tx_irq = INT_24XX_MCBSP1_IRQ_TX,
157 .ops = &omap2_mcbsp_ops, 59 .ops = &omap2_mcbsp_ops,
158 .clk_name = "mcbsp_clk", 60 .clk_names = clk_names,
61 .num_clks = 2,
159 }, 62 },
160 { 63 {
161 .phys_base = OMAP24XX_MCBSP2_BASE, 64 .phys_base = OMAP24XX_MCBSP2_BASE,
@@ -164,7 +67,8 @@ static struct omap_mcbsp_platform_data omap2420_mcbsp_pdata[] = {
164 .rx_irq = INT_24XX_MCBSP2_IRQ_RX, 67 .rx_irq = INT_24XX_MCBSP2_IRQ_RX,
165 .tx_irq = INT_24XX_MCBSP2_IRQ_TX, 68 .tx_irq = INT_24XX_MCBSP2_IRQ_TX,
166 .ops = &omap2_mcbsp_ops, 69 .ops = &omap2_mcbsp_ops,
167 .clk_name = "mcbsp_clk", 70 .clk_names = clk_names,
71 .num_clks = 2,
168 }, 72 },
169}; 73};
170#define OMAP2420_MCBSP_PDATA_SZ ARRAY_SIZE(omap2420_mcbsp_pdata) 74#define OMAP2420_MCBSP_PDATA_SZ ARRAY_SIZE(omap2420_mcbsp_pdata)
@@ -182,7 +86,8 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = {
182 .rx_irq = INT_24XX_MCBSP1_IRQ_RX, 86 .rx_irq = INT_24XX_MCBSP1_IRQ_RX,
183 .tx_irq = INT_24XX_MCBSP1_IRQ_TX, 87 .tx_irq = INT_24XX_MCBSP1_IRQ_TX,
184 .ops = &omap2_mcbsp_ops, 88 .ops = &omap2_mcbsp_ops,
185 .clk_name = "mcbsp_clk", 89 .clk_names = clk_names,
90 .num_clks = 2,
186 }, 91 },
187 { 92 {
188 .phys_base = OMAP24XX_MCBSP2_BASE, 93 .phys_base = OMAP24XX_MCBSP2_BASE,
@@ -191,7 +96,8 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = {
191 .rx_irq = INT_24XX_MCBSP2_IRQ_RX, 96 .rx_irq = INT_24XX_MCBSP2_IRQ_RX,
192 .tx_irq = INT_24XX_MCBSP2_IRQ_TX, 97 .tx_irq = INT_24XX_MCBSP2_IRQ_TX,
193 .ops = &omap2_mcbsp_ops, 98 .ops = &omap2_mcbsp_ops,
194 .clk_name = "mcbsp_clk", 99 .clk_names = clk_names,
100 .num_clks = 2,
195 }, 101 },
196 { 102 {
197 .phys_base = OMAP2430_MCBSP3_BASE, 103 .phys_base = OMAP2430_MCBSP3_BASE,
@@ -200,7 +106,8 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = {
200 .rx_irq = INT_24XX_MCBSP3_IRQ_RX, 106 .rx_irq = INT_24XX_MCBSP3_IRQ_RX,
201 .tx_irq = INT_24XX_MCBSP3_IRQ_TX, 107 .tx_irq = INT_24XX_MCBSP3_IRQ_TX,
202 .ops = &omap2_mcbsp_ops, 108 .ops = &omap2_mcbsp_ops,
203 .clk_name = "mcbsp_clk", 109 .clk_names = clk_names,
110 .num_clks = 2,
204 }, 111 },
205 { 112 {
206 .phys_base = OMAP2430_MCBSP4_BASE, 113 .phys_base = OMAP2430_MCBSP4_BASE,
@@ -209,7 +116,8 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = {
209 .rx_irq = INT_24XX_MCBSP4_IRQ_RX, 116 .rx_irq = INT_24XX_MCBSP4_IRQ_RX,
210 .tx_irq = INT_24XX_MCBSP4_IRQ_TX, 117 .tx_irq = INT_24XX_MCBSP4_IRQ_TX,
211 .ops = &omap2_mcbsp_ops, 118 .ops = &omap2_mcbsp_ops,
212 .clk_name = "mcbsp_clk", 119 .clk_names = clk_names,
120 .num_clks = 2,
213 }, 121 },
214 { 122 {
215 .phys_base = OMAP2430_MCBSP5_BASE, 123 .phys_base = OMAP2430_MCBSP5_BASE,
@@ -218,7 +126,8 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = {
218 .rx_irq = INT_24XX_MCBSP5_IRQ_RX, 126 .rx_irq = INT_24XX_MCBSP5_IRQ_RX,
219 .tx_irq = INT_24XX_MCBSP5_IRQ_TX, 127 .tx_irq = INT_24XX_MCBSP5_IRQ_TX,
220 .ops = &omap2_mcbsp_ops, 128 .ops = &omap2_mcbsp_ops,
221 .clk_name = "mcbsp_clk", 129 .clk_names = clk_names,
130 .num_clks = 2,
222 }, 131 },
223}; 132};
224#define OMAP2430_MCBSP_PDATA_SZ ARRAY_SIZE(omap2430_mcbsp_pdata) 133#define OMAP2430_MCBSP_PDATA_SZ ARRAY_SIZE(omap2430_mcbsp_pdata)
@@ -236,7 +145,8 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
236 .rx_irq = INT_24XX_MCBSP1_IRQ_RX, 145 .rx_irq = INT_24XX_MCBSP1_IRQ_RX,
237 .tx_irq = INT_24XX_MCBSP1_IRQ_TX, 146 .tx_irq = INT_24XX_MCBSP1_IRQ_TX,
238 .ops = &omap2_mcbsp_ops, 147 .ops = &omap2_mcbsp_ops,
239 .clk_name = "mcbsp_clk", 148 .clk_names = clk_names,
149 .num_clks = 2,
240 }, 150 },
241 { 151 {
242 .phys_base = OMAP34XX_MCBSP2_BASE, 152 .phys_base = OMAP34XX_MCBSP2_BASE,
@@ -245,7 +155,8 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
245 .rx_irq = INT_24XX_MCBSP2_IRQ_RX, 155 .rx_irq = INT_24XX_MCBSP2_IRQ_RX,
246 .tx_irq = INT_24XX_MCBSP2_IRQ_TX, 156 .tx_irq = INT_24XX_MCBSP2_IRQ_TX,
247 .ops = &omap2_mcbsp_ops, 157 .ops = &omap2_mcbsp_ops,
248 .clk_name = "mcbsp_clk", 158 .clk_names = clk_names,
159 .num_clks = 2,
249 }, 160 },
250 { 161 {
251 .phys_base = OMAP34XX_MCBSP3_BASE, 162 .phys_base = OMAP34XX_MCBSP3_BASE,
@@ -254,7 +165,8 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
254 .rx_irq = INT_24XX_MCBSP3_IRQ_RX, 165 .rx_irq = INT_24XX_MCBSP3_IRQ_RX,
255 .tx_irq = INT_24XX_MCBSP3_IRQ_TX, 166 .tx_irq = INT_24XX_MCBSP3_IRQ_TX,
256 .ops = &omap2_mcbsp_ops, 167 .ops = &omap2_mcbsp_ops,
257 .clk_name = "mcbsp_clk", 168 .clk_names = clk_names,
169 .num_clks = 2,
258 }, 170 },
259 { 171 {
260 .phys_base = OMAP34XX_MCBSP4_BASE, 172 .phys_base = OMAP34XX_MCBSP4_BASE,
@@ -263,7 +175,8 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
263 .rx_irq = INT_24XX_MCBSP4_IRQ_RX, 175 .rx_irq = INT_24XX_MCBSP4_IRQ_RX,
264 .tx_irq = INT_24XX_MCBSP4_IRQ_TX, 176 .tx_irq = INT_24XX_MCBSP4_IRQ_TX,
265 .ops = &omap2_mcbsp_ops, 177 .ops = &omap2_mcbsp_ops,
266 .clk_name = "mcbsp_clk", 178 .clk_names = clk_names,
179 .num_clks = 2,
267 }, 180 },
268 { 181 {
269 .phys_base = OMAP34XX_MCBSP5_BASE, 182 .phys_base = OMAP34XX_MCBSP5_BASE,
@@ -272,7 +185,8 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
272 .rx_irq = INT_24XX_MCBSP5_IRQ_RX, 185 .rx_irq = INT_24XX_MCBSP5_IRQ_RX,
273 .tx_irq = INT_24XX_MCBSP5_IRQ_TX, 186 .tx_irq = INT_24XX_MCBSP5_IRQ_TX,
274 .ops = &omap2_mcbsp_ops, 187 .ops = &omap2_mcbsp_ops,
275 .clk_name = "mcbsp_clk", 188 .clk_names = clk_names,
189 .num_clks = 2,
276 }, 190 },
277}; 191};
278#define OMAP34XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap34xx_mcbsp_pdata) 192#define OMAP34XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap34xx_mcbsp_pdata)
@@ -283,14 +197,6 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
283 197
284static int __init omap2_mcbsp_init(void) 198static int __init omap2_mcbsp_init(void)
285{ 199{
286 int i;
287
288 for (i = 0; i < omap_mcbsp_clks_size; i++) {
289 /* Once we call clk_get inside init, we do not register it */
290 omap_mcbsp_clk_init(&omap_mcbsp_clks[i]);
291 clk_register(&omap_mcbsp_clks[i].clk);
292 }
293
294 if (cpu_is_omap2420()) 200 if (cpu_is_omap2420())
295 omap_mcbsp_count = OMAP2420_MCBSP_PDATA_SZ; 201 omap_mcbsp_count = OMAP2420_MCBSP_PDATA_SZ;
296 if (cpu_is_omap2430()) 202 if (cpu_is_omap2430())
diff --git a/arch/arm/mach-omap2/sleep24xx.S b/arch/arm/mach-omap2/sleep24xx.S
index 43336b93b21c..bf9e96105e11 100644
--- a/arch/arm/mach-omap2/sleep24xx.S
+++ b/arch/arm/mach-omap2/sleep24xx.S
@@ -93,9 +93,8 @@ ENTRY(omap24xx_cpu_suspend)
93 orr r4, r4, #0x40 @ enable self refresh on idle req 93 orr r4, r4, #0x40 @ enable self refresh on idle req
94 mov r5, #0x2000 @ set delay (DPLL relock + DLL relock) 94 mov r5, #0x2000 @ set delay (DPLL relock + DLL relock)
95 str r4, [r2] @ make it so 95 str r4, [r2] @ make it so
96 mov r2, #0
97 nop 96 nop
98 mcr p15, 0, r2, c7, c0, 4 @ wait for interrupt 97 mcr p15, 0, r3, c7, c0, 4 @ wait for interrupt
99 nop 98 nop
100loop: 99loop:
101 subs r5, r5, #0x1 @ awake, wait just a bit 100 subs r5, r5, #0x1 @ awake, wait just a bit
diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c
index ae6036300f60..9fc13a2cc3f4 100644
--- a/arch/arm/mach-omap2/timer-gp.c
+++ b/arch/arm/mach-omap2/timer-gp.c
@@ -118,7 +118,8 @@ static void __init omap2_gp_clockevent_init(void)
118 clockevent_gpt.max_delta_ns = 118 clockevent_gpt.max_delta_ns =
119 clockevent_delta2ns(0xffffffff, &clockevent_gpt); 119 clockevent_delta2ns(0xffffffff, &clockevent_gpt);
120 clockevent_gpt.min_delta_ns = 120 clockevent_gpt.min_delta_ns =
121 clockevent_delta2ns(1, &clockevent_gpt); 121 clockevent_delta2ns(3, &clockevent_gpt);
122 /* Timer internal resynch latency. */
122 123
123 clockevent_gpt.cpumask = cpumask_of(0); 124 clockevent_gpt.cpumask = cpumask_of(0);
124 clockevents_register_device(&clockevent_gpt); 125 clockevents_register_device(&clockevent_gpt);