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-rw-r--r--arch/arm/mach-omap2/Kconfig1
-rwxr-xr-xarch/arm/mach-omap2/board-zoom-peripherals.c8
-rw-r--r--arch/arm/mach-omap2/clock2xxx.c57
-rw-r--r--arch/arm/mach-omap2/clock34xx.c1
-rw-r--r--arch/arm/mach-omap2/clock34xx_data.c6
-rw-r--r--arch/arm/mach-omap2/clockdomain.c4
-rw-r--r--arch/arm/mach-omap2/io.c19
-rw-r--r--arch/arm/mach-omap2/mux.c6
-rw-r--r--arch/arm/mach-omap2/opp2420_data.c38
-rw-r--r--arch/arm/mach-omap2/opp2430_data.c30
-rw-r--r--arch/arm/mach-omap2/pm34xx.c4
-rw-r--r--arch/arm/mach-omap2/serial.c12
12 files changed, 120 insertions, 66 deletions
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 10eafa70a909..606bf04f51b6 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -80,6 +80,7 @@ config MACH_OVERO
80config MACH_OMAP3EVM 80config MACH_OMAP3EVM
81 bool "OMAP 3530 EVM board" 81 bool "OMAP 3530 EVM board"
82 depends on ARCH_OMAP3 && ARCH_OMAP34XX 82 depends on ARCH_OMAP3 && ARCH_OMAP34XX
83 select OMAP_PACKAGE_CBB
83 84
84config MACH_OMAP3517EVM 85config MACH_OMAP3517EVM
85 bool "OMAP3517/ AM3517 EVM board" 86 bool "OMAP3517/ AM3517 EVM board"
diff --git a/arch/arm/mach-omap2/board-zoom-peripherals.c b/arch/arm/mach-omap2/board-zoom-peripherals.c
index 8dd277c36661..1e3dfb652acc 100755
--- a/arch/arm/mach-omap2/board-zoom-peripherals.c
+++ b/arch/arm/mach-omap2/board-zoom-peripherals.c
@@ -63,21 +63,21 @@ static int board_keymap[] = {
63 KEY(5, 1, KEY_H), 63 KEY(5, 1, KEY_H),
64 KEY(5, 2, KEY_J), 64 KEY(5, 2, KEY_J),
65 KEY(5, 3, KEY_F3), 65 KEY(5, 3, KEY_F3),
66 KEY(5, 4, KEY_UNKNOWN),
66 KEY(5, 5, KEY_VOLUMEDOWN), 67 KEY(5, 5, KEY_VOLUMEDOWN),
67 KEY(5, 6, KEY_M), 68 KEY(5, 6, KEY_M),
68 KEY(5, 7, KEY_ENTER), 69 KEY(5, 7, KEY_RIGHT),
69 KEY(6, 0, KEY_Q), 70 KEY(6, 0, KEY_Q),
70 KEY(6, 1, KEY_A), 71 KEY(6, 1, KEY_A),
71 KEY(6, 2, KEY_N), 72 KEY(6, 2, KEY_N),
72 KEY(6, 3, KEY_BACKSPACE), 73 KEY(6, 3, KEY_BACKSPACE),
73 KEY(6, 6, KEY_P), 74 KEY(6, 6, KEY_P),
74 KEY(6, 7, KEY_SELECT), 75 KEY(6, 7, KEY_UP),
75 KEY(7, 0, KEY_PROG1), /*MACRO 1 <User defined> */ 76 KEY(7, 0, KEY_PROG1), /*MACRO 1 <User defined> */
76 KEY(7, 1, KEY_PROG2), /*MACRO 2 <User defined> */ 77 KEY(7, 1, KEY_PROG2), /*MACRO 2 <User defined> */
77 KEY(7, 2, KEY_PROG3), /*MACRO 3 <User defined> */ 78 KEY(7, 2, KEY_PROG3), /*MACRO 3 <User defined> */
78 KEY(7, 3, KEY_PROG4), /*MACRO 4 <User defined> */ 79 KEY(7, 3, KEY_PROG4), /*MACRO 4 <User defined> */
79 KEY(7, 5, KEY_RIGHT), 80 KEY(7, 6, KEY_SELECT),
80 KEY(7, 6, KEY_UP),
81 KEY(7, 7, KEY_DOWN) 81 KEY(7, 7, KEY_DOWN)
82}; 82};
83 83
diff --git a/arch/arm/mach-omap2/clock2xxx.c b/arch/arm/mach-omap2/clock2xxx.c
index d0e3fb7f9298..5420356eb407 100644
--- a/arch/arm/mach-omap2/clock2xxx.c
+++ b/arch/arm/mach-omap2/clock2xxx.c
@@ -449,40 +449,78 @@ int omap2_select_table_rate(struct clk *clk, unsigned long rate)
449#ifdef CONFIG_CPU_FREQ 449#ifdef CONFIG_CPU_FREQ
450/* 450/*
451 * Walk PRCM rate table and fillout cpufreq freq_table 451 * Walk PRCM rate table and fillout cpufreq freq_table
452 * XXX This should be replaced by an OPP layer in the near future
452 */ 453 */
453static struct cpufreq_frequency_table freq_table[ARRAY_SIZE(rate_table)]; 454static struct cpufreq_frequency_table *freq_table;
454 455
455void omap2_clk_init_cpufreq_table(struct cpufreq_frequency_table **table) 456void omap2_clk_init_cpufreq_table(struct cpufreq_frequency_table **table)
456{ 457{
457 struct prcm_config *prcm; 458 const struct prcm_config *prcm;
459 long sys_ck_rate;
458 int i = 0; 460 int i = 0;
461 int tbl_sz = 0;
462
463 sys_ck_rate = clk_get_rate(sclk);
459 464
460 for (prcm = rate_table; prcm->mpu_speed; prcm++) { 465 for (prcm = rate_table; prcm->mpu_speed; prcm++) {
461 if (!(prcm->flags & cpu_mask)) 466 if (!(prcm->flags & cpu_mask))
462 continue; 467 continue;
463 if (prcm->xtal_speed != sys_ck.rate) 468 if (prcm->xtal_speed != sys_ck_rate)
464 continue; 469 continue;
465 470
466 /* don't put bypass rates in table */ 471 /* don't put bypass rates in table */
467 if (prcm->dpll_speed == prcm->xtal_speed) 472 if (prcm->dpll_speed == prcm->xtal_speed)
468 continue; 473 continue;
469 474
470 freq_table[i].index = i; 475 tbl_sz++;
471 freq_table[i].frequency = prcm->mpu_speed / 1000;
472 i++;
473 } 476 }
474 477
475 if (i == 0) { 478 /*
476 printk(KERN_WARNING "%s: failed to initialize frequency " 479 * XXX Ensure that we're doing what CPUFreq expects for this error
477 "table\n", __func__); 480 * case and the following one
481 */
482 if (tbl_sz == 0) {
483 pr_warning("%s: no matching entries in rate_table\n",
484 __func__);
485 return;
486 }
487
488 /* Include the CPUFREQ_TABLE_END terminator entry */
489 tbl_sz++;
490
491 freq_table = kzalloc(sizeof(struct cpufreq_frequency_table) * tbl_sz,
492 GFP_ATOMIC);
493 if (!freq_table) {
494 pr_err("%s: could not kzalloc frequency table\n", __func__);
478 return; 495 return;
479 } 496 }
480 497
498 for (prcm = rate_table; prcm->mpu_speed; prcm++) {
499 if (!(prcm->flags & cpu_mask))
500 continue;
501 if (prcm->xtal_speed != sys_ck_rate)
502 continue;
503
504 /* don't put bypass rates in table */
505 if (prcm->dpll_speed == prcm->xtal_speed)
506 continue;
507
508 freq_table[i].index = i;
509 freq_table[i].frequency = prcm->mpu_speed / 1000;
510 i++;
511 }
512
481 freq_table[i].index = i; 513 freq_table[i].index = i;
482 freq_table[i].frequency = CPUFREQ_TABLE_END; 514 freq_table[i].frequency = CPUFREQ_TABLE_END;
483 515
484 *table = &freq_table[0]; 516 *table = &freq_table[0];
485} 517}
518
519void omap2_clk_exit_cpufreq_table(struct cpufreq_frequency_table **table)
520{
521 kfree(freq_table);
522}
523
486#endif 524#endif
487 525
488struct clk_functions omap2_clk_functions = { 526struct clk_functions omap2_clk_functions = {
@@ -494,6 +532,7 @@ struct clk_functions omap2_clk_functions = {
494 .clk_disable_unused = omap2_clk_disable_unused, 532 .clk_disable_unused = omap2_clk_disable_unused,
495#ifdef CONFIG_CPU_FREQ 533#ifdef CONFIG_CPU_FREQ
496 .clk_init_cpufreq_table = omap2_clk_init_cpufreq_table, 534 .clk_init_cpufreq_table = omap2_clk_init_cpufreq_table,
535 .clk_exit_cpufreq_table = omap2_clk_exit_cpufreq_table,
497#endif 536#endif
498}; 537};
499 538
diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
index ded32364f32b..d4217b93e10b 100644
--- a/arch/arm/mach-omap2/clock34xx.c
+++ b/arch/arm/mach-omap2/clock34xx.c
@@ -34,7 +34,6 @@
34#include <asm/div64.h> 34#include <asm/div64.h>
35#include <asm/clkdev.h> 35#include <asm/clkdev.h>
36 36
37#include <plat/sdrc.h>
38#include "clock.h" 37#include "clock.h"
39#include "clock34xx.h" 38#include "clock34xx.h"
40#include "sdrc.h" 39#include "sdrc.h"
diff --git a/arch/arm/mach-omap2/clock34xx_data.c b/arch/arm/mach-omap2/clock34xx_data.c
index 8bdcc9cc7f9a..c6031d74d6f6 100644
--- a/arch/arm/mach-omap2/clock34xx_data.c
+++ b/arch/arm/mach-omap2/clock34xx_data.c
@@ -776,6 +776,8 @@ static struct clk dpll4_m5_ck = {
776 .clksel_mask = OMAP3430_CLKSEL_CAM_MASK, 776 .clksel_mask = OMAP3430_CLKSEL_CAM_MASK,
777 .clksel = div16_dpll4_clksel, 777 .clksel = div16_dpll4_clksel,
778 .clkdm_name = "dpll4_clkdm", 778 .clkdm_name = "dpll4_clkdm",
779 .set_rate = &omap2_clksel_set_rate,
780 .round_rate = &omap2_clksel_round_rate,
779 .recalc = &omap2_clksel_recalc, 781 .recalc = &omap2_clksel_recalc,
780}; 782};
781 783
@@ -1500,6 +1502,7 @@ static struct clk uart2_fck = {
1500 .parent = &core_48m_fck, 1502 .parent = &core_48m_fck,
1501 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), 1503 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
1502 .enable_bit = OMAP3430_EN_UART2_SHIFT, 1504 .enable_bit = OMAP3430_EN_UART2_SHIFT,
1505 .clkdm_name = "core_l4_clkdm",
1503 .recalc = &followparent_recalc, 1506 .recalc = &followparent_recalc,
1504}; 1507};
1505 1508
@@ -1509,6 +1512,7 @@ static struct clk uart1_fck = {
1509 .parent = &core_48m_fck, 1512 .parent = &core_48m_fck,
1510 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), 1513 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
1511 .enable_bit = OMAP3430_EN_UART1_SHIFT, 1514 .enable_bit = OMAP3430_EN_UART1_SHIFT,
1515 .clkdm_name = "core_l4_clkdm",
1512 .recalc = &followparent_recalc, 1516 .recalc = &followparent_recalc,
1513}; 1517};
1514 1518
@@ -2745,7 +2749,7 @@ static struct clk mcbsp4_ick = {
2745}; 2749};
2746 2750
2747static const struct clksel mcbsp_234_clksel[] = { 2751static const struct clksel mcbsp_234_clksel[] = {
2748 { .parent = &core_96m_fck, .rates = common_mcbsp_96m_rates }, 2752 { .parent = &per_96m_fck, .rates = common_mcbsp_96m_rates },
2749 { .parent = &mcbsp_clks, .rates = common_mcbsp_mcbsp_rates }, 2753 { .parent = &mcbsp_clks, .rates = common_mcbsp_mcbsp_rates },
2750 { .parent = NULL } 2754 { .parent = NULL }
2751}; 2755};
diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c
index 1a45ed1e8ba1..dd285f001467 100644
--- a/arch/arm/mach-omap2/clockdomain.c
+++ b/arch/arm/mach-omap2/clockdomain.c
@@ -559,7 +559,7 @@ int omap2_clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk)
559 * downstream clocks for debugging purposes? 559 * downstream clocks for debugging purposes?
560 */ 560 */
561 561
562 if (!clkdm || !clk) 562 if (!clkdm || !clk || !clkdm->clktrctrl_mask)
563 return -EINVAL; 563 return -EINVAL;
564 564
565 if (atomic_inc_return(&clkdm->usecount) > 1) 565 if (atomic_inc_return(&clkdm->usecount) > 1)
@@ -610,7 +610,7 @@ int omap2_clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk)
610 * downstream clocks for debugging purposes? 610 * downstream clocks for debugging purposes?
611 */ 611 */
612 612
613 if (!clkdm || !clk) 613 if (!clkdm || !clk || !clkdm->clktrctrl_mask)
614 return -EINVAL; 614 return -EINVAL;
615 615
616#ifdef DEBUG 616#ifdef DEBUG
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index a8749e8017b9..5a7996402c53 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -33,7 +33,6 @@
33#include <plat/sdrc.h> 33#include <plat/sdrc.h>
34#include <plat/gpmc.h> 34#include <plat/gpmc.h>
35#include <plat/serial.h> 35#include <plat/serial.h>
36#include <plat/mux.h>
37#include <plat/vram.h> 36#include <plat/vram.h>
38 37
39#include "clock.h" 38#include "clock.h"
@@ -73,21 +72,21 @@ static struct map_desc omap24xx_io_desc[] __initdata = {
73#ifdef CONFIG_ARCH_OMAP2420 72#ifdef CONFIG_ARCH_OMAP2420
74static struct map_desc omap242x_io_desc[] __initdata = { 73static struct map_desc omap242x_io_desc[] __initdata = {
75 { 74 {
76 .virtual = DSP_MEM_24XX_VIRT, 75 .virtual = DSP_MEM_2420_VIRT,
77 .pfn = __phys_to_pfn(DSP_MEM_24XX_PHYS), 76 .pfn = __phys_to_pfn(DSP_MEM_2420_PHYS),
78 .length = DSP_MEM_24XX_SIZE, 77 .length = DSP_MEM_2420_SIZE,
79 .type = MT_DEVICE 78 .type = MT_DEVICE
80 }, 79 },
81 { 80 {
82 .virtual = DSP_IPI_24XX_VIRT, 81 .virtual = DSP_IPI_2420_VIRT,
83 .pfn = __phys_to_pfn(DSP_IPI_24XX_PHYS), 82 .pfn = __phys_to_pfn(DSP_IPI_2420_PHYS),
84 .length = DSP_IPI_24XX_SIZE, 83 .length = DSP_IPI_2420_SIZE,
85 .type = MT_DEVICE 84 .type = MT_DEVICE
86 }, 85 },
87 { 86 {
88 .virtual = DSP_MMU_24XX_VIRT, 87 .virtual = DSP_MMU_2420_VIRT,
89 .pfn = __phys_to_pfn(DSP_MMU_24XX_PHYS), 88 .pfn = __phys_to_pfn(DSP_MMU_2420_PHYS),
90 .length = DSP_MMU_24XX_SIZE, 89 .length = DSP_MMU_2420_SIZE,
91 .type = MT_DEVICE 90 .type = MT_DEVICE
92 }, 91 },
93}; 92};
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index e071b3fd1878..459ef23ab8a8 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -994,8 +994,10 @@ int __init omap_mux_init(u32 mux_pbase, u32 mux_size,
994 } 994 }
995 995
996#ifdef CONFIG_OMAP_MUX 996#ifdef CONFIG_OMAP_MUX
997 omap_mux_package_fixup(package_subset, superset); 997 if (package_subset)
998 omap_mux_package_init_balls(package_balls, superset); 998 omap_mux_package_fixup(package_subset, superset);
999 if (package_balls)
1000 omap_mux_package_init_balls(package_balls, superset);
999 omap_mux_set_cmdline_signals(); 1001 omap_mux_set_cmdline_signals();
1000 omap_mux_set_board_signals(board_mux); 1002 omap_mux_set_board_signals(board_mux);
1001#endif 1003#endif
diff --git a/arch/arm/mach-omap2/opp2420_data.c b/arch/arm/mach-omap2/opp2420_data.c
index 126a9396b3a8..e6dda694fd5c 100644
--- a/arch/arm/mach-omap2/opp2420_data.c
+++ b/arch/arm/mach-omap2/opp2420_data.c
@@ -9,45 +9,47 @@
9 * The OMAP2 processor can be run at several discrete 'PRCM configurations'. 9 * The OMAP2 processor can be run at several discrete 'PRCM configurations'.
10 * These configurations are characterized by voltage and speed for clocks. 10 * These configurations are characterized by voltage and speed for clocks.
11 * The device is only validated for certain combinations. One way to express 11 * The device is only validated for certain combinations. One way to express
12 * these combinations is via the 'ratio's' which the clocks operate with 12 * these combinations is via the 'ratios' which the clocks operate with
13 * respect to each other. These ratio sets are for a given voltage/DPLL 13 * respect to each other. These ratio sets are for a given voltage/DPLL
14 * setting. All configurations can be described by a DPLL setting and a ratio 14 * setting. All configurations can be described by a DPLL setting and a ratio.
15 * There are 3 ratio sets for the 2430 and X ratio sets for 2420.
16 *
17 * 2430 differs from 2420 in that there are no more phase synchronizers used.
18 * They both have a slightly different clock domain setup. 2420(iva1,dsp) vs
19 * 2430 (iva2.1, NOdsp, mdm)
20 * 15 *
21 * XXX Missing voltage data. 16 * XXX Missing voltage data.
17 * XXX Missing 19.2MHz sys_clk rate sets (needed for N800/N810)
22 * 18 *
23 * THe format described in this file is deprecated. Once a reasonable 19 * THe format described in this file is deprecated. Once a reasonable
24 * OPP API exists, the data in this file should be converted to use it. 20 * OPP API exists, the data in this file should be converted to use it.
25 * 21 *
26 * This is technically part of the OMAP2xxx clock code. 22 * This is technically part of the OMAP2xxx clock code.
23 *
24 * Considerable work is still needed to fully support dynamic frequency
25 * changes on OMAP2xxx-series chips. Readers interested in such a
26 * project are encouraged to review the Maemo Diablo RX-34 and RX-44
27 * kernel source at:
28 * http://repository.maemo.org/pool/diablo/free/k/kernel-source-diablo/
27 */ 29 */
28 30
29#include "opp2xxx.h" 31#include "opp2xxx.h"
30#include "sdrc.h" 32#include "sdrc.h"
31#include "clock.h" 33#include "clock.h"
32 34
33/*------------------------------------------------------------------------- 35/*
34 * Key dividers which make up a PRCM set. Ratio's for a PRCM are mandated. 36 * Key dividers which make up a PRCM set. Ratios for a PRCM are mandated.
35 * xtal_speed, dpll_speed, mpu_speed, CM_CLKSEL_MPU, 37 * xtal_speed, dpll_speed, mpu_speed, CM_CLKSEL_MPU,
36 * CM_CLKSEL_DSP, CM_CLKSEL_GFX, CM_CLKSEL1_CORE, CM_CLKSEL1_PLL, 38 * CM_CLKSEL_DSP, CM_CLKSEL_GFX, CM_CLKSEL1_CORE, CM_CLKSEL1_PLL,
37 * CM_CLKSEL2_PLL, CM_CLKSEL_MDM 39 * CM_CLKSEL2_PLL, CM_CLKSEL_MDM
38 * 40 *
39 * Filling in table based on H4 boards and 2430-SDPs variants available. 41 * Filling in table based on H4 boards available. There are quite a
40 * There are quite a few more rates combinations which could be defined. 42 * few more rate combinations which could be defined.
41 * 43 *
42 * When multiple values are defined the start up will try and choose the 44 * When multiple values are defined the start up will try and choose
43 * fastest one. If a 'fast' value is defined, then automatically, the /2 45 * the fastest one. If a 'fast' value is defined, then automatically,
44 * one should be included as it can be used. Generally having more that 46 * the /2 one should be included as it can be used. Generally having
45 * one fast set does not make sense, as static timings need to be changed 47 * more than one fast set does not make sense, as static timings need
46 * to change the set. The exception is the bypass setting which is 48 * to be changed to change the set. The exception is the bypass
47 * availble for low power bypass. 49 * setting which is available for low power bypass.
48 * 50 *
49 * Note: This table needs to be sorted, fastest to slowest. 51 * Note: This table needs to be sorted, fastest to slowest.
50 *-------------------------------------------------------------------------*/ 52 **/
51const struct prcm_config omap2420_rate_table[] = { 53const struct prcm_config omap2420_rate_table[] = {
52 /* PRCM I - FAST */ 54 /* PRCM I - FAST */
53 {S12M, S660M, S330M, RI_CM_CLKSEL_MPU_VAL, /* 330MHz ARM */ 55 {S12M, S660M, S330M, RI_CM_CLKSEL_MPU_VAL, /* 330MHz ARM */
diff --git a/arch/arm/mach-omap2/opp2430_data.c b/arch/arm/mach-omap2/opp2430_data.c
index edb81672c844..1b9596ae201e 100644
--- a/arch/arm/mach-omap2/opp2430_data.c
+++ b/arch/arm/mach-omap2/opp2430_data.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * opp2420_data.c - old-style "OPP" table for OMAP2420 2 * opp2430_data.c - old-style "OPP" table for OMAP2430
3 * 3 *
4 * Copyright (C) 2005-2009 Texas Instruments, Inc. 4 * Copyright (C) 2005-2009 Texas Instruments, Inc.
5 * Copyright (C) 2004-2009 Nokia Corporation 5 * Copyright (C) 2004-2009 Nokia Corporation
@@ -9,16 +9,16 @@
9 * The OMAP2 processor can be run at several discrete 'PRCM configurations'. 9 * The OMAP2 processor can be run at several discrete 'PRCM configurations'.
10 * These configurations are characterized by voltage and speed for clocks. 10 * These configurations are characterized by voltage and speed for clocks.
11 * The device is only validated for certain combinations. One way to express 11 * The device is only validated for certain combinations. One way to express
12 * these combinations is via the 'ratio's' which the clocks operate with 12 * these combinations is via the 'ratios' which the clocks operate with
13 * respect to each other. These ratio sets are for a given voltage/DPLL 13 * respect to each other. These ratio sets are for a given voltage/DPLL
14 * setting. All configurations can be described by a DPLL setting and a ratio 14 * setting. All configurations can be described by a DPLL setting and a ratio.
15 * There are 3 ratio sets for the 2430 and X ratio sets for 2420.
16 * 15 *
17 * 2430 differs from 2420 in that there are no more phase synchronizers used. 16 * 2430 differs from 2420 in that there are no more phase synchronizers used.
18 * They both have a slightly different clock domain setup. 2420(iva1,dsp) vs 17 * They both have a slightly different clock domain setup. 2420(iva1,dsp) vs
19 * 2430 (iva2.1, NOdsp, mdm) 18 * 2430 (iva2.1, NOdsp, mdm)
20 * 19 *
21 * XXX Missing voltage data. 20 * XXX Missing voltage data.
21 * XXX Missing 19.2MHz sys_clk rate sets.
22 * 22 *
23 * THe format described in this file is deprecated. Once a reasonable 23 * THe format described in this file is deprecated. Once a reasonable
24 * OPP API exists, the data in this file should be converted to use it. 24 * OPP API exists, the data in this file should be converted to use it.
@@ -30,24 +30,24 @@
30#include "sdrc.h" 30#include "sdrc.h"
31#include "clock.h" 31#include "clock.h"
32 32
33/*------------------------------------------------------------------------- 33/*
34 * Key dividers which make up a PRCM set. Ratio's for a PRCM are mandated. 34 * Key dividers which make up a PRCM set. Ratios for a PRCM are mandated.
35 * xtal_speed, dpll_speed, mpu_speed, CM_CLKSEL_MPU, 35 * xtal_speed, dpll_speed, mpu_speed, CM_CLKSEL_MPU,
36 * CM_CLKSEL_DSP, CM_CLKSEL_GFX, CM_CLKSEL1_CORE, CM_CLKSEL1_PLL, 36 * CM_CLKSEL_DSP, CM_CLKSEL_GFX, CM_CLKSEL1_CORE, CM_CLKSEL1_PLL,
37 * CM_CLKSEL2_PLL, CM_CLKSEL_MDM 37 * CM_CLKSEL2_PLL, CM_CLKSEL_MDM
38 * 38 *
39 * Filling in table based on H4 boards and 2430-SDPs variants available. 39 * Filling in table based on 2430-SDPs variants available. There are
40 * There are quite a few more rates combinations which could be defined. 40 * quite a few more rate combinations which could be defined.
41 * 41 *
42 * When multiple values are defined the start up will try and choose the 42 * When multiple values are defined the start up will try and choose
43 * fastest one. If a 'fast' value is defined, then automatically, the /2 43 * the fastest one. If a 'fast' value is defined, then automatically,
44 * one should be included as it can be used. Generally having more that 44 * the /2 one should be included as it can be used. Generally having
45 * one fast set does not make sense, as static timings need to be changed 45 * more than one fast set does not make sense, as static timings need
46 * to change the set. The exception is the bypass setting which is 46 * to be changed to change the set. The exception is the bypass
47 * availble for low power bypass. 47 * setting which is available for low power bypass.
48 * 48 *
49 * Note: This table needs to be sorted, fastest to slowest. 49 * Note: This table needs to be sorted, fastest to slowest.
50 *-------------------------------------------------------------------------*/ 50 */
51const struct prcm_config omap2430_rate_table[] = { 51const struct prcm_config omap2430_rate_table[] = {
52 /* PRCM #4 - ratio2 (ES2.1) - FAST */ 52 /* PRCM #4 - ratio2 (ES2.1) - FAST */
53 {S13M, S798M, S399M, R2_CM_CLKSEL_MPU_VAL, /* 399MHz ARM */ 53 {S13M, S798M, S399M, R2_CM_CLKSEL_MPU_VAL, /* 399MHz ARM */
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 81ed252a0f8a..c6cc809afb79 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -124,8 +124,8 @@ static void omap3_core_save_context(void)
124 control_padconf_off |= START_PADCONF_SAVE; 124 control_padconf_off |= START_PADCONF_SAVE;
125 omap_ctrl_writel(control_padconf_off, OMAP343X_CONTROL_PADCONF_OFF); 125 omap_ctrl_writel(control_padconf_off, OMAP343X_CONTROL_PADCONF_OFF);
126 /* wait for the save to complete */ 126 /* wait for the save to complete */
127 while (!omap_ctrl_readl(OMAP343X_CONTROL_GENERAL_PURPOSE_STATUS) 127 while (!(omap_ctrl_readl(OMAP343X_CONTROL_GENERAL_PURPOSE_STATUS)
128 & PADCONF_SAVE_DONE) 128 & PADCONF_SAVE_DONE))
129 ; 129 ;
130 /* Save the Interrupt controller context */ 130 /* Save the Interrupt controller context */
131 omap_intc_save_context(); 131 omap_intc_save_context();
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 19805a7de06c..8c964bec8159 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -125,6 +125,13 @@ static struct plat_serial8250_port serial_platform_data3[] = {
125 } 125 }
126}; 126};
127#endif 127#endif
128static inline unsigned int __serial_read_reg(struct uart_port *up,
129 int offset)
130{
131 offset <<= up->regshift;
132 return (unsigned int)__raw_readb(up->membase + offset);
133}
134
128static inline unsigned int serial_read_reg(struct plat_serial8250_port *up, 135static inline unsigned int serial_read_reg(struct plat_serial8250_port *up,
129 int offset) 136 int offset)
130{ 137{
@@ -583,11 +590,12 @@ static unsigned int serial_in_override(struct uart_port *up, int offset)
583{ 590{
584 if (UART_RX == offset) { 591 if (UART_RX == offset) {
585 unsigned int lsr; 592 unsigned int lsr;
586 lsr = serial_read_reg(omap_uart[up->line].p, UART_LSR); 593 lsr = __serial_read_reg(up, UART_LSR);
587 if (!(lsr & UART_LSR_DR)) 594 if (!(lsr & UART_LSR_DR))
588 return -EPERM; 595 return -EPERM;
589 } 596 }
590 return serial_read_reg(omap_uart[up->line].p, offset); 597
598 return __serial_read_reg(up, offset);
591} 599}
592 600
593void __init omap_serial_early_init(void) 601void __init omap_serial_early_init(void)