diff options
Diffstat (limited to 'arch/arm/mach-omap2')
-rw-r--r-- | arch/arm/mach-omap2/board-igep0020.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/board-igep0030.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/clockdomain.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/clockdomain.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/cpuidle34xx.c | 4 | ||||
-rw-r--r-- | arch/arm/mach-omap2/devices.c | 6 | ||||
-rw-r--r-- | arch/arm/mach-omap2/dma.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/gpio.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/gpmc.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/hsmmc.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/irq.c | 3 | ||||
-rw-r--r-- | arch/arm/mach-omap2/mcbsp.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/mux.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/mux2430.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_2430_data.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/omap_phy_internal.c | 4 | ||||
-rw-r--r-- | arch/arm/mach-omap2/omap_twl.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/powerdomain.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/powerdomain.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/powerdomains3xxx_data.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/smartreflex.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/voltage.c | 4 |
22 files changed, 27 insertions, 28 deletions
diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c index 5f8a2fd06337..34cf982b9679 100644 --- a/arch/arm/mach-omap2/board-igep0020.c +++ b/arch/arm/mach-omap2/board-igep0020.c | |||
@@ -696,7 +696,7 @@ static void __init igep2_init(void) | |||
696 | igep2_init_smsc911x(); | 696 | igep2_init_smsc911x(); |
697 | 697 | ||
698 | /* | 698 | /* |
699 | * WLAN-BT combo module from MuRata wich has a Marvell WLAN | 699 | * WLAN-BT combo module from MuRata which has a Marvell WLAN |
700 | * (88W8686) + CSR Bluetooth chipset. Uses SDIO interface. | 700 | * (88W8686) + CSR Bluetooth chipset. Uses SDIO interface. |
701 | */ | 701 | */ |
702 | igep2_wlan_bt_init(); | 702 | igep2_wlan_bt_init(); |
diff --git a/arch/arm/mach-omap2/board-igep0030.c b/arch/arm/mach-omap2/board-igep0030.c index b10db0e6ee62..2cf86c3cb1a3 100644 --- a/arch/arm/mach-omap2/board-igep0030.c +++ b/arch/arm/mach-omap2/board-igep0030.c | |||
@@ -440,7 +440,7 @@ static void __init igep3_init(void) | |||
440 | igep3_leds_init(); | 440 | igep3_leds_init(); |
441 | 441 | ||
442 | /* | 442 | /* |
443 | * WLAN-BT combo module from MuRata wich has a Marvell WLAN | 443 | * WLAN-BT combo module from MuRata which has a Marvell WLAN |
444 | * (88W8686) + CSR Bluetooth chipset. Uses SDIO interface. | 444 | * (88W8686) + CSR Bluetooth chipset. Uses SDIO interface. |
445 | */ | 445 | */ |
446 | igep3_wifi_bt_init(); | 446 | igep3_wifi_bt_init(); |
diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c index ab878545bd9b..6cb6c03293df 100644 --- a/arch/arm/mach-omap2/clockdomain.c +++ b/arch/arm/mach-omap2/clockdomain.c | |||
@@ -258,7 +258,7 @@ static void _resolve_clkdm_deps(struct clockdomain *clkdm, | |||
258 | * clkdm_init - set up the clockdomain layer | 258 | * clkdm_init - set up the clockdomain layer |
259 | * @clkdms: optional pointer to an array of clockdomains to register | 259 | * @clkdms: optional pointer to an array of clockdomains to register |
260 | * @init_autodeps: optional pointer to an array of autodeps to register | 260 | * @init_autodeps: optional pointer to an array of autodeps to register |
261 | * @custom_funcs: func pointers for arch specfic implementations | 261 | * @custom_funcs: func pointers for arch specific implementations |
262 | * | 262 | * |
263 | * Set up internal state. If a pointer to an array of clockdomains | 263 | * Set up internal state. If a pointer to an array of clockdomains |
264 | * @clkdms was supplied, loop through the list of clockdomains, | 264 | * @clkdms was supplied, loop through the list of clockdomains, |
diff --git a/arch/arm/mach-omap2/clockdomain.h b/arch/arm/mach-omap2/clockdomain.h index 85b3dce65640..5823584d9cd7 100644 --- a/arch/arm/mach-omap2/clockdomain.h +++ b/arch/arm/mach-omap2/clockdomain.h | |||
@@ -125,7 +125,7 @@ struct clockdomain { | |||
125 | }; | 125 | }; |
126 | 126 | ||
127 | /** | 127 | /** |
128 | * struct clkdm_ops - Arch specfic function implementations | 128 | * struct clkdm_ops - Arch specific function implementations |
129 | * @clkdm_add_wkdep: Add a wakeup dependency between clk domains | 129 | * @clkdm_add_wkdep: Add a wakeup dependency between clk domains |
130 | * @clkdm_del_wkdep: Delete a wakeup dependency between clk domains | 130 | * @clkdm_del_wkdep: Delete a wakeup dependency between clk domains |
131 | * @clkdm_read_wkdep: Read wakeup dependency state between clk domains | 131 | * @clkdm_read_wkdep: Read wakeup dependency state between clk domains |
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c index a44c52303405..1c240eff3918 100644 --- a/arch/arm/mach-omap2/cpuidle34xx.c +++ b/arch/arm/mach-omap2/cpuidle34xx.c | |||
@@ -297,8 +297,8 @@ DEFINE_PER_CPU(struct cpuidle_device, omap3_idle_dev); | |||
297 | 297 | ||
298 | /** | 298 | /** |
299 | * omap3_cpuidle_update_states() - Update the cpuidle states | 299 | * omap3_cpuidle_update_states() - Update the cpuidle states |
300 | * @mpu_deepest_state: Enable states upto and including this for mpu domain | 300 | * @mpu_deepest_state: Enable states up to and including this for mpu domain |
301 | * @core_deepest_state: Enable states upto and including this for core domain | 301 | * @core_deepest_state: Enable states up to and including this for core domain |
302 | * | 302 | * |
303 | * This goes through the list of states available and enables and disables the | 303 | * This goes through the list of states available and enables and disables the |
304 | * validity of C states based on deepest state that can be achieved for the | 304 | * validity of C states based on deepest state that can be achieved for the |
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c index 84d1b735fe80..7b8558564591 100644 --- a/arch/arm/mach-omap2/devices.c +++ b/arch/arm/mach-omap2/devices.c | |||
@@ -253,7 +253,7 @@ int __init omap4_keyboard_init(struct omap4_keypad_platform_data | |||
253 | ARRAY_SIZE(omap_keyboard_latency), 0); | 253 | ARRAY_SIZE(omap_keyboard_latency), 0); |
254 | 254 | ||
255 | if (IS_ERR(od)) { | 255 | if (IS_ERR(od)) { |
256 | WARN(1, "Cant build omap_device for %s:%s.\n", | 256 | WARN(1, "Can't build omap_device for %s:%s.\n", |
257 | name, oh->name); | 257 | name, oh->name); |
258 | return PTR_ERR(od); | 258 | return PTR_ERR(od); |
259 | } | 259 | } |
@@ -373,7 +373,7 @@ static int omap_mcspi_init(struct omap_hwmod *oh, void *unused) | |||
373 | od = omap_device_build(name, spi_num, oh, pdata, | 373 | od = omap_device_build(name, spi_num, oh, pdata, |
374 | sizeof(*pdata), omap_mcspi_latency, | 374 | sizeof(*pdata), omap_mcspi_latency, |
375 | ARRAY_SIZE(omap_mcspi_latency), 0); | 375 | ARRAY_SIZE(omap_mcspi_latency), 0); |
376 | WARN(IS_ERR(od), "Cant build omap_device for %s:%s\n", | 376 | WARN(IS_ERR(od), "Can't build omap_device for %s:%s\n", |
377 | name, oh->name); | 377 | name, oh->name); |
378 | kfree(pdata); | 378 | kfree(pdata); |
379 | return 0; | 379 | return 0; |
@@ -725,7 +725,7 @@ static int __init omap_init_wdt(void) | |||
725 | od = omap_device_build(dev_name, id, oh, NULL, 0, | 725 | od = omap_device_build(dev_name, id, oh, NULL, 0, |
726 | omap_wdt_latency, | 726 | omap_wdt_latency, |
727 | ARRAY_SIZE(omap_wdt_latency), 0); | 727 | ARRAY_SIZE(omap_wdt_latency), 0); |
728 | WARN(IS_ERR(od), "Cant build omap_device for %s:%s.\n", | 728 | WARN(IS_ERR(od), "Can't build omap_device for %s:%s.\n", |
729 | dev_name, oh->name); | 729 | dev_name, oh->name); |
730 | return 0; | 730 | return 0; |
731 | } | 731 | } |
diff --git a/arch/arm/mach-omap2/dma.c b/arch/arm/mach-omap2/dma.c index 34922b2d2e3f..c9ff0e79703d 100644 --- a/arch/arm/mach-omap2/dma.c +++ b/arch/arm/mach-omap2/dma.c | |||
@@ -262,7 +262,7 @@ static int __init omap2_system_dma_init_dev(struct omap_hwmod *oh, void *unused) | |||
262 | omap2_dma_latency, ARRAY_SIZE(omap2_dma_latency), 0); | 262 | omap2_dma_latency, ARRAY_SIZE(omap2_dma_latency), 0); |
263 | kfree(p); | 263 | kfree(p); |
264 | if (IS_ERR(od)) { | 264 | if (IS_ERR(od)) { |
265 | pr_err("%s: Cant build omap_device for %s:%s.\n", | 265 | pr_err("%s: Can't build omap_device for %s:%s.\n", |
266 | __func__, name, oh->name); | 266 | __func__, name, oh->name); |
267 | return PTR_ERR(od); | 267 | return PTR_ERR(od); |
268 | } | 268 | } |
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c index 413de18c1d2b..9529842ae054 100644 --- a/arch/arm/mach-omap2/gpio.c +++ b/arch/arm/mach-omap2/gpio.c | |||
@@ -82,7 +82,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused) | |||
82 | kfree(pdata); | 82 | kfree(pdata); |
83 | 83 | ||
84 | if (IS_ERR(od)) { | 84 | if (IS_ERR(od)) { |
85 | WARN(1, "Cant build omap_device for %s:%s.\n", | 85 | WARN(1, "Can't build omap_device for %s:%s.\n", |
86 | name, oh->name); | 86 | name, oh->name); |
87 | return PTR_ERR(od); | 87 | return PTR_ERR(od); |
88 | } | 88 | } |
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c index 493505c3b2f5..130034bf01d5 100644 --- a/arch/arm/mach-omap2/gpmc.c +++ b/arch/arm/mach-omap2/gpmc.c | |||
@@ -743,7 +743,7 @@ static int __init gpmc_init(void) | |||
743 | /* initalize the irq_chained */ | 743 | /* initalize the irq_chained */ |
744 | irq = OMAP_GPMC_IRQ_BASE; | 744 | irq = OMAP_GPMC_IRQ_BASE; |
745 | for (cs = 0; cs < GPMC_CS_NUM; cs++) { | 745 | for (cs = 0; cs < GPMC_CS_NUM; cs++) { |
746 | set_irq_chip_and_handler(irq, &dummy_irq_chip, | 746 | irq_set_chip_and_handler(irq, &dummy_irq_chip, |
747 | handle_simple_irq); | 747 | handle_simple_irq); |
748 | set_irq_flags(irq, IRQF_VALID); | 748 | set_irq_flags(irq, IRQF_VALID); |
749 | irq++; | 749 | irq++; |
diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c index 137e1a5f3d85..b2f30bed5a20 100644 --- a/arch/arm/mach-omap2/hsmmc.c +++ b/arch/arm/mach-omap2/hsmmc.c | |||
@@ -465,7 +465,7 @@ void __init omap_init_hsmmc(struct omap2_hsmmc_info *hsmmcinfo, int ctrl_nr) | |||
465 | od = omap_device_build(name, ctrl_nr - 1, oh, mmc_data, | 465 | od = omap_device_build(name, ctrl_nr - 1, oh, mmc_data, |
466 | sizeof(struct omap_mmc_platform_data), ohl, ohl_cnt, false); | 466 | sizeof(struct omap_mmc_platform_data), ohl, ohl_cnt, false); |
467 | if (IS_ERR(od)) { | 467 | if (IS_ERR(od)) { |
468 | WARN(1, "Cant build omap_device for %s:%s.\n", name, oh->name); | 468 | WARN(1, "Can't build omap_device for %s:%s.\n", name, oh->name); |
469 | kfree(mmc_data->slots[0].name); | 469 | kfree(mmc_data->slots[0].name); |
470 | goto done; | 470 | goto done; |
471 | } | 471 | } |
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c index bc524b94fd59..237e4530abf2 100644 --- a/arch/arm/mach-omap2/irq.c +++ b/arch/arm/mach-omap2/irq.c | |||
@@ -223,8 +223,7 @@ void __init omap_init_irq(void) | |||
223 | nr_of_irqs, nr_banks, nr_banks > 1 ? "s" : ""); | 223 | nr_of_irqs, nr_banks, nr_banks > 1 ? "s" : ""); |
224 | 224 | ||
225 | for (i = 0; i < nr_of_irqs; i++) { | 225 | for (i = 0; i < nr_of_irqs; i++) { |
226 | set_irq_chip(i, &omap_irq_chip); | 226 | irq_set_chip_and_handler(i, &omap_irq_chip, handle_level_irq); |
227 | set_irq_handler(i, handle_level_irq); | ||
228 | set_irq_flags(i, IRQF_VALID); | 227 | set_irq_flags(i, IRQF_VALID); |
229 | } | 228 | } |
230 | } | 229 | } |
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c index 565b9064a328..4a6ef6ab8458 100644 --- a/arch/arm/mach-omap2/mcbsp.c +++ b/arch/arm/mach-omap2/mcbsp.c | |||
@@ -149,7 +149,7 @@ static int omap_init_mcbsp(struct omap_hwmod *oh, void *unused) | |||
149 | ARRAY_SIZE(omap2_mcbsp_latency), false); | 149 | ARRAY_SIZE(omap2_mcbsp_latency), false); |
150 | kfree(pdata); | 150 | kfree(pdata); |
151 | if (IS_ERR(od)) { | 151 | if (IS_ERR(od)) { |
152 | pr_err("%s: Cant build omap_device for %s:%s.\n", __func__, | 152 | pr_err("%s: Can't build omap_device for %s:%s.\n", __func__, |
153 | name, oh->name); | 153 | name, oh->name); |
154 | return PTR_ERR(od); | 154 | return PTR_ERR(od); |
155 | } | 155 | } |
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c index bb043cbb3886..a4ab1e364313 100644 --- a/arch/arm/mach-omap2/mux.c +++ b/arch/arm/mach-omap2/mux.c | |||
@@ -518,7 +518,7 @@ static int omap_mux_dbg_board_show(struct seq_file *s, void *unused) | |||
518 | seq_printf(s, "/* %s */\n", m->muxnames[mode]); | 518 | seq_printf(s, "/* %s */\n", m->muxnames[mode]); |
519 | 519 | ||
520 | /* | 520 | /* |
521 | * XXX: Might be revisited to support differences accross | 521 | * XXX: Might be revisited to support differences across |
522 | * same OMAP generation. | 522 | * same OMAP generation. |
523 | */ | 523 | */ |
524 | seq_printf(s, "OMAP%d_MUX(%s, ", omap_gen, m0_def); | 524 | seq_printf(s, "OMAP%d_MUX(%s, ", omap_gen, m0_def); |
diff --git a/arch/arm/mach-omap2/mux2430.h b/arch/arm/mach-omap2/mux2430.h index adbea0d03e08..9fd93149ebd9 100644 --- a/arch/arm/mach-omap2/mux2430.h +++ b/arch/arm/mach-omap2/mux2430.h | |||
@@ -22,7 +22,7 @@ | |||
22 | * absolute addresses. The name in the macro is the mode-0 name of | 22 | * absolute addresses. The name in the macro is the mode-0 name of |
23 | * the pin. NOTE: These registers are 8-bits wide. | 23 | * the pin. NOTE: These registers are 8-bits wide. |
24 | * | 24 | * |
25 | * Note that these defines use SDMMC instead of MMC for compability | 25 | * Note that these defines use SDMMC instead of MMC for compatibility |
26 | * with signal names used in 3630. | 26 | * with signal names used in 3630. |
27 | */ | 27 | */ |
28 | #define OMAP2430_CONTROL_PADCONF_GPMC_CLK_OFFSET 0x000 | 28 | #define OMAP2430_CONTROL_PADCONF_GPMC_CLK_OFFSET 0x000 |
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c index a860fb5024c2..e6e3810db77f 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c | |||
@@ -1559,7 +1559,7 @@ static struct omap_hwmod omap2430_i2c1_hwmod = { | |||
1559 | * I2CHS IP's do not follow the usual pattern. | 1559 | * I2CHS IP's do not follow the usual pattern. |
1560 | * prcm_reg_id alone cannot be used to program | 1560 | * prcm_reg_id alone cannot be used to program |
1561 | * the iclk and fclk. Needs to be handled using | 1561 | * the iclk and fclk. Needs to be handled using |
1562 | * additonal flags when clk handling is moved | 1562 | * additional flags when clk handling is moved |
1563 | * to hwmod framework. | 1563 | * to hwmod framework. |
1564 | */ | 1564 | */ |
1565 | .module_offs = CORE_MOD, | 1565 | .module_offs = CORE_MOD, |
diff --git a/arch/arm/mach-omap2/omap_phy_internal.c b/arch/arm/mach-omap2/omap_phy_internal.c index e2e605fe9138..05f6abc96b0d 100644 --- a/arch/arm/mach-omap2/omap_phy_internal.c +++ b/arch/arm/mach-omap2/omap_phy_internal.c | |||
@@ -112,12 +112,12 @@ int omap4430_phy_power(struct device *dev, int ID, int on) | |||
112 | else | 112 | else |
113 | /* | 113 | /* |
114 | * Enable VBUS Valid, AValid and IDDIG | 114 | * Enable VBUS Valid, AValid and IDDIG |
115 | * high impedence | 115 | * high impedance |
116 | */ | 116 | */ |
117 | __raw_writel(IDDIG | AVALID | VBUSVALID, | 117 | __raw_writel(IDDIG | AVALID | VBUSVALID, |
118 | ctrl_base + USBOTGHS_CONTROL); | 118 | ctrl_base + USBOTGHS_CONTROL); |
119 | } else { | 119 | } else { |
120 | /* Enable session END and IDIG to high impedence. */ | 120 | /* Enable session END and IDIG to high impedance. */ |
121 | __raw_writel(SESSEND | IDDIG, ctrl_base + | 121 | __raw_writel(SESSEND | IDDIG, ctrl_base + |
122 | USBOTGHS_CONTROL); | 122 | USBOTGHS_CONTROL); |
123 | } | 123 | } |
diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c index 0a8e74e3e811..07d6140baa9d 100644 --- a/arch/arm/mach-omap2/omap_twl.c +++ b/arch/arm/mach-omap2/omap_twl.c | |||
@@ -308,7 +308,7 @@ int __init omap3_twl_init(void) | |||
308 | * Strategy Software Scaling Mode (ENABLE_VMODE=0), for setting the voltages, | 308 | * Strategy Software Scaling Mode (ENABLE_VMODE=0), for setting the voltages, |
309 | * in those scenarios this bit is to be cleared (enable = false). | 309 | * in those scenarios this bit is to be cleared (enable = false). |
310 | * | 310 | * |
311 | * Returns 0 on sucess, error is returned if I2C read/write fails. | 311 | * Returns 0 on success, error is returned if I2C read/write fails. |
312 | */ | 312 | */ |
313 | int __init omap3_twl_set_sr_bit(bool enable) | 313 | int __init omap3_twl_set_sr_bit(bool enable) |
314 | { | 314 | { |
diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c index 49c6513e90d8..9af08473bf10 100644 --- a/arch/arm/mach-omap2/powerdomain.c +++ b/arch/arm/mach-omap2/powerdomain.c | |||
@@ -196,7 +196,7 @@ static int _pwrdm_post_transition_cb(struct powerdomain *pwrdm, void *unused) | |||
196 | /** | 196 | /** |
197 | * pwrdm_init - set up the powerdomain layer | 197 | * pwrdm_init - set up the powerdomain layer |
198 | * @pwrdm_list: array of struct powerdomain pointers to register | 198 | * @pwrdm_list: array of struct powerdomain pointers to register |
199 | * @custom_funcs: func pointers for arch specfic implementations | 199 | * @custom_funcs: func pointers for arch specific implementations |
200 | * | 200 | * |
201 | * Loop through the array of powerdomains @pwrdm_list, registering all | 201 | * Loop through the array of powerdomains @pwrdm_list, registering all |
202 | * that are available on the current CPU. If pwrdm_list is supplied | 202 | * that are available on the current CPU. If pwrdm_list is supplied |
diff --git a/arch/arm/mach-omap2/powerdomain.h b/arch/arm/mach-omap2/powerdomain.h index 027f40bd235d..d23d979b9c34 100644 --- a/arch/arm/mach-omap2/powerdomain.h +++ b/arch/arm/mach-omap2/powerdomain.h | |||
@@ -121,7 +121,7 @@ struct powerdomain { | |||
121 | }; | 121 | }; |
122 | 122 | ||
123 | /** | 123 | /** |
124 | * struct pwrdm_ops - Arch specfic function implementations | 124 | * struct pwrdm_ops - Arch specific function implementations |
125 | * @pwrdm_set_next_pwrst: Set the target power state for a pd | 125 | * @pwrdm_set_next_pwrst: Set the target power state for a pd |
126 | * @pwrdm_read_next_pwrst: Read the target power state set for a pd | 126 | * @pwrdm_read_next_pwrst: Read the target power state set for a pd |
127 | * @pwrdm_read_pwrst: Read the current power state of a pd | 127 | * @pwrdm_read_pwrst: Read the current power state of a pd |
diff --git a/arch/arm/mach-omap2/powerdomains3xxx_data.c b/arch/arm/mach-omap2/powerdomains3xxx_data.c index 9c9c113788b9..469a920a74dc 100644 --- a/arch/arm/mach-omap2/powerdomains3xxx_data.c +++ b/arch/arm/mach-omap2/powerdomains3xxx_data.c | |||
@@ -72,7 +72,7 @@ static struct powerdomain mpu_3xxx_pwrdm = { | |||
72 | 72 | ||
73 | /* | 73 | /* |
74 | * The USBTLL Save-and-Restore mechanism is broken on | 74 | * The USBTLL Save-and-Restore mechanism is broken on |
75 | * 3430s upto ES3.0 and 3630ES1.0. Hence this feature | 75 | * 3430s up to ES3.0 and 3630ES1.0. Hence this feature |
76 | * needs to be disabled on these chips. | 76 | * needs to be disabled on these chips. |
77 | * Refer: 3430 errata ID i459 and 3630 errata ID i579 | 77 | * Refer: 3430 errata ID i459 and 3630 errata ID i579 |
78 | * | 78 | * |
diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c index 8f674c9442bf..13e24f913dd4 100644 --- a/arch/arm/mach-omap2/smartreflex.c +++ b/arch/arm/mach-omap2/smartreflex.c | |||
@@ -247,7 +247,7 @@ static void sr_stop_vddautocomp(struct omap_sr *sr) | |||
247 | * driver register and sr device intializtion API's. Only one call | 247 | * driver register and sr device intializtion API's. Only one call |
248 | * will ultimately succeed. | 248 | * will ultimately succeed. |
249 | * | 249 | * |
250 | * Currenly this function registers interrrupt handler for a particular SR | 250 | * Currently this function registers interrrupt handler for a particular SR |
251 | * if smartreflex class driver is already registered and has | 251 | * if smartreflex class driver is already registered and has |
252 | * requested for interrupts and the SR interrupt line in present. | 252 | * requested for interrupts and the SR interrupt line in present. |
253 | */ | 253 | */ |
diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c index c6facf7becf8..6fb520999b6e 100644 --- a/arch/arm/mach-omap2/voltage.c +++ b/arch/arm/mach-omap2/voltage.c | |||
@@ -851,7 +851,7 @@ int omap_voltage_scale_vdd(struct voltagedomain *voltdm, | |||
851 | * @voltdm: pointer to the VDD whose voltage is to be reset. | 851 | * @voltdm: pointer to the VDD whose voltage is to be reset. |
852 | * | 852 | * |
853 | * This API finds out the correct voltage the voltage domain is supposed | 853 | * This API finds out the correct voltage the voltage domain is supposed |
854 | * to be at and resets the voltage to that level. Should be used expecially | 854 | * to be at and resets the voltage to that level. Should be used especially |
855 | * while disabling any voltage compensation modules. | 855 | * while disabling any voltage compensation modules. |
856 | */ | 856 | */ |
857 | void omap_voltage_reset(struct voltagedomain *voltdm) | 857 | void omap_voltage_reset(struct voltagedomain *voltdm) |
@@ -912,7 +912,7 @@ void omap_voltage_get_volttable(struct voltagedomain *voltdm, | |||
912 | * This API searches only through the non-compensated voltages int the | 912 | * This API searches only through the non-compensated voltages int the |
913 | * voltage table. | 913 | * voltage table. |
914 | * Returns pointer to the voltage table entry corresponding to volt on | 914 | * Returns pointer to the voltage table entry corresponding to volt on |
915 | * sucess. Returns -ENODATA if no voltage table exisits for the passed voltage | 915 | * success. Returns -ENODATA if no voltage table exisits for the passed voltage |
916 | * domain or if there is no matching entry. | 916 | * domain or if there is no matching entry. |
917 | */ | 917 | */ |
918 | struct omap_volt_data *omap_voltage_get_voltdata(struct voltagedomain *voltdm, | 918 | struct omap_volt_data *omap_voltage_get_voltdata(struct voltagedomain *voltdm, |