diff options
Diffstat (limited to 'arch/arm/mach-omap2')
-rw-r--r-- | arch/arm/mach-omap2/irq.c | 22 |
1 files changed, 12 insertions, 10 deletions
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c index 85bf8ca95fd3..23049c487c47 100644 --- a/arch/arm/mach-omap2/irq.c +++ b/arch/arm/mach-omap2/irq.c | |||
@@ -100,13 +100,14 @@ static int omap_check_spurious(unsigned int irq) | |||
100 | } | 100 | } |
101 | 101 | ||
102 | /* XXX: FIQ and additional INTC support (only MPU at the moment) */ | 102 | /* XXX: FIQ and additional INTC support (only MPU at the moment) */ |
103 | static void omap_ack_irq(unsigned int irq) | 103 | static void omap_ack_irq(struct irq_data *d) |
104 | { | 104 | { |
105 | intc_bank_write_reg(0x1, &irq_banks[0], INTC_CONTROL); | 105 | intc_bank_write_reg(0x1, &irq_banks[0], INTC_CONTROL); |
106 | } | 106 | } |
107 | 107 | ||
108 | static void omap_mask_irq(unsigned int irq) | 108 | static void omap_mask_irq(struct irq_data *d) |
109 | { | 109 | { |
110 | unsigned int irq = d->irq; | ||
110 | int offset = irq & (~(IRQ_BITS_PER_REG - 1)); | 111 | int offset = irq & (~(IRQ_BITS_PER_REG - 1)); |
111 | 112 | ||
112 | if (cpu_is_omap34xx()) { | 113 | if (cpu_is_omap34xx()) { |
@@ -128,8 +129,9 @@ static void omap_mask_irq(unsigned int irq) | |||
128 | intc_bank_write_reg(1 << irq, &irq_banks[0], INTC_MIR_SET0 + offset); | 129 | intc_bank_write_reg(1 << irq, &irq_banks[0], INTC_MIR_SET0 + offset); |
129 | } | 130 | } |
130 | 131 | ||
131 | static void omap_unmask_irq(unsigned int irq) | 132 | static void omap_unmask_irq(struct irq_data *d) |
132 | { | 133 | { |
134 | unsigned int irq = d->irq; | ||
133 | int offset = irq & (~(IRQ_BITS_PER_REG - 1)); | 135 | int offset = irq & (~(IRQ_BITS_PER_REG - 1)); |
134 | 136 | ||
135 | irq &= (IRQ_BITS_PER_REG - 1); | 137 | irq &= (IRQ_BITS_PER_REG - 1); |
@@ -137,17 +139,17 @@ static void omap_unmask_irq(unsigned int irq) | |||
137 | intc_bank_write_reg(1 << irq, &irq_banks[0], INTC_MIR_CLEAR0 + offset); | 139 | intc_bank_write_reg(1 << irq, &irq_banks[0], INTC_MIR_CLEAR0 + offset); |
138 | } | 140 | } |
139 | 141 | ||
140 | static void omap_mask_ack_irq(unsigned int irq) | 142 | static void omap_mask_ack_irq(struct irq_data *d) |
141 | { | 143 | { |
142 | omap_mask_irq(irq); | 144 | omap_mask_irq(d); |
143 | omap_ack_irq(irq); | 145 | omap_ack_irq(d); |
144 | } | 146 | } |
145 | 147 | ||
146 | static struct irq_chip omap_irq_chip = { | 148 | static struct irq_chip omap_irq_chip = { |
147 | .name = "INTC", | 149 | .name = "INTC", |
148 | .ack = omap_mask_ack_irq, | 150 | .irq_ack = omap_mask_ack_irq, |
149 | .mask = omap_mask_irq, | 151 | .irq_mask = omap_mask_irq, |
150 | .unmask = omap_unmask_irq, | 152 | .irq_unmask = omap_unmask_irq, |
151 | }; | 153 | }; |
152 | 154 | ||
153 | static void __init omap_irq_bank_init_one(struct omap_irq_bank *bank) | 155 | static void __init omap_irq_bank_init_one(struct omap_irq_bank *bank) |