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-rw-r--r--arch/arm/mach-omap2/Kconfig6
-rw-r--r--arch/arm/mach-omap2/Makefile2
-rw-r--r--arch/arm/mach-omap2/board-2430sdp.c8
-rw-r--r--arch/arm/mach-omap2/board-3430sdp.c28
-rw-r--r--arch/arm/mach-omap2/board-4430sdp.c12
-rw-r--r--arch/arm/mach-omap2/board-am3517evm.c86
-rw-r--r--arch/arm/mach-omap2/board-cm-t35.c8
-rw-r--r--arch/arm/mach-omap2/board-devkit8000.c697
-rw-r--r--arch/arm/mach-omap2/board-igep0020.c277
-rw-r--r--arch/arm/mach-omap2/board-ldp.c8
-rw-r--r--arch/arm/mach-omap2/board-omap3beagle.c8
-rw-r--r--arch/arm/mach-omap2/board-omap3evm.c45
-rw-r--r--arch/arm/mach-omap2/board-omap3pandora.c188
-rw-r--r--arch/arm/mach-omap2/board-omap3touchbook.c8
-rw-r--r--arch/arm/mach-omap2/board-overo.c8
-rw-r--r--arch/arm/mach-omap2/board-rx51.c52
-rwxr-xr-xarch/arm/mach-omap2/board-zoom-peripherals.c8
-rw-r--r--arch/arm/mach-omap2/board-zoom3.c14
-rw-r--r--arch/arm/mach-omap2/control.c6
-rw-r--r--arch/arm/mach-omap2/cpuidle34xx.c226
-rw-r--r--arch/arm/mach-omap2/devices.c8
-rw-r--r--arch/arm/mach-omap2/id.c2
-rw-r--r--arch/arm/mach-omap2/io.c12
-rw-r--r--arch/arm/mach-omap2/mailbox.c45
-rw-r--r--arch/arm/mach-omap2/mcbsp.c2
-rw-r--r--arch/arm/mach-omap2/pm.h20
-rw-r--r--arch/arm/mach-omap2/pm34xx.c4
-rw-r--r--arch/arm/mach-omap2/prcm.c16
-rw-r--r--arch/arm/mach-omap2/sdram-numonyx-m65kxxxxam.h51
-rw-r--r--arch/arm/mach-omap2/sdrc.c11
-rw-r--r--arch/arm/mach-omap2/serial.c31
-rw-r--r--arch/arm/mach-omap2/sleep34xx.S59
-rw-r--r--arch/arm/mach-omap2/timer-mpu.c2
-rw-r--r--arch/arm/mach-omap2/usb-musb.c82
34 files changed, 1855 insertions, 185 deletions
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index f90b225ef888..a8a3d1e23e26 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -58,6 +58,10 @@ config MACH_OMAP3_BEAGLE
58 depends on ARCH_OMAP3 58 depends on ARCH_OMAP3
59 select OMAP_PACKAGE_CBB 59 select OMAP_PACKAGE_CBB
60 60
61config MACH_DEVKIT8000
62 bool "DEVKIT8000 board"
63 depends on ARCH_OMAP3
64
61config MACH_OMAP_LDP 65config MACH_OMAP_LDP
62 bool "OMAP3 LDP board" 66 bool "OMAP3 LDP board"
63 depends on ARCH_OMAP3 67 depends on ARCH_OMAP3
@@ -131,7 +135,7 @@ config MACH_CM_T35
131 select OMAP_MUX 135 select OMAP_MUX
132 136
133config MACH_IGEP0020 137config MACH_IGEP0020
134 bool "IGEP0020" 138 bool "IGEP v2 board"
135 depends on ARCH_OMAP3 139 depends on ARCH_OMAP3
136 select OMAP_PACKAGE_CBB 140 select OMAP_PACKAGE_CBB
137 141
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index d3984d34fd03..2069fb33baaa 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -102,6 +102,8 @@ obj-$(CONFIG_MACH_OMAP_2430SDP) += board-2430sdp.o \
102obj-$(CONFIG_MACH_OMAP_APOLLON) += board-apollon.o 102obj-$(CONFIG_MACH_OMAP_APOLLON) += board-apollon.o
103obj-$(CONFIG_MACH_OMAP3_BEAGLE) += board-omap3beagle.o \ 103obj-$(CONFIG_MACH_OMAP3_BEAGLE) += board-omap3beagle.o \
104 hsmmc.o 104 hsmmc.o
105obj-$(CONFIG_MACH_DEVKIT8000) += board-devkit8000.o \
106 hsmmc.o
105obj-$(CONFIG_MACH_OMAP_LDP) += board-ldp.o \ 107obj-$(CONFIG_MACH_OMAP_LDP) += board-ldp.o \
106 hsmmc.o 108 hsmmc.o
107obj-$(CONFIG_MACH_OVERO) += board-overo.o \ 109obj-$(CONFIG_MACH_OVERO) += board-overo.o \
diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c
index d6f55ef9059d..01d113ff9fcf 100644
--- a/arch/arm/mach-omap2/board-2430sdp.c
+++ b/arch/arm/mach-omap2/board-2430sdp.c
@@ -193,6 +193,12 @@ static struct omap2_hsmmc_info mmc[] __initdata = {
193 {} /* Terminator */ 193 {} /* Terminator */
194}; 194};
195 195
196static struct omap_musb_board_data musb_board_data = {
197 .interface_type = MUSB_INTERFACE_ULPI,
198 .mode = MUSB_OTG,
199 .power = 100,
200};
201
196static void __init omap_2430sdp_init(void) 202static void __init omap_2430sdp_init(void)
197{ 203{
198 int ret; 204 int ret;
@@ -202,7 +208,7 @@ static void __init omap_2430sdp_init(void)
202 platform_add_devices(sdp2430_devices, ARRAY_SIZE(sdp2430_devices)); 208 platform_add_devices(sdp2430_devices, ARRAY_SIZE(sdp2430_devices));
203 omap_serial_init(); 209 omap_serial_init();
204 omap2_hsmmc_init(mmc); 210 omap2_hsmmc_init(mmc);
205 usb_musb_init(); 211 usb_musb_init(&musb_board_data);
206 board_smc91x_init(); 212 board_smc91x_init();
207 213
208 /* Turn off secondary LCD backlight */ 214 /* Turn off secondary LCD backlight */
diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c
index 5adef517a2b3..f312b1513753 100644
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -46,6 +46,7 @@
46#include "mux.h" 46#include "mux.h"
47#include "sdram-qimonda-hyb18m512160af-6.h" 47#include "sdram-qimonda-hyb18m512160af-6.h"
48#include "hsmmc.h" 48#include "hsmmc.h"
49#include "pm.h"
49 50
50#define CONFIG_DISABLE_HFCLK 1 51#define CONFIG_DISABLE_HFCLK 1
51 52
@@ -57,6 +58,24 @@
57 58
58#define TWL4030_MSECURE_GPIO 22 59#define TWL4030_MSECURE_GPIO 22
59 60
61/* FIXME: These values need to be updated based on more profiling on 3430sdp*/
62static struct cpuidle_params omap3_cpuidle_params_table[] = {
63 /* C1 */
64 {1, 2, 2, 5},
65 /* C2 */
66 {1, 10, 10, 30},
67 /* C3 */
68 {1, 50, 50, 300},
69 /* C4 */
70 {1, 1500, 1800, 4000},
71 /* C5 */
72 {1, 2500, 7500, 12000},
73 /* C6 */
74 {1, 3000, 8500, 15000},
75 /* C7 */
76 {1, 10000, 30000, 300000},
77};
78
60static int board_keymap[] = { 79static int board_keymap[] = {
61 KEY(0, 0, KEY_LEFT), 80 KEY(0, 0, KEY_LEFT),
62 KEY(0, 1, KEY_RIGHT), 81 KEY(0, 1, KEY_RIGHT),
@@ -307,6 +326,7 @@ static void __init omap_3430sdp_init_irq(void)
307{ 326{
308 omap_board_config = sdp3430_config; 327 omap_board_config = sdp3430_config;
309 omap_board_config_size = ARRAY_SIZE(sdp3430_config); 328 omap_board_config_size = ARRAY_SIZE(sdp3430_config);
329 omap3_pm_init_cpuidle(omap3_cpuidle_params_table);
310 omap2_init_common_hw(hyb18m512160af6_sdrc_params, NULL); 330 omap2_init_common_hw(hyb18m512160af6_sdrc_params, NULL);
311 omap_init_irq(); 331 omap_init_irq();
312 omap_gpio_init(); 332 omap_gpio_init();
@@ -760,6 +780,12 @@ static struct flash_partitions sdp_flash_partitions[] = {
760 }, 780 },
761}; 781};
762 782
783static struct omap_musb_board_data musb_board_data = {
784 .interface_type = MUSB_INTERFACE_ULPI,
785 .mode = MUSB_OTG,
786 .power = 100,
787};
788
763static void __init omap_3430sdp_init(void) 789static void __init omap_3430sdp_init(void)
764{ 790{
765 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); 791 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
@@ -774,7 +800,7 @@ static void __init omap_3430sdp_init(void)
774 ARRAY_SIZE(sdp3430_spi_board_info)); 800 ARRAY_SIZE(sdp3430_spi_board_info));
775 ads7846_dev_init(); 801 ads7846_dev_init();
776 omap_serial_init(); 802 omap_serial_init();
777 usb_musb_init(); 803 usb_musb_init(&musb_board_data);
778 board_smc91x_init(); 804 board_smc91x_init();
779 sdp_flash_init(sdp_flash_partitions); 805 sdp_flash_init(sdp_flash_partitions);
780 sdp3430_display_init(); 806 sdp3430_display_init();
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
index 793ce8f4e927..029c6c9b3a6d 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -17,6 +17,7 @@
17#include <linux/platform_device.h> 17#include <linux/platform_device.h>
18#include <linux/io.h> 18#include <linux/io.h>
19#include <linux/gpio.h> 19#include <linux/gpio.h>
20#include <linux/usb/otg.h>
20 21
21#include <mach/hardware.h> 22#include <mach/hardware.h>
22#include <asm/mach-types.h> 23#include <asm/mach-types.h>
@@ -27,6 +28,7 @@
27#include <plat/common.h> 28#include <plat/common.h>
28#include <plat/control.h> 29#include <plat/control.h>
29#include <plat/timer-gp.h> 30#include <plat/timer-gp.h>
31#include <plat/usb.h>
30#include <asm/hardware/gic.h> 32#include <asm/hardware/gic.h>
31 33
32static struct platform_device sdp4430_lcd_device = { 34static struct platform_device sdp4430_lcd_device = {
@@ -73,11 +75,21 @@ static void __init omap_4430sdp_init_irq(void)
73 omap_gpio_init(); 75 omap_gpio_init();
74} 76}
75 77
78static struct omap_musb_board_data musb_board_data = {
79 .interface_type = MUSB_INTERFACE_UTMI,
80 .mode = MUSB_PERIPHERAL,
81 .power = 100,
82};
76 83
77static void __init omap_4430sdp_init(void) 84static void __init omap_4430sdp_init(void)
78{ 85{
79 platform_add_devices(sdp4430_devices, ARRAY_SIZE(sdp4430_devices)); 86 platform_add_devices(sdp4430_devices, ARRAY_SIZE(sdp4430_devices));
80 omap_serial_init(); 87 omap_serial_init();
88 /* OMAP4 SDP uses internal transceiver so register nop transceiver */
89 usb_nop_xceiv_register();
90 /* FIXME: allow multi-omap to boot until musb is updated for omap4 */
91 if (!cpu_is_omap44xx())
92 usb_musb_init(&musb_board_data);
81} 93}
82 94
83static void __init omap_4430sdp_map_io(void) 95static void __init omap_4430sdp_map_io(void)
diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c
index ad323b46477d..e6b8967f5e68 100644
--- a/arch/arm/mach-omap2/board-am3517evm.c
+++ b/arch/arm/mach-omap2/board-am3517evm.c
@@ -20,6 +20,7 @@
20#include <linux/init.h> 20#include <linux/init.h>
21#include <linux/platform_device.h> 21#include <linux/platform_device.h>
22#include <linux/gpio.h> 22#include <linux/gpio.h>
23#include <linux/i2c/pca953x.h>
23 24
24#include <mach/hardware.h> 25#include <mach/hardware.h>
25#include <mach/am35xx.h> 26#include <mach/am35xx.h>
@@ -38,6 +39,83 @@
38#define LCD_PANEL_BKLIGHT_PWR 182 39#define LCD_PANEL_BKLIGHT_PWR 182
39#define LCD_PANEL_PWM 181 40#define LCD_PANEL_PWM 181
40 41
42static struct i2c_board_info __initdata am3517evm_i2c_boardinfo[] = {
43 {
44 I2C_BOARD_INFO("s35390a", 0x30),
45 .type = "s35390a",
46 },
47};
48
49/*
50 * RTC - S35390A
51 */
52#define GPIO_RTCS35390A_IRQ 55
53
54static void __init am3517_evm_rtc_init(void)
55{
56 int r;
57
58 omap_mux_init_gpio(GPIO_RTCS35390A_IRQ, OMAP_PIN_INPUT_PULLUP);
59 r = gpio_request(GPIO_RTCS35390A_IRQ, "rtcs35390a-irq");
60 if (r < 0) {
61 printk(KERN_WARNING "failed to request GPIO#%d\n",
62 GPIO_RTCS35390A_IRQ);
63 return;
64 }
65 r = gpio_direction_input(GPIO_RTCS35390A_IRQ);
66 if (r < 0) {
67 printk(KERN_WARNING "GPIO#%d cannot be configured as input\n",
68 GPIO_RTCS35390A_IRQ);
69 gpio_free(GPIO_RTCS35390A_IRQ);
70 return;
71 }
72 am3517evm_i2c_boardinfo[0].irq = gpio_to_irq(GPIO_RTCS35390A_IRQ);
73}
74
75/*
76 * I2C GPIO Expander - TCA6416
77 */
78
79/* Mounted on Base-Board */
80static struct pca953x_platform_data am3517evm_gpio_expander_info_0 = {
81 .gpio_base = OMAP_MAX_GPIO_LINES,
82};
83static struct i2c_board_info __initdata am3517evm_tca6516_info_0[] = {
84 {
85 I2C_BOARD_INFO("tca6416", 0x21),
86 .platform_data = &am3517evm_gpio_expander_info_0,
87 },
88};
89
90/* Mounted on UI Card */
91static struct pca953x_platform_data am3517evm_ui_gpio_expander_info_1 = {
92 .gpio_base = OMAP_MAX_GPIO_LINES + 16,
93};
94static struct pca953x_platform_data am3517evm_ui_gpio_expander_info_2 = {
95 .gpio_base = OMAP_MAX_GPIO_LINES + 32,
96};
97static struct i2c_board_info __initdata am3517evm_ui_tca6516_info[] = {
98 {
99 I2C_BOARD_INFO("tca6416", 0x20),
100 .platform_data = &am3517evm_ui_gpio_expander_info_1,
101 },
102 {
103 I2C_BOARD_INFO("tca6416", 0x21),
104 .platform_data = &am3517evm_ui_gpio_expander_info_2,
105 },
106};
107
108static int __init am3517_evm_i2c_init(void)
109{
110 omap_register_i2c_bus(1, 400, NULL, 0);
111 omap_register_i2c_bus(2, 400, am3517evm_tca6516_info_0,
112 ARRAY_SIZE(am3517evm_tca6516_info_0));
113 omap_register_i2c_bus(3, 400, am3517evm_ui_tca6516_info,
114 ARRAY_SIZE(am3517evm_ui_tca6516_info));
115
116 return 0;
117}
118
41static int lcd_enabled; 119static int lcd_enabled;
42static int dvi_enabled; 120static int dvi_enabled;
43 121
@@ -216,6 +294,8 @@ static struct omap_board_mux board_mux[] __initdata = {
216 294
217static void __init am3517_evm_init(void) 295static void __init am3517_evm_init(void)
218{ 296{
297 am3517_evm_i2c_init();
298
219 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); 299 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
220 platform_add_devices(am3517_evm_devices, 300 platform_add_devices(am3517_evm_devices,
221 ARRAY_SIZE(am3517_evm_devices)); 301 ARRAY_SIZE(am3517_evm_devices));
@@ -224,6 +304,12 @@ static void __init am3517_evm_init(void)
224 usb_ehci_init(&ehci_pdata); 304 usb_ehci_init(&ehci_pdata);
225 /* DSS */ 305 /* DSS */
226 am3517_evm_display_init(); 306 am3517_evm_display_init();
307
308 /* RTC - S35390A */
309 am3517_evm_rtc_init();
310
311 i2c_register_board_info(1, am3517evm_i2c_boardinfo,
312 ARRAY_SIZE(am3517evm_i2c_boardinfo));
227} 313}
228 314
229static void __init am3517_evm_map_io(void) 315static void __init am3517_evm_map_io(void)
diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c
index 8659c3e2ef6e..afa77caaff4d 100644
--- a/arch/arm/mach-omap2/board-cm-t35.c
+++ b/arch/arm/mach-omap2/board-cm-t35.c
@@ -811,6 +811,12 @@ static struct omap_board_mux board_mux[] __initdata = {
811 { .reg_offset = OMAP_MUX_TERMINATOR }, 811 { .reg_offset = OMAP_MUX_TERMINATOR },
812}; 812};
813 813
814static struct omap_musb_board_data musb_board_data = {
815 .interface_type = MUSB_INTERFACE_ULPI,
816 .mode = MUSB_OTG,
817 .power = 100,
818};
819
814static void __init cm_t35_init(void) 820static void __init cm_t35_init(void)
815{ 821{
816 omap3_mux_init(board_mux, OMAP_PACKAGE_CUS); 822 omap3_mux_init(board_mux, OMAP_PACKAGE_CUS);
@@ -822,7 +828,7 @@ static void __init cm_t35_init(void)
822 cm_t35_init_led(); 828 cm_t35_init_led();
823 cm_t35_init_display(); 829 cm_t35_init_display();
824 830
825 usb_musb_init(); 831 usb_musb_init(&musb_board_data);
826} 832}
827 833
828MACHINE_START(CM_T35, "Compulab CM-T35") 834MACHINE_START(CM_T35, "Compulab CM-T35")
diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c
new file mode 100644
index 000000000000..371019054b49
--- /dev/null
+++ b/arch/arm/mach-omap2/board-devkit8000.c
@@ -0,0 +1,697 @@
1/*
2 * board-devkit8000.c - TimLL Devkit8000
3 *
4 * Copyright (C) 2009 Kim Botherway
5 * Copyright (C) 2010 Thomas Weber
6 *
7 * Modified from mach-omap2/board-omap3beagle.c
8 *
9 * Initial code: Syed Mohammed Khasim
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15
16#include <linux/kernel.h>
17#include <linux/init.h>
18#include <linux/platform_device.h>
19#include <linux/delay.h>
20#include <linux/err.h>
21#include <linux/clk.h>
22#include <linux/io.h>
23#include <linux/leds.h>
24#include <linux/gpio.h>
25#include <linux/input.h>
26#include <linux/gpio_keys.h>
27
28#include <linux/mtd/mtd.h>
29#include <linux/mtd/partitions.h>
30#include <linux/mtd/nand.h>
31
32#include <linux/regulator/machine.h>
33#include <linux/i2c/twl.h>
34
35#include <mach/hardware.h>
36#include <asm/mach-types.h>
37#include <asm/mach/arch.h>
38#include <asm/mach/map.h>
39#include <asm/mach/flash.h>
40
41#include <plat/board.h>
42#include <plat/common.h>
43#include <plat/gpmc.h>
44#include <plat/nand.h>
45#include <plat/usb.h>
46#include <plat/timer-gp.h>
47#include <plat/display.h>
48
49#include <plat/mcspi.h>
50#include <linux/input/matrix_keypad.h>
51#include <linux/spi/spi.h>
52#include <linux/spi/ads7846.h>
53#include <linux/usb/otg.h>
54#include <linux/dm9000.h>
55#include <linux/interrupt.h>
56
57#include "sdram-micron-mt46h32m32lf-6.h"
58
59#include "mux.h"
60#include "hsmmc.h"
61
62#define GPMC_CS0_BASE 0x60
63#define GPMC_CS_SIZE 0x30
64
65#define NAND_BLOCK_SIZE SZ_128K
66
67#define OMAP_DM9000_GPIO_IRQ 25
68#define OMAP3_DEVKIT_TS_GPIO 27
69
70static struct mtd_partition devkit8000_nand_partitions[] = {
71 /* All the partition sizes are listed in terms of NAND block size */
72 {
73 .name = "X-Loader",
74 .offset = 0,
75 .size = 4 * NAND_BLOCK_SIZE,
76 .mask_flags = MTD_WRITEABLE, /* force read-only */
77 },
78 {
79 .name = "U-Boot",
80 .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
81 .size = 15 * NAND_BLOCK_SIZE,
82 .mask_flags = MTD_WRITEABLE, /* force read-only */
83 },
84 {
85 .name = "U-Boot Env",
86 .offset = MTDPART_OFS_APPEND, /* Offset = 0x260000 */
87 .size = 1 * NAND_BLOCK_SIZE,
88 },
89 {
90 .name = "Kernel",
91 .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */
92 .size = 32 * NAND_BLOCK_SIZE,
93 },
94 {
95 .name = "File System",
96 .offset = MTDPART_OFS_APPEND, /* Offset = 0x680000 */
97 .size = MTDPART_SIZ_FULL,
98 },
99};
100
101static struct omap_nand_platform_data devkit8000_nand_data = {
102 .options = NAND_BUSWIDTH_16,
103 .parts = devkit8000_nand_partitions,
104 .nr_parts = ARRAY_SIZE(devkit8000_nand_partitions),
105 .dma_channel = -1, /* disable DMA in OMAP NAND driver */
106};
107
108static struct resource devkit8000_nand_resource = {
109 .flags = IORESOURCE_MEM,
110};
111
112static struct platform_device devkit8000_nand_device = {
113 .name = "omap2-nand",
114 .id = -1,
115 .dev = {
116 .platform_data = &devkit8000_nand_data,
117 },
118 .num_resources = 1,
119 .resource = &devkit8000_nand_resource,
120};
121
122static struct omap2_hsmmc_info mmc[] = {
123 {
124 .mmc = 1,
125 .wires = 8,
126 .gpio_wp = 29,
127 },
128 {} /* Terminator */
129};
130static struct omap_board_config_kernel devkit8000_config[] __initdata = {
131};
132
133static int devkit8000_panel_enable_lcd(struct omap_dss_device *dssdev)
134{
135 twl_i2c_write_u8(TWL4030_MODULE_GPIO, 0x80, REG_GPIODATADIR1);
136 twl_i2c_write_u8(TWL4030_MODULE_LED, 0x0, 0x0);
137
138 return 0;
139}
140
141static void devkit8000_panel_disable_lcd(struct omap_dss_device *dssdev)
142{
143}
144static int devkit8000_panel_enable_dvi(struct omap_dss_device *dssdev)
145{
146 return 0;
147}
148
149static void devkit8000_panel_disable_dvi(struct omap_dss_device *dssdev)
150{
151}
152
153static int devkit8000_panel_enable_tv(struct omap_dss_device *dssdev)
154{
155
156 return 0;
157}
158
159static void devkit8000_panel_disable_tv(struct omap_dss_device *dssdev)
160{
161}
162
163
164static struct regulator_consumer_supply devkit8000_vmmc1_supply = {
165 .supply = "vmmc",
166};
167
168static struct regulator_consumer_supply devkit8000_vsim_supply = {
169 .supply = "vmmc_aux",
170};
171
172
173static struct omap_dss_device devkit8000_lcd_device = {
174 .name = "lcd",
175 .driver_name = "innolux_at_panel",
176 .type = OMAP_DISPLAY_TYPE_DPI,
177 .phy.dpi.data_lines = 24,
178 .platform_enable = devkit8000_panel_enable_lcd,
179 .platform_disable = devkit8000_panel_disable_lcd,
180};
181static struct omap_dss_device devkit8000_dvi_device = {
182 .name = "dvi",
183 .driver_name = "generic_panel",
184 .type = OMAP_DISPLAY_TYPE_DPI,
185 .phy.dpi.data_lines = 24,
186 .platform_enable = devkit8000_panel_enable_dvi,
187 .platform_disable = devkit8000_panel_disable_dvi,
188};
189
190static struct omap_dss_device devkit8000_tv_device = {
191 .name = "tv",
192 .driver_name = "venc",
193 .type = OMAP_DISPLAY_TYPE_VENC,
194 .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
195 .platform_enable = devkit8000_panel_enable_tv,
196 .platform_disable = devkit8000_panel_disable_tv,
197};
198
199
200static struct omap_dss_device *devkit8000_dss_devices[] = {
201 &devkit8000_lcd_device,
202 &devkit8000_dvi_device,
203 &devkit8000_tv_device,
204};
205
206static struct omap_dss_board_info devkit8000_dss_data = {
207 .num_devices = ARRAY_SIZE(devkit8000_dss_devices),
208 .devices = devkit8000_dss_devices,
209 .default_device = &devkit8000_lcd_device,
210};
211
212static struct platform_device devkit8000_dss_device = {
213 .name = "omapdss",
214 .id = -1,
215 .dev = {
216 .platform_data = &devkit8000_dss_data,
217 },
218};
219
220static struct regulator_consumer_supply devkit8000_vdda_dac_supply = {
221 .supply = "vdda_dac",
222 .dev = &devkit8000_dss_device.dev,
223};
224
225static int board_keymap[] = {
226 KEY(0, 0, KEY_1),
227 KEY(1, 0, KEY_2),
228 KEY(2, 0, KEY_3),
229 KEY(0, 1, KEY_4),
230 KEY(1, 1, KEY_5),
231 KEY(2, 1, KEY_6),
232 KEY(3, 1, KEY_F5),
233 KEY(0, 2, KEY_7),
234 KEY(1, 2, KEY_8),
235 KEY(2, 2, KEY_9),
236 KEY(3, 2, KEY_F6),
237 KEY(0, 3, KEY_F7),
238 KEY(1, 3, KEY_0),
239 KEY(2, 3, KEY_F8),
240 PERSISTENT_KEY(4, 5),
241 KEY(4, 4, KEY_VOLUMEUP),
242 KEY(5, 5, KEY_VOLUMEDOWN),
243 0
244};
245
246static struct matrix_keymap_data board_map_data = {
247 .keymap = board_keymap,
248 .keymap_size = ARRAY_SIZE(board_keymap),
249};
250
251static struct twl4030_keypad_data devkit8000_kp_data = {
252 .keymap_data = &board_map_data,
253 .rows = 6,
254 .cols = 6,
255 .rep = 1,
256};
257
258static struct gpio_led gpio_leds[];
259
260static int devkit8000_twl_gpio_setup(struct device *dev,
261 unsigned gpio, unsigned ngpio)
262{
263 omap_mux_init_gpio(29, OMAP_PIN_INPUT);
264 /* gpio + 0 is "mmc0_cd" (input/IRQ) */
265 mmc[0].gpio_cd = gpio + 0;
266 omap2_hsmmc_init(mmc);
267
268 /* link regulators to MMC adapters */
269 devkit8000_vmmc1_supply.dev = mmc[0].dev;
270 devkit8000_vsim_supply.dev = mmc[0].dev;
271
272 /* REVISIT: need ehci-omap hooks for external VBUS
273 * power switch and overcurrent detect
274 */
275
276 gpio_request(gpio + 1, "EHCI_nOC");
277 gpio_direction_input(gpio + 1);
278
279 /* TWL4030_GPIO_MAX + 0 == ledA, EHCI nEN_USB_PWR (out, active low) */
280 gpio_request(gpio + TWL4030_GPIO_MAX, "nEN_USB_PWR");
281 gpio_direction_output(gpio + TWL4030_GPIO_MAX, 1);
282
283 /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */
284 gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1;
285
286 return 0;
287}
288
289static struct twl4030_gpio_platform_data devkit8000_gpio_data = {
290 .gpio_base = OMAP_MAX_GPIO_LINES,
291 .irq_base = TWL4030_GPIO_IRQ_BASE,
292 .irq_end = TWL4030_GPIO_IRQ_END,
293 .use_leds = true,
294 .pullups = BIT(1),
295 .pulldowns = BIT(2) | BIT(6) | BIT(7) | BIT(8) | BIT(13)
296 | BIT(15) | BIT(16) | BIT(17),
297 .setup = devkit8000_twl_gpio_setup,
298};
299
300static struct regulator_consumer_supply devkit8000_vpll2_supplies[] = {
301 {
302 .supply = "vdvi",
303 .dev = &devkit8000_lcd_device.dev,
304 },
305 {
306 .supply = "vdss_dsi",
307 .dev = &devkit8000_dss_device.dev,
308 }
309};
310
311/* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
312static struct regulator_init_data devkit8000_vmmc1 = {
313 .constraints = {
314 .min_uV = 1850000,
315 .max_uV = 3150000,
316 .valid_modes_mask = REGULATOR_MODE_NORMAL
317 | REGULATOR_MODE_STANDBY,
318 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
319 | REGULATOR_CHANGE_MODE
320 | REGULATOR_CHANGE_STATUS,
321 },
322 .num_consumer_supplies = 1,
323 .consumer_supplies = &devkit8000_vmmc1_supply,
324};
325
326/* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */
327static struct regulator_init_data devkit8000_vsim = {
328 .constraints = {
329 .min_uV = 1800000,
330 .max_uV = 3000000,
331 .valid_modes_mask = REGULATOR_MODE_NORMAL
332 | REGULATOR_MODE_STANDBY,
333 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
334 | REGULATOR_CHANGE_MODE
335 | REGULATOR_CHANGE_STATUS,
336 },
337 .num_consumer_supplies = 1,
338 .consumer_supplies = &devkit8000_vsim_supply,
339};
340
341/* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */
342static struct regulator_init_data devkit8000_vdac = {
343 .constraints = {
344 .min_uV = 1800000,
345 .max_uV = 1800000,
346 .valid_modes_mask = REGULATOR_MODE_NORMAL
347 | REGULATOR_MODE_STANDBY,
348 .valid_ops_mask = REGULATOR_CHANGE_MODE
349 | REGULATOR_CHANGE_STATUS,
350 },
351 .num_consumer_supplies = 1,
352 .consumer_supplies = &devkit8000_vdda_dac_supply,
353};
354
355/* VPLL2 for digital video outputs */
356static struct regulator_init_data devkit8000_vpll2 = {
357 .constraints = {
358 .name = "VDVI",
359 .min_uV = 1800000,
360 .max_uV = 1800000,
361 .valid_modes_mask = REGULATOR_MODE_NORMAL
362 | REGULATOR_MODE_STANDBY,
363 .valid_ops_mask = REGULATOR_CHANGE_MODE
364 | REGULATOR_CHANGE_STATUS,
365 },
366 .num_consumer_supplies = ARRAY_SIZE(devkit8000_vpll2_supplies),
367 .consumer_supplies = devkit8000_vpll2_supplies,
368};
369
370static struct twl4030_usb_data devkit8000_usb_data = {
371 .usb_mode = T2_USB_MODE_ULPI,
372};
373
374static struct twl4030_codec_audio_data devkit8000_audio_data = {
375 .audio_mclk = 26000000,
376};
377
378static struct twl4030_codec_data devkit8000_codec_data = {
379 .audio_mclk = 26000000,
380 .audio = &devkit8000_audio_data,
381};
382
383static struct twl4030_platform_data devkit8000_twldata = {
384 .irq_base = TWL4030_IRQ_BASE,
385 .irq_end = TWL4030_IRQ_END,
386
387 /* platform_data for children goes here */
388 .usb = &devkit8000_usb_data,
389 .gpio = &devkit8000_gpio_data,
390 .codec = &devkit8000_codec_data,
391 .vmmc1 = &devkit8000_vmmc1,
392 .vsim = &devkit8000_vsim,
393 .vdac = &devkit8000_vdac,
394 .vpll2 = &devkit8000_vpll2,
395 .keypad = &devkit8000_kp_data,
396};
397
398static struct i2c_board_info __initdata devkit8000_i2c_boardinfo[] = {
399 {
400 I2C_BOARD_INFO("twl4030", 0x48),
401 .flags = I2C_CLIENT_WAKE,
402 .irq = INT_34XX_SYS_NIRQ,
403 .platform_data = &devkit8000_twldata,
404 },
405};
406
407static int __init devkit8000_i2c_init(void)
408{
409 omap_register_i2c_bus(1, 2600, devkit8000_i2c_boardinfo,
410 ARRAY_SIZE(devkit8000_i2c_boardinfo));
411 /* Bus 3 is attached to the DVI port where devices like the pico DLP
412 * projector don't work reliably with 400kHz */
413 omap_register_i2c_bus(3, 400, NULL, 0);
414 return 0;
415}
416
417static struct gpio_led gpio_leds[] = {
418 {
419 .name = "led1",
420 .default_trigger = "heartbeat",
421 .gpio = 186,
422 .active_low = true,
423 },
424 {
425 .name = "led2",
426 .default_trigger = "mmc0",
427 .gpio = 163,
428 .active_low = true,
429 },
430 {
431 .name = "ledB",
432 .default_trigger = "none",
433 .gpio = 153,
434 .active_low = true,
435 },
436 {
437 .name = "led3",
438 .default_trigger = "none",
439 .gpio = 164,
440 .active_low = true,
441 },
442};
443
444static struct gpio_led_platform_data gpio_led_info = {
445 .leds = gpio_leds,
446 .num_leds = ARRAY_SIZE(gpio_leds),
447};
448
449static struct platform_device leds_gpio = {
450 .name = "leds-gpio",
451 .id = -1,
452 .dev = {
453 .platform_data = &gpio_led_info,
454 },
455};
456
457static struct gpio_keys_button gpio_buttons[] = {
458 {
459 .code = BTN_EXTRA,
460 .gpio = 26,
461 .desc = "user",
462 .wakeup = 1,
463 },
464};
465
466static struct gpio_keys_platform_data gpio_key_info = {
467 .buttons = gpio_buttons,
468 .nbuttons = ARRAY_SIZE(gpio_buttons),
469};
470
471static struct platform_device keys_gpio = {
472 .name = "gpio-keys",
473 .id = -1,
474 .dev = {
475 .platform_data = &gpio_key_info,
476 },
477};
478
479
480static void __init devkit8000_init_irq(void)
481{
482 omap_board_config = devkit8000_config;
483 omap_board_config_size = ARRAY_SIZE(devkit8000_config);
484 omap2_init_common_hw(mt46h32m32lf6_sdrc_params,
485 mt46h32m32lf6_sdrc_params);
486 omap_init_irq();
487#ifdef CONFIG_OMAP_32K_TIMER
488 omap2_gp_clockevent_set_gptimer(12);
489#endif
490 omap_gpio_init();
491}
492
493static void __init devkit8000_ads7846_init(void)
494{
495 int gpio = OMAP3_DEVKIT_TS_GPIO;
496 int ret;
497
498 ret = gpio_request(gpio, "ads7846_pen_down");
499 if (ret < 0) {
500 printk(KERN_ERR "Failed to request GPIO %d for "
501 "ads7846 pen down IRQ\n", gpio);
502 return;
503 }
504
505 gpio_direction_input(gpio);
506}
507
508static int ads7846_get_pendown_state(void)
509{
510 return !gpio_get_value(OMAP3_DEVKIT_TS_GPIO);
511}
512
513static struct ads7846_platform_data ads7846_config = {
514 .x_max = 0x0fff,
515 .y_max = 0x0fff,
516 .x_plate_ohms = 180,
517 .pressure_max = 255,
518 .debounce_max = 10,
519 .debounce_tol = 5,
520 .debounce_rep = 1,
521 .get_pendown_state = ads7846_get_pendown_state,
522 .keep_vref_on = 1,
523 .settle_delay_usecs = 150,
524};
525
526static struct omap2_mcspi_device_config ads7846_mcspi_config = {
527 .turbo_mode = 0,
528 .single_channel = 1, /* 0: slave, 1: master */
529};
530
531static struct spi_board_info devkit8000_spi_board_info[] __initdata = {
532 {
533 .modalias = "ads7846",
534 .bus_num = 2,
535 .chip_select = 0,
536 .max_speed_hz = 1500000,
537 .controller_data = &ads7846_mcspi_config,
538 .irq = OMAP_GPIO_IRQ(OMAP3_DEVKIT_TS_GPIO),
539 .platform_data = &ads7846_config,
540 }
541};
542
543#define OMAP_DM9000_BASE 0x2c000000
544
545static struct resource omap_dm9000_resources[] = {
546 [0] = {
547 .start = OMAP_DM9000_BASE,
548 .end = (OMAP_DM9000_BASE + 0x4 - 1),
549 .flags = IORESOURCE_MEM,
550 },
551 [1] = {
552 .start = (OMAP_DM9000_BASE + 0x400),
553 .end = (OMAP_DM9000_BASE + 0x400 + 0x4 - 1),
554 .flags = IORESOURCE_MEM,
555 },
556 [2] = {
557 .start = OMAP_GPIO_IRQ(OMAP_DM9000_GPIO_IRQ),
558 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
559 },
560};
561
562static struct dm9000_plat_data omap_dm9000_platdata = {
563 .flags = DM9000_PLATF_16BITONLY,
564};
565
566static struct platform_device omap_dm9000_dev = {
567 .name = "dm9000",
568 .id = -1,
569 .num_resources = ARRAY_SIZE(omap_dm9000_resources),
570 .resource = omap_dm9000_resources,
571 .dev = {
572 .platform_data = &omap_dm9000_platdata,
573 },
574};
575
576static void __init omap_dm9000_init(void)
577{
578 if (gpio_request(OMAP_DM9000_GPIO_IRQ, "dm9000 irq") < 0) {
579 printk(KERN_ERR "Failed to request GPIO%d for dm9000 IRQ\n",
580 OMAP_DM9000_GPIO_IRQ);
581 return;
582 }
583
584 gpio_direction_input(OMAP_DM9000_GPIO_IRQ);
585}
586
587static struct platform_device *devkit8000_devices[] __initdata = {
588 &devkit8000_dss_device,
589 &leds_gpio,
590 &keys_gpio,
591 &omap_dm9000_dev,
592};
593
594static void __init devkit8000_flash_init(void)
595{
596 u8 cs = 0;
597 u8 nandcs = GPMC_CS_NUM + 1;
598
599 u32 gpmc_base_add = OMAP34XX_GPMC_VIRT;
600
601 /* find out the chip-select on which NAND exists */
602 while (cs < GPMC_CS_NUM) {
603 u32 ret = 0;
604 ret = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1);
605
606 if ((ret & 0xC00) == 0x800) {
607 printk(KERN_INFO "Found NAND on CS%d\n", cs);
608 if (nandcs > GPMC_CS_NUM)
609 nandcs = cs;
610 }
611 cs++;
612 }
613
614 if (nandcs > GPMC_CS_NUM) {
615 printk(KERN_INFO "NAND: Unable to find configuration "
616 "in GPMC\n ");
617 return;
618 }
619
620 if (nandcs < GPMC_CS_NUM) {
621 devkit8000_nand_data.cs = nandcs;
622 devkit8000_nand_data.gpmc_cs_baseaddr = (void *)
623 (gpmc_base_add + GPMC_CS0_BASE + nandcs * GPMC_CS_SIZE);
624 devkit8000_nand_data.gpmc_baseaddr = (void *)
625 (gpmc_base_add);
626
627 printk(KERN_INFO "Registering NAND on CS%d\n", nandcs);
628 if (platform_device_register(&devkit8000_nand_device) < 0)
629 printk(KERN_ERR "Unable to register NAND device\n");
630 }
631}
632
633static struct omap_musb_board_data musb_board_data = {
634 .interface_type = MUSB_INTERFACE_ULPI,
635 .mode = MUSB_OTG,
636 .power = 100,
637};
638
639static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
640
641 .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY,
642 .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,
643 .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,
644
645 .phy_reset = true,
646 .reset_gpio_port[0] = -EINVAL,
647 .reset_gpio_port[1] = 147,
648 .reset_gpio_port[2] = -EINVAL
649};
650
651static void __init devkit8000_init(void)
652{
653 devkit8000_i2c_init();
654 platform_add_devices(devkit8000_devices,
655 ARRAY_SIZE(devkit8000_devices));
656 omap_board_config = devkit8000_config;
657 omap_board_config_size = ARRAY_SIZE(devkit8000_config);
658
659 spi_register_board_info(devkit8000_spi_board_info,
660 ARRAY_SIZE(devkit8000_spi_board_info));
661
662 omap_serial_init();
663
664 omap_dm9000_init();
665
666 devkit8000_ads7846_init();
667
668 omap_mux_init_gpio(170, OMAP_PIN_INPUT);
669
670 gpio_request(170, "DVI_nPD");
671 /* REVISIT leave DVI powered down until it's needed ... */
672 gpio_direction_output(170, true);
673
674 usb_musb_init(&musb_board_data);
675 usb_ehci_init(&ehci_pdata);
676 devkit8000_flash_init();
677
678 /* Ensure SDRC pins are mux'd for self-refresh */
679 omap_mux_init_signal("sdr_cke0", OMAP_PIN_OUTPUT);
680 omap_mux_init_signal("sdr_cke1", OMAP_PIN_OUTPUT);
681}
682
683static void __init devkit8000_map_io(void)
684{
685 omap2_set_globals_343x();
686 omap34xx_map_common_io();
687}
688
689MACHINE_START(DEVKIT8000, "OMAP3 Devkit8000")
690 .phys_io = 0x48000000,
691 .io_pg_offst = ((0xd8000000) >> 18) & 0xfffc,
692 .boot_params = 0x80000100,
693 .map_io = devkit8000_map_io,
694 .init_irq = devkit8000_init_irq,
695 .init_machine = devkit8000_init,
696 .timer = &omap_timer,
697MACHINE_END
diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c
index adc1b46fa04e..9958987a3d0a 100644
--- a/arch/arm/mach-omap2/board-igep0020.c
+++ b/arch/arm/mach-omap2/board-igep0020.c
@@ -16,6 +16,7 @@
16#include <linux/clk.h> 16#include <linux/clk.h>
17#include <linux/io.h> 17#include <linux/io.h>
18#include <linux/gpio.h> 18#include <linux/gpio.h>
19#include <linux/leds.h>
19#include <linux/interrupt.h> 20#include <linux/interrupt.h>
20 21
21#include <linux/regulator/machine.h> 22#include <linux/regulator/machine.h>
@@ -28,9 +29,12 @@
28#include <plat/common.h> 29#include <plat/common.h>
29#include <plat/gpmc.h> 30#include <plat/gpmc.h>
30#include <plat/usb.h> 31#include <plat/usb.h>
32#include <plat/display.h>
33#include <plat/onenand.h>
31 34
32#include "mux.h" 35#include "mux.h"
33#include "hsmmc.h" 36#include "hsmmc.h"
37#include "sdram-numonyx-m65kxxxxam.h"
34 38
35#define IGEP2_SMSC911X_CS 5 39#define IGEP2_SMSC911X_CS 5
36#define IGEP2_SMSC911X_GPIO 176 40#define IGEP2_SMSC911X_GPIO 176
@@ -38,6 +42,108 @@
38#define IGEP2_GPIO_LED0_RED 26 42#define IGEP2_GPIO_LED0_RED 26
39#define IGEP2_GPIO_LED0_GREEN 27 43#define IGEP2_GPIO_LED0_GREEN 27
40#define IGEP2_GPIO_LED1_RED 28 44#define IGEP2_GPIO_LED1_RED 28
45#define IGEP2_GPIO_DVI_PUP 170
46#define IGEP2_GPIO_WIFI_NPD 94
47#define IGEP2_GPIO_WIFI_NRESET 95
48
49#if defined(CONFIG_MTD_ONENAND_OMAP2) || \
50 defined(CONFIG_MTD_ONENAND_OMAP2_MODULE)
51
52#define ONENAND_MAP 0x20000000
53
54/* NAND04GR4E1A ( x2 Flash built-in COMBO POP MEMORY )
55 * Since the device is equipped with two DataRAMs, and two-plane NAND
56 * Flash memory array, these two component enables simultaneous program
57 * of 4KiB. Plane1 has only even blocks such as block0, block2, block4
58 * while Plane2 has only odd blocks such as block1, block3, block5.
59 * So MTD regards it as 4KiB page size and 256KiB block size 64*(2*2048)
60 */
61
62static struct mtd_partition igep2_onenand_partitions[] = {
63 {
64 .name = "X-Loader",
65 .offset = 0,
66 .size = 2 * (64*(2*2048))
67 },
68 {
69 .name = "U-Boot",
70 .offset = MTDPART_OFS_APPEND,
71 .size = 6 * (64*(2*2048)),
72 },
73 {
74 .name = "Environment",
75 .offset = MTDPART_OFS_APPEND,
76 .size = 2 * (64*(2*2048)),
77 },
78 {
79 .name = "Kernel",
80 .offset = MTDPART_OFS_APPEND,
81 .size = 12 * (64*(2*2048)),
82 },
83 {
84 .name = "File System",
85 .offset = MTDPART_OFS_APPEND,
86 .size = MTDPART_SIZ_FULL,
87 },
88};
89
90static int igep2_onenand_setup(void __iomem *onenand_base, int freq)
91{
92 /* nothing is required to be setup for onenand as of now */
93 return 0;
94}
95
96static struct omap_onenand_platform_data igep2_onenand_data = {
97 .parts = igep2_onenand_partitions,
98 .nr_parts = ARRAY_SIZE(igep2_onenand_partitions),
99 .onenand_setup = igep2_onenand_setup,
100 .dma_channel = -1, /* disable DMA in OMAP OneNAND driver */
101};
102
103static struct platform_device igep2_onenand_device = {
104 .name = "omap2-onenand",
105 .id = -1,
106 .dev = {
107 .platform_data = &igep2_onenand_data,
108 },
109};
110
111void __init igep2_flash_init(void)
112{
113 u8 cs = 0;
114 u8 onenandcs = GPMC_CS_NUM + 1;
115
116 while (cs < GPMC_CS_NUM) {
117 u32 ret = 0;
118 ret = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1);
119
120 /* Check if NAND/oneNAND is configured */
121 if ((ret & 0xC00) == 0x800)
122 /* NAND found */
123 pr_err("IGEP v2: Unsupported NAND found\n");
124 else {
125 ret = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7);
126 if ((ret & 0x3F) == (ONENAND_MAP >> 24))
127 /* ONENAND found */
128 onenandcs = cs;
129 }
130 cs++;
131 }
132 if (onenandcs > GPMC_CS_NUM) {
133 pr_err("IGEP v2: Unable to find configuration in GPMC\n");
134 return;
135 }
136
137 if (onenandcs < GPMC_CS_NUM) {
138 igep2_onenand_data.cs = onenandcs;
139 if (platform_device_register(&igep2_onenand_device) < 0)
140 pr_err("IGEP v2: Unable to register OneNAND device\n");
141 }
142}
143
144#else
145void __init igep2_flash_init(void) {}
146#endif
41 147
42#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE) 148#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
43 149
@@ -106,6 +212,10 @@ static struct regulator_consumer_supply igep2_vmmc1_supply = {
106 .supply = "vmmc", 212 .supply = "vmmc",
107}; 213};
108 214
215static struct regulator_consumer_supply igep2_vmmc2_supply = {
216 .supply = "vmmc",
217};
218
109/* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */ 219/* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */
110static struct regulator_init_data igep2_vmmc1 = { 220static struct regulator_init_data igep2_vmmc1 = {
111 .constraints = { 221 .constraints = {
@@ -121,6 +231,21 @@ static struct regulator_init_data igep2_vmmc1 = {
121 .consumer_supplies = &igep2_vmmc1_supply, 231 .consumer_supplies = &igep2_vmmc1_supply,
122}; 232};
123 233
234/* VMMC2 for OMAP VDD_MMC2 (i/o) and MMC2 WIFI */
235static struct regulator_init_data igep2_vmmc2 = {
236 .constraints = {
237 .min_uV = 1850000,
238 .max_uV = 3150000,
239 .valid_modes_mask = REGULATOR_MODE_NORMAL
240 | REGULATOR_MODE_STANDBY,
241 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
242 | REGULATOR_CHANGE_MODE
243 | REGULATOR_CHANGE_STATUS,
244 },
245 .num_consumer_supplies = 1,
246 .consumer_supplies = &igep2_vmmc2_supply,
247};
248
124static struct omap2_hsmmc_info mmc[] = { 249static struct omap2_hsmmc_info mmc[] = {
125 { 250 {
126 .mmc = 1, 251 .mmc = 1,
@@ -148,6 +273,7 @@ static int igep2_twl_gpio_setup(struct device *dev,
148 * regulators will be set up only *after* we return. 273 * regulators will be set up only *after* we return.
149 */ 274 */
150 igep2_vmmc1_supply.dev = mmc[0].dev; 275 igep2_vmmc1_supply.dev = mmc[0].dev;
276 igep2_vmmc2_supply.dev = mmc[1].dev;
151 277
152 return 0; 278 return 0;
153}; 279};
@@ -164,23 +290,130 @@ static struct twl4030_usb_data igep2_usb_data = {
164 .usb_mode = T2_USB_MODE_ULPI, 290 .usb_mode = T2_USB_MODE_ULPI,
165}; 291};
166 292
293static int igep2_enable_dvi(struct omap_dss_device *dssdev)
294{
295 gpio_direction_output(IGEP2_GPIO_DVI_PUP, 1);
296
297 return 0;
298}
299
300static void igep2_disable_dvi(struct omap_dss_device *dssdev)
301{
302 gpio_direction_output(IGEP2_GPIO_DVI_PUP, 0);
303}
304
305static struct omap_dss_device igep2_dvi_device = {
306 .type = OMAP_DISPLAY_TYPE_DPI,
307 .name = "dvi",
308 .driver_name = "generic_panel",
309 .phy.dpi.data_lines = 24,
310 .platform_enable = igep2_enable_dvi,
311 .platform_disable = igep2_disable_dvi,
312};
313
314static struct omap_dss_device *igep2_dss_devices[] = {
315 &igep2_dvi_device
316};
317
318static struct omap_dss_board_info igep2_dss_data = {
319 .num_devices = ARRAY_SIZE(igep2_dss_devices),
320 .devices = igep2_dss_devices,
321 .default_device = &igep2_dvi_device,
322};
323
324static struct platform_device igep2_dss_device = {
325 .name = "omapdss",
326 .id = -1,
327 .dev = {
328 .platform_data = &igep2_dss_data,
329 },
330};
331
332static struct regulator_consumer_supply igep2_vpll2_supply = {
333 .supply = "vdds_dsi",
334 .dev = &igep2_dss_device.dev,
335};
336
337static struct regulator_init_data igep2_vpll2 = {
338 .constraints = {
339 .name = "VDVI",
340 .min_uV = 1800000,
341 .max_uV = 1800000,
342 .apply_uV = true,
343 .valid_modes_mask = REGULATOR_MODE_NORMAL
344 | REGULATOR_MODE_STANDBY,
345 .valid_ops_mask = REGULATOR_CHANGE_MODE
346 | REGULATOR_CHANGE_STATUS,
347 },
348 .num_consumer_supplies = 1,
349 .consumer_supplies = &igep2_vpll2_supply,
350};
351
352static void __init igep2_display_init(void)
353{
354 if (gpio_request(IGEP2_GPIO_DVI_PUP, "GPIO_DVI_PUP") &&
355 gpio_direction_output(IGEP2_GPIO_DVI_PUP, 1))
356 pr_err("IGEP v2: Could not obtain gpio GPIO_DVI_PUP\n");
357}
358#ifdef CONFIG_LEDS_TRIGGERS
359static struct gpio_led gpio_leds[] = {
360 {
361 .name = "GPIO_LED1_RED",
362 .default_trigger = "heartbeat",
363 .gpio = IGEP2_GPIO_LED1_RED,
364 },
365};
366
367static struct gpio_led_platform_data gpio_leds_info = {
368 .leds = gpio_leds,
369 .num_leds = ARRAY_SIZE(gpio_leds),
370};
371
372static struct platform_device leds_gpio = {
373 .name = "leds-gpio",
374 .id = -1,
375 .dev = {
376 .platform_data = &gpio_leds_info,
377 },
378};
379#endif
380
381static struct platform_device *igep2_devices[] __initdata = {
382 &igep2_dss_device,
383#ifdef CONFIG_LEDS_TRIGGERS
384 &leds_gpio,
385#endif
386};
387
167static void __init igep2_init_irq(void) 388static void __init igep2_init_irq(void)
168{ 389{
169 omap_board_config = igep2_config; 390 omap_board_config = igep2_config;
170 omap_board_config_size = ARRAY_SIZE(igep2_config); 391 omap_board_config_size = ARRAY_SIZE(igep2_config);
171 omap2_init_common_hw(NULL, NULL); 392 omap2_init_common_hw(m65kxxxxam_sdrc_params, m65kxxxxam_sdrc_params);
172 omap_init_irq(); 393 omap_init_irq();
173 omap_gpio_init(); 394 omap_gpio_init();
174} 395}
175 396
397static struct twl4030_codec_audio_data igep2_audio_data = {
398 .audio_mclk = 26000000,
399};
400
401static struct twl4030_codec_data igep2_codec_data = {
402 .audio_mclk = 26000000,
403 .audio = &igep2_audio_data,
404};
405
176static struct twl4030_platform_data igep2_twldata = { 406static struct twl4030_platform_data igep2_twldata = {
177 .irq_base = TWL4030_IRQ_BASE, 407 .irq_base = TWL4030_IRQ_BASE,
178 .irq_end = TWL4030_IRQ_END, 408 .irq_end = TWL4030_IRQ_END,
179 409
180 /* platform_data for children goes here */ 410 /* platform_data for children goes here */
181 .usb = &igep2_usb_data, 411 .usb = &igep2_usb_data,
412 .codec = &igep2_codec_data,
182 .gpio = &igep2_gpio_data, 413 .gpio = &igep2_gpio_data,
183 .vmmc1 = &igep2_vmmc1, 414 .vmmc1 = &igep2_vmmc1,
415 .vmmc2 = &igep2_vmmc2,
416 .vpll2 = &igep2_vpll2,
184 417
185}; 418};
186 419
@@ -203,6 +436,23 @@ static int __init igep2_i2c_init(void)
203 return 0; 436 return 0;
204} 437}
205 438
439static struct omap_musb_board_data musb_board_data = {
440 .interface_type = MUSB_INTERFACE_ULPI,
441 .mode = MUSB_OTG,
442 .power = 100,
443};
444
445static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
446 .port_mode[0] = EHCI_HCD_OMAP_MODE_UNKNOWN,
447 .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,
448 .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,
449
450 .phy_reset = true,
451 .reset_gpio_port[0] = -EINVAL,
452 .reset_gpio_port[1] = IGEP2_GPIO_USBH_NRESET,
453 .reset_gpio_port[2] = -EINVAL,
454};
455
206#ifdef CONFIG_OMAP_MUX 456#ifdef CONFIG_OMAP_MUX
207static struct omap_board_mux board_mux[] __initdata = { 457static struct omap_board_mux board_mux[] __initdata = {
208 { .reg_offset = OMAP_MUX_TERMINATOR }, 458 { .reg_offset = OMAP_MUX_TERMINATOR },
@@ -215,9 +465,13 @@ static void __init igep2_init(void)
215{ 465{
216 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); 466 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
217 igep2_i2c_init(); 467 igep2_i2c_init();
468 platform_add_devices(igep2_devices, ARRAY_SIZE(igep2_devices));
218 omap_serial_init(); 469 omap_serial_init();
219 usb_musb_init(); 470 usb_musb_init(&musb_board_data);
471 usb_ehci_init(&ehci_pdata);
220 472
473 igep2_flash_init();
474 igep2_display_init();
221 igep2_init_smsc911x(); 475 igep2_init_smsc911x();
222 476
223 /* GPIO userspace leds */ 477 /* GPIO userspace leds */
@@ -234,13 +488,30 @@ static void __init igep2_init(void)
234 gpio_set_value(IGEP2_GPIO_LED0_GREEN, 0); 488 gpio_set_value(IGEP2_GPIO_LED0_GREEN, 0);
235 } else 489 } else
236 pr_warning("IGEP v2: Could not obtain gpio GPIO_LED0_GREEN\n"); 490 pr_warning("IGEP v2: Could not obtain gpio GPIO_LED0_GREEN\n");
237 491#ifndef CONFIG_LEDS_TRIGGERS
238 if ((gpio_request(IGEP2_GPIO_LED1_RED, "GPIO_LED1_RED") == 0) && 492 if ((gpio_request(IGEP2_GPIO_LED1_RED, "GPIO_LED1_RED") == 0) &&
239 (gpio_direction_output(IGEP2_GPIO_LED1_RED, 1) == 0)) { 493 (gpio_direction_output(IGEP2_GPIO_LED1_RED, 1) == 0)) {
240 gpio_export(IGEP2_GPIO_LED1_RED, 0); 494 gpio_export(IGEP2_GPIO_LED1_RED, 0);
241 gpio_set_value(IGEP2_GPIO_LED1_RED, 0); 495 gpio_set_value(IGEP2_GPIO_LED1_RED, 0);
242 } else 496 } else
243 pr_warning("IGEP v2: Could not obtain gpio GPIO_LED1_RED\n"); 497 pr_warning("IGEP v2: Could not obtain gpio GPIO_LED1_RED\n");
498#endif
499 /* GPIO W-LAN + Bluetooth combo module */
500 if ((gpio_request(IGEP2_GPIO_WIFI_NPD, "GPIO_WIFI_NPD") == 0) &&
501 (gpio_direction_output(IGEP2_GPIO_WIFI_NPD, 1) == 0)) {
502 gpio_export(IGEP2_GPIO_WIFI_NPD, 0);
503/* gpio_set_value(IGEP2_GPIO_WIFI_NPD, 0); */
504 } else
505 pr_warning("IGEP v2: Could not obtain gpio GPIO_WIFI_NPD\n");
506
507 if ((gpio_request(IGEP2_GPIO_WIFI_NRESET, "GPIO_WIFI_NRESET") == 0) &&
508 (gpio_direction_output(IGEP2_GPIO_WIFI_NRESET, 1) == 0)) {
509 gpio_export(IGEP2_GPIO_WIFI_NRESET, 0);
510 gpio_set_value(IGEP2_GPIO_WIFI_NRESET, 0);
511 udelay(10);
512 gpio_set_value(IGEP2_GPIO_WIFI_NRESET, 1);
513 } else
514 pr_warning("IGEP v2: Could not obtain gpio GPIO_WIFI_NRESET\n");
244} 515}
245 516
246static void __init igep2_map_io(void) 517static void __init igep2_map_io(void)
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c
index 095adcb642b8..5fcb52e71298 100644
--- a/arch/arm/mach-omap2/board-ldp.c
+++ b/arch/arm/mach-omap2/board-ldp.c
@@ -383,6 +383,12 @@ static struct omap_board_mux board_mux[] __initdata = {
383#define board_mux NULL 383#define board_mux NULL
384#endif 384#endif
385 385
386static struct omap_musb_board_data musb_board_data = {
387 .interface_type = MUSB_INTERFACE_ULPI,
388 .mode = MUSB_OTG,
389 .power = 100,
390};
391
386static void __init omap_ldp_init(void) 392static void __init omap_ldp_init(void)
387{ 393{
388 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); 394 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
@@ -394,7 +400,7 @@ static void __init omap_ldp_init(void)
394 ARRAY_SIZE(ldp_spi_board_info)); 400 ARRAY_SIZE(ldp_spi_board_info));
395 ads7846_dev_init(); 401 ads7846_dev_init();
396 omap_serial_init(); 402 omap_serial_init();
397 usb_musb_init(); 403 usb_musb_init(&musb_board_data);
398 404
399 omap2_hsmmc_init(mmc); 405 omap2_hsmmc_init(mmc);
400 /* link regulators to MMC adapters */ 406 /* link regulators to MMC adapters */
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
index 1bae69913376..6eb77e1f7c82 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -430,6 +430,12 @@ static struct omap_board_mux board_mux[] __initdata = {
430#define board_mux NULL 430#define board_mux NULL
431#endif 431#endif
432 432
433static struct omap_musb_board_data musb_board_data = {
434 .interface_type = MUSB_INTERFACE_ULPI,
435 .mode = MUSB_OTG,
436 .power = 100,
437};
438
433static void __init omap3_beagle_init(void) 439static void __init omap3_beagle_init(void)
434{ 440{
435 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); 441 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
@@ -443,7 +449,7 @@ static void __init omap3_beagle_init(void)
443 /* REVISIT leave DVI powered down until it's needed ... */ 449 /* REVISIT leave DVI powered down until it's needed ... */
444 gpio_direction_output(170, true); 450 gpio_direction_output(170, true);
445 451
446 usb_musb_init(); 452 usb_musb_init(&musb_board_data);
447 usb_ehci_init(&ehci_pdata); 453 usb_ehci_init(&ehci_pdata);
448 omap3beagle_flash_init(); 454 omap3beagle_flash_init();
449 455
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c
index 45227f394758..d6bc88c426b5 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
@@ -448,20 +448,23 @@ static struct twl4030_usb_data omap3evm_usb_data = {
448 448
449static int board_keymap[] = { 449static int board_keymap[] = {
450 KEY(0, 0, KEY_LEFT), 450 KEY(0, 0, KEY_LEFT),
451 KEY(0, 1, KEY_RIGHT), 451 KEY(0, 1, KEY_DOWN),
452 KEY(0, 2, KEY_A), 452 KEY(0, 2, KEY_ENTER),
453 KEY(0, 3, KEY_B), 453 KEY(0, 3, KEY_M),
454 KEY(1, 0, KEY_DOWN), 454
455 KEY(1, 0, KEY_RIGHT),
455 KEY(1, 1, KEY_UP), 456 KEY(1, 1, KEY_UP),
456 KEY(1, 2, KEY_E), 457 KEY(1, 2, KEY_I),
457 KEY(1, 3, KEY_F), 458 KEY(1, 3, KEY_N),
458 KEY(2, 0, KEY_ENTER), 459
459 KEY(2, 1, KEY_I), 460 KEY(2, 0, KEY_A),
461 KEY(2, 1, KEY_E),
460 KEY(2, 2, KEY_J), 462 KEY(2, 2, KEY_J),
461 KEY(2, 3, KEY_K), 463 KEY(2, 3, KEY_O),
462 KEY(3, 0, KEY_M), 464
463 KEY(3, 1, KEY_N), 465 KEY(3, 0, KEY_B),
464 KEY(3, 2, KEY_O), 466 KEY(3, 1, KEY_F),
467 KEY(3, 2, KEY_K),
465 KEY(3, 3, KEY_P) 468 KEY(3, 3, KEY_P)
466}; 469};
467 470
@@ -647,12 +650,24 @@ static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
647 650
648#ifdef CONFIG_OMAP_MUX 651#ifdef CONFIG_OMAP_MUX
649static struct omap_board_mux board_mux[] __initdata = { 652static struct omap_board_mux board_mux[] __initdata = {
653 OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP |
654 OMAP_PIN_OFF_INPUT_PULLUP |
655 OMAP_PIN_OFF_WAKEUPENABLE),
656 OMAP3_MUX(MCSPI1_CS1, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP |
657 OMAP_PIN_OFF_INPUT_PULLUP |
658 OMAP_PIN_OFF_WAKEUPENABLE),
650 { .reg_offset = OMAP_MUX_TERMINATOR }, 659 { .reg_offset = OMAP_MUX_TERMINATOR },
651}; 660};
652#else 661#else
653#define board_mux NULL 662#define board_mux NULL
654#endif 663#endif
655 664
665static struct omap_musb_board_data musb_board_data = {
666 .interface_type = MUSB_INTERFACE_ULPI,
667 .mode = MUSB_OTG,
668 .power = 100,
669};
670
656static void __init omap3_evm_init(void) 671static void __init omap3_evm_init(void)
657{ 672{
658 omap3_evm_get_revision(); 673 omap3_evm_get_revision();
@@ -666,10 +681,10 @@ static void __init omap3_evm_init(void)
666 ARRAY_SIZE(omap3evm_spi_board_info)); 681 ARRAY_SIZE(omap3evm_spi_board_info));
667 682
668 omap_serial_init(); 683 omap_serial_init();
669#ifdef CONFIG_NOP_USB_XCEIV 684
670 /* OMAP3EVM uses ISP1504 phy and so register nop transceiver */ 685 /* OMAP3EVM uses ISP1504 phy and so register nop transceiver */
671 usb_nop_xceiv_register(); 686 usb_nop_xceiv_register();
672#endif 687
673 if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2) { 688 if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2) {
674 /* enable EHCI VBUS using GPIO22 */ 689 /* enable EHCI VBUS using GPIO22 */
675 omap_mux_init_gpio(22, OMAP_PIN_INPUT_PULLUP); 690 omap_mux_init_gpio(22, OMAP_PIN_INPUT_PULLUP);
@@ -692,7 +707,7 @@ static void __init omap3_evm_init(void)
692 omap_mux_init_gpio(135, OMAP_PIN_OUTPUT); 707 omap_mux_init_gpio(135, OMAP_PIN_OUTPUT);
693 ehci_pdata.reset_gpio_port[1] = 135; 708 ehci_pdata.reset_gpio_port[1] = 135;
694 } 709 }
695 usb_musb_init(); 710 usb_musb_init(&musb_board_data);
696 usb_ehci_init(&ehci_pdata); 711 usb_ehci_init(&ehci_pdata);
697 ads7846_dev_init(); 712 ads7846_dev_init();
698 omap3evm_init_smsc911x(); 713 omap3evm_init_smsc911x();
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c
index 9967b5d24b50..4827f4658df3 100644
--- a/arch/arm/mach-omap2/board-omap3pandora.c
+++ b/arch/arm/mach-omap2/board-omap3pandora.c
@@ -40,6 +40,7 @@
40#include <mach/hardware.h> 40#include <mach/hardware.h>
41#include <plat/mcspi.h> 41#include <plat/mcspi.h>
42#include <plat/usb.h> 42#include <plat/usb.h>
43#include <plat/display.h>
43 44
44#include "mux.h" 45#include "mux.h"
45#include "sdram-micron-mt46h32m32lf-6.h" 46#include "sdram-micron-mt46h32m32lf-6.h"
@@ -192,6 +193,40 @@ static struct twl4030_keypad_data pandora_kp_data = {
192 .rep = 1, 193 .rep = 1,
193}; 194};
194 195
196static struct omap_dss_device pandora_lcd_device = {
197 .name = "lcd",
198 .driver_name = "tpo_td043mtea1_panel",
199 .type = OMAP_DISPLAY_TYPE_DPI,
200 .phy.dpi.data_lines = 24,
201 .reset_gpio = 157,
202};
203
204static struct omap_dss_device pandora_tv_device = {
205 .name = "tv",
206 .driver_name = "venc",
207 .type = OMAP_DISPLAY_TYPE_VENC,
208 .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
209};
210
211static struct omap_dss_device *pandora_dss_devices[] = {
212 &pandora_lcd_device,
213 &pandora_tv_device,
214};
215
216static struct omap_dss_board_info pandora_dss_data = {
217 .num_devices = ARRAY_SIZE(pandora_dss_devices),
218 .devices = pandora_dss_devices,
219 .default_device = &pandora_lcd_device,
220};
221
222static struct platform_device pandora_dss_device = {
223 .name = "omapdss",
224 .id = -1,
225 .dev = {
226 .platform_data = &pandora_dss_data,
227 },
228};
229
195static struct omap2_hsmmc_info omap3pandora_mmc[] = { 230static struct omap2_hsmmc_info omap3pandora_mmc[] = {
196 { 231 {
197 .mmc = 1, 232 .mmc = 1,
@@ -217,14 +252,6 @@ static struct omap2_hsmmc_info omap3pandora_mmc[] = {
217 {} /* Terminator */ 252 {} /* Terminator */
218}; 253};
219 254
220static struct regulator_consumer_supply pandora_vmmc1_supply = {
221 .supply = "vmmc",
222};
223
224static struct regulator_consumer_supply pandora_vmmc2_supply = {
225 .supply = "vmmc",
226};
227
228static int omap3pandora_twl_gpio_setup(struct device *dev, 255static int omap3pandora_twl_gpio_setup(struct device *dev,
229 unsigned gpio, unsigned ngpio) 256 unsigned gpio, unsigned ngpio)
230{ 257{
@@ -233,10 +260,6 @@ static int omap3pandora_twl_gpio_setup(struct device *dev,
233 omap3pandora_mmc[1].gpio_cd = gpio + 1; 260 omap3pandora_mmc[1].gpio_cd = gpio + 1;
234 omap2_hsmmc_init(omap3pandora_mmc); 261 omap2_hsmmc_init(omap3pandora_mmc);
235 262
236 /* link regulators to MMC adapters */
237 pandora_vmmc1_supply.dev = omap3pandora_mmc[0].dev;
238 pandora_vmmc2_supply.dev = omap3pandora_mmc[1].dev;
239
240 return 0; 263 return 0;
241} 264}
242 265
@@ -247,6 +270,36 @@ static struct twl4030_gpio_platform_data omap3pandora_gpio_data = {
247 .setup = omap3pandora_twl_gpio_setup, 270 .setup = omap3pandora_twl_gpio_setup,
248}; 271};
249 272
273static struct regulator_consumer_supply pandora_vmmc1_supply =
274 REGULATOR_SUPPLY("vmmc", "mmci-omap-hs.0");
275
276static struct regulator_consumer_supply pandora_vmmc2_supply =
277 REGULATOR_SUPPLY("vmmc", "mmci-omap-hs.1");
278
279static struct regulator_consumer_supply pandora_vdda_dac_supply =
280 REGULATOR_SUPPLY("vdda_dac", "omapdss");
281
282static struct regulator_consumer_supply pandora_vdds_supplies[] = {
283 REGULATOR_SUPPLY("vdds_sdi", "omapdss"),
284 REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
285};
286
287static struct regulator_consumer_supply pandora_vcc_lcd_supply =
288 REGULATOR_SUPPLY("vcc", "display0");
289
290static struct regulator_consumer_supply pandora_usb_phy_supply =
291 REGULATOR_SUPPLY("hsusb0", "ehci-omap.0");
292
293/* ads7846 on SPI and 2 nub controllers on I2C */
294static struct regulator_consumer_supply pandora_vaux4_supplies[] = {
295 REGULATOR_SUPPLY("vcc", "spi1.0"),
296 REGULATOR_SUPPLY("vcc", "3-0066"),
297 REGULATOR_SUPPLY("vcc", "3-0067"),
298};
299
300static struct regulator_consumer_supply pandora_adac_supply =
301 REGULATOR_SUPPLY("vcc", "soc-audio");
302
250/* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */ 303/* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
251static struct regulator_init_data pandora_vmmc1 = { 304static struct regulator_init_data pandora_vmmc1 = {
252 .constraints = { 305 .constraints = {
@@ -277,6 +330,96 @@ static struct regulator_init_data pandora_vmmc2 = {
277 .consumer_supplies = &pandora_vmmc2_supply, 330 .consumer_supplies = &pandora_vmmc2_supply,
278}; 331};
279 332
333/* VDAC for DSS driving S-Video */
334static struct regulator_init_data pandora_vdac = {
335 .constraints = {
336 .min_uV = 1800000,
337 .max_uV = 1800000,
338 .apply_uV = true,
339 .valid_modes_mask = REGULATOR_MODE_NORMAL
340 | REGULATOR_MODE_STANDBY,
341 .valid_ops_mask = REGULATOR_CHANGE_MODE
342 | REGULATOR_CHANGE_STATUS,
343 },
344 .num_consumer_supplies = 1,
345 .consumer_supplies = &pandora_vdda_dac_supply,
346};
347
348/* VPLL2 for digital video outputs */
349static struct regulator_init_data pandora_vpll2 = {
350 .constraints = {
351 .min_uV = 1800000,
352 .max_uV = 1800000,
353 .apply_uV = true,
354 .valid_modes_mask = REGULATOR_MODE_NORMAL
355 | REGULATOR_MODE_STANDBY,
356 .valid_ops_mask = REGULATOR_CHANGE_MODE
357 | REGULATOR_CHANGE_STATUS,
358 },
359 .num_consumer_supplies = ARRAY_SIZE(pandora_vdds_supplies),
360 .consumer_supplies = pandora_vdds_supplies,
361};
362
363/* VAUX1 for LCD */
364static struct regulator_init_data pandora_vaux1 = {
365 .constraints = {
366 .min_uV = 3000000,
367 .max_uV = 3000000,
368 .apply_uV = true,
369 .valid_modes_mask = REGULATOR_MODE_NORMAL
370 | REGULATOR_MODE_STANDBY,
371 .valid_ops_mask = REGULATOR_CHANGE_MODE
372 | REGULATOR_CHANGE_STATUS,
373 },
374 .num_consumer_supplies = 1,
375 .consumer_supplies = &pandora_vcc_lcd_supply,
376};
377
378/* VAUX2 for USB host PHY */
379static struct regulator_init_data pandora_vaux2 = {
380 .constraints = {
381 .min_uV = 1800000,
382 .max_uV = 1800000,
383 .apply_uV = true,
384 .valid_modes_mask = REGULATOR_MODE_NORMAL
385 | REGULATOR_MODE_STANDBY,
386 .valid_ops_mask = REGULATOR_CHANGE_MODE
387 | REGULATOR_CHANGE_STATUS,
388 },
389 .num_consumer_supplies = 1,
390 .consumer_supplies = &pandora_usb_phy_supply,
391};
392
393/* VAUX4 for ads7846 and nubs */
394static struct regulator_init_data pandora_vaux4 = {
395 .constraints = {
396 .min_uV = 2800000,
397 .max_uV = 2800000,
398 .apply_uV = true,
399 .valid_modes_mask = REGULATOR_MODE_NORMAL
400 | REGULATOR_MODE_STANDBY,
401 .valid_ops_mask = REGULATOR_CHANGE_MODE
402 | REGULATOR_CHANGE_STATUS,
403 },
404 .num_consumer_supplies = ARRAY_SIZE(pandora_vaux4_supplies),
405 .consumer_supplies = pandora_vaux4_supplies,
406};
407
408/* VSIM for audio DAC */
409static struct regulator_init_data pandora_vsim = {
410 .constraints = {
411 .min_uV = 2800000,
412 .max_uV = 2800000,
413 .apply_uV = true,
414 .valid_modes_mask = REGULATOR_MODE_NORMAL
415 | REGULATOR_MODE_STANDBY,
416 .valid_ops_mask = REGULATOR_CHANGE_MODE
417 | REGULATOR_CHANGE_STATUS,
418 },
419 .num_consumer_supplies = 1,
420 .consumer_supplies = &pandora_adac_supply,
421};
422
280static struct twl4030_usb_data omap3pandora_usb_data = { 423static struct twl4030_usb_data omap3pandora_usb_data = {
281 .usb_mode = T2_USB_MODE_ULPI, 424 .usb_mode = T2_USB_MODE_ULPI,
282}; 425};
@@ -298,6 +441,12 @@ static struct twl4030_platform_data omap3pandora_twldata = {
298 .codec = &omap3pandora_codec_data, 441 .codec = &omap3pandora_codec_data,
299 .vmmc1 = &pandora_vmmc1, 442 .vmmc1 = &pandora_vmmc1,
300 .vmmc2 = &pandora_vmmc2, 443 .vmmc2 = &pandora_vmmc2,
444 .vdac = &pandora_vdac,
445 .vpll2 = &pandora_vpll2,
446 .vaux1 = &pandora_vaux1,
447 .vaux2 = &pandora_vaux2,
448 .vaux4 = &pandora_vaux4,
449 .vsim = &pandora_vsim,
301 .keypad = &pandora_kp_data, 450 .keypad = &pandora_kp_data,
302}; 451};
303 452
@@ -365,6 +514,12 @@ static struct spi_board_info omap3pandora_spi_board_info[] __initdata = {
365 .controller_data = &ads7846_mcspi_config, 514 .controller_data = &ads7846_mcspi_config,
366 .irq = OMAP_GPIO_IRQ(OMAP3_PANDORA_TS_GPIO), 515 .irq = OMAP_GPIO_IRQ(OMAP3_PANDORA_TS_GPIO),
367 .platform_data = &ads7846_config, 516 .platform_data = &ads7846_config,
517 }, {
518 .modalias = "tpo_td043mtea1_panel_spi",
519 .bus_num = 1,
520 .chip_select = 1,
521 .max_speed_hz = 375000,
522 .platform_data = &pandora_lcd_device,
368 } 523 }
369}; 524};
370 525
@@ -379,6 +534,7 @@ static void __init omap3pandora_init_irq(void)
379static struct platform_device *omap3pandora_devices[] __initdata = { 534static struct platform_device *omap3pandora_devices[] __initdata = {
380 &pandora_leds_gpio, 535 &pandora_leds_gpio,
381 &pandora_keys_gpio, 536 &pandora_keys_gpio,
537 &pandora_dss_device,
382}; 538};
383 539
384static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = { 540static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
@@ -401,6 +557,12 @@ static struct omap_board_mux board_mux[] __initdata = {
401#define board_mux NULL 557#define board_mux NULL
402#endif 558#endif
403 559
560static struct omap_musb_board_data musb_board_data = {
561 .interface_type = MUSB_INTERFACE_ULPI,
562 .mode = MUSB_OTG,
563 .power = 100,
564};
565
404static void __init omap3pandora_init(void) 566static void __init omap3pandora_init(void)
405{ 567{
406 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); 568 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
@@ -413,7 +575,7 @@ static void __init omap3pandora_init(void)
413 omap3pandora_ads7846_init(); 575 omap3pandora_ads7846_init();
414 usb_ehci_init(&ehci_pdata); 576 usb_ehci_init(&ehci_pdata);
415 pandora_keys_gpio_init(); 577 pandora_keys_gpio_init();
416 usb_musb_init(); 578 usb_musb_init(&musb_board_data);
417 579
418 /* Ensure SDRC pins are mux'd for self-refresh */ 580 /* Ensure SDRC pins are mux'd for self-refresh */
419 omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT); 581 omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT);
diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c
index 8252ba49a664..3943d0f8322c 100644
--- a/arch/arm/mach-omap2/board-omap3touchbook.c
+++ b/arch/arm/mach-omap2/board-omap3touchbook.c
@@ -527,6 +527,12 @@ static void __init early_touchbook_revision(char **p)
527} 527}
528__early_param("tbr=", early_touchbook_revision); 528__early_param("tbr=", early_touchbook_revision);
529 529
530static struct omap_musb_board_data musb_board_data = {
531 .interface_type = MUSB_INTERFACE_ULPI,
532 .mode = MUSB_OTG,
533 .power = 100,
534};
535
530static void __init omap3_touchbook_init(void) 536static void __init omap3_touchbook_init(void)
531{ 537{
532 pm_power_off = omap3_touchbook_poweroff; 538 pm_power_off = omap3_touchbook_poweroff;
@@ -545,7 +551,7 @@ static void __init omap3_touchbook_init(void)
545 spi_register_board_info(omap3_ads7846_spi_board_info, 551 spi_register_board_info(omap3_ads7846_spi_board_info,
546 ARRAY_SIZE(omap3_ads7846_spi_board_info)); 552 ARRAY_SIZE(omap3_ads7846_spi_board_info));
547 omap3_ads7846_init(); 553 omap3_ads7846_init();
548 usb_musb_init(); 554 usb_musb_init(&musb_board_data);
549 usb_ehci_init(&ehci_pdata); 555 usb_ehci_init(&ehci_pdata);
550 omap3touchbook_flash_init(); 556 omap3touchbook_flash_init();
551 557
diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c
index 7e6aa8292746..50872a42bec7 100644
--- a/arch/arm/mach-omap2/board-overo.c
+++ b/arch/arm/mach-omap2/board-overo.c
@@ -413,6 +413,12 @@ static struct omap_board_mux board_mux[] __initdata = {
413#define board_mux NULL 413#define board_mux NULL
414#endif 414#endif
415 415
416static struct omap_musb_board_data musb_board_data = {
417 .interface_type = MUSB_INTERFACE_ULPI,
418 .mode = MUSB_OTG,
419 .power = 100,
420};
421
416static void __init overo_init(void) 422static void __init overo_init(void)
417{ 423{
418 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); 424 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
@@ -420,7 +426,7 @@ static void __init overo_init(void)
420 platform_add_devices(overo_devices, ARRAY_SIZE(overo_devices)); 426 platform_add_devices(overo_devices, ARRAY_SIZE(overo_devices));
421 omap_serial_init(); 427 omap_serial_init();
422 overo_flash_init(); 428 overo_flash_init();
423 usb_musb_init(); 429 usb_musb_init(&musb_board_data);
424 usb_ehci_init(&ehci_pdata); 430 usb_ehci_init(&ehci_pdata);
425 overo_ads7846_init(); 431 overo_ads7846_init();
426 overo_init_smsc911x(); 432 overo_init_smsc911x();
diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c
index 6a49f916103d..b155c366c650 100644
--- a/arch/arm/mach-omap2/board-rx51.c
+++ b/arch/arm/mach-omap2/board-rx51.c
@@ -16,6 +16,7 @@
16#include <linux/clk.h> 16#include <linux/clk.h>
17#include <linux/io.h> 17#include <linux/io.h>
18#include <linux/gpio.h> 18#include <linux/gpio.h>
19#include <linux/leds.h>
19 20
20#include <mach/hardware.h> 21#include <mach/hardware.h>
21#include <asm/mach-types.h> 22#include <asm/mach-types.h>
@@ -30,9 +31,49 @@
30#include <plat/usb.h> 31#include <plat/usb.h>
31 32
32#include "mux.h" 33#include "mux.h"
34#include "pm.h"
35
36#define RX51_GPIO_SLEEP_IND 162
33 37
34struct omap_sdrc_params *rx51_get_sdram_timings(void); 38struct omap_sdrc_params *rx51_get_sdram_timings(void);
35 39
40static struct gpio_led gpio_leds[] = {
41 {
42 .name = "sleep_ind",
43 .gpio = RX51_GPIO_SLEEP_IND,
44 },
45};
46
47static struct gpio_led_platform_data gpio_led_info = {
48 .leds = gpio_leds,
49 .num_leds = ARRAY_SIZE(gpio_leds),
50};
51
52static struct platform_device leds_gpio = {
53 .name = "leds-gpio",
54 .id = -1,
55 .dev = {
56 .platform_data = &gpio_led_info,
57 },
58};
59
60static struct cpuidle_params rx51_cpuidle_params[] = {
61 /* C1 */
62 {1, 110, 162, 5},
63 /* C2 */
64 {1, 106, 180, 309},
65 /* C3 */
66 {0, 107, 410, 46057},
67 /* C4 */
68 {0, 121, 3374, 46057},
69 /* C5 */
70 {1, 855, 1146, 46057},
71 /* C6 */
72 {0, 7580, 4134, 484329},
73 /* C7 */
74 {1, 7505, 15274, 484329},
75};
76
36static struct omap_lcd_config rx51_lcd_config = { 77static struct omap_lcd_config rx51_lcd_config = {
37 .ctrl_name = "internal", 78 .ctrl_name = "internal",
38}; 79};
@@ -62,6 +103,7 @@ static void __init rx51_init_irq(void)
62 103
63 omap_board_config = rx51_config; 104 omap_board_config = rx51_config;
64 omap_board_config_size = ARRAY_SIZE(rx51_config); 105 omap_board_config_size = ARRAY_SIZE(rx51_config);
106 omap3_pm_init_cpuidle(rx51_cpuidle_params);
65 sdrc_params = rx51_get_sdram_timings(); 107 sdrc_params = rx51_get_sdram_timings();
66 omap2_init_common_hw(sdrc_params, sdrc_params); 108 omap2_init_common_hw(sdrc_params, sdrc_params);
67 omap_init_irq(); 109 omap_init_irq();
@@ -78,16 +120,24 @@ static struct omap_board_mux board_mux[] __initdata = {
78#define board_mux NULL 120#define board_mux NULL
79#endif 121#endif
80 122
123static struct omap_musb_board_data musb_board_data = {
124 .interface_type = MUSB_INTERFACE_ULPI,
125 .mode = MUSB_PERIPHERAL,
126 .power = 0,
127};
128
81static void __init rx51_init(void) 129static void __init rx51_init(void)
82{ 130{
83 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); 131 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
84 omap_serial_init(); 132 omap_serial_init();
85 usb_musb_init(); 133 usb_musb_init(&musb_board_data);
86 rx51_peripherals_init(); 134 rx51_peripherals_init();
87 135
88 /* Ensure SDRC pins are mux'd for self-refresh */ 136 /* Ensure SDRC pins are mux'd for self-refresh */
89 omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT); 137 omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT);
90 omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT); 138 omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT);
139
140 platform_device_register(&leds_gpio);
91} 141}
92 142
93static void __init rx51_map_io(void) 143static void __init rx51_map_io(void)
diff --git a/arch/arm/mach-omap2/board-zoom-peripherals.c b/arch/arm/mach-omap2/board-zoom-peripherals.c
index 9a0821fb7ea0..ca95d8d64136 100755
--- a/arch/arm/mach-omap2/board-zoom-peripherals.c
+++ b/arch/arm/mach-omap2/board-zoom-peripherals.c
@@ -264,6 +264,12 @@ static int __init omap_i2c_init(void)
264 return 0; 264 return 0;
265} 265}
266 266
267static struct omap_musb_board_data musb_board_data = {
268 .interface_type = MUSB_INTERFACE_ULPI,
269 .mode = MUSB_OTG,
270 .power = 100,
271};
272
267static void enable_board_wakeup_source(void) 273static void enable_board_wakeup_source(void)
268{ 274{
269 /* T2 interrupt line (keypad) */ 275 /* T2 interrupt line (keypad) */
@@ -275,6 +281,6 @@ void __init zoom_peripherals_init(void)
275{ 281{
276 omap_i2c_init(); 282 omap_i2c_init();
277 omap_serial_init(); 283 omap_serial_init();
278 usb_musb_init(); 284 usb_musb_init(&musb_board_data);
279 enable_board_wakeup_source(); 285 enable_board_wakeup_source();
280} 286}
diff --git a/arch/arm/mach-omap2/board-zoom3.c b/arch/arm/mach-omap2/board-zoom3.c
index 5e208942ca71..d3e3cd5170d1 100644
--- a/arch/arm/mach-omap2/board-zoom3.c
+++ b/arch/arm/mach-omap2/board-zoom3.c
@@ -20,6 +20,7 @@
20 20
21#include <plat/common.h> 21#include <plat/common.h>
22#include <plat/board.h> 22#include <plat/board.h>
23#include <plat/usb.h>
23 24
24#include "mux.h" 25#include "mux.h"
25#include "sdram-hynix-h8mbx00u0mer-0em.h" 26#include "sdram-hynix-h8mbx00u0mer-0em.h"
@@ -51,11 +52,24 @@ static struct omap_board_mux board_mux[] __initdata = {
51#define board_mux NULL 52#define board_mux NULL
52#endif 53#endif
53 54
55static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
56 .port_mode[0] = EHCI_HCD_OMAP_MODE_UNKNOWN,
57 .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,
58 .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,
59 .phy_reset = true,
60 .reset_gpio_port[0] = -EINVAL,
61 .reset_gpio_port[1] = 64,
62 .reset_gpio_port[2] = -EINVAL,
63};
64
54static void __init omap_zoom_init(void) 65static void __init omap_zoom_init(void)
55{ 66{
56 omap3_mux_init(board_mux, OMAP_PACKAGE_CBP); 67 omap3_mux_init(board_mux, OMAP_PACKAGE_CBP);
57 zoom_peripherals_init(); 68 zoom_peripherals_init();
58 zoom_debugboard_init(); 69 zoom_debugboard_init();
70
71 omap_mux_init_gpio(64, OMAP_PIN_OUTPUT);
72 usb_ehci_init(&ehci_pdata);
59} 73}
60 74
61MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board") 75MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board")
diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c
index cdd1f35636dd..43f8a33655d4 100644
--- a/arch/arm/mach-omap2/control.c
+++ b/arch/arm/mach-omap2/control.c
@@ -140,7 +140,11 @@ static struct omap3_control_regs control_context;
140 140
141void __init omap2_set_globals_control(struct omap_globals *omap2_globals) 141void __init omap2_set_globals_control(struct omap_globals *omap2_globals)
142{ 142{
143 omap2_ctrl_base = omap2_globals->ctrl; 143 /* Static mapping, never released */
144 if (omap2_globals->ctrl) {
145 omap2_ctrl_base = ioremap(omap2_globals->ctrl, SZ_4K);
146 WARN_ON(!omap2_ctrl_base);
147 }
144} 148}
145 149
146void __iomem *omap_ctrl_base_get(void) 150void __iomem *omap_ctrl_base_get(void)
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c
index 12f0cbfc2894..3d3d035db9af 100644
--- a/arch/arm/mach-omap2/cpuidle34xx.c
+++ b/arch/arm/mach-omap2/cpuidle34xx.c
@@ -45,6 +45,8 @@
45#define OMAP3_STATE_C6 5 /* C6 - MPU OFF + Core RET */ 45#define OMAP3_STATE_C6 5 /* C6 - MPU OFF + Core RET */
46#define OMAP3_STATE_C7 6 /* C7 - MPU OFF + Core OFF */ 46#define OMAP3_STATE_C7 6 /* C7 - MPU OFF + Core OFF */
47 47
48#define OMAP3_STATE_MAX OMAP3_STATE_C7
49
48struct omap3_processor_cx { 50struct omap3_processor_cx {
49 u8 valid; 51 u8 valid;
50 u8 type; 52 u8 type;
@@ -60,6 +62,30 @@ struct omap3_processor_cx omap3_power_states[OMAP3_MAX_STATES];
60struct omap3_processor_cx current_cx_state; 62struct omap3_processor_cx current_cx_state;
61struct powerdomain *mpu_pd, *core_pd; 63struct powerdomain *mpu_pd, *core_pd;
62 64
65/*
66 * The latencies/thresholds for various C states have
67 * to be configured from the respective board files.
68 * These are some default values (which might not provide
69 * the best power savings) used on boards which do not
70 * pass these details from the board file.
71 */
72static struct cpuidle_params cpuidle_params_table[] = {
73 /* C1 */
74 {1, 2, 2, 5},
75 /* C2 */
76 {1, 10, 10, 30},
77 /* C3 */
78 {1, 50, 50, 300},
79 /* C4 */
80 {1, 1500, 1800, 4000},
81 /* C5 */
82 {1, 2500, 7500, 12000},
83 /* C6 */
84 {1, 3000, 8500, 15000},
85 /* C7 */
86 {1, 10000, 30000, 300000},
87};
88
63static int omap3_idle_bm_check(void) 89static int omap3_idle_bm_check(void)
64{ 90{
65 if (!omap3_can_sleep()) 91 if (!omap3_can_sleep())
@@ -104,13 +130,6 @@ static int omap3_enter_idle(struct cpuidle_device *dev,
104 local_irq_disable(); 130 local_irq_disable();
105 local_fiq_disable(); 131 local_fiq_disable();
106 132
107 if (!enable_off_mode) {
108 if (mpu_state < PWRDM_POWER_RET)
109 mpu_state = PWRDM_POWER_RET;
110 if (core_state < PWRDM_POWER_RET)
111 core_state = PWRDM_POWER_RET;
112 }
113
114 pwrdm_set_next_pwrst(mpu_pd, mpu_state); 133 pwrdm_set_next_pwrst(mpu_pd, mpu_state);
115 pwrdm_set_next_pwrst(core_pd, core_state); 134 pwrdm_set_next_pwrst(core_pd, core_state);
116 135
@@ -141,6 +160,67 @@ return_sleep_time:
141} 160}
142 161
143/** 162/**
163 * next_valid_state - Find next valid c-state
164 * @dev: cpuidle device
165 * @state: Currently selected c-state
166 *
167 * If the current state is valid, it is returned back to the caller.
168 * Else, this function searches for a lower c-state which is still
169 * valid (as defined in omap3_power_states[]).
170 */
171static struct cpuidle_state *next_valid_state(struct cpuidle_device *dev,
172 struct cpuidle_state *curr)
173{
174 struct cpuidle_state *next = NULL;
175 struct omap3_processor_cx *cx;
176
177 cx = (struct omap3_processor_cx *)cpuidle_get_statedata(curr);
178
179 /* Check if current state is valid */
180 if (cx->valid) {
181 return curr;
182 } else {
183 u8 idx = OMAP3_STATE_MAX;
184
185 /*
186 * Reach the current state starting at highest C-state
187 */
188 for (; idx >= OMAP3_STATE_C1; idx--) {
189 if (&dev->states[idx] == curr) {
190 next = &dev->states[idx];
191 break;
192 }
193 }
194
195 /*
196 * Should never hit this condition.
197 */
198 WARN_ON(next == NULL);
199
200 /*
201 * Drop to next valid state.
202 * Start search from the next (lower) state.
203 */
204 idx--;
205 for (; idx >= OMAP3_STATE_C1; idx--) {
206 struct omap3_processor_cx *cx;
207
208 cx = cpuidle_get_statedata(&dev->states[idx]);
209 if (cx->valid) {
210 next = &dev->states[idx];
211 break;
212 }
213 }
214 /*
215 * C1 and C2 are always valid.
216 * So, no need to check for 'next==NULL' outside this loop.
217 */
218 }
219
220 return next;
221}
222
223/**
144 * omap3_enter_idle_bm - Checks for any bus activity 224 * omap3_enter_idle_bm - Checks for any bus activity
145 * @dev: cpuidle device 225 * @dev: cpuidle device
146 * @state: The target state to be programmed 226 * @state: The target state to be programmed
@@ -152,7 +232,7 @@ return_sleep_time:
152static int omap3_enter_idle_bm(struct cpuidle_device *dev, 232static int omap3_enter_idle_bm(struct cpuidle_device *dev,
153 struct cpuidle_state *state) 233 struct cpuidle_state *state)
154{ 234{
155 struct cpuidle_state *new_state = state; 235 struct cpuidle_state *new_state = next_valid_state(dev, state);
156 236
157 if ((state->flags & CPUIDLE_FLAG_CHECK_BM) && omap3_idle_bm_check()) { 237 if ((state->flags & CPUIDLE_FLAG_CHECK_BM) && omap3_idle_bm_check()) {
158 BUG_ON(!dev->safe_state); 238 BUG_ON(!dev->safe_state);
@@ -165,6 +245,50 @@ static int omap3_enter_idle_bm(struct cpuidle_device *dev,
165 245
166DEFINE_PER_CPU(struct cpuidle_device, omap3_idle_dev); 246DEFINE_PER_CPU(struct cpuidle_device, omap3_idle_dev);
167 247
248/**
249 * omap3_cpuidle_update_states - Update the cpuidle states.
250 *
251 * Currently, this function toggles the validity of idle states based upon
252 * the flag 'enable_off_mode'. When the flag is set all states are valid.
253 * Else, states leading to OFF state set to be invalid.
254 */
255void omap3_cpuidle_update_states(void)
256{
257 int i;
258
259 for (i = OMAP3_STATE_C1; i < OMAP3_MAX_STATES; i++) {
260 struct omap3_processor_cx *cx = &omap3_power_states[i];
261
262 if (enable_off_mode) {
263 cx->valid = 1;
264 } else {
265 if ((cx->mpu_state == PWRDM_POWER_OFF) ||
266 (cx->core_state == PWRDM_POWER_OFF))
267 cx->valid = 0;
268 }
269 }
270}
271
272void omap3_pm_init_cpuidle(struct cpuidle_params *cpuidle_board_params)
273{
274 int i;
275
276 if (!cpuidle_board_params)
277 return;
278
279 for (i = OMAP3_STATE_C1; i < OMAP3_MAX_STATES; i++) {
280 cpuidle_params_table[i].valid =
281 cpuidle_board_params[i].valid;
282 cpuidle_params_table[i].sleep_latency =
283 cpuidle_board_params[i].sleep_latency;
284 cpuidle_params_table[i].wake_latency =
285 cpuidle_board_params[i].wake_latency;
286 cpuidle_params_table[i].threshold =
287 cpuidle_board_params[i].threshold;
288 }
289 return;
290}
291
168/* omap3_init_power_states - Initialises the OMAP3 specific C states. 292/* omap3_init_power_states - Initialises the OMAP3 specific C states.
169 * 293 *
170 * Below is the desciption of each C state. 294 * Below is the desciption of each C state.
@@ -179,75 +303,103 @@ DEFINE_PER_CPU(struct cpuidle_device, omap3_idle_dev);
179void omap_init_power_states(void) 303void omap_init_power_states(void)
180{ 304{
181 /* C1 . MPU WFI + Core active */ 305 /* C1 . MPU WFI + Core active */
182 omap3_power_states[OMAP3_STATE_C1].valid = 1; 306 omap3_power_states[OMAP3_STATE_C1].valid =
307 cpuidle_params_table[OMAP3_STATE_C1].valid;
183 omap3_power_states[OMAP3_STATE_C1].type = OMAP3_STATE_C1; 308 omap3_power_states[OMAP3_STATE_C1].type = OMAP3_STATE_C1;
184 omap3_power_states[OMAP3_STATE_C1].sleep_latency = 2; 309 omap3_power_states[OMAP3_STATE_C1].sleep_latency =
185 omap3_power_states[OMAP3_STATE_C1].wakeup_latency = 2; 310 cpuidle_params_table[OMAP3_STATE_C1].sleep_latency;
186 omap3_power_states[OMAP3_STATE_C1].threshold = 5; 311 omap3_power_states[OMAP3_STATE_C1].wakeup_latency =
312 cpuidle_params_table[OMAP3_STATE_C1].wake_latency;
313 omap3_power_states[OMAP3_STATE_C1].threshold =
314 cpuidle_params_table[OMAP3_STATE_C1].threshold;
187 omap3_power_states[OMAP3_STATE_C1].mpu_state = PWRDM_POWER_ON; 315 omap3_power_states[OMAP3_STATE_C1].mpu_state = PWRDM_POWER_ON;
188 omap3_power_states[OMAP3_STATE_C1].core_state = PWRDM_POWER_ON; 316 omap3_power_states[OMAP3_STATE_C1].core_state = PWRDM_POWER_ON;
189 omap3_power_states[OMAP3_STATE_C1].flags = CPUIDLE_FLAG_TIME_VALID; 317 omap3_power_states[OMAP3_STATE_C1].flags = CPUIDLE_FLAG_TIME_VALID;
190 318
191 /* C2 . MPU WFI + Core inactive */ 319 /* C2 . MPU WFI + Core inactive */
192 omap3_power_states[OMAP3_STATE_C2].valid = 1; 320 omap3_power_states[OMAP3_STATE_C2].valid =
321 cpuidle_params_table[OMAP3_STATE_C2].valid;
193 omap3_power_states[OMAP3_STATE_C2].type = OMAP3_STATE_C2; 322 omap3_power_states[OMAP3_STATE_C2].type = OMAP3_STATE_C2;
194 omap3_power_states[OMAP3_STATE_C2].sleep_latency = 10; 323 omap3_power_states[OMAP3_STATE_C2].sleep_latency =
195 omap3_power_states[OMAP3_STATE_C2].wakeup_latency = 10; 324 cpuidle_params_table[OMAP3_STATE_C2].sleep_latency;
196 omap3_power_states[OMAP3_STATE_C2].threshold = 30; 325 omap3_power_states[OMAP3_STATE_C2].wakeup_latency =
326 cpuidle_params_table[OMAP3_STATE_C2].wake_latency;
327 omap3_power_states[OMAP3_STATE_C2].threshold =
328 cpuidle_params_table[OMAP3_STATE_C2].threshold;
197 omap3_power_states[OMAP3_STATE_C2].mpu_state = PWRDM_POWER_ON; 329 omap3_power_states[OMAP3_STATE_C2].mpu_state = PWRDM_POWER_ON;
198 omap3_power_states[OMAP3_STATE_C2].core_state = PWRDM_POWER_ON; 330 omap3_power_states[OMAP3_STATE_C2].core_state = PWRDM_POWER_ON;
199 omap3_power_states[OMAP3_STATE_C2].flags = CPUIDLE_FLAG_TIME_VALID; 331 omap3_power_states[OMAP3_STATE_C2].flags = CPUIDLE_FLAG_TIME_VALID;
200 332
201 /* C3 . MPU CSWR + Core inactive */ 333 /* C3 . MPU CSWR + Core inactive */
202 omap3_power_states[OMAP3_STATE_C3].valid = 1; 334 omap3_power_states[OMAP3_STATE_C3].valid =
335 cpuidle_params_table[OMAP3_STATE_C3].valid;
203 omap3_power_states[OMAP3_STATE_C3].type = OMAP3_STATE_C3; 336 omap3_power_states[OMAP3_STATE_C3].type = OMAP3_STATE_C3;
204 omap3_power_states[OMAP3_STATE_C3].sleep_latency = 50; 337 omap3_power_states[OMAP3_STATE_C3].sleep_latency =
205 omap3_power_states[OMAP3_STATE_C3].wakeup_latency = 50; 338 cpuidle_params_table[OMAP3_STATE_C3].sleep_latency;
206 omap3_power_states[OMAP3_STATE_C3].threshold = 300; 339 omap3_power_states[OMAP3_STATE_C3].wakeup_latency =
340 cpuidle_params_table[OMAP3_STATE_C3].wake_latency;
341 omap3_power_states[OMAP3_STATE_C3].threshold =
342 cpuidle_params_table[OMAP3_STATE_C3].threshold;
207 omap3_power_states[OMAP3_STATE_C3].mpu_state = PWRDM_POWER_RET; 343 omap3_power_states[OMAP3_STATE_C3].mpu_state = PWRDM_POWER_RET;
208 omap3_power_states[OMAP3_STATE_C3].core_state = PWRDM_POWER_ON; 344 omap3_power_states[OMAP3_STATE_C3].core_state = PWRDM_POWER_ON;
209 omap3_power_states[OMAP3_STATE_C3].flags = CPUIDLE_FLAG_TIME_VALID | 345 omap3_power_states[OMAP3_STATE_C3].flags = CPUIDLE_FLAG_TIME_VALID |
210 CPUIDLE_FLAG_CHECK_BM; 346 CPUIDLE_FLAG_CHECK_BM;
211 347
212 /* C4 . MPU OFF + Core inactive */ 348 /* C4 . MPU OFF + Core inactive */
213 omap3_power_states[OMAP3_STATE_C4].valid = 1; 349 omap3_power_states[OMAP3_STATE_C4].valid =
350 cpuidle_params_table[OMAP3_STATE_C4].valid;
214 omap3_power_states[OMAP3_STATE_C4].type = OMAP3_STATE_C4; 351 omap3_power_states[OMAP3_STATE_C4].type = OMAP3_STATE_C4;
215 omap3_power_states[OMAP3_STATE_C4].sleep_latency = 1500; 352 omap3_power_states[OMAP3_STATE_C4].sleep_latency =
216 omap3_power_states[OMAP3_STATE_C4].wakeup_latency = 1800; 353 cpuidle_params_table[OMAP3_STATE_C4].sleep_latency;
217 omap3_power_states[OMAP3_STATE_C4].threshold = 4000; 354 omap3_power_states[OMAP3_STATE_C4].wakeup_latency =
355 cpuidle_params_table[OMAP3_STATE_C4].wake_latency;
356 omap3_power_states[OMAP3_STATE_C4].threshold =
357 cpuidle_params_table[OMAP3_STATE_C4].threshold;
218 omap3_power_states[OMAP3_STATE_C4].mpu_state = PWRDM_POWER_OFF; 358 omap3_power_states[OMAP3_STATE_C4].mpu_state = PWRDM_POWER_OFF;
219 omap3_power_states[OMAP3_STATE_C4].core_state = PWRDM_POWER_ON; 359 omap3_power_states[OMAP3_STATE_C4].core_state = PWRDM_POWER_ON;
220 omap3_power_states[OMAP3_STATE_C4].flags = CPUIDLE_FLAG_TIME_VALID | 360 omap3_power_states[OMAP3_STATE_C4].flags = CPUIDLE_FLAG_TIME_VALID |
221 CPUIDLE_FLAG_CHECK_BM; 361 CPUIDLE_FLAG_CHECK_BM;
222 362
223 /* C5 . MPU CSWR + Core CSWR*/ 363 /* C5 . MPU CSWR + Core CSWR*/
224 omap3_power_states[OMAP3_STATE_C5].valid = 1; 364 omap3_power_states[OMAP3_STATE_C5].valid =
365 cpuidle_params_table[OMAP3_STATE_C5].valid;
225 omap3_power_states[OMAP3_STATE_C5].type = OMAP3_STATE_C5; 366 omap3_power_states[OMAP3_STATE_C5].type = OMAP3_STATE_C5;
226 omap3_power_states[OMAP3_STATE_C5].sleep_latency = 2500; 367 omap3_power_states[OMAP3_STATE_C5].sleep_latency =
227 omap3_power_states[OMAP3_STATE_C5].wakeup_latency = 7500; 368 cpuidle_params_table[OMAP3_STATE_C5].sleep_latency;
228 omap3_power_states[OMAP3_STATE_C5].threshold = 12000; 369 omap3_power_states[OMAP3_STATE_C5].wakeup_latency =
370 cpuidle_params_table[OMAP3_STATE_C5].wake_latency;
371 omap3_power_states[OMAP3_STATE_C5].threshold =
372 cpuidle_params_table[OMAP3_STATE_C5].threshold;
229 omap3_power_states[OMAP3_STATE_C5].mpu_state = PWRDM_POWER_RET; 373 omap3_power_states[OMAP3_STATE_C5].mpu_state = PWRDM_POWER_RET;
230 omap3_power_states[OMAP3_STATE_C5].core_state = PWRDM_POWER_RET; 374 omap3_power_states[OMAP3_STATE_C5].core_state = PWRDM_POWER_RET;
231 omap3_power_states[OMAP3_STATE_C5].flags = CPUIDLE_FLAG_TIME_VALID | 375 omap3_power_states[OMAP3_STATE_C5].flags = CPUIDLE_FLAG_TIME_VALID |
232 CPUIDLE_FLAG_CHECK_BM; 376 CPUIDLE_FLAG_CHECK_BM;
233 377
234 /* C6 . MPU OFF + Core CSWR */ 378 /* C6 . MPU OFF + Core CSWR */
235 omap3_power_states[OMAP3_STATE_C6].valid = 1; 379 omap3_power_states[OMAP3_STATE_C6].valid =
380 cpuidle_params_table[OMAP3_STATE_C6].valid;
236 omap3_power_states[OMAP3_STATE_C6].type = OMAP3_STATE_C6; 381 omap3_power_states[OMAP3_STATE_C6].type = OMAP3_STATE_C6;
237 omap3_power_states[OMAP3_STATE_C6].sleep_latency = 3000; 382 omap3_power_states[OMAP3_STATE_C6].sleep_latency =
238 omap3_power_states[OMAP3_STATE_C6].wakeup_latency = 8500; 383 cpuidle_params_table[OMAP3_STATE_C6].sleep_latency;
239 omap3_power_states[OMAP3_STATE_C6].threshold = 15000; 384 omap3_power_states[OMAP3_STATE_C6].wakeup_latency =
385 cpuidle_params_table[OMAP3_STATE_C6].wake_latency;
386 omap3_power_states[OMAP3_STATE_C6].threshold =
387 cpuidle_params_table[OMAP3_STATE_C6].threshold;
240 omap3_power_states[OMAP3_STATE_C6].mpu_state = PWRDM_POWER_OFF; 388 omap3_power_states[OMAP3_STATE_C6].mpu_state = PWRDM_POWER_OFF;
241 omap3_power_states[OMAP3_STATE_C6].core_state = PWRDM_POWER_RET; 389 omap3_power_states[OMAP3_STATE_C6].core_state = PWRDM_POWER_RET;
242 omap3_power_states[OMAP3_STATE_C6].flags = CPUIDLE_FLAG_TIME_VALID | 390 omap3_power_states[OMAP3_STATE_C6].flags = CPUIDLE_FLAG_TIME_VALID |
243 CPUIDLE_FLAG_CHECK_BM; 391 CPUIDLE_FLAG_CHECK_BM;
244 392
245 /* C7 . MPU OFF + Core OFF */ 393 /* C7 . MPU OFF + Core OFF */
246 omap3_power_states[OMAP3_STATE_C7].valid = 1; 394 omap3_power_states[OMAP3_STATE_C7].valid =
395 cpuidle_params_table[OMAP3_STATE_C7].valid;
247 omap3_power_states[OMAP3_STATE_C7].type = OMAP3_STATE_C7; 396 omap3_power_states[OMAP3_STATE_C7].type = OMAP3_STATE_C7;
248 omap3_power_states[OMAP3_STATE_C7].sleep_latency = 10000; 397 omap3_power_states[OMAP3_STATE_C7].sleep_latency =
249 omap3_power_states[OMAP3_STATE_C7].wakeup_latency = 30000; 398 cpuidle_params_table[OMAP3_STATE_C7].sleep_latency;
250 omap3_power_states[OMAP3_STATE_C7].threshold = 300000; 399 omap3_power_states[OMAP3_STATE_C7].wakeup_latency =
400 cpuidle_params_table[OMAP3_STATE_C7].wake_latency;
401 omap3_power_states[OMAP3_STATE_C7].threshold =
402 cpuidle_params_table[OMAP3_STATE_C7].threshold;
251 omap3_power_states[OMAP3_STATE_C7].mpu_state = PWRDM_POWER_OFF; 403 omap3_power_states[OMAP3_STATE_C7].mpu_state = PWRDM_POWER_OFF;
252 omap3_power_states[OMAP3_STATE_C7].core_state = PWRDM_POWER_OFF; 404 omap3_power_states[OMAP3_STATE_C7].core_state = PWRDM_POWER_OFF;
253 omap3_power_states[OMAP3_STATE_C7].flags = CPUIDLE_FLAG_TIME_VALID | 405 omap3_power_states[OMAP3_STATE_C7].flags = CPUIDLE_FLAG_TIME_VALID |
@@ -302,6 +454,8 @@ int __init omap3_idle_init(void)
302 return -EINVAL; 454 return -EINVAL;
303 dev->state_count = count; 455 dev->state_count = count;
304 456
457 omap3_cpuidle_update_states();
458
305 if (cpuidle_register_device(dev)) { 459 if (cpuidle_register_device(dev)) {
306 printk(KERN_ERR "%s: CPUidle register device failed\n", 460 printk(KERN_ERR "%s: CPUidle register device failed\n",
307 __func__); 461 __func__);
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index c104d5ca65b2..23e4d7733610 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -191,7 +191,7 @@ static struct resource omap4_mbox_resources[] = {
191 .flags = IORESOURCE_MEM, 191 .flags = IORESOURCE_MEM,
192 }, 192 },
193 { 193 {
194 .start = INT_44XX_MAIL_U0_MPU, 194 .start = OMAP44XX_IRQ_MAIL_U0,
195 .flags = IORESOURCE_IRQ, 195 .flags = IORESOURCE_IRQ,
196 }, 196 },
197}; 197};
@@ -720,13 +720,13 @@ void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
720 if (!cpu_is_omap44xx()) 720 if (!cpu_is_omap44xx())
721 return; 721 return;
722 base = OMAP4_MMC4_BASE + OMAP4_MMC_REG_OFFSET; 722 base = OMAP4_MMC4_BASE + OMAP4_MMC_REG_OFFSET;
723 irq = INT_44XX_MMC4_IRQ; 723 irq = OMAP44XX_IRQ_MMC4;
724 break; 724 break;
725 case 4: 725 case 4:
726 if (!cpu_is_omap44xx()) 726 if (!cpu_is_omap44xx())
727 return; 727 return;
728 base = OMAP4_MMC5_BASE + OMAP4_MMC_REG_OFFSET; 728 base = OMAP4_MMC5_BASE + OMAP4_MMC_REG_OFFSET;
729 irq = INT_44XX_MMC5_IRQ; 729 irq = OMAP44XX_IRQ_MMC4;
730 break; 730 break;
731 default: 731 default:
732 continue; 732 continue;
@@ -738,7 +738,7 @@ void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
738 } else if (cpu_is_omap44xx()) { 738 } else if (cpu_is_omap44xx()) {
739 if (i < 3) { 739 if (i < 3) {
740 base += OMAP4_MMC_REG_OFFSET; 740 base += OMAP4_MMC_REG_OFFSET;
741 irq += IRQ_GIC_START; 741 irq += OMAP44XX_IRQ_GIC_START;
742 } 742 }
743 size = OMAP4_HSMMC_SIZE; 743 size = OMAP4_HSMMC_SIZE;
744 name = "mmci-omap-hs"; 744 name = "mmci-omap-hs";
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index d2897a6fe491..37b8a1a4adf8 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -57,6 +57,8 @@ int omap_type(void)
57 val = omap_ctrl_readl(OMAP24XX_CONTROL_STATUS); 57 val = omap_ctrl_readl(OMAP24XX_CONTROL_STATUS);
58 } else if (cpu_is_omap34xx()) { 58 } else if (cpu_is_omap34xx()) {
59 val = omap_ctrl_readl(OMAP343X_CONTROL_STATUS); 59 val = omap_ctrl_readl(OMAP343X_CONTROL_STATUS);
60 } else if (cpu_is_omap44xx()) {
61 val = omap_ctrl_readl(OMAP44XX_CONTROL_STATUS);
60 } else { 62 } else {
61 pr_err("Cannot detect omap type!\n"); 63 pr_err("Cannot detect omap type!\n");
62 goto out; 64 goto out;
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 303d5c2c6fb5..402e8f0d0f21 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -137,12 +137,6 @@ static struct map_desc omap34xx_io_desc[] __initdata = {
137 .type = MT_DEVICE 137 .type = MT_DEVICE
138 }, 138 },
139 { 139 {
140 .virtual = L4_WK_34XX_VIRT,
141 .pfn = __phys_to_pfn(L4_WK_34XX_PHYS),
142 .length = L4_WK_34XX_SIZE,
143 .type = MT_DEVICE
144 },
145 {
146 .virtual = OMAP34XX_GPMC_VIRT, 140 .virtual = OMAP34XX_GPMC_VIRT,
147 .pfn = __phys_to_pfn(OMAP34XX_GPMC_PHYS), 141 .pfn = __phys_to_pfn(OMAP34XX_GPMC_PHYS),
148 .length = OMAP34XX_GPMC_SIZE, 142 .length = OMAP34XX_GPMC_SIZE,
@@ -189,12 +183,6 @@ static struct map_desc omap44xx_io_desc[] __initdata = {
189 .type = MT_DEVICE, 183 .type = MT_DEVICE,
190 }, 184 },
191 { 185 {
192 .virtual = L4_WK_44XX_VIRT,
193 .pfn = __phys_to_pfn(L4_WK_44XX_PHYS),
194 .length = L4_WK_44XX_SIZE,
195 .type = MT_DEVICE,
196 },
197 {
198 .virtual = OMAP44XX_GPMC_VIRT, 186 .virtual = OMAP44XX_GPMC_VIRT,
199 .pfn = __phys_to_pfn(OMAP44XX_GPMC_PHYS), 187 .pfn = __phys_to_pfn(OMAP44XX_GPMC_PHYS),
200 .length = OMAP44XX_GPMC_SIZE, 188 .length = OMAP44XX_GPMC_SIZE,
diff --git a/arch/arm/mach-omap2/mailbox.c b/arch/arm/mach-omap2/mailbox.c
index 2c9fd1c2a7c7..52a981cb8fdd 100644
--- a/arch/arm/mach-omap2/mailbox.c
+++ b/arch/arm/mach-omap2/mailbox.c
@@ -40,6 +40,9 @@
40#define AUTOIDLE (1 << 0) 40#define AUTOIDLE (1 << 0)
41#define SOFTRESET (1 << 1) 41#define SOFTRESET (1 << 1)
42#define SMARTIDLE (2 << 3) 42#define SMARTIDLE (2 << 3)
43#define OMAP4_SOFTRESET (1 << 0)
44#define OMAP4_NOIDLE (1 << 2)
45#define OMAP4_SMARTIDLE (2 << 2)
43 46
44/* SYSSTATUS: register bit definition */ 47/* SYSSTATUS: register bit definition */
45#define RESETDONE (1 << 0) 48#define RESETDONE (1 << 0)
@@ -99,23 +102,41 @@ static int omap2_mbox_startup(struct omap_mbox *mbox)
99 } 102 }
100 clk_enable(mbox_ick_handle); 103 clk_enable(mbox_ick_handle);
101 104
102 mbox_write_reg(SOFTRESET, MAILBOX_SYSCONFIG); 105 if (cpu_is_omap44xx()) {
103 timeout = jiffies + msecs_to_jiffies(20); 106 mbox_write_reg(OMAP4_SOFTRESET, MAILBOX_SYSCONFIG);
104 do { 107 timeout = jiffies + msecs_to_jiffies(20);
105 l = mbox_read_reg(MAILBOX_SYSSTATUS); 108 do {
106 if (l & RESETDONE) 109 l = mbox_read_reg(MAILBOX_SYSCONFIG);
107 break; 110 if (!(l & OMAP4_SOFTRESET))
108 } while (!time_after(jiffies, timeout)); 111 break;
109 112 } while (!time_after(jiffies, timeout));
110 if (!(l & RESETDONE)) { 113
111 pr_err("Can't take mmu out of reset\n"); 114 if (l & OMAP4_SOFTRESET) {
112 return -ENODEV; 115 pr_err("Can't take mailbox out of reset\n");
116 return -ENODEV;
117 }
118 } else {
119 mbox_write_reg(SOFTRESET, MAILBOX_SYSCONFIG);
120 timeout = jiffies + msecs_to_jiffies(20);
121 do {
122 l = mbox_read_reg(MAILBOX_SYSSTATUS);
123 if (l & RESETDONE)
124 break;
125 } while (!time_after(jiffies, timeout));
126
127 if (!(l & RESETDONE)) {
128 pr_err("Can't take mailbox out of reset\n");
129 return -ENODEV;
130 }
113 } 131 }
114 132
115 l = mbox_read_reg(MAILBOX_REVISION); 133 l = mbox_read_reg(MAILBOX_REVISION);
116 pr_info("omap mailbox rev %d.%d\n", (l & 0xf0) >> 4, (l & 0x0f)); 134 pr_info("omap mailbox rev %d.%d\n", (l & 0xf0) >> 4, (l & 0x0f));
117 135
118 l = SMARTIDLE | AUTOIDLE; 136 if (cpu_is_omap44xx())
137 l = OMAP4_SMARTIDLE;
138 else
139 l = SMARTIDLE | AUTOIDLE;
119 mbox_write_reg(l, MAILBOX_SYSCONFIG); 140 mbox_write_reg(l, MAILBOX_SYSCONFIG);
120 141
121 omap2_mbox_enable_irq(mbox, IRQ_RX); 142 omap2_mbox_enable_irq(mbox, IRQ_RX);
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c
index d601f9405d11..be8fce395a58 100644
--- a/arch/arm/mach-omap2/mcbsp.c
+++ b/arch/arm/mach-omap2/mcbsp.c
@@ -136,6 +136,7 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
136 }, 136 },
137 { 137 {
138 .phys_base = OMAP34XX_MCBSP2_BASE, 138 .phys_base = OMAP34XX_MCBSP2_BASE,
139 .phys_base_st = OMAP34XX_MCBSP2_ST_BASE,
139 .dma_rx_sync = OMAP24XX_DMA_MCBSP2_RX, 140 .dma_rx_sync = OMAP24XX_DMA_MCBSP2_RX,
140 .dma_tx_sync = OMAP24XX_DMA_MCBSP2_TX, 141 .dma_tx_sync = OMAP24XX_DMA_MCBSP2_TX,
141 .rx_irq = INT_24XX_MCBSP2_IRQ_RX, 142 .rx_irq = INT_24XX_MCBSP2_IRQ_RX,
@@ -145,6 +146,7 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
145 }, 146 },
146 { 147 {
147 .phys_base = OMAP34XX_MCBSP3_BASE, 148 .phys_base = OMAP34XX_MCBSP3_BASE,
149 .phys_base_st = OMAP34XX_MCBSP3_ST_BASE,
148 .dma_rx_sync = OMAP24XX_DMA_MCBSP3_RX, 150 .dma_rx_sync = OMAP24XX_DMA_MCBSP3_RX,
149 .dma_tx_sync = OMAP24XX_DMA_MCBSP3_TX, 151 .dma_tx_sync = OMAP24XX_DMA_MCBSP3_TX,
150 .rx_irq = INT_24XX_MCBSP3_IRQ_RX, 152 .rx_irq = INT_24XX_MCBSP3_IRQ_RX,
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h
index 7a9c2d004511..bd6466a2b039 100644
--- a/arch/arm/mach-omap2/pm.h
+++ b/arch/arm/mach-omap2/pm.h
@@ -23,6 +23,22 @@ extern int omap3_can_sleep(void);
23extern int set_pwrdm_state(struct powerdomain *pwrdm, u32 state); 23extern int set_pwrdm_state(struct powerdomain *pwrdm, u32 state);
24extern int omap3_idle_init(void); 24extern int omap3_idle_init(void);
25 25
26struct cpuidle_params {
27 u8 valid;
28 u32 sleep_latency;
29 u32 wake_latency;
30 u32 threshold;
31};
32
33#if defined(CONFIG_PM) && defined(CONFIG_CPU_IDLE)
34extern void omap3_pm_init_cpuidle(struct cpuidle_params *cpuidle_board_params);
35#else
36static
37inline void omap3_pm_init_cpuidle(struct cpuidle_params *cpuidle_board_params)
38{
39}
40#endif
41
26extern int omap3_pm_get_suspend_state(struct powerdomain *pwrdm); 42extern int omap3_pm_get_suspend_state(struct powerdomain *pwrdm);
27extern int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state); 43extern int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state);
28 44
@@ -37,6 +53,10 @@ extern int omap2_pm_debug;
37#define omap2_pm_debug 0 53#define omap2_pm_debug 0
38#endif 54#endif
39 55
56#if defined(CONFIG_CPU_IDLE)
57extern void omap3_cpuidle_update_states(void);
58#endif
59
40#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) 60#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
41extern void pm_dbg_update_time(struct powerdomain *pwrdm, int prev); 61extern void pm_dbg_update_time(struct powerdomain *pwrdm, int prev);
42extern int pm_dbg_regset_save(int reg_set); 62extern int pm_dbg_regset_save(int reg_set);
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 62e27aaf9fd6..fee2efb172e7 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -941,6 +941,10 @@ void omap3_pm_off_mode_enable(int enable)
941 else 941 else
942 state = PWRDM_POWER_RET; 942 state = PWRDM_POWER_RET;
943 943
944#ifdef CONFIG_CPU_IDLE
945 omap3_cpuidle_update_states();
946#endif
947
944 list_for_each_entry(pwrst, &pwrst_list, node) { 948 list_for_each_entry(pwrst, &pwrst_list, node) {
945 pwrst->next_state = state; 949 pwrst->next_state = state;
946 set_pwrdm_state(pwrst->pwrdm, state); 950 set_pwrdm_state(pwrst->pwrdm, state);
diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c
index 356a02010aae..81872aacb801 100644
--- a/arch/arm/mach-omap2/prcm.c
+++ b/arch/arm/mach-omap2/prcm.c
@@ -277,9 +277,19 @@ int omap2_cm_wait_idlest(void __iomem *reg, u32 mask, u8 idlest,
277 277
278void __init omap2_set_globals_prcm(struct omap_globals *omap2_globals) 278void __init omap2_set_globals_prcm(struct omap_globals *omap2_globals)
279{ 279{
280 prm_base = omap2_globals->prm; 280 /* Static mapping, never released */
281 cm_base = omap2_globals->cm; 281 if (omap2_globals->prm) {
282 cm2_base = omap2_globals->cm2; 282 prm_base = ioremap(omap2_globals->prm, SZ_8K);
283 WARN_ON(!prm_base);
284 }
285 if (omap2_globals->cm) {
286 cm_base = ioremap(omap2_globals->cm, SZ_8K);
287 WARN_ON(!cm_base);
288 }
289 if (omap2_globals->cm2) {
290 cm2_base = ioremap(omap2_globals->cm2, SZ_8K);
291 WARN_ON(!cm2_base);
292 }
283} 293}
284 294
285#ifdef CONFIG_ARCH_OMAP3 295#ifdef CONFIG_ARCH_OMAP3
diff --git a/arch/arm/mach-omap2/sdram-numonyx-m65kxxxxam.h b/arch/arm/mach-omap2/sdram-numonyx-m65kxxxxam.h
new file mode 100644
index 000000000000..cd4352917022
--- /dev/null
+++ b/arch/arm/mach-omap2/sdram-numonyx-m65kxxxxam.h
@@ -0,0 +1,51 @@
1/*
2 * SDRC register values for the Numonyx M65KXXXXAM
3 *
4 * Copyright (C) 2009 Integration Software and Electronic Engineering.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __ARCH_ARM_MACH_OMAP2_SDRAM_NUMONYX_M65KXXXXAM
12#define __ARCH_ARM_MACH_OMAP2_SDRAM_NUMONYX_M65KXXXXAM
13
14#include <plat/sdrc.h>
15
16/* Numonyx M65KXXXXAM */
17static struct omap_sdrc_params m65kxxxxam_sdrc_params[] = {
18 [0] = {
19 .rate = 200000000,
20 .actim_ctrla = 0xe321d4c6,
21 .actim_ctrlb = 0x00022328,
22 .rfr_ctrl = 0x0005e601,
23 .mr = 0x00000032,
24 },
25 [1] = {
26 .rate = 166000000,
27 .actim_ctrla = 0xba9dc485,
28 .actim_ctrlb = 0x00022321,
29 .rfr_ctrl = 0x0004dc01,
30 .mr = 0x00000032,
31 },
32 [2] = {
33 .rate = 133000000,
34 .actim_ctrla = 0x9a19b485,
35 .actim_ctrlb = 0x0002231b,
36 .rfr_ctrl = 0x0003de01,
37 .mr = 0x00000032,
38 },
39 [3] = {
40 .rate = 83000000,
41 .actim_ctrla = 0x594ca242,
42 .actim_ctrlb = 0x00022310,
43 .rfr_ctrl = 0x00025501,
44 .mr = 0x00000032,
45 },
46 [4] = {
47 .rate = 0
48 },
49};
50
51#endif
diff --git a/arch/arm/mach-omap2/sdrc.c b/arch/arm/mach-omap2/sdrc.c
index cbfbd142e946..4c65f5628b39 100644
--- a/arch/arm/mach-omap2/sdrc.c
+++ b/arch/arm/mach-omap2/sdrc.c
@@ -119,8 +119,15 @@ int omap2_sdrc_get_params(unsigned long r,
119 119
120void __init omap2_set_globals_sdrc(struct omap_globals *omap2_globals) 120void __init omap2_set_globals_sdrc(struct omap_globals *omap2_globals)
121{ 121{
122 omap2_sdrc_base = omap2_globals->sdrc; 122 /* Static mapping, never released */
123 omap2_sms_base = omap2_globals->sms; 123 if (omap2_globals->sdrc) {
124 omap2_sdrc_base = ioremap(omap2_globals->sdrc, SZ_64K);
125 WARN_ON(!omap2_sdrc_base);
126 }
127 if (omap2_globals->sms) {
128 omap2_sms_base = ioremap(omap2_globals->sms, SZ_64K);
129 WARN_ON(!omap2_sms_base);
130 }
124} 131}
125 132
126/** 133/**
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 5f3035ec0d6f..b79bc8926cc9 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -23,6 +23,7 @@
23#include <linux/serial_reg.h> 23#include <linux/serial_reg.h>
24#include <linux/clk.h> 24#include <linux/clk.h>
25#include <linux/io.h> 25#include <linux/io.h>
26#include <linux/delay.h>
26 27
27#include <plat/common.h> 28#include <plat/common.h>
28#include <plat/board.h> 29#include <plat/board.h>
@@ -160,6 +161,13 @@ static inline unsigned int serial_read_reg(struct plat_serial8250_port *up,
160 return (unsigned int)__raw_readb(up->membase + offset); 161 return (unsigned int)__raw_readb(up->membase + offset);
161} 162}
162 163
164static inline void __serial_write_reg(struct uart_port *up, int offset,
165 int value)
166{
167 offset <<= up->regshift;
168 __raw_writeb(value, up->membase + offset);
169}
170
163static inline void serial_write_reg(struct plat_serial8250_port *p, int offset, 171static inline void serial_write_reg(struct plat_serial8250_port *p, int offset,
164 int value) 172 int value)
165{ 173{
@@ -620,6 +628,20 @@ static unsigned int serial_in_override(struct uart_port *up, int offset)
620 return __serial_read_reg(up, offset); 628 return __serial_read_reg(up, offset);
621} 629}
622 630
631static void serial_out_override(struct uart_port *up, int offset, int value)
632{
633 unsigned int status, tmout = 10000;
634
635 status = __serial_read_reg(up, UART_LSR);
636 while (!(status & UART_LSR_THRE)) {
637 /* Wait up to 10ms for the character(s) to be sent. */
638 if (--tmout == 0)
639 break;
640 udelay(1);
641 status = __serial_read_reg(up, UART_LSR);
642 }
643 __serial_write_reg(up, offset, value);
644}
623void __init omap_serial_early_init(void) 645void __init omap_serial_early_init(void)
624{ 646{
625 int i; 647 int i;
@@ -721,11 +743,14 @@ void __init omap_serial_init_port(int port)
721 * omap3xxx: Never read empty UART fifo on UARTs 743 * omap3xxx: Never read empty UART fifo on UARTs
722 * with IP rev >=0x52 744 * with IP rev >=0x52
723 */ 745 */
724 if (cpu_is_omap44xx()) 746 if (cpu_is_omap44xx()) {
725 uart->p->serial_in = serial_in_override; 747 uart->p->serial_in = serial_in_override;
726 else if ((serial_read_reg(uart->p, UART_OMAP_MVER) & 0xFF) 748 uart->p->serial_out = serial_out_override;
727 >= UART_OMAP_NO_EMPTY_FIFO_READ_IP_REV) 749 } else if ((serial_read_reg(uart->p, UART_OMAP_MVER) & 0xFF)
750 >= UART_OMAP_NO_EMPTY_FIFO_READ_IP_REV) {
728 uart->p->serial_in = serial_in_override; 751 uart->p->serial_in = serial_in_override;
752 uart->p->serial_out = serial_out_override;
753 }
729} 754}
730 755
731/** 756/**
diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S
index 22fcc14e63be..d522cd70bf53 100644
--- a/arch/arm/mach-omap2/sleep34xx.S
+++ b/arch/arm/mach-omap2/sleep34xx.S
@@ -33,6 +33,8 @@
33#include "prm.h" 33#include "prm.h"
34#include "sdrc.h" 34#include "sdrc.h"
35 35
36#define SDRC_SCRATCHPAD_SEM_V 0xfa00291c
37
36#define PM_PREPWSTST_CORE_V OMAP34XX_PRM_REGADDR(CORE_MOD, \ 38#define PM_PREPWSTST_CORE_V OMAP34XX_PRM_REGADDR(CORE_MOD, \
37 OMAP3430_PM_PREPWSTST) 39 OMAP3430_PM_PREPWSTST)
38#define PM_PREPWSTST_CORE_P 0x48306AE8 40#define PM_PREPWSTST_CORE_P 0x48306AE8
@@ -57,6 +59,37 @@
57#define SDRC_DLLA_STATUS_V OMAP34XX_SDRC_REGADDR(SDRC_DLLA_STATUS) 59#define SDRC_DLLA_STATUS_V OMAP34XX_SDRC_REGADDR(SDRC_DLLA_STATUS)
58#define SDRC_DLLA_CTRL_V OMAP34XX_SDRC_REGADDR(SDRC_DLLA_CTRL) 60#define SDRC_DLLA_CTRL_V OMAP34XX_SDRC_REGADDR(SDRC_DLLA_CTRL)
59 61
62 .text
63/* Function to aquire the semaphore in scratchpad */
64ENTRY(lock_scratchpad_sem)
65 stmfd sp!, {lr} @ save registers on stack
66wait_sem:
67 mov r0,#1
68 ldr r1, sdrc_scratchpad_sem
69wait_loop:
70 ldr r2, [r1] @ load the lock value
71 cmp r2, r0 @ is the lock free ?
72 beq wait_loop @ not free...
73 swp r2, r0, [r1] @ semaphore free so lock it and proceed
74 cmp r2, r0 @ did we succeed ?
75 beq wait_sem @ no - try again
76 ldmfd sp!, {pc} @ restore regs and return
77sdrc_scratchpad_sem:
78 .word SDRC_SCRATCHPAD_SEM_V
79ENTRY(lock_scratchpad_sem_sz)
80 .word . - lock_scratchpad_sem
81
82 .text
83/* Function to release the scratchpad semaphore */
84ENTRY(unlock_scratchpad_sem)
85 stmfd sp!, {lr} @ save registers on stack
86 ldr r3, sdrc_scratchpad_sem
87 mov r2,#0
88 str r2,[r3]
89 ldmfd sp!, {pc} @ restore regs and return
90ENTRY(unlock_scratchpad_sem_sz)
91 .word . - unlock_scratchpad_sem
92
60 .text 93 .text
61/* Function call to get the restore pointer for resume from OFF */ 94/* Function call to get the restore pointer for resume from OFF */
62ENTRY(get_restore_pointer) 95ENTRY(get_restore_pointer)
@@ -251,6 +284,21 @@ restore:
251 mcr p15, 0, r0, c7, c10, 5 @ data memory barrier 284 mcr p15, 0, r0, c7, c10, 5 @ data memory barrier
252 .word 0xE1600071 @ call SMI monitor (smi #1) 285 .word 0xE1600071 @ call SMI monitor (smi #1)
253 286
287#ifdef CONFIG_OMAP3_L2_AUX_SECURE_SAVE_RESTORE
288 /* Restore L2 aux control register */
289 @ set service ID for PPA
290 mov r0, #CONFIG_OMAP3_L2_AUX_SECURE_SERVICE_SET_ID
291 mov r12, r0 @ copy service ID in r12
292 mov r1, #0 @ set task ID for ROM code in r1
293 mov r2, #4 @ set some flags in r2, r6
294 mov r6, #0xff
295 ldr r4, scratchpad_base
296 ldr r3, [r4, #0xBC]
297 adds r3, r3, #8 @ r3 points to parameters
298 mcr p15, 0, r0, c7, c10, 4 @ data write barrier
299 mcr p15, 0, r0, c7, c10, 5 @ data memory barrier
300 .word 0xE1600071 @ call SMI monitor (smi #1)
301#endif
254 b logic_l1_restore 302 b logic_l1_restore
255l2_inv_api_params: 303l2_inv_api_params:
256 .word 0x1, 0x00 304 .word 0x1, 0x00
@@ -264,6 +312,11 @@ smi: .word 0xE1600070 @ Call SMI monitor (smieq)
264 ldr r0, [r3,#4] 312 ldr r0, [r3,#4]
265 mov r12, #0x3 313 mov r12, #0x3
266 .word 0xE1600070 @ Call SMI monitor (smieq) 314 .word 0xE1600070 @ Call SMI monitor (smieq)
315 ldr r4, scratchpad_base
316 ldr r3, [r4,#0xBC]
317 ldr r0, [r3,#12]
318 mov r12, #0x2
319 .word 0xE1600070 @ Call SMI monitor (smieq)
267logic_l1_restore: 320logic_l1_restore:
268 mov r1, #0 321 mov r1, #0
269 /* Invalidate all instruction caches to PoU 322 /* Invalidate all instruction caches to PoU
@@ -272,7 +325,7 @@ logic_l1_restore:
272 325
273 ldr r4, scratchpad_base 326 ldr r4, scratchpad_base
274 ldr r3, [r4,#0xBC] 327 ldr r3, [r4,#0xBC]
275 adds r3, r3, #8 328 adds r3, r3, #16
276 ldmia r3!, {r4-r6} 329 ldmia r3!, {r4-r6}
277 mov sp, r4 330 mov sp, r4
278 msr spsr_cxsf, r5 331 msr spsr_cxsf, r5
@@ -391,7 +444,9 @@ save_context_wfi:
391 mov r8, r0 /* Store SDRAM address in r8 */ 444 mov r8, r0 /* Store SDRAM address in r8 */
392 mrc p15, 0, r5, c1, c0, 1 @ Read Auxiliary Control Register 445 mrc p15, 0, r5, c1, c0, 1 @ Read Auxiliary Control Register
393 mov r4, #0x1 @ Number of parameters for restore call 446 mov r4, #0x1 @ Number of parameters for restore call
394 stmia r8!, {r4-r5} 447 stmia r8!, {r4-r5} @ Push parameters for restore call
448 mrc p15, 1, r5, c9, c0, 2 @ Read L2 AUX ctrl register
449 stmia r8!, {r4-r5} @ Push parameters for restore call
395 /* Check what that target sleep state is:stored in r1*/ 450 /* Check what that target sleep state is:stored in r1*/
396 /* 1 - Only L1 and logic lost */ 451 /* 1 - Only L1 and logic lost */
397 /* 2 - Only L2 lost */ 452 /* 2 - Only L2 lost */
diff --git a/arch/arm/mach-omap2/timer-mpu.c b/arch/arm/mach-omap2/timer-mpu.c
index c1a650a9910f..954682e64399 100644
--- a/arch/arm/mach-omap2/timer-mpu.c
+++ b/arch/arm/mach-omap2/timer-mpu.c
@@ -28,7 +28,7 @@
28 */ 28 */
29void __cpuinit local_timer_setup(struct clock_event_device *evt) 29void __cpuinit local_timer_setup(struct clock_event_device *evt)
30{ 30{
31 evt->irq = INT_44XX_LOCALTIMER_IRQ; 31 evt->irq = OMAP44XX_IRQ_LOCALTIMER;
32 twd_timer_setup(evt); 32 twd_timer_setup(evt);
33} 33}
34 34
diff --git a/arch/arm/mach-omap2/usb-musb.c b/arch/arm/mach-omap2/usb-musb.c
index a80441dd19b8..6d41fa7b2ce8 100644
--- a/arch/arm/mach-omap2/usb-musb.c
+++ b/arch/arm/mach-omap2/usb-musb.c
@@ -47,70 +47,11 @@ static struct resource musb_resources[] = {
47 }, 47 },
48}; 48};
49 49
50static int clk_on;
51
52static int musb_set_clock(struct clk *clk, int state)
53{
54 if (state) {
55 if (clk_on > 0)
56 return -ENODEV;
57
58 clk_enable(clk);
59 clk_on = 1;
60 } else {
61 if (clk_on == 0)
62 return -ENODEV;
63
64 clk_disable(clk);
65 clk_on = 0;
66 }
67
68 return 0;
69}
70
71static struct musb_hdrc_eps_bits musb_eps[] = {
72 { "ep1_tx", 10, },
73 { "ep1_rx", 10, },
74 { "ep2_tx", 9, },
75 { "ep2_rx", 9, },
76 { "ep3_tx", 3, },
77 { "ep3_rx", 3, },
78 { "ep4_tx", 3, },
79 { "ep4_rx", 3, },
80 { "ep5_tx", 3, },
81 { "ep5_rx", 3, },
82 { "ep6_tx", 3, },
83 { "ep6_rx", 3, },
84 { "ep7_tx", 3, },
85 { "ep7_rx", 3, },
86 { "ep8_tx", 2, },
87 { "ep8_rx", 2, },
88 { "ep9_tx", 2, },
89 { "ep9_rx", 2, },
90 { "ep10_tx", 2, },
91 { "ep10_rx", 2, },
92 { "ep11_tx", 2, },
93 { "ep11_rx", 2, },
94 { "ep12_tx", 2, },
95 { "ep12_rx", 2, },
96 { "ep13_tx", 2, },
97 { "ep13_rx", 2, },
98 { "ep14_tx", 2, },
99 { "ep14_rx", 2, },
100 { "ep15_tx", 2, },
101 { "ep15_rx", 2, },
102};
103
104static struct musb_hdrc_config musb_config = { 50static struct musb_hdrc_config musb_config = {
105 .multipoint = 1, 51 .multipoint = 1,
106 .dyn_fifo = 1, 52 .dyn_fifo = 1,
107 .soft_con = 1,
108 .dma = 1,
109 .num_eps = 16, 53 .num_eps = 16,
110 .dma_channels = 7,
111 .dma_req_chan = (1 << 0) | (1 << 1) | (1 << 2) | (1 << 3),
112 .ram_bits = 12, 54 .ram_bits = 12,
113 .eps_bits = musb_eps,
114}; 55};
115 56
116static struct musb_hdrc_platform_data musb_plat = { 57static struct musb_hdrc_platform_data musb_plat = {
@@ -122,7 +63,6 @@ static struct musb_hdrc_platform_data musb_plat = {
122 .mode = MUSB_PERIPHERAL, 63 .mode = MUSB_PERIPHERAL,
123#endif 64#endif
124 /* .clock is set dynamically */ 65 /* .clock is set dynamically */
125 .set_clock = musb_set_clock,
126 .config = &musb_config, 66 .config = &musb_config,
127 67
128 /* REVISIT charge pump on TWL4030 can supply up to 68 /* REVISIT charge pump on TWL4030 can supply up to
@@ -146,28 +86,34 @@ static struct platform_device musb_device = {
146 .resource = musb_resources, 86 .resource = musb_resources,
147}; 87};
148 88
149void __init usb_musb_init(void) 89void __init usb_musb_init(struct omap_musb_board_data *board_data)
150{ 90{
151 if (cpu_is_omap243x()) 91 if (cpu_is_omap243x()) {
152 musb_resources[0].start = OMAP243X_HS_BASE; 92 musb_resources[0].start = OMAP243X_HS_BASE;
153 else 93 } else if (cpu_is_omap34xx()) {
154 musb_resources[0].start = OMAP34XX_HSUSB_OTG_BASE; 94 musb_resources[0].start = OMAP34XX_HSUSB_OTG_BASE;
155 musb_resources[0].end = musb_resources[0].start + SZ_8K - 1; 95 } else if (cpu_is_omap44xx()) {
96 musb_resources[0].start = OMAP44XX_HSUSB_OTG_BASE;
97 musb_resources[1].start = OMAP44XX_IRQ_HS_USB_MC_N;
98 musb_resources[2].start = OMAP44XX_IRQ_HS_USB_DMA_N;
99 }
100 musb_resources[0].end = musb_resources[0].start + SZ_4K - 1;
156 101
157 /* 102 /*
158 * REVISIT: This line can be removed once all the platforms using 103 * REVISIT: This line can be removed once all the platforms using
159 * musb_core.c have been converted to use use clkdev. 104 * musb_core.c have been converted to use use clkdev.
160 */ 105 */
161 musb_plat.clock = "ick"; 106 musb_plat.clock = "ick";
107 musb_plat.board_data = board_data;
108 musb_plat.power = board_data->power >> 1;
109 musb_plat.mode = board_data->mode;
162 110
163 if (platform_device_register(&musb_device) < 0) { 111 if (platform_device_register(&musb_device) < 0)
164 printk(KERN_ERR "Unable to register HS-USB (MUSB) device\n"); 112 printk(KERN_ERR "Unable to register HS-USB (MUSB) device\n");
165 return;
166 }
167} 113}
168 114
169#else 115#else
170void __init usb_musb_init(void) 116void __init usb_musb_init(struct omap_musb_board_data *board_data)
171{ 117{
172} 118}
173#endif /* CONFIG_USB_MUSB_SOC */ 119#endif /* CONFIG_USB_MUSB_SOC */
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-31 11:18:24 -0500