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-rw-r--r--arch/arm/mach-omap2/Makefile82
-rw-r--r--arch/arm/mach-omap2/board-2430sdp.c17
-rw-r--r--arch/arm/mach-omap2/board-3430sdp.c9
-rw-r--r--arch/arm/mach-omap2/board-3630sdp.c11
-rw-r--r--arch/arm/mach-omap2/board-4430sdp.c17
-rw-r--r--arch/arm/mach-omap2/board-am3517crane.c9
-rw-r--r--arch/arm/mach-omap2/board-am3517evm.c8
-rw-r--r--arch/arm/mach-omap2/board-apollon.c18
-rw-r--r--arch/arm/mach-omap2/board-cm-t35.c13
-rw-r--r--arch/arm/mach-omap2/board-cm-t3517.c9
-rw-r--r--arch/arm/mach-omap2/board-devkit8000.c19
-rw-r--r--arch/arm/mach-omap2/board-flash.c5
-rw-r--r--arch/arm/mach-omap2/board-flash.h19
-rw-r--r--arch/arm/mach-omap2/board-generic.c2
-rw-r--r--arch/arm/mach-omap2/board-h4.c24
-rw-r--r--arch/arm/mach-omap2/board-igep0020.c13
-rw-r--r--arch/arm/mach-omap2/board-ldp.c9
-rw-r--r--arch/arm/mach-omap2/board-n8x0.c25
-rw-r--r--arch/arm/mach-omap2/board-omap3beagle.c11
-rw-r--r--arch/arm/mach-omap2/board-omap3evm.c9
-rw-r--r--arch/arm/mach-omap2/board-omap3logic.c11
-rw-r--r--arch/arm/mach-omap2/board-omap3pandora.c11
-rw-r--r--arch/arm/mach-omap2/board-omap3stalker.c16
-rw-r--r--arch/arm/mach-omap2/board-omap3touchbook.c18
-rw-r--r--arch/arm/mach-omap2/board-omap4panda.c17
-rw-r--r--arch/arm/mach-omap2/board-overo.c11
-rw-r--r--arch/arm/mach-omap2/board-rm680.c25
-rw-r--r--arch/arm/mach-omap2/board-rx51.c25
-rw-r--r--arch/arm/mach-omap2/board-ti8168evm.c9
-rw-r--r--arch/arm/mach-omap2/board-zoom.c23
-rw-r--r--arch/arm/mach-omap2/clock3xxx_data.c11
-rw-r--r--arch/arm/mach-omap2/clockdomain.c149
-rw-r--r--arch/arm/mach-omap2/clockdomain.h22
-rw-r--r--arch/arm/mach-omap2/clockdomain2xxx_3xxx.c4
-rw-r--r--arch/arm/mach-omap2/clockdomain44xx.c2
-rw-r--r--arch/arm/mach-omap2/clockdomains2420_data.c154
-rw-r--r--arch/arm/mach-omap2/clockdomains2430_data.c181
-rw-r--r--arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c803
-rw-r--r--arch/arm/mach-omap2/clockdomains3xxx_data.c398
-rw-r--r--arch/arm/mach-omap2/clockdomains44xx_data.c409
-rw-r--r--arch/arm/mach-omap2/common.c18
-rw-r--r--arch/arm/mach-omap2/devices.c44
-rw-r--r--arch/arm/mach-omap2/display.c6
-rw-r--r--arch/arm/mach-omap2/dma.c16
-rw-r--r--arch/arm/mach-omap2/gpio.c10
-rw-r--r--arch/arm/mach-omap2/hsmmc.c8
-rw-r--r--arch/arm/mach-omap2/hwspinlock.c8
-rw-r--r--arch/arm/mach-omap2/id.c191
-rw-r--r--arch/arm/mach-omap2/io.c52
-rw-r--r--arch/arm/mach-omap2/mcbsp.c111
-rw-r--r--arch/arm/mach-omap2/omap_hwmod.c3
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2420_data.c37
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2430_data.c45
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_3xxx_data.c169
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_44xx_data.c82
-rw-r--r--arch/arm/mach-omap2/opp.c2
-rw-r--r--arch/arm/mach-omap2/pm.c30
-rw-r--r--arch/arm/mach-omap2/pm24xx.c27
-rw-r--r--arch/arm/mach-omap2/pm34xx.c2
-rw-r--r--arch/arm/mach-omap2/powerdomain-common.c7
-rw-r--r--arch/arm/mach-omap2/powerdomain.c87
-rw-r--r--arch/arm/mach-omap2/powerdomain.h9
-rw-r--r--arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.c19
-rw-r--r--arch/arm/mach-omap2/powerdomains2xxx_data.c44
-rw-r--r--arch/arm/mach-omap2/powerdomains3xxx_data.c81
-rw-r--r--arch/arm/mach-omap2/powerdomains44xx_data.c20
-rw-r--r--arch/arm/mach-omap2/serial.c14
-rw-r--r--arch/arm/mach-omap2/sr_device.c6
68 files changed, 1602 insertions, 2174 deletions
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 7317a2b39dd1..d7e25379a4b4 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -116,9 +116,12 @@ obj-$(CONFIG_ARCH_OMAP4) += $(powerdomain-common) \
116obj-$(CONFIG_ARCH_OMAP2) += clockdomain.o \ 116obj-$(CONFIG_ARCH_OMAP2) += clockdomain.o \
117 clockdomain2xxx_3xxx.o \ 117 clockdomain2xxx_3xxx.o \
118 clockdomains2xxx_3xxx_data.o 118 clockdomains2xxx_3xxx_data.o
119obj-$(CONFIG_SOC_OMAP2420) += clockdomains2420_data.o
120obj-$(CONFIG_SOC_OMAP2430) += clockdomains2430_data.o
119obj-$(CONFIG_ARCH_OMAP3) += clockdomain.o \ 121obj-$(CONFIG_ARCH_OMAP3) += clockdomain.o \
120 clockdomain2xxx_3xxx.o \ 122 clockdomain2xxx_3xxx.o \
121 clockdomains2xxx_3xxx_data.o 123 clockdomains2xxx_3xxx_data.o \
124 clockdomains3xxx_data.o
122obj-$(CONFIG_ARCH_OMAP4) += clockdomain.o \ 125obj-$(CONFIG_ARCH_OMAP4) += clockdomain.o \
123 clockdomain44xx.o \ 126 clockdomain44xx.o \
124 clockdomains44xx_data.o 127 clockdomains44xx_data.o
@@ -185,75 +188,62 @@ endif
185# Specific board support 188# Specific board support
186obj-$(CONFIG_MACH_OMAP_GENERIC) += board-generic.o 189obj-$(CONFIG_MACH_OMAP_GENERIC) += board-generic.o
187obj-$(CONFIG_MACH_OMAP_H4) += board-h4.o 190obj-$(CONFIG_MACH_OMAP_H4) += board-h4.o
188obj-$(CONFIG_MACH_OMAP_2430SDP) += board-2430sdp.o \ 191obj-$(CONFIG_MACH_OMAP_2430SDP) += board-2430sdp.o
189 hsmmc.o
190obj-$(CONFIG_MACH_OMAP_APOLLON) += board-apollon.o 192obj-$(CONFIG_MACH_OMAP_APOLLON) += board-apollon.o
191obj-$(CONFIG_MACH_OMAP3_BEAGLE) += board-omap3beagle.o \ 193obj-$(CONFIG_MACH_OMAP3_BEAGLE) += board-omap3beagle.o
192 hsmmc.o 194obj-$(CONFIG_MACH_DEVKIT8000) += board-devkit8000.o
193obj-$(CONFIG_MACH_DEVKIT8000) += board-devkit8000.o \ 195obj-$(CONFIG_MACH_OMAP_LDP) += board-ldp.o
194 hsmmc.o 196obj-$(CONFIG_MACH_OMAP3530_LV_SOM) += board-omap3logic.o
195obj-$(CONFIG_MACH_OMAP_LDP) += board-ldp.o \ 197obj-$(CONFIG_MACH_OMAP3_TORPEDO) += board-omap3logic.o
196 board-flash.o \ 198obj-$(CONFIG_MACH_ENCORE) += board-omap3encore.o
197 hsmmc.o 199obj-$(CONFIG_MACH_OVERO) += board-overo.o
198obj-$(CONFIG_MACH_OMAP3530_LV_SOM) += board-omap3logic.o \ 200obj-$(CONFIG_MACH_OMAP3EVM) += board-omap3evm.o
199 hsmmc.o 201obj-$(CONFIG_MACH_OMAP3_PANDORA) += board-omap3pandora.o
200obj-$(CONFIG_MACH_OMAP3_TORPEDO) += board-omap3logic.o \ 202obj-$(CONFIG_MACH_OMAP_3430SDP) += board-3430sdp.o
201 hsmmc.o
202obj-$(CONFIG_MACH_OVERO) += board-overo.o \
203 hsmmc.o
204obj-$(CONFIG_MACH_OMAP3EVM) += board-omap3evm.o \
205 hsmmc.o
206obj-$(CONFIG_MACH_OMAP3_PANDORA) += board-omap3pandora.o \
207 hsmmc.o
208obj-$(CONFIG_MACH_OMAP_3430SDP) += board-3430sdp.o \
209 hsmmc.o \
210 board-flash.o
211obj-$(CONFIG_MACH_NOKIA_N8X0) += board-n8x0.o 203obj-$(CONFIG_MACH_NOKIA_N8X0) += board-n8x0.o
212obj-$(CONFIG_MACH_NOKIA_RM680) += board-rm680.o \ 204obj-$(CONFIG_MACH_NOKIA_RM680) += board-rm680.o \
213 sdram-nokia.o \ 205 sdram-nokia.o
214 hsmmc.o
215obj-$(CONFIG_MACH_NOKIA_RX51) += board-rx51.o \ 206obj-$(CONFIG_MACH_NOKIA_RX51) += board-rx51.o \
216 sdram-nokia.o \ 207 sdram-nokia.o \
217 board-rx51-peripherals.o \ 208 board-rx51-peripherals.o \
218 board-rx51-video.o \ 209 board-rx51-video.o
219 hsmmc.o
220obj-$(CONFIG_MACH_OMAP_ZOOM2) += board-zoom.o \ 210obj-$(CONFIG_MACH_OMAP_ZOOM2) += board-zoom.o \
221 board-zoom-peripherals.o \ 211 board-zoom-peripherals.o \
222 board-zoom-display.o \ 212 board-zoom-display.o \
223 board-flash.o \
224 hsmmc.o \
225 board-zoom-debugboard.o 213 board-zoom-debugboard.o
226obj-$(CONFIG_MACH_OMAP_ZOOM3) += board-zoom.o \ 214obj-$(CONFIG_MACH_OMAP_ZOOM3) += board-zoom.o \
227 board-zoom-peripherals.o \ 215 board-zoom-peripherals.o \
228 board-zoom-display.o \ 216 board-zoom-display.o \
229 board-flash.o \
230 hsmmc.o \
231 board-zoom-debugboard.o 217 board-zoom-debugboard.o
232obj-$(CONFIG_MACH_OMAP_3630SDP) += board-3630sdp.o \ 218obj-$(CONFIG_MACH_OMAP_3630SDP) += board-3630sdp.o \
233 board-zoom-peripherals.o \ 219 board-zoom-peripherals.o \
234 board-zoom-display.o \ 220 board-zoom-display.o
235 board-flash.o \ 221obj-$(CONFIG_MACH_CM_T35) += board-cm-t35.o
236 hsmmc.o
237obj-$(CONFIG_MACH_CM_T35) += board-cm-t35.o \
238 hsmmc.o
239obj-$(CONFIG_MACH_CM_T3517) += board-cm-t3517.o 222obj-$(CONFIG_MACH_CM_T3517) += board-cm-t3517.o
240obj-$(CONFIG_MACH_IGEP0020) += board-igep0020.o \ 223obj-$(CONFIG_MACH_IGEP0020) += board-igep0020.o
241 hsmmc.o 224obj-$(CONFIG_MACH_OMAP3_TOUCHBOOK) += board-omap3touchbook.o
242obj-$(CONFIG_MACH_OMAP3_TOUCHBOOK) += board-omap3touchbook.o \ 225obj-$(CONFIG_MACH_OMAP_4430SDP) += board-4430sdp.o
243 hsmmc.o 226obj-$(CONFIG_MACH_OMAP4_PANDA) += board-omap4panda.o
244obj-$(CONFIG_MACH_OMAP_4430SDP) += board-4430sdp.o \ 227
245 hsmmc.o 228obj-$(CONFIG_MACH_PCM049) += board-omap4pcm049.o
246obj-$(CONFIG_MACH_OMAP4_PANDA) += board-omap4panda.o \
247 hsmmc.o
248 229
249obj-$(CONFIG_MACH_OMAP3517EVM) += board-am3517evm.o 230obj-$(CONFIG_MACH_OMAP3517EVM) += board-am3517evm.o
250 231
251obj-$(CONFIG_MACH_CRANEBOARD) += board-am3517crane.o 232obj-$(CONFIG_MACH_CRANEBOARD) += board-am3517crane.o
252 233
253obj-$(CONFIG_MACH_SBC3530) += board-omap3stalker.o \ 234obj-$(CONFIG_MACH_SBC3530) += board-omap3stalker.o
254 hsmmc.o
255obj-$(CONFIG_MACH_TI8168EVM) += board-ti8168evm.o 235obj-$(CONFIG_MACH_TI8168EVM) += board-ti8168evm.o
236
256# Platform specific device init code 237# Platform specific device init code
238
239omap-flash-$(CONFIG_MTD_NAND_OMAP2) := board-flash.o
240omap-flash-$(CONFIG_MTD_ONENAND_OMAP2) := board-flash.o
241obj-y += $(omap-flash-y) $(omap-flash-m)
242
243omap-hsmmc-$(CONFIG_MMC_OMAP_HS) := hsmmc.o
244obj-y += $(omap-hsmmc-m) $(omap-hsmmc-y)
245
246
257usbfs-$(CONFIG_ARCH_OMAP_OTG) := usb-fs.o 247usbfs-$(CONFIG_ARCH_OMAP_OTG) := usb-fs.o
258obj-y += $(usbfs-m) $(usbfs-y) 248obj-y += $(usbfs-m) $(usbfs-y)
259obj-y += usb-musb.o 249obj-y += usb-musb.o
diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c
index f8ce84b69eb1..d704f0ac328d 100644
--- a/arch/arm/mach-omap2/board-2430sdp.c
+++ b/arch/arm/mach-omap2/board-2430sdp.c
@@ -192,12 +192,6 @@ static inline void board_smc91x_init(void)
192 192
193#endif 193#endif
194 194
195static void __init omap_2430sdp_init_early(void)
196{
197 omap2_init_common_infrastructure();
198 omap2_init_common_devices(NULL, NULL);
199}
200
201static struct regulator_consumer_supply sdp2430_vmmc1_supplies[] = { 195static struct regulator_consumer_supply sdp2430_vmmc1_supplies[] = {
202 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), 196 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
203}; 197};
@@ -284,6 +278,7 @@ static void __init omap_2430sdp_init(void)
284 278
285 platform_add_devices(sdp2430_devices, ARRAY_SIZE(sdp2430_devices)); 279 platform_add_devices(sdp2430_devices, ARRAY_SIZE(sdp2430_devices));
286 omap_serial_init(); 280 omap_serial_init();
281 omap_sdrc_init(NULL, NULL);
287 omap2_hsmmc_init(mmc); 282 omap2_hsmmc_init(mmc);
288 omap2_usbfs_init(&sdp2430_usb_config); 283 omap2_usbfs_init(&sdp2430_usb_config);
289 284
@@ -299,18 +294,12 @@ static void __init omap_2430sdp_init(void)
299 sdp2430_display_init(); 294 sdp2430_display_init();
300} 295}
301 296
302static void __init omap_2430sdp_map_io(void)
303{
304 omap2_set_globals_243x();
305 omap243x_map_common_io();
306}
307
308MACHINE_START(OMAP_2430SDP, "OMAP2430 sdp2430 board") 297MACHINE_START(OMAP_2430SDP, "OMAP2430 sdp2430 board")
309 /* Maintainer: Syed Khasim - Texas Instruments Inc */ 298 /* Maintainer: Syed Khasim - Texas Instruments Inc */
310 .atag_offset = 0x100, 299 .atag_offset = 0x100,
311 .reserve = omap_reserve, 300 .reserve = omap_reserve,
312 .map_io = omap_2430sdp_map_io, 301 .map_io = omap243x_map_io,
313 .init_early = omap_2430sdp_init_early, 302 .init_early = omap2430_init_early,
314 .init_irq = omap2_init_irq, 303 .init_irq = omap2_init_irq,
315 .init_machine = omap_2430sdp_init, 304 .init_machine = omap_2430sdp_init,
316 .timer = &omap2_timer, 305 .timer = &omap2_timer,
diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c
index 204beddcb949..77142c13fa13 100644
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -224,12 +224,6 @@ static struct omap_dss_board_info sdp3430_dss_data = {
224static struct omap_board_config_kernel sdp3430_config[] __initdata = { 224static struct omap_board_config_kernel sdp3430_config[] __initdata = {
225}; 225};
226 226
227static void __init omap_3430sdp_init_early(void)
228{
229 omap2_init_common_infrastructure();
230 omap2_init_common_devices(hyb18m512160af6_sdrc_params, NULL);
231}
232
233static struct omap2_hsmmc_info mmc[] = { 227static struct omap2_hsmmc_info mmc[] = {
234 { 228 {
235 .mmc = 1, 229 .mmc = 1,
@@ -718,6 +712,7 @@ static void __init omap_3430sdp_init(void)
718 gpio_pendown = SDP3430_TS_GPIO_IRQ_SDPV1; 712 gpio_pendown = SDP3430_TS_GPIO_IRQ_SDPV1;
719 omap_ads7846_init(1, gpio_pendown, 310, NULL); 713 omap_ads7846_init(1, gpio_pendown, 310, NULL);
720 board_serial_init(); 714 board_serial_init();
715 omap_sdrc_init(hyb18m512160af6_sdrc_params, NULL);
721 usb_musb_init(NULL); 716 usb_musb_init(NULL);
722 board_smc91x_init(); 717 board_smc91x_init();
723 board_flash_init(sdp_flash_partitions, chip_sel_3430, 0); 718 board_flash_init(sdp_flash_partitions, chip_sel_3430, 0);
@@ -731,7 +726,7 @@ MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board")
731 .atag_offset = 0x100, 726 .atag_offset = 0x100,
732 .reserve = omap_reserve, 727 .reserve = omap_reserve,
733 .map_io = omap3_map_io, 728 .map_io = omap3_map_io,
734 .init_early = omap_3430sdp_init_early, 729 .init_early = omap3430_init_early,
735 .init_irq = omap3_init_irq, 730 .init_irq = omap3_init_irq,
736 .init_machine = omap_3430sdp_init, 731 .init_machine = omap_3430sdp_init,
737 .timer = &omap3_timer, 732 .timer = &omap3_timer,
diff --git a/arch/arm/mach-omap2/board-3630sdp.c b/arch/arm/mach-omap2/board-3630sdp.c
index 8b5b5aa751ed..f552305162fc 100644
--- a/arch/arm/mach-omap2/board-3630sdp.c
+++ b/arch/arm/mach-omap2/board-3630sdp.c
@@ -70,13 +70,6 @@ static const struct usbhs_omap_board_data usbhs_bdata __initconst = {
70static struct omap_board_config_kernel sdp_config[] __initdata = { 70static struct omap_board_config_kernel sdp_config[] __initdata = {
71}; 71};
72 72
73static void __init omap_sdp_init_early(void)
74{
75 omap2_init_common_infrastructure();
76 omap2_init_common_devices(h8mbx00u0mer0em_sdrc_params,
77 h8mbx00u0mer0em_sdrc_params);
78}
79
80#ifdef CONFIG_OMAP_MUX 73#ifdef CONFIG_OMAP_MUX
81static struct omap_board_mux board_mux[] __initdata = { 74static struct omap_board_mux board_mux[] __initdata = {
82 { .reg_offset = OMAP_MUX_TERMINATOR }, 75 { .reg_offset = OMAP_MUX_TERMINATOR },
@@ -207,6 +200,8 @@ static void __init omap_sdp_init(void)
207 omap_board_config = sdp_config; 200 omap_board_config = sdp_config;
208 omap_board_config_size = ARRAY_SIZE(sdp_config); 201 omap_board_config_size = ARRAY_SIZE(sdp_config);
209 zoom_peripherals_init(); 202 zoom_peripherals_init();
203 omap_sdrc_init(h8mbx00u0mer0em_sdrc_params,
204 h8mbx00u0mer0em_sdrc_params);
210 zoom_display_init(); 205 zoom_display_init();
211 board_smc91x_init(); 206 board_smc91x_init();
212 board_flash_init(sdp_flash_partitions, chip_sel_sdp, NAND_BUSWIDTH_16); 207 board_flash_init(sdp_flash_partitions, chip_sel_sdp, NAND_BUSWIDTH_16);
@@ -218,7 +213,7 @@ MACHINE_START(OMAP_3630SDP, "OMAP 3630SDP board")
218 .atag_offset = 0x100, 213 .atag_offset = 0x100,
219 .reserve = omap_reserve, 214 .reserve = omap_reserve,
220 .map_io = omap3_map_io, 215 .map_io = omap3_map_io,
221 .init_early = omap_sdp_init_early, 216 .init_early = omap3630_init_early,
222 .init_irq = omap3_init_irq, 217 .init_irq = omap3_init_irq,
223 .init_machine = omap_sdp_init, 218 .init_machine = omap_sdp_init,
224 .timer = &omap3_timer, 219 .timer = &omap3_timer,
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
index a3e37ff3ad18..515646886b59 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -379,12 +379,6 @@ static struct platform_device *sdp4430_devices[] __initdata = {
379 &sdp4430_vbat, 379 &sdp4430_vbat,
380}; 380};
381 381
382static void __init omap_4430sdp_init_early(void)
383{
384 omap2_init_common_infrastructure();
385 omap2_init_common_devices(NULL, NULL);
386}
387
388static struct omap_musb_board_data musb_board_data = { 382static struct omap_musb_board_data musb_board_data = {
389 .interface_type = MUSB_INTERFACE_UTMI, 383 .interface_type = MUSB_INTERFACE_UTMI,
390 .mode = MUSB_OTG, 384 .mode = MUSB_OTG,
@@ -961,6 +955,7 @@ static void __init omap_4430sdp_init(void)
961 omap_sfh7741prox_init(); 955 omap_sfh7741prox_init();
962 platform_add_devices(sdp4430_devices, ARRAY_SIZE(sdp4430_devices)); 956 platform_add_devices(sdp4430_devices, ARRAY_SIZE(sdp4430_devices));
963 board_serial_init(); 957 board_serial_init();
958 omap_sdrc_init(NULL, NULL);
964 omap4_sdp4430_wifi_init(); 959 omap4_sdp4430_wifi_init();
965 omap4_twl6030_hsmmc_init(mmc); 960 omap4_twl6030_hsmmc_init(mmc);
966 961
@@ -982,18 +977,12 @@ static void __init omap_4430sdp_init(void)
982 omap_4430sdp_display_init(); 977 omap_4430sdp_display_init();
983} 978}
984 979
985static void __init omap_4430sdp_map_io(void)
986{
987 omap2_set_globals_443x();
988 omap44xx_map_common_io();
989}
990
991MACHINE_START(OMAP_4430SDP, "OMAP4430 4430SDP board") 980MACHINE_START(OMAP_4430SDP, "OMAP4430 4430SDP board")
992 /* Maintainer: Santosh Shilimkar - Texas Instruments Inc */ 981 /* Maintainer: Santosh Shilimkar - Texas Instruments Inc */
993 .atag_offset = 0x100, 982 .atag_offset = 0x100,
994 .reserve = omap_reserve, 983 .reserve = omap_reserve,
995 .map_io = omap_4430sdp_map_io, 984 .map_io = omap4_map_io,
996 .init_early = omap_4430sdp_init_early, 985 .init_early = omap4430_init_early,
997 .init_irq = gic_init_irq, 986 .init_irq = gic_init_irq,
998 .init_machine = omap_4430sdp_init, 987 .init_machine = omap_4430sdp_init,
999 .timer = &omap4_timer, 988 .timer = &omap4_timer,
diff --git a/arch/arm/mach-omap2/board-am3517crane.c b/arch/arm/mach-omap2/board-am3517crane.c
index db110fdb8b2c..7834536ab416 100644
--- a/arch/arm/mach-omap2/board-am3517crane.c
+++ b/arch/arm/mach-omap2/board-am3517crane.c
@@ -47,12 +47,6 @@ static struct omap_board_mux board_mux[] __initdata = {
47}; 47};
48#endif 48#endif
49 49
50static void __init am3517_crane_init_early(void)
51{
52 omap2_init_common_infrastructure();
53 omap2_init_common_devices(NULL, NULL);
54}
55
56static struct usbhs_omap_board_data usbhs_bdata __initdata = { 50static struct usbhs_omap_board_data usbhs_bdata __initdata = {
57 .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY, 51 .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
58 .port_mode[1] = OMAP_USBHS_PORT_MODE_UNUSED, 52 .port_mode[1] = OMAP_USBHS_PORT_MODE_UNUSED,
@@ -70,6 +64,7 @@ static void __init am3517_crane_init(void)
70 64
71 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); 65 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
72 omap_serial_init(); 66 omap_serial_init();
67 omap_sdrc_init(NULL, NULL);
73 68
74 omap_board_config = am3517_crane_config; 69 omap_board_config = am3517_crane_config;
75 omap_board_config_size = ARRAY_SIZE(am3517_crane_config); 70 omap_board_config_size = ARRAY_SIZE(am3517_crane_config);
@@ -101,7 +96,7 @@ MACHINE_START(CRANEBOARD, "AM3517/05 CRANEBOARD")
101 .atag_offset = 0x100, 96 .atag_offset = 0x100,
102 .reserve = omap_reserve, 97 .reserve = omap_reserve,
103 .map_io = omap3_map_io, 98 .map_io = omap3_map_io,
104 .init_early = am3517_crane_init_early, 99 .init_early = am35xx_init_early,
105 .init_irq = omap3_init_irq, 100 .init_irq = omap3_init_irq,
106 .init_machine = am3517_crane_init, 101 .init_machine = am3517_crane_init,
107 .timer = &omap3_timer, 102 .timer = &omap3_timer,
diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c
index ab10f75984d8..d314f033c9df 100644
--- a/arch/arm/mach-omap2/board-am3517evm.c
+++ b/arch/arm/mach-omap2/board-am3517evm.c
@@ -362,11 +362,6 @@ static struct omap_dss_board_info am3517_evm_dss_data = {
362/* 362/*
363 * Board initialization 363 * Board initialization
364 */ 364 */
365static void __init am3517_evm_init_early(void)
366{
367 omap2_init_common_infrastructure();
368 omap2_init_common_devices(NULL, NULL);
369}
370 365
371static struct omap_musb_board_data musb_board_data = { 366static struct omap_musb_board_data musb_board_data = {
372 .interface_type = MUSB_INTERFACE_ULPI, 367 .interface_type = MUSB_INTERFACE_ULPI,
@@ -469,6 +464,7 @@ static void __init am3517_evm_init(void)
469 am3517_evm_i2c_init(); 464 am3517_evm_i2c_init();
470 omap_display_init(&am3517_evm_dss_data); 465 omap_display_init(&am3517_evm_dss_data);
471 omap_serial_init(); 466 omap_serial_init();
467 omap_sdrc_init(NULL, NULL);
472 468
473 /* Configure GPIO for EHCI port */ 469 /* Configure GPIO for EHCI port */
474 omap_mux_init_gpio(57, OMAP_PIN_OUTPUT); 470 omap_mux_init_gpio(57, OMAP_PIN_OUTPUT);
@@ -493,7 +489,7 @@ MACHINE_START(OMAP3517EVM, "OMAP3517/AM3517 EVM")
493 .atag_offset = 0x100, 489 .atag_offset = 0x100,
494 .reserve = omap_reserve, 490 .reserve = omap_reserve,
495 .map_io = omap3_map_io, 491 .map_io = omap3_map_io,
496 .init_early = am3517_evm_init_early, 492 .init_early = am35xx_init_early,
497 .init_irq = omap3_init_irq, 493 .init_irq = omap3_init_irq,
498 .init_machine = am3517_evm_init, 494 .init_machine = am3517_evm_init,
499 .timer = &omap3_timer, 495 .timer = &omap3_timer,
diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c
index ad55351e0cab..de8134b7f580 100644
--- a/arch/arm/mach-omap2/board-apollon.c
+++ b/arch/arm/mach-omap2/board-apollon.c
@@ -284,12 +284,6 @@ static struct omap_dss_board_info apollon_dss_data = {
284 .default_device = &apollon_lcd_device, 284 .default_device = &apollon_lcd_device,
285}; 285};
286 286
287static void __init omap_apollon_init_early(void)
288{
289 omap2_init_common_infrastructure();
290 omap2_init_common_devices(NULL, NULL);
291}
292
293static struct gpio apollon_gpio_leds[] __initdata = { 287static struct gpio apollon_gpio_leds[] __initdata = {
294 { LED0_GPIO13, GPIOF_OUT_INIT_LOW, "LED0" }, /* LED0 - AA10 */ 288 { LED0_GPIO13, GPIOF_OUT_INIT_LOW, "LED0" }, /* LED0 - AA10 */
295 { LED1_GPIO14, GPIOF_OUT_INIT_LOW, "LED1" }, /* LED1 - AA6 */ 289 { LED1_GPIO14, GPIOF_OUT_INIT_LOW, "LED1" }, /* LED1 - AA6 */
@@ -349,22 +343,16 @@ static void __init omap_apollon_init(void)
349 */ 343 */
350 platform_add_devices(apollon_devices, ARRAY_SIZE(apollon_devices)); 344 platform_add_devices(apollon_devices, ARRAY_SIZE(apollon_devices));
351 omap_serial_init(); 345 omap_serial_init();
352 346 omap_sdrc_init(NULL, NULL);
353 omap_display_init(&apollon_dss_data); 347 omap_display_init(&apollon_dss_data);
354} 348}
355 349
356static void __init omap_apollon_map_io(void)
357{
358 omap2_set_globals_242x();
359 omap242x_map_common_io();
360}
361
362MACHINE_START(OMAP_APOLLON, "OMAP24xx Apollon") 350MACHINE_START(OMAP_APOLLON, "OMAP24xx Apollon")
363 /* Maintainer: Kyungmin Park <kyungmin.park@samsung.com> */ 351 /* Maintainer: Kyungmin Park <kyungmin.park@samsung.com> */
364 .atag_offset = 0x100, 352 .atag_offset = 0x100,
365 .reserve = omap_reserve, 353 .reserve = omap_reserve,
366 .map_io = omap_apollon_map_io, 354 .map_io = omap242x_map_io,
367 .init_early = omap_apollon_init_early, 355 .init_early = omap2420_init_early,
368 .init_irq = omap2_init_irq, 356 .init_irq = omap2_init_irq,
369 .init_machine = omap_apollon_init, 357 .init_machine = omap_apollon_init,
370 .timer = &omap2_timer, 358 .timer = &omap2_timer,
diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c
index 6e0f0d2e39bc..bd1bcacb40f9 100644
--- a/arch/arm/mach-omap2/board-cm-t35.c
+++ b/arch/arm/mach-omap2/board-cm-t35.c
@@ -471,13 +471,6 @@ static void __init cm_t35_init_i2c(void)
471 omap3_pmic_init("tps65930", &cm_t35_twldata); 471 omap3_pmic_init("tps65930", &cm_t35_twldata);
472} 472}
473 473
474static void __init cm_t35_init_early(void)
475{
476 omap2_init_common_infrastructure();
477 omap2_init_common_devices(mt46h32m32lf6_sdrc_params,
478 mt46h32m32lf6_sdrc_params);
479}
480
481#ifdef CONFIG_OMAP_MUX 474#ifdef CONFIG_OMAP_MUX
482static struct omap_board_mux board_mux[] __initdata = { 475static struct omap_board_mux board_mux[] __initdata = {
483 /* nCS and IRQ for CM-T35 ethernet */ 476 /* nCS and IRQ for CM-T35 ethernet */
@@ -610,6 +603,8 @@ static void __init cm_t3x_common_init(void)
610 omap_board_config_size = ARRAY_SIZE(cm_t35_config); 603 omap_board_config_size = ARRAY_SIZE(cm_t35_config);
611 omap3_mux_init(board_mux, OMAP_PACKAGE_CUS); 604 omap3_mux_init(board_mux, OMAP_PACKAGE_CUS);
612 omap_serial_init(); 605 omap_serial_init();
606 omap_sdrc_init(mt46h32m32lf6_sdrc_params,
607 mt46h32m32lf6_sdrc_params);
613 cm_t35_init_i2c(); 608 cm_t35_init_i2c();
614 omap_ads7846_init(1, CM_T35_GPIO_PENDOWN, 0, NULL); 609 omap_ads7846_init(1, CM_T35_GPIO_PENDOWN, 0, NULL);
615 cm_t35_init_ethernet(); 610 cm_t35_init_ethernet();
@@ -637,7 +632,7 @@ MACHINE_START(CM_T35, "Compulab CM-T35")
637 .atag_offset = 0x100, 632 .atag_offset = 0x100,
638 .reserve = omap_reserve, 633 .reserve = omap_reserve,
639 .map_io = omap3_map_io, 634 .map_io = omap3_map_io,
640 .init_early = cm_t35_init_early, 635 .init_early = omap35xx_init_early,
641 .init_irq = omap3_init_irq, 636 .init_irq = omap3_init_irq,
642 .init_machine = cm_t35_init, 637 .init_machine = cm_t35_init,
643 .timer = &omap3_timer, 638 .timer = &omap3_timer,
@@ -647,7 +642,7 @@ MACHINE_START(CM_T3730, "Compulab CM-T3730")
647 .atag_offset = 0x100, 642 .atag_offset = 0x100,
648 .reserve = omap_reserve, 643 .reserve = omap_reserve,
649 .map_io = omap3_map_io, 644 .map_io = omap3_map_io,
650 .init_early = cm_t35_init_early, 645 .init_early = omap3630_init_early,
651 .init_irq = omap3_init_irq, 646 .init_irq = omap3_init_irq,
652 .init_machine = cm_t3730_init, 647 .init_machine = cm_t3730_init,
653 .timer = &omap3_timer, 648 .timer = &omap3_timer,
diff --git a/arch/arm/mach-omap2/board-cm-t3517.c b/arch/arm/mach-omap2/board-cm-t3517.c
index aed9c29f9fae..3f4dc6626845 100644
--- a/arch/arm/mach-omap2/board-cm-t3517.c
+++ b/arch/arm/mach-omap2/board-cm-t3517.c
@@ -251,12 +251,6 @@ static inline void cm_t3517_init_nand(void) {}
251static struct omap_board_config_kernel cm_t3517_config[] __initdata = { 251static struct omap_board_config_kernel cm_t3517_config[] __initdata = {
252}; 252};
253 253
254static void __init cm_t3517_init_early(void)
255{
256 omap2_init_common_infrastructure();
257 omap2_init_common_devices(NULL, NULL);
258}
259
260#ifdef CONFIG_OMAP_MUX 254#ifdef CONFIG_OMAP_MUX
261static struct omap_board_mux board_mux[] __initdata = { 255static struct omap_board_mux board_mux[] __initdata = {
262 /* GPIO186 - Green LED */ 256 /* GPIO186 - Green LED */
@@ -289,6 +283,7 @@ static void __init cm_t3517_init(void)
289{ 283{
290 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); 284 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
291 omap_serial_init(); 285 omap_serial_init();
286 omap_sdrc_init(NULL, NULL);
292 omap_board_config = cm_t3517_config; 287 omap_board_config = cm_t3517_config;
293 omap_board_config_size = ARRAY_SIZE(cm_t3517_config); 288 omap_board_config_size = ARRAY_SIZE(cm_t3517_config);
294 cm_t3517_init_leds(); 289 cm_t3517_init_leds();
@@ -302,7 +297,7 @@ MACHINE_START(CM_T3517, "Compulab CM-T3517")
302 .atag_offset = 0x100, 297 .atag_offset = 0x100,
303 .reserve = omap_reserve, 298 .reserve = omap_reserve,
304 .map_io = omap3_map_io, 299 .map_io = omap3_map_io,
305 .init_early = cm_t3517_init_early, 300 .init_early = am35xx_init_early,
306 .init_irq = omap3_init_irq, 301 .init_irq = omap3_init_irq,
307 .init_machine = cm_t3517_init, 302 .init_machine = cm_t3517_init,
308 .timer = &omap3_timer, 303 .timer = &omap3_timer,
diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c
index d9bfe54917e4..42918940c530 100644
--- a/arch/arm/mach-omap2/board-devkit8000.c
+++ b/arch/arm/mach-omap2/board-devkit8000.c
@@ -397,19 +397,6 @@ static struct platform_device keys_gpio = {
397 }, 397 },
398}; 398};
399 399
400
401static void __init devkit8000_init_early(void)
402{
403 omap2_init_common_infrastructure();
404 omap2_init_common_devices(mt46h32m32lf6_sdrc_params,
405 mt46h32m32lf6_sdrc_params);
406}
407
408static void __init devkit8000_init_irq(void)
409{
410 omap3_init_irq();
411}
412
413#define OMAP_DM9000_BASE 0x2c000000 400#define OMAP_DM9000_BASE 0x2c000000
414 401
415static struct resource omap_dm9000_resources[] = { 402static struct resource omap_dm9000_resources[] = {
@@ -645,6 +632,8 @@ static void __init devkit8000_init(void)
645{ 632{
646 omap3_mux_init(board_mux, OMAP_PACKAGE_CUS); 633 omap3_mux_init(board_mux, OMAP_PACKAGE_CUS);
647 omap_serial_init(); 634 omap_serial_init();
635 omap_sdrc_init(mt46h32m32lf6_sdrc_params,
636 mt46h32m32lf6_sdrc_params);
648 637
649 omap_dm9000_init(); 638 omap_dm9000_init();
650 639
@@ -670,8 +659,8 @@ MACHINE_START(DEVKIT8000, "OMAP3 Devkit8000")
670 .atag_offset = 0x100, 659 .atag_offset = 0x100,
671 .reserve = omap_reserve, 660 .reserve = omap_reserve,
672 .map_io = omap3_map_io, 661 .map_io = omap3_map_io,
673 .init_early = devkit8000_init_early, 662 .init_early = omap35xx_init_early,
674 .init_irq = devkit8000_init_irq, 663 .init_irq = omap3_init_irq,
675 .init_machine = devkit8000_init, 664 .init_machine = devkit8000_init,
676 .timer = &omap3_secure_timer, 665 .timer = &omap3_secure_timer,
677MACHINE_END 666MACHINE_END
diff --git a/arch/arm/mach-omap2/board-flash.c b/arch/arm/mach-omap2/board-flash.c
index aa1b0cbe19d2..30a6f527510c 100644
--- a/arch/arm/mach-omap2/board-flash.c
+++ b/arch/arm/mach-omap2/board-flash.c
@@ -148,11 +148,6 @@ __init board_nand_init(struct mtd_partition *nand_parts,
148 board_nand_data.gpmc_irq = OMAP_GPMC_IRQ_BASE + cs; 148 board_nand_data.gpmc_irq = OMAP_GPMC_IRQ_BASE + cs;
149 gpmc_nand_init(&board_nand_data); 149 gpmc_nand_init(&board_nand_data);
150} 150}
151#else
152void
153__init board_nand_init(struct mtd_partition *nand_parts, u8 nr_parts, u8 cs, int nand_type)
154{
155}
156#endif /* CONFIG_MTD_NAND_OMAP2 || CONFIG_MTD_NAND_OMAP2_MODULE */ 151#endif /* CONFIG_MTD_NAND_OMAP2 || CONFIG_MTD_NAND_OMAP2_MODULE */
157 152
158/** 153/**
diff --git a/arch/arm/mach-omap2/board-flash.h b/arch/arm/mach-omap2/board-flash.h
index c240a3f8d163..d25503a98417 100644
--- a/arch/arm/mach-omap2/board-flash.h
+++ b/arch/arm/mach-omap2/board-flash.h
@@ -24,7 +24,26 @@ struct flash_partitions {
24 int nr_parts; 24 int nr_parts;
25}; 25};
26 26
27#if defined(CONFIG_MTD_NAND_OMAP2) || \
28 defined(CONFIG_MTD_NAND_OMAP2_MODULE) || \
29 defined(CONFIG_MTD_ONENAND_OMAP2) || \
30 defined(CONFIG_MTD_ONENAND_OMAP2_MODULE)
27extern void board_flash_init(struct flash_partitions [], 31extern void board_flash_init(struct flash_partitions [],
28 char chip_sel[][GPMC_CS_NUM], int nand_type); 32 char chip_sel[][GPMC_CS_NUM], int nand_type);
33#else
34static inline void board_flash_init(struct flash_partitions part[],
35 char chip_sel[][GPMC_CS_NUM], int nand_type)
36{
37}
38#endif
39
40#if defined(CONFIG_MTD_NAND_OMAP2) || \
41 defined(CONFIG_MTD_NAND_OMAP2_MODULE)
29extern void board_nand_init(struct mtd_partition *nand_parts, 42extern void board_nand_init(struct mtd_partition *nand_parts,
30 u8 nr_parts, u8 cs, int nand_type); 43 u8 nr_parts, u8 cs, int nand_type);
44#else
45static inline void board_nand_init(struct mtd_partition *nand_parts,
46 u8 nr_parts, u8 cs, int nand_type)
47{
48}
49#endif
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
index 4431ad364565..7ac546219e5d 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -35,12 +35,12 @@ static struct omap_board_config_kernel generic_config[] = {
35static void __init omap_generic_init_early(void) 35static void __init omap_generic_init_early(void)
36{ 36{
37 omap2_init_common_infrastructure(); 37 omap2_init_common_infrastructure();
38 omap2_init_common_devices(NULL, NULL);
39} 38}
40 39
41static void __init omap_generic_init(void) 40static void __init omap_generic_init(void)
42{ 41{
43 omap_serial_init(); 42 omap_serial_init();
43 omap_sdrc_init(NULL, NULL);
44 omap_board_config = generic_config; 44 omap_board_config = generic_config;
45 omap_board_config_size = ARRAY_SIZE(generic_config); 45 omap_board_config_size = ARRAY_SIZE(generic_config);
46} 46}
diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c
index 8fcf79628ca1..c12666ee7017 100644
--- a/arch/arm/mach-omap2/board-h4.c
+++ b/arch/arm/mach-omap2/board-h4.c
@@ -300,17 +300,6 @@ static struct omap_usb_config h4_usb_config __initdata = {
300 .hmc_mode = 0x00, /* 0:dev|otg 1:disable 2:disable */ 300 .hmc_mode = 0x00, /* 0:dev|otg 1:disable 2:disable */
301}; 301};
302 302
303static void __init omap_h4_init_early(void)
304{
305 omap2_init_common_infrastructure();
306 omap2_init_common_devices(NULL, NULL);
307}
308
309static void __init omap_h4_init_irq(void)
310{
311 omap2_init_irq();
312}
313
314static struct at24_platform_data m24c01 = { 303static struct at24_platform_data m24c01 = {
315 .byte_len = SZ_1K / 8, 304 .byte_len = SZ_1K / 8,
316 .page_size = 16, 305 .page_size = 16,
@@ -378,24 +367,19 @@ static void __init omap_h4_init(void)
378 platform_add_devices(h4_devices, ARRAY_SIZE(h4_devices)); 367 platform_add_devices(h4_devices, ARRAY_SIZE(h4_devices));
379 omap2_usbfs_init(&h4_usb_config); 368 omap2_usbfs_init(&h4_usb_config);
380 omap_serial_init(); 369 omap_serial_init();
370 omap_sdrc_init(NULL, NULL);
381 h4_init_flash(); 371 h4_init_flash();
382 372
383 omap_display_init(&h4_dss_data); 373 omap_display_init(&h4_dss_data);
384} 374}
385 375
386static void __init omap_h4_map_io(void)
387{
388 omap2_set_globals_242x();
389 omap242x_map_common_io();
390}
391
392MACHINE_START(OMAP_H4, "OMAP2420 H4 board") 376MACHINE_START(OMAP_H4, "OMAP2420 H4 board")
393 /* Maintainer: Paul Mundt <paul.mundt@nokia.com> */ 377 /* Maintainer: Paul Mundt <paul.mundt@nokia.com> */
394 .atag_offset = 0x100, 378 .atag_offset = 0x100,
395 .reserve = omap_reserve, 379 .reserve = omap_reserve,
396 .map_io = omap_h4_map_io, 380 .map_io = omap242x_map_io,
397 .init_early = omap_h4_init_early, 381 .init_early = omap2420_init_early,
398 .init_irq = omap_h4_init_irq, 382 .init_irq = omap2_init_irq,
399 .init_machine = omap_h4_init, 383 .init_machine = omap_h4_init,
400 .timer = &omap2_timer, 384 .timer = &omap2_timer,
401MACHINE_END 385MACHINE_END
diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c
index 96f9ef34d2fb..d0a3f78a9b69 100644
--- a/arch/arm/mach-omap2/board-igep0020.c
+++ b/arch/arm/mach-omap2/board-igep0020.c
@@ -491,13 +491,6 @@ static struct platform_device *igep_devices[] __initdata = {
491 &igep_vwlan_device, 491 &igep_vwlan_device,
492}; 492};
493 493
494static void __init igep_init_early(void)
495{
496 omap2_init_common_infrastructure();
497 omap2_init_common_devices(m65kxxxxam_sdrc_params,
498 m65kxxxxam_sdrc_params);
499}
500
501static int igep2_keymap[] = { 494static int igep2_keymap[] = {
502 KEY(0, 0, KEY_LEFT), 495 KEY(0, 0, KEY_LEFT),
503 KEY(0, 1, KEY_RIGHT), 496 KEY(0, 1, KEY_RIGHT),
@@ -650,6 +643,8 @@ static void __init igep_init(void)
650 igep_i2c_init(); 643 igep_i2c_init();
651 platform_add_devices(igep_devices, ARRAY_SIZE(igep_devices)); 644 platform_add_devices(igep_devices, ARRAY_SIZE(igep_devices));
652 omap_serial_init(); 645 omap_serial_init();
646 omap_sdrc_init(m65kxxxxam_sdrc_params,
647 m65kxxxxam_sdrc_params);
653 usb_musb_init(NULL); 648 usb_musb_init(NULL);
654 649
655 igep_flash_init(); 650 igep_flash_init();
@@ -675,7 +670,7 @@ MACHINE_START(IGEP0020, "IGEP v2 board")
675 .atag_offset = 0x100, 670 .atag_offset = 0x100,
676 .reserve = omap_reserve, 671 .reserve = omap_reserve,
677 .map_io = omap3_map_io, 672 .map_io = omap3_map_io,
678 .init_early = igep_init_early, 673 .init_early = omap35xx_init_early,
679 .init_irq = omap3_init_irq, 674 .init_irq = omap3_init_irq,
680 .init_machine = igep_init, 675 .init_machine = igep_init,
681 .timer = &omap3_timer, 676 .timer = &omap3_timer,
@@ -685,7 +680,7 @@ MACHINE_START(IGEP0030, "IGEP OMAP3 module")
685 .atag_offset = 0x100, 680 .atag_offset = 0x100,
686 .reserve = omap_reserve, 681 .reserve = omap_reserve,
687 .map_io = omap3_map_io, 682 .map_io = omap3_map_io,
688 .init_early = igep_init_early, 683 .init_early = omap35xx_init_early,
689 .init_irq = omap3_init_irq, 684 .init_irq = omap3_init_irq,
690 .init_machine = igep_init, 685 .init_machine = igep_init,
691 .timer = &omap3_timer, 686 .timer = &omap3_timer,
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c
index f8f8a68a4899..e179da0c4da5 100644
--- a/arch/arm/mach-omap2/board-ldp.c
+++ b/arch/arm/mach-omap2/board-ldp.c
@@ -251,12 +251,6 @@ static void __init ldp_display_init(void)
251 omap_display_init(&ldp_dss_data); 251 omap_display_init(&ldp_dss_data);
252} 252}
253 253
254static void __init omap_ldp_init_early(void)
255{
256 omap2_init_common_infrastructure();
257 omap2_init_common_devices(NULL, NULL);
258}
259
260static int ldp_twl_gpio_setup(struct device *dev, unsigned gpio, unsigned ngpio) 254static int ldp_twl_gpio_setup(struct device *dev, unsigned gpio, unsigned ngpio)
261{ 255{
262 int r; 256 int r;
@@ -425,6 +419,7 @@ static void __init omap_ldp_init(void)
425 platform_add_devices(ldp_devices, ARRAY_SIZE(ldp_devices)); 419 platform_add_devices(ldp_devices, ARRAY_SIZE(ldp_devices));
426 omap_ads7846_init(1, 54, 310, NULL); 420 omap_ads7846_init(1, 54, 310, NULL);
427 omap_serial_init(); 421 omap_serial_init();
422 omap_sdrc_init(NULL, NULL);
428 usb_musb_init(NULL); 423 usb_musb_init(NULL);
429 board_nand_init(ldp_nand_partitions, 424 board_nand_init(ldp_nand_partitions,
430 ARRAY_SIZE(ldp_nand_partitions), ZOOM_NAND_CS, 0); 425 ARRAY_SIZE(ldp_nand_partitions), ZOOM_NAND_CS, 0);
@@ -437,7 +432,7 @@ MACHINE_START(OMAP_LDP, "OMAP LDP board")
437 .atag_offset = 0x100, 432 .atag_offset = 0x100,
438 .reserve = omap_reserve, 433 .reserve = omap_reserve,
439 .map_io = omap3_map_io, 434 .map_io = omap3_map_io,
440 .init_early = omap_ldp_init_early, 435 .init_early = omap3430_init_early,
441 .init_irq = omap3_init_irq, 436 .init_irq = omap3_init_irq,
442 .init_machine = omap_ldp_init, 437 .init_machine = omap_ldp_init,
443 .timer = &omap3_timer, 438 .timer = &omap3_timer,
diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c
index 6ce748154f24..e9d5f4a3d064 100644
--- a/arch/arm/mach-omap2/board-n8x0.c
+++ b/arch/arm/mach-omap2/board-n8x0.c
@@ -616,18 +616,6 @@ static struct i2c_board_info n810_i2c_board_info_2[] __initdata = {
616 }, 616 },
617}; 617};
618 618
619static void __init n8x0_map_io(void)
620{
621 omap2_set_globals_242x();
622 omap242x_map_common_io();
623}
624
625static void __init n8x0_init_early(void)
626{
627 omap2_init_common_infrastructure();
628 omap2_init_common_devices(NULL, NULL);
629}
630
631#ifdef CONFIG_OMAP_MUX 619#ifdef CONFIG_OMAP_MUX
632static struct omap_board_mux board_mux[] __initdata = { 620static struct omap_board_mux board_mux[] __initdata = {
633 /* I2S codec port pins for McBSP block */ 621 /* I2S codec port pins for McBSP block */
@@ -689,6 +677,7 @@ static void __init n8x0_init_machine(void)
689 i2c_register_board_info(2, n810_i2c_board_info_2, 677 i2c_register_board_info(2, n810_i2c_board_info_2,
690 ARRAY_SIZE(n810_i2c_board_info_2)); 678 ARRAY_SIZE(n810_i2c_board_info_2));
691 board_serial_init(); 679 board_serial_init();
680 omap_sdrc_init(NULL, NULL);
692 gpmc_onenand_init(board_onenand_data); 681 gpmc_onenand_init(board_onenand_data);
693 n8x0_mmc_init(); 682 n8x0_mmc_init();
694 n8x0_usb_init(); 683 n8x0_usb_init();
@@ -697,8 +686,8 @@ static void __init n8x0_init_machine(void)
697MACHINE_START(NOKIA_N800, "Nokia N800") 686MACHINE_START(NOKIA_N800, "Nokia N800")
698 .atag_offset = 0x100, 687 .atag_offset = 0x100,
699 .reserve = omap_reserve, 688 .reserve = omap_reserve,
700 .map_io = n8x0_map_io, 689 .map_io = omap242x_map_io,
701 .init_early = n8x0_init_early, 690 .init_early = omap2420_init_early,
702 .init_irq = omap2_init_irq, 691 .init_irq = omap2_init_irq,
703 .init_machine = n8x0_init_machine, 692 .init_machine = n8x0_init_machine,
704 .timer = &omap2_timer, 693 .timer = &omap2_timer,
@@ -707,8 +696,8 @@ MACHINE_END
707MACHINE_START(NOKIA_N810, "Nokia N810") 696MACHINE_START(NOKIA_N810, "Nokia N810")
708 .atag_offset = 0x100, 697 .atag_offset = 0x100,
709 .reserve = omap_reserve, 698 .reserve = omap_reserve,
710 .map_io = n8x0_map_io, 699 .map_io = omap242x_map_io,
711 .init_early = n8x0_init_early, 700 .init_early = omap2420_init_early,
712 .init_irq = omap2_init_irq, 701 .init_irq = omap2_init_irq,
713 .init_machine = n8x0_init_machine, 702 .init_machine = n8x0_init_machine,
714 .timer = &omap2_timer, 703 .timer = &omap2_timer,
@@ -717,8 +706,8 @@ MACHINE_END
717MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX") 706MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX")
718 .atag_offset = 0x100, 707 .atag_offset = 0x100,
719 .reserve = omap_reserve, 708 .reserve = omap_reserve,
720 .map_io = n8x0_map_io, 709 .map_io = omap242x_map_io,
721 .init_early = n8x0_init_early, 710 .init_early = omap2420_init_early,
722 .init_irq = omap2_init_irq, 711 .init_irq = omap2_init_irq,
723 .init_machine = n8x0_init_machine, 712 .init_machine = n8x0_init_machine,
724 .timer = &omap2_timer, 713 .timer = &omap2_timer,
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
index 928933ba28ce..474a7e2cb638 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -447,13 +447,6 @@ static struct platform_device keys_gpio = {
447static void __init omap3_beagle_init_early(void) 447static void __init omap3_beagle_init_early(void)
448{ 448{
449 omap2_init_common_infrastructure(); 449 omap2_init_common_infrastructure();
450 omap2_init_common_devices(mt46h32m32lf6_sdrc_params,
451 mt46h32m32lf6_sdrc_params);
452}
453
454static void __init omap3_beagle_init_irq(void)
455{
456 omap3_init_irq();
457} 450}
458 451
459static struct platform_device *omap3_beagle_devices[] __initdata = { 452static struct platform_device *omap3_beagle_devices[] __initdata = {
@@ -534,6 +527,8 @@ static void __init omap3_beagle_init(void)
534 ARRAY_SIZE(omap3_beagle_devices)); 527 ARRAY_SIZE(omap3_beagle_devices));
535 omap_display_init(&beagle_dss_data); 528 omap_display_init(&beagle_dss_data);
536 omap_serial_init(); 529 omap_serial_init();
530 omap_sdrc_init(mt46h32m32lf6_sdrc_params,
531 mt46h32m32lf6_sdrc_params);
537 532
538 omap_mux_init_gpio(170, OMAP_PIN_INPUT); 533 omap_mux_init_gpio(170, OMAP_PIN_INPUT);
539 /* REVISIT leave DVI powered down until it's needed ... */ 534 /* REVISIT leave DVI powered down until it's needed ... */
@@ -561,7 +556,7 @@ MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board")
561 .reserve = omap_reserve, 556 .reserve = omap_reserve,
562 .map_io = omap3_map_io, 557 .map_io = omap3_map_io,
563 .init_early = omap3_beagle_init_early, 558 .init_early = omap3_beagle_init_early,
564 .init_irq = omap3_beagle_init_irq, 559 .init_irq = omap3_init_irq,
565 .init_machine = omap3_beagle_init, 560 .init_machine = omap3_beagle_init,
566 .timer = &omap3_secure_timer, 561 .timer = &omap3_secure_timer,
567MACHINE_END 562MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c
index 0d5a9e46a6af..2d24e287e8c1 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
@@ -519,12 +519,6 @@ static int __init omap3_evm_i2c_init(void)
519static struct omap_board_config_kernel omap3_evm_config[] __initdata = { 519static struct omap_board_config_kernel omap3_evm_config[] __initdata = {
520}; 520};
521 521
522static void __init omap3_evm_init_early(void)
523{
524 omap2_init_common_infrastructure();
525 omap2_init_common_devices(mt46h32m32lf6_sdrc_params, NULL);
526}
527
528static struct usbhs_omap_board_data usbhs_bdata __initdata = { 522static struct usbhs_omap_board_data usbhs_bdata __initdata = {
529 523
530 .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED, 524 .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
@@ -639,6 +633,7 @@ static void __init omap3_evm_init(void)
639 omap_display_init(&omap3_evm_dss_data); 633 omap_display_init(&omap3_evm_dss_data);
640 634
641 omap_serial_init(); 635 omap_serial_init();
636 omap_sdrc_init(mt46h32m32lf6_sdrc_params, NULL);
642 637
643 /* OMAP3EVM uses ISP1504 phy and so register nop transceiver */ 638 /* OMAP3EVM uses ISP1504 phy and so register nop transceiver */
644 usb_nop_xceiv_register(); 639 usb_nop_xceiv_register();
@@ -683,7 +678,7 @@ MACHINE_START(OMAP3EVM, "OMAP3 EVM")
683 .atag_offset = 0x100, 678 .atag_offset = 0x100,
684 .reserve = omap_reserve, 679 .reserve = omap_reserve,
685 .map_io = omap3_map_io, 680 .map_io = omap3_map_io,
686 .init_early = omap3_evm_init_early, 681 .init_early = omap35xx_init_early,
687 .init_irq = omap3_init_irq, 682 .init_irq = omap3_init_irq,
688 .init_machine = omap3_evm_init, 683 .init_machine = omap3_evm_init,
689 .timer = &omap3_timer, 684 .timer = &omap3_timer,
diff --git a/arch/arm/mach-omap2/board-omap3logic.c b/arch/arm/mach-omap2/board-omap3logic.c
index 01354a214caf..7c0f193f246d 100644
--- a/arch/arm/mach-omap2/board-omap3logic.c
+++ b/arch/arm/mach-omap2/board-omap3logic.c
@@ -182,12 +182,6 @@ static inline void __init board_smsc911x_init(void)
182 gpmc_smsc911x_init(&board_smsc911x_data); 182 gpmc_smsc911x_init(&board_smsc911x_data);
183} 183}
184 184
185static void __init omap3logic_init_early(void)
186{
187 omap2_init_common_infrastructure();
188 omap2_init_common_devices(NULL, NULL);
189}
190
191#ifdef CONFIG_OMAP_MUX 185#ifdef CONFIG_OMAP_MUX
192static struct omap_board_mux board_mux[] __initdata = { 186static struct omap_board_mux board_mux[] __initdata = {
193 { .reg_offset = OMAP_MUX_TERMINATOR }, 187 { .reg_offset = OMAP_MUX_TERMINATOR },
@@ -200,6 +194,7 @@ static void __init omap3logic_init(void)
200 omap3torpedo_fix_pbias_voltage(); 194 omap3torpedo_fix_pbias_voltage();
201 omap3logic_i2c_init(); 195 omap3logic_i2c_init();
202 omap_serial_init(); 196 omap_serial_init();
197 omap_sdrc_init(NULL, NULL);
203 board_mmc_init(); 198 board_mmc_init();
204 board_smsc911x_init(); 199 board_smsc911x_init();
205 200
@@ -211,7 +206,7 @@ static void __init omap3logic_init(void)
211MACHINE_START(OMAP3_TORPEDO, "Logic OMAP3 Torpedo board") 206MACHINE_START(OMAP3_TORPEDO, "Logic OMAP3 Torpedo board")
212 .atag_offset = 0x100, 207 .atag_offset = 0x100,
213 .map_io = omap3_map_io, 208 .map_io = omap3_map_io,
214 .init_early = omap3logic_init_early, 209 .init_early = omap35xx_init_early,
215 .init_irq = omap3_init_irq, 210 .init_irq = omap3_init_irq,
216 .init_machine = omap3logic_init, 211 .init_machine = omap3logic_init,
217 .timer = &omap3_timer, 212 .timer = &omap3_timer,
@@ -220,7 +215,7 @@ MACHINE_END
220MACHINE_START(OMAP3530_LV_SOM, "OMAP Logic 3530 LV SOM board") 215MACHINE_START(OMAP3530_LV_SOM, "OMAP Logic 3530 LV SOM board")
221 .atag_offset = 0x100, 216 .atag_offset = 0x100,
222 .map_io = omap3_map_io, 217 .map_io = omap3_map_io,
223 .init_early = omap3logic_init_early, 218 .init_early = omap35xx_init_early,
224 .init_irq = omap3_init_irq, 219 .init_irq = omap3_init_irq,
225 .init_machine = omap3logic_init, 220 .init_machine = omap3logic_init,
226 .timer = &omap3_timer, 221 .timer = &omap3_timer,
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c
index cca523eb73b4..f7811f4cfc3d 100644
--- a/arch/arm/mach-omap2/board-omap3pandora.c
+++ b/arch/arm/mach-omap2/board-omap3pandora.c
@@ -525,13 +525,6 @@ static struct spi_board_info omap3pandora_spi_board_info[] __initdata = {
525 } 525 }
526}; 526};
527 527
528static void __init omap3pandora_init_early(void)
529{
530 omap2_init_common_infrastructure();
531 omap2_init_common_devices(mt46h32m32lf6_sdrc_params,
532 mt46h32m32lf6_sdrc_params);
533}
534
535static void __init pandora_wl1251_init(void) 528static void __init pandora_wl1251_init(void)
536{ 529{
537 struct wl12xx_platform_data pandora_wl1251_pdata; 530 struct wl12xx_platform_data pandora_wl1251_pdata;
@@ -593,6 +586,8 @@ static void __init omap3pandora_init(void)
593 ARRAY_SIZE(omap3pandora_devices)); 586 ARRAY_SIZE(omap3pandora_devices));
594 omap_display_init(&pandora_dss_data); 587 omap_display_init(&pandora_dss_data);
595 omap_serial_init(); 588 omap_serial_init();
589 omap_sdrc_init(mt46h32m32lf6_sdrc_params,
590 mt46h32m32lf6_sdrc_params);
596 spi_register_board_info(omap3pandora_spi_board_info, 591 spi_register_board_info(omap3pandora_spi_board_info,
597 ARRAY_SIZE(omap3pandora_spi_board_info)); 592 ARRAY_SIZE(omap3pandora_spi_board_info));
598 omap_ads7846_init(1, OMAP3_PANDORA_TS_GPIO, 0, NULL); 593 omap_ads7846_init(1, OMAP3_PANDORA_TS_GPIO, 0, NULL);
@@ -609,7 +604,7 @@ MACHINE_START(OMAP3_PANDORA, "Pandora Handheld Console")
609 .atag_offset = 0x100, 604 .atag_offset = 0x100,
610 .reserve = omap_reserve, 605 .reserve = omap_reserve,
611 .map_io = omap3_map_io, 606 .map_io = omap3_map_io,
612 .init_early = omap3pandora_init_early, 607 .init_early = omap35xx_init_early,
613 .init_irq = omap3_init_irq, 608 .init_irq = omap3_init_irq,
614 .init_machine = omap3pandora_init, 609 .init_machine = omap3pandora_init,
615 .timer = &omap3_timer, 610 .timer = &omap3_timer,
diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c
index 4732589ad97e..ddb7d6663c6d 100644
--- a/arch/arm/mach-omap2/board-omap3stalker.c
+++ b/arch/arm/mach-omap2/board-omap3stalker.c
@@ -394,17 +394,6 @@ static int __init omap3_stalker_i2c_init(void)
394static struct omap_board_config_kernel omap3_stalker_config[] __initdata = { 394static struct omap_board_config_kernel omap3_stalker_config[] __initdata = {
395}; 395};
396 396
397static void __init omap3_stalker_init_early(void)
398{
399 omap2_init_common_infrastructure();
400 omap2_init_common_devices(mt46h32m32lf6_sdrc_params, NULL);
401}
402
403static void __init omap3_stalker_init_irq(void)
404{
405 omap3_init_irq();
406}
407
408static struct platform_device *omap3_stalker_devices[] __initdata = { 397static struct platform_device *omap3_stalker_devices[] __initdata = {
409 &keys_gpio, 398 &keys_gpio,
410}; 399};
@@ -444,6 +433,7 @@ static void __init omap3_stalker_init(void)
444 omap_display_init(&omap3_stalker_dss_data); 433 omap_display_init(&omap3_stalker_dss_data);
445 434
446 omap_serial_init(); 435 omap_serial_init();
436 omap_sdrc_init(mt46h32m32lf6_sdrc_params, NULL);
447 usb_musb_init(NULL); 437 usb_musb_init(NULL);
448 usbhs_init(&usbhs_bdata); 438 usbhs_init(&usbhs_bdata);
449 omap_ads7846_init(1, OMAP3_STALKER_TS_GPIO, 310, NULL); 439 omap_ads7846_init(1, OMAP3_STALKER_TS_GPIO, 310, NULL);
@@ -462,8 +452,8 @@ MACHINE_START(SBC3530, "OMAP3 STALKER")
462 /* Maintainer: Jason Lam -lzg@ema-tech.com */ 452 /* Maintainer: Jason Lam -lzg@ema-tech.com */
463 .atag_offset = 0x100, 453 .atag_offset = 0x100,
464 .map_io = omap3_map_io, 454 .map_io = omap3_map_io,
465 .init_early = omap3_stalker_init_early, 455 .init_early = omap35xx_init_early,
466 .init_irq = omap3_stalker_init_irq, 456 .init_irq = omap3_init_irq,
467 .init_machine = omap3_stalker_init, 457 .init_machine = omap3_stalker_init,
468 .timer = &omap3_secure_timer, 458 .timer = &omap3_secure_timer,
469MACHINE_END 459MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c
index abb68913e047..a2d0d1971e27 100644
--- a/arch/arm/mach-omap2/board-omap3touchbook.c
+++ b/arch/arm/mach-omap2/board-omap3touchbook.c
@@ -311,18 +311,6 @@ static struct omap_board_mux board_mux[] __initdata = {
311}; 311};
312#endif 312#endif
313 313
314static void __init omap3_touchbook_init_early(void)
315{
316 omap2_init_common_infrastructure();
317 omap2_init_common_devices(mt46h32m32lf6_sdrc_params,
318 mt46h32m32lf6_sdrc_params);
319}
320
321static void __init omap3_touchbook_init_irq(void)
322{
323 omap3_init_irq();
324}
325
326static struct platform_device *omap3_touchbook_devices[] __initdata = { 314static struct platform_device *omap3_touchbook_devices[] __initdata = {
327 &leds_gpio, 315 &leds_gpio,
328 &keys_gpio, 316 &keys_gpio,
@@ -367,6 +355,8 @@ static void __init omap3_touchbook_init(void)
367 platform_add_devices(omap3_touchbook_devices, 355 platform_add_devices(omap3_touchbook_devices,
368 ARRAY_SIZE(omap3_touchbook_devices)); 356 ARRAY_SIZE(omap3_touchbook_devices));
369 omap_serial_init(); 357 omap_serial_init();
358 omap_sdrc_init(mt46h32m32lf6_sdrc_params,
359 mt46h32m32lf6_sdrc_params);
370 360
371 omap_mux_init_gpio(170, OMAP_PIN_INPUT); 361 omap_mux_init_gpio(170, OMAP_PIN_INPUT);
372 /* REVISIT leave DVI powered down until it's needed ... */ 362 /* REVISIT leave DVI powered down until it's needed ... */
@@ -389,8 +379,8 @@ MACHINE_START(TOUCHBOOK, "OMAP3 touchbook Board")
389 .atag_offset = 0x100, 379 .atag_offset = 0x100,
390 .reserve = omap_reserve, 380 .reserve = omap_reserve,
391 .map_io = omap3_map_io, 381 .map_io = omap3_map_io,
392 .init_early = omap3_touchbook_init_early, 382 .init_early = omap3430_init_early,
393 .init_irq = omap3_touchbook_init_irq, 383 .init_irq = omap3_init_irq,
394 .init_machine = omap3_touchbook_init, 384 .init_machine = omap3_touchbook_init,
395 .timer = &omap3_secure_timer, 385 .timer = &omap3_secure_timer,
396MACHINE_END 386MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c
index ed38d8fd090f..a8c2c4263e38 100644
--- a/arch/arm/mach-omap2/board-omap4panda.c
+++ b/arch/arm/mach-omap2/board-omap4panda.c
@@ -95,12 +95,6 @@ static struct platform_device *panda_devices[] __initdata = {
95 &wl1271_device, 95 &wl1271_device,
96}; 96};
97 97
98static void __init omap4_panda_init_early(void)
99{
100 omap2_init_common_infrastructure();
101 omap2_init_common_devices(NULL, NULL);
102}
103
104static const struct usbhs_omap_board_data usbhs_bdata __initconst = { 98static const struct usbhs_omap_board_data usbhs_bdata __initconst = {
105 .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY, 99 .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
106 .port_mode[1] = OMAP_USBHS_PORT_MODE_UNUSED, 100 .port_mode[1] = OMAP_USBHS_PORT_MODE_UNUSED,
@@ -569,24 +563,19 @@ static void __init omap4_panda_init(void)
569 platform_add_devices(panda_devices, ARRAY_SIZE(panda_devices)); 563 platform_add_devices(panda_devices, ARRAY_SIZE(panda_devices));
570 platform_device_register(&omap_vwlan_device); 564 platform_device_register(&omap_vwlan_device);
571 board_serial_init(); 565 board_serial_init();
566 omap_sdrc_init(NULL, NULL);
572 omap4_twl6030_hsmmc_init(mmc); 567 omap4_twl6030_hsmmc_init(mmc);
573 omap4_ehci_init(); 568 omap4_ehci_init();
574 usb_musb_init(&musb_board_data); 569 usb_musb_init(&musb_board_data);
575 omap4_panda_display_init(); 570 omap4_panda_display_init();
576} 571}
577 572
578static void __init omap4_panda_map_io(void)
579{
580 omap2_set_globals_443x();
581 omap44xx_map_common_io();
582}
583
584MACHINE_START(OMAP4_PANDA, "OMAP4 Panda board") 573MACHINE_START(OMAP4_PANDA, "OMAP4 Panda board")
585 /* Maintainer: David Anders - Texas Instruments Inc */ 574 /* Maintainer: David Anders - Texas Instruments Inc */
586 .atag_offset = 0x100, 575 .atag_offset = 0x100,
587 .reserve = omap_reserve, 576 .reserve = omap_reserve,
588 .map_io = omap4_panda_map_io, 577 .map_io = omap4_map_io,
589 .init_early = omap4_panda_init_early, 578 .init_early = omap4430_init_early,
590 .init_irq = gic_init_irq, 579 .init_irq = gic_init_irq,
591 .init_machine = omap4_panda_init, 580 .init_machine = omap4_panda_init,
592 .timer = &omap4_timer, 581 .timer = &omap4_timer,
diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c
index ec0f60c1cb7c..4cf7aeabab86 100644
--- a/arch/arm/mach-omap2/board-overo.c
+++ b/arch/arm/mach-omap2/board-overo.c
@@ -479,13 +479,6 @@ static int __init overo_spi_init(void)
479 return 0; 479 return 0;
480} 480}
481 481
482static void __init overo_init_early(void)
483{
484 omap2_init_common_infrastructure();
485 omap2_init_common_devices(mt46h32m32lf6_sdrc_params,
486 mt46h32m32lf6_sdrc_params);
487}
488
489static const struct usbhs_omap_board_data usbhs_bdata __initconst = { 482static const struct usbhs_omap_board_data usbhs_bdata __initconst = {
490 .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED, 483 .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
491 .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY, 484 .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
@@ -515,6 +508,8 @@ static void __init overo_init(void)
515 overo_i2c_init(); 508 overo_i2c_init();
516 omap_display_init(&overo_dss_data); 509 omap_display_init(&overo_dss_data);
517 omap_serial_init(); 510 omap_serial_init();
511 omap_sdrc_init(mt46h32m32lf6_sdrc_params,
512 mt46h32m32lf6_sdrc_params);
518 omap_nand_flash_init(0, overo_nand_partitions, 513 omap_nand_flash_init(0, overo_nand_partitions,
519 ARRAY_SIZE(overo_nand_partitions)); 514 ARRAY_SIZE(overo_nand_partitions));
520 usb_musb_init(NULL); 515 usb_musb_init(NULL);
@@ -565,7 +560,7 @@ MACHINE_START(OVERO, "Gumstix Overo")
565 .atag_offset = 0x100, 560 .atag_offset = 0x100,
566 .reserve = omap_reserve, 561 .reserve = omap_reserve,
567 .map_io = omap3_map_io, 562 .map_io = omap3_map_io,
568 .init_early = overo_init_early, 563 .init_early = omap35xx_init_early,
569 .init_irq = omap3_init_irq, 564 .init_irq = omap3_init_irq,
570 .init_machine = overo_init, 565 .init_machine = overo_init,
571 .timer = &omap3_timer, 566 .timer = &omap3_timer,
diff --git a/arch/arm/mach-omap2/board-rm680.c b/arch/arm/mach-omap2/board-rm680.c
index 9a8ce239ba9e..616fb39763b0 100644
--- a/arch/arm/mach-omap2/board-rm680.c
+++ b/arch/arm/mach-omap2/board-rm680.c
@@ -123,15 +123,6 @@ static void __init rm680_peripherals_init(void)
123 omap2_hsmmc_init(mmc); 123 omap2_hsmmc_init(mmc);
124} 124}
125 125
126static void __init rm680_init_early(void)
127{
128 struct omap_sdrc_params *sdrc_params;
129
130 omap2_init_common_infrastructure();
131 sdrc_params = nokia_get_sdram_timings();
132 omap2_init_common_devices(sdrc_params, sdrc_params);
133}
134
135#ifdef CONFIG_OMAP_MUX 126#ifdef CONFIG_OMAP_MUX
136static struct omap_board_mux board_mux[] __initdata = { 127static struct omap_board_mux board_mux[] __initdata = {
137 { .reg_offset = OMAP_MUX_TERMINATOR }, 128 { .reg_offset = OMAP_MUX_TERMINATOR },
@@ -140,23 +131,23 @@ static struct omap_board_mux board_mux[] __initdata = {
140 131
141static void __init rm680_init(void) 132static void __init rm680_init(void)
142{ 133{
134 struct omap_sdrc_params *sdrc_params;
135
143 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); 136 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
144 omap_serial_init(); 137 omap_serial_init();
138
139 sdrc_params = nokia_get_sdram_timings();
140 omap_sdrc_init(sdrc_params, sdrc_params);
141
145 usb_musb_init(NULL); 142 usb_musb_init(NULL);
146 rm680_peripherals_init(); 143 rm680_peripherals_init();
147} 144}
148 145
149static void __init rm680_map_io(void)
150{
151 omap2_set_globals_3xxx();
152 omap34xx_map_common_io();
153}
154
155MACHINE_START(NOKIA_RM680, "Nokia RM-680 board") 146MACHINE_START(NOKIA_RM680, "Nokia RM-680 board")
156 .atag_offset = 0x100, 147 .atag_offset = 0x100,
157 .reserve = omap_reserve, 148 .reserve = omap_reserve,
158 .map_io = rm680_map_io, 149 .map_io = omap3_map_io,
159 .init_early = rm680_init_early, 150 .init_early = omap3630_init_early,
160 .init_irq = omap3_init_irq, 151 .init_irq = omap3_init_irq,
161 .init_machine = rm680_init, 152 .init_machine = rm680_init,
162 .timer = &omap3_timer, 153 .timer = &omap3_timer,
diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c
index faa2a8e28de5..4af7c4b2881a 100644
--- a/arch/arm/mach-omap2/board-rx51.c
+++ b/arch/arm/mach-omap2/board-rx51.c
@@ -79,15 +79,6 @@ static struct cpuidle_params rx51_cpuidle_params[] = {
79 {7505 + 15274, 484329, 1}, 79 {7505 + 15274, 484329, 1},
80}; 80};
81 81
82static void __init rx51_init_early(void)
83{
84 struct omap_sdrc_params *sdrc_params;
85
86 omap2_init_common_infrastructure();
87 sdrc_params = nokia_get_sdram_timings();
88 omap2_init_common_devices(sdrc_params, sdrc_params);
89}
90
91extern void __init rx51_peripherals_init(void); 82extern void __init rx51_peripherals_init(void);
92 83
93#ifdef CONFIG_OMAP_MUX 84#ifdef CONFIG_OMAP_MUX
@@ -104,9 +95,15 @@ static struct omap_musb_board_data musb_board_data = {
104 95
105static void __init rx51_init(void) 96static void __init rx51_init(void)
106{ 97{
98 struct omap_sdrc_params *sdrc_params;
99
107 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); 100 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
108 omap3_pm_init_cpuidle(rx51_cpuidle_params); 101 omap3_pm_init_cpuidle(rx51_cpuidle_params);
109 omap_serial_init(); 102 omap_serial_init();
103
104 sdrc_params = nokia_get_sdram_timings();
105 omap_sdrc_init(sdrc_params, sdrc_params);
106
110 usb_musb_init(&musb_board_data); 107 usb_musb_init(&musb_board_data);
111 rx51_peripherals_init(); 108 rx51_peripherals_init();
112 109
@@ -117,12 +114,6 @@ static void __init rx51_init(void)
117 platform_device_register(&leds_gpio); 114 platform_device_register(&leds_gpio);
118} 115}
119 116
120static void __init rx51_map_io(void)
121{
122 omap2_set_globals_3xxx();
123 omap34xx_map_common_io();
124}
125
126static void __init rx51_reserve(void) 117static void __init rx51_reserve(void)
127{ 118{
128 rx51_video_mem_init(); 119 rx51_video_mem_init();
@@ -133,8 +124,8 @@ MACHINE_START(NOKIA_RX51, "Nokia RX-51 board")
133 /* Maintainer: Lauri Leukkunen <lauri.leukkunen@nokia.com> */ 124 /* Maintainer: Lauri Leukkunen <lauri.leukkunen@nokia.com> */
134 .atag_offset = 0x100, 125 .atag_offset = 0x100,
135 .reserve = rx51_reserve, 126 .reserve = rx51_reserve,
136 .map_io = rx51_map_io, 127 .map_io = omap3_map_io,
137 .init_early = rx51_init_early, 128 .init_early = omap3430_init_early,
138 .init_irq = omap3_init_irq, 129 .init_irq = omap3_init_irq,
139 .init_machine = rx51_init, 130 .init_machine = rx51_init,
140 .timer = &omap3_timer, 131 .timer = &omap3_timer,
diff --git a/arch/arm/mach-omap2/board-ti8168evm.c b/arch/arm/mach-omap2/board-ti8168evm.c
index e41958acb6b6..e26c79cb6ce9 100644
--- a/arch/arm/mach-omap2/board-ti8168evm.c
+++ b/arch/arm/mach-omap2/board-ti8168evm.c
@@ -27,15 +27,10 @@
27static struct omap_board_config_kernel ti8168_evm_config[] __initdata = { 27static struct omap_board_config_kernel ti8168_evm_config[] __initdata = {
28}; 28};
29 29
30static void __init ti8168_init_early(void)
31{
32 omap2_init_common_infrastructure();
33 omap2_init_common_devices(NULL, NULL);
34}
35
36static void __init ti8168_evm_init(void) 30static void __init ti8168_evm_init(void)
37{ 31{
38 omap_serial_init(); 32 omap_serial_init();
33 omap_sdrc_init(NULL, NULL);
39 omap_board_config = ti8168_evm_config; 34 omap_board_config = ti8168_evm_config;
40 omap_board_config_size = ARRAY_SIZE(ti8168_evm_config); 35 omap_board_config_size = ARRAY_SIZE(ti8168_evm_config);
41} 36}
@@ -50,7 +45,7 @@ MACHINE_START(TI8168EVM, "ti8168evm")
50 /* Maintainer: Texas Instruments */ 45 /* Maintainer: Texas Instruments */
51 .atag_offset = 0x100, 46 .atag_offset = 0x100,
52 .map_io = ti8168_evm_map_io, 47 .map_io = ti8168_evm_map_io,
53 .init_early = ti8168_init_early, 48 .init_early = ti816x_init_early,
54 .init_irq = ti816x_init_irq, 49 .init_irq = ti816x_init_irq,
55 .timer = &omap3_timer, 50 .timer = &omap3_timer,
56 .init_machine = ti8168_evm_init, 51 .init_machine = ti8168_evm_init,
diff --git a/arch/arm/mach-omap2/board-zoom.c b/arch/arm/mach-omap2/board-zoom.c
index 72f1db4863e5..be6684dc4f55 100644
--- a/arch/arm/mach-omap2/board-zoom.c
+++ b/arch/arm/mach-omap2/board-zoom.c
@@ -34,17 +34,6 @@
34 34
35#define ZOOM3_EHCI_RESET_GPIO 64 35#define ZOOM3_EHCI_RESET_GPIO 64
36 36
37static void __init omap_zoom_init_early(void)
38{
39 omap2_init_common_infrastructure();
40 if (machine_is_omap_zoom2())
41 omap2_init_common_devices(mt46h32m32lf6_sdrc_params,
42 mt46h32m32lf6_sdrc_params);
43 else if (machine_is_omap_zoom3())
44 omap2_init_common_devices(h8mbx00u0mer0em_sdrc_params,
45 h8mbx00u0mer0em_sdrc_params);
46}
47
48#ifdef CONFIG_OMAP_MUX 37#ifdef CONFIG_OMAP_MUX
49static struct omap_board_mux board_mux[] __initdata = { 38static struct omap_board_mux board_mux[] __initdata = {
50 /* WLAN IRQ - GPIO 162 */ 39 /* WLAN IRQ - GPIO 162 */
@@ -129,6 +118,14 @@ static void __init omap_zoom_init(void)
129 ZOOM_NAND_CS, NAND_BUSWIDTH_16); 118 ZOOM_NAND_CS, NAND_BUSWIDTH_16);
130 zoom_debugboard_init(); 119 zoom_debugboard_init();
131 zoom_peripherals_init(); 120 zoom_peripherals_init();
121
122 if (machine_is_omap_zoom2())
123 omap_sdrc_init(mt46h32m32lf6_sdrc_params,
124 mt46h32m32lf6_sdrc_params);
125 else if (machine_is_omap_zoom3())
126 omap_sdrc_init(h8mbx00u0mer0em_sdrc_params,
127 h8mbx00u0mer0em_sdrc_params);
128
132 zoom_display_init(); 129 zoom_display_init();
133} 130}
134 131
@@ -136,7 +133,7 @@ MACHINE_START(OMAP_ZOOM2, "OMAP Zoom2 board")
136 .atag_offset = 0x100, 133 .atag_offset = 0x100,
137 .reserve = omap_reserve, 134 .reserve = omap_reserve,
138 .map_io = omap3_map_io, 135 .map_io = omap3_map_io,
139 .init_early = omap_zoom_init_early, 136 .init_early = omap3430_init_early,
140 .init_irq = omap3_init_irq, 137 .init_irq = omap3_init_irq,
141 .init_machine = omap_zoom_init, 138 .init_machine = omap_zoom_init,
142 .timer = &omap3_timer, 139 .timer = &omap3_timer,
@@ -146,7 +143,7 @@ MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board")
146 .atag_offset = 0x100, 143 .atag_offset = 0x100,
147 .reserve = omap_reserve, 144 .reserve = omap_reserve,
148 .map_io = omap3_map_io, 145 .map_io = omap3_map_io,
149 .init_early = omap_zoom_init_early, 146 .init_early = omap3630_init_early,
150 .init_irq = omap3_init_irq, 147 .init_irq = omap3_init_irq,
151 .init_machine = omap_zoom_init, 148 .init_machine = omap_zoom_init,
152 .timer = &omap3_timer, 149 .timer = &omap3_timer,
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c
index b9b844683147..dadb8c6c0115 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -3472,7 +3472,16 @@ int __init omap3xxx_clk_init(void)
3472 struct omap_clk *c; 3472 struct omap_clk *c;
3473 u32 cpu_clkflg = 0; 3473 u32 cpu_clkflg = 0;
3474 3474
3475 if (cpu_is_omap3517()) { 3475 /*
3476 * 3505 must be tested before 3517, since 3517 returns true
3477 * for both AM3517 chips and AM3517 family chips, which
3478 * includes 3505. Unfortunately there's no obvious family
3479 * test for 3517/3505 :-(
3480 */
3481 if (cpu_is_omap3505()) {
3482 cpu_mask = RATE_IN_34XX;
3483 cpu_clkflg = CK_3505;
3484 } else if (cpu_is_omap3517()) {
3476 cpu_mask = RATE_IN_34XX; 3485 cpu_mask = RATE_IN_34XX;
3477 cpu_clkflg = CK_3517; 3486 cpu_clkflg = CK_3517;
3478 } else if (cpu_is_omap3505()) { 3487 } else if (cpu_is_omap3505()) {
diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c
index 8f0890685d7b..8480ee4344ea 100644
--- a/arch/arm/mach-omap2/clockdomain.c
+++ b/arch/arm/mach-omap2/clockdomain.c
@@ -73,9 +73,6 @@ static int _clkdm_register(struct clockdomain *clkdm)
73 if (!clkdm || !clkdm->name) 73 if (!clkdm || !clkdm->name)
74 return -EINVAL; 74 return -EINVAL;
75 75
76 if (!omap_chip_is(clkdm->omap_chip))
77 return -EINVAL;
78
79 pwrdm = pwrdm_lookup(clkdm->pwrdm.name); 76 pwrdm = pwrdm_lookup(clkdm->pwrdm.name);
80 if (!pwrdm) { 77 if (!pwrdm) {
81 pr_err("clockdomain: %s: powerdomain %s does not exist\n", 78 pr_err("clockdomain: %s: powerdomain %s does not exist\n",
@@ -105,13 +102,10 @@ static struct clkdm_dep *_clkdm_deps_lookup(struct clockdomain *clkdm,
105{ 102{
106 struct clkdm_dep *cd; 103 struct clkdm_dep *cd;
107 104
108 if (!clkdm || !deps || !omap_chip_is(clkdm->omap_chip)) 105 if (!clkdm || !deps)
109 return ERR_PTR(-EINVAL); 106 return ERR_PTR(-EINVAL);
110 107
111 for (cd = deps; cd->clkdm_name; cd++) { 108 for (cd = deps; cd->clkdm_name; cd++) {
112 if (!omap_chip_is(cd->omap_chip))
113 continue;
114
115 if (!cd->clkdm && cd->clkdm_name) 109 if (!cd->clkdm && cd->clkdm_name)
116 cd->clkdm = _clkdm_lookup(cd->clkdm_name); 110 cd->clkdm = _clkdm_lookup(cd->clkdm_name);
117 111
@@ -148,9 +142,6 @@ static void _autodep_lookup(struct clkdm_autodep *autodep)
148 if (!autodep) 142 if (!autodep)
149 return; 143 return;
150 144
151 if (!omap_chip_is(autodep->omap_chip))
152 return;
153
154 clkdm = clkdm_lookup(autodep->clkdm.name); 145 clkdm = clkdm_lookup(autodep->clkdm.name);
155 if (!clkdm) { 146 if (!clkdm) {
156 pr_err("clockdomain: autodeps: clockdomain %s does not exist\n", 147 pr_err("clockdomain: autodeps: clockdomain %s does not exist\n",
@@ -182,9 +173,6 @@ void _clkdm_add_autodeps(struct clockdomain *clkdm)
182 if (IS_ERR(autodep->clkdm.ptr)) 173 if (IS_ERR(autodep->clkdm.ptr))
183 continue; 174 continue;
184 175
185 if (!omap_chip_is(autodep->omap_chip))
186 continue;
187
188 pr_debug("clockdomain: adding %s sleepdep/wkdep for " 176 pr_debug("clockdomain: adding %s sleepdep/wkdep for "
189 "clkdm %s\n", autodep->clkdm.ptr->name, 177 "clkdm %s\n", autodep->clkdm.ptr->name,
190 clkdm->name); 178 clkdm->name);
@@ -216,9 +204,6 @@ void _clkdm_del_autodeps(struct clockdomain *clkdm)
216 if (IS_ERR(autodep->clkdm.ptr)) 204 if (IS_ERR(autodep->clkdm.ptr))
217 continue; 205 continue;
218 206
219 if (!omap_chip_is(autodep->omap_chip))
220 continue;
221
222 pr_debug("clockdomain: removing %s sleepdep/wkdep for " 207 pr_debug("clockdomain: removing %s sleepdep/wkdep for "
223 "clkdm %s\n", autodep->clkdm.ptr->name, 208 "clkdm %s\n", autodep->clkdm.ptr->name,
224 clkdm->name); 209 clkdm->name);
@@ -243,8 +228,6 @@ static void _resolve_clkdm_deps(struct clockdomain *clkdm,
243 struct clkdm_dep *cd; 228 struct clkdm_dep *cd;
244 229
245 for (cd = clkdm_deps; cd && cd->clkdm_name; cd++) { 230 for (cd = clkdm_deps; cd && cd->clkdm_name; cd++) {
246 if (!omap_chip_is(cd->omap_chip))
247 continue;
248 if (cd->clkdm) 231 if (cd->clkdm)
249 continue; 232 continue;
250 cd->clkdm = _clkdm_lookup(cd->clkdm_name); 233 cd->clkdm = _clkdm_lookup(cd->clkdm_name);
@@ -257,43 +240,113 @@ static void _resolve_clkdm_deps(struct clockdomain *clkdm,
257/* Public functions */ 240/* Public functions */
258 241
259/** 242/**
260 * clkdm_init - set up the clockdomain layer 243 * clkdm_register_platform_funcs - register clockdomain implementation fns
261 * @clkdms: optional pointer to an array of clockdomains to register 244 * @co: func pointers for arch specific implementations
262 * @init_autodeps: optional pointer to an array of autodeps to register 245 *
263 * @custom_funcs: func pointers for arch specific implementations 246 * Register the list of function pointers used to implement the
264 * 247 * clockdomain functions on different OMAP SoCs. Should be called
265 * Set up internal state. If a pointer to an array of clockdomains 248 * before any other clkdm_register*() function. Returns -EINVAL if
266 * @clkdms was supplied, loop through the list of clockdomains, 249 * @co is null, -EEXIST if platform functions have already been
267 * register all that are available on the current platform. Similarly, 250 * registered, or 0 upon success.
268 * if a pointer to an array of clockdomain autodependencies 251 */
269 * @init_autodeps was provided, register those. No return value. 252int clkdm_register_platform_funcs(struct clkdm_ops *co)
253{
254 if (!co)
255 return -EINVAL;
256
257 if (arch_clkdm)
258 return -EEXIST;
259
260 arch_clkdm = co;
261
262 return 0;
263};
264
265/**
266 * clkdm_register_clkdms - register SoC clockdomains
267 * @cs: pointer to an array of struct clockdomain to register
268 *
269 * Register the clockdomains available on a particular OMAP SoC. Must
270 * be called after clkdm_register_platform_funcs(). May be called
271 * multiple times. Returns -EACCES if called before
272 * clkdm_register_platform_funcs(); -EINVAL if the argument @cs is
273 * null; or 0 upon success.
270 */ 274 */
271void clkdm_init(struct clockdomain **clkdms, 275int clkdm_register_clkdms(struct clockdomain **cs)
272 struct clkdm_autodep *init_autodeps,
273 struct clkdm_ops *custom_funcs)
274{ 276{
275 struct clockdomain **c = NULL; 277 struct clockdomain **c = NULL;
276 struct clockdomain *clkdm;
277 struct clkdm_autodep *autodep = NULL;
278 278
279 if (!custom_funcs) 279 if (!arch_clkdm)
280 WARN(1, "No custom clkdm functions registered\n"); 280 return -EACCES;
281 else 281
282 arch_clkdm = custom_funcs; 282 if (!cs)
283 return -EINVAL;
284
285 for (c = cs; *c; c++)
286 _clkdm_register(*c);
287
288 return 0;
289}
290
291/**
292 * clkdm_register_autodeps - register autodeps (if required)
293 * @ia: pointer to a static array of struct clkdm_autodep to register
294 *
295 * Register clockdomain "automatic dependencies." These are
296 * clockdomain wakeup and sleep dependencies that are automatically
297 * added whenever the first clock inside a clockdomain is enabled, and
298 * removed whenever the last clock inside a clockdomain is disabled.
299 * These are currently only used on OMAP3 devices, and are deprecated,
300 * since they waste energy. However, until the OMAP2/3 IP block
301 * enable/disable sequence can be converted to match the OMAP4
302 * sequence, they are needed.
303 *
304 * Must be called only after all of the SoC clockdomains are
305 * registered, since the function will resolve autodep clockdomain
306 * names into clockdomain pointers.
307 *
308 * The struct clkdm_autodep @ia array must be static, as this function
309 * does not copy the array elements.
310 *
311 * Returns -EACCES if called before any clockdomains have been
312 * registered, -EINVAL if called with a null @ia argument, -EEXIST if
313 * autodeps have already been registered, or 0 upon success.
314 */
315int clkdm_register_autodeps(struct clkdm_autodep *ia)
316{
317 struct clkdm_autodep *a = NULL;
283 318
284 if (clkdms) 319 if (list_empty(&clkdm_list))
285 for (c = clkdms; *c; c++) 320 return -EACCES;
286 _clkdm_register(*c); 321
322 if (!ia)
323 return -EINVAL;
287 324
288 autodeps = init_autodeps;
289 if (autodeps) 325 if (autodeps)
290 for (autodep = autodeps; autodep->clkdm.ptr; autodep++) 326 return -EEXIST;
291 _autodep_lookup(autodep); 327
328 autodeps = ia;
329 for (a = autodeps; a->clkdm.ptr; a++)
330 _autodep_lookup(a);
331
332 return 0;
333}
334
335/**
336 * clkdm_complete_init - set up the clockdomain layer
337 *
338 * Put all clockdomains into software-supervised mode; PM code should
339 * later enable hardware-supervised mode as appropriate. Must be
340 * called after clkdm_register_clkdms(). Returns -EACCES if called
341 * before clkdm_register_clkdms(), or 0 upon success.
342 */
343int clkdm_complete_init(void)
344{
345 struct clockdomain *clkdm;
346
347 if (list_empty(&clkdm_list))
348 return -EACCES;
292 349
293 /*
294 * Put all clockdomains into software-supervised mode; PM code
295 * should later enable hardware-supervised mode as appropriate
296 */
297 list_for_each_entry(clkdm, &clkdm_list, node) { 350 list_for_each_entry(clkdm, &clkdm_list, node) {
298 if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP) 351 if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP)
299 clkdm_wakeup(clkdm); 352 clkdm_wakeup(clkdm);
@@ -306,6 +359,8 @@ void clkdm_init(struct clockdomain **clkdms,
306 _resolve_clkdm_deps(clkdm, clkdm->sleepdep_srcs); 359 _resolve_clkdm_deps(clkdm, clkdm->sleepdep_srcs);
307 clkdm_clear_all_sleepdeps(clkdm); 360 clkdm_clear_all_sleepdeps(clkdm);
308 } 361 }
362
363 return 0;
309} 364}
310 365
311/** 366/**
diff --git a/arch/arm/mach-omap2/clockdomain.h b/arch/arm/mach-omap2/clockdomain.h
index 1e50c88b8a07..f7b58609bad8 100644
--- a/arch/arm/mach-omap2/clockdomain.h
+++ b/arch/arm/mach-omap2/clockdomain.h
@@ -45,7 +45,6 @@
45/** 45/**
46 * struct clkdm_autodep - clkdm deps to add when entering/exiting hwsup mode 46 * struct clkdm_autodep - clkdm deps to add when entering/exiting hwsup mode
47 * @clkdm: clockdomain to add wkdep+sleepdep on - set name member only 47 * @clkdm: clockdomain to add wkdep+sleepdep on - set name member only
48 * @omap_chip: OMAP chip types that this autodep is valid on
49 * 48 *
50 * A clockdomain that should have wkdeps and sleepdeps added when a 49 * A clockdomain that should have wkdeps and sleepdeps added when a
51 * clockdomain should stay active in hwsup mode; and conversely, 50 * clockdomain should stay active in hwsup mode; and conversely,
@@ -60,14 +59,12 @@ struct clkdm_autodep {
60 const char *name; 59 const char *name;
61 struct clockdomain *ptr; 60 struct clockdomain *ptr;
62 } clkdm; 61 } clkdm;
63 const struct omap_chip_id omap_chip;
64}; 62};
65 63
66/** 64/**
67 * struct clkdm_dep - encode dependencies between clockdomains 65 * struct clkdm_dep - encode dependencies between clockdomains
68 * @clkdm_name: clockdomain name 66 * @clkdm_name: clockdomain name
69 * @clkdm: pointer to the struct clockdomain of @clkdm_name 67 * @clkdm: pointer to the struct clockdomain of @clkdm_name
70 * @omap_chip: OMAP chip types that this dependency is valid on
71 * @wkdep_usecount: Number of wakeup dependencies causing this clkdm to wake 68 * @wkdep_usecount: Number of wakeup dependencies causing this clkdm to wake
72 * @sleepdep_usecount: Number of sleep deps that could prevent clkdm from idle 69 * @sleepdep_usecount: Number of sleep deps that could prevent clkdm from idle
73 * 70 *
@@ -81,7 +78,6 @@ struct clkdm_dep {
81 struct clockdomain *clkdm; 78 struct clockdomain *clkdm;
82 atomic_t wkdep_usecount; 79 atomic_t wkdep_usecount;
83 atomic_t sleepdep_usecount; 80 atomic_t sleepdep_usecount;
84 const struct omap_chip_id omap_chip;
85}; 81};
86 82
87/* Possible flags for struct clockdomain._flags */ 83/* Possible flags for struct clockdomain._flags */
@@ -101,7 +97,6 @@ struct clkdm_dep {
101 * @clkdm_offs: (OMAP4 only) CM clockdomain register offset 97 * @clkdm_offs: (OMAP4 only) CM clockdomain register offset
102 * @wkdep_srcs: Clockdomains that can be told to wake this powerdomain up 98 * @wkdep_srcs: Clockdomains that can be told to wake this powerdomain up
103 * @sleepdep_srcs: Clockdomains that can be told to keep this clkdm from inact 99 * @sleepdep_srcs: Clockdomains that can be told to keep this clkdm from inact
104 * @omap_chip: OMAP chip types that this clockdomain is valid on
105 * @usecount: Usecount tracking 100 * @usecount: Usecount tracking
106 * @node: list_head to link all clockdomains together 101 * @node: list_head to link all clockdomains together
107 * 102 *
@@ -126,7 +121,6 @@ struct clockdomain {
126 const u16 clkdm_offs; 121 const u16 clkdm_offs;
127 struct clkdm_dep *wkdep_srcs; 122 struct clkdm_dep *wkdep_srcs;
128 struct clkdm_dep *sleepdep_srcs; 123 struct clkdm_dep *sleepdep_srcs;
129 const struct omap_chip_id omap_chip;
130 atomic_t usecount; 124 atomic_t usecount;
131 struct list_head node; 125 struct list_head node;
132 spinlock_t lock; 126 spinlock_t lock;
@@ -166,8 +160,11 @@ struct clkdm_ops {
166 int (*clkdm_clk_disable)(struct clockdomain *clkdm); 160 int (*clkdm_clk_disable)(struct clockdomain *clkdm);
167}; 161};
168 162
169void clkdm_init(struct clockdomain **clkdms, struct clkdm_autodep *autodeps, 163int clkdm_register_platform_funcs(struct clkdm_ops *co);
170 struct clkdm_ops *custom_funcs); 164int clkdm_register_autodeps(struct clkdm_autodep *ia);
165int clkdm_register_clkdms(struct clockdomain **c);
166int clkdm_complete_init(void);
167
171struct clockdomain *clkdm_lookup(const char *name); 168struct clockdomain *clkdm_lookup(const char *name);
172 169
173int clkdm_for_each(int (*fn)(struct clockdomain *clkdm, void *user), 170int clkdm_for_each(int (*fn)(struct clockdomain *clkdm, void *user),
@@ -195,7 +192,8 @@ int clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk);
195int clkdm_hwmod_enable(struct clockdomain *clkdm, struct omap_hwmod *oh); 192int clkdm_hwmod_enable(struct clockdomain *clkdm, struct omap_hwmod *oh);
196int clkdm_hwmod_disable(struct clockdomain *clkdm, struct omap_hwmod *oh); 193int clkdm_hwmod_disable(struct clockdomain *clkdm, struct omap_hwmod *oh);
197 194
198extern void __init omap2xxx_clockdomains_init(void); 195extern void __init omap242x_clockdomains_init(void);
196extern void __init omap243x_clockdomains_init(void);
199extern void __init omap3xxx_clockdomains_init(void); 197extern void __init omap3xxx_clockdomains_init(void);
200extern void __init omap44xx_clockdomains_init(void); 198extern void __init omap44xx_clockdomains_init(void);
201extern void _clkdm_add_autodeps(struct clockdomain *clkdm); 199extern void _clkdm_add_autodeps(struct clockdomain *clkdm);
@@ -205,4 +203,10 @@ extern struct clkdm_ops omap2_clkdm_operations;
205extern struct clkdm_ops omap3_clkdm_operations; 203extern struct clkdm_ops omap3_clkdm_operations;
206extern struct clkdm_ops omap4_clkdm_operations; 204extern struct clkdm_ops omap4_clkdm_operations;
207 205
206extern struct clkdm_dep gfx_24xx_wkdeps[];
207extern struct clkdm_dep dsp_24xx_wkdeps[];
208extern struct clockdomain wkup_common_clkdm;
209extern struct clockdomain prm_common_clkdm;
210extern struct clockdomain cm_common_clkdm;
211
208#endif 212#endif
diff --git a/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c b/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c
index f740edb111f4..a0d68dbecfa3 100644
--- a/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c
+++ b/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c
@@ -52,8 +52,6 @@ static int omap2_clkdm_clear_all_wkdeps(struct clockdomain *clkdm)
52 u32 mask = 0; 52 u32 mask = 0;
53 53
54 for (cd = clkdm->wkdep_srcs; cd && cd->clkdm_name; cd++) { 54 for (cd = clkdm->wkdep_srcs; cd && cd->clkdm_name; cd++) {
55 if (!omap_chip_is(cd->omap_chip))
56 continue;
57 if (!cd->clkdm) 55 if (!cd->clkdm)
58 continue; /* only happens if data is erroneous */ 56 continue; /* only happens if data is erroneous */
59 57
@@ -98,8 +96,6 @@ static int omap3_clkdm_clear_all_sleepdeps(struct clockdomain *clkdm)
98 u32 mask = 0; 96 u32 mask = 0;
99 97
100 for (cd = clkdm->sleepdep_srcs; cd && cd->clkdm_name; cd++) { 98 for (cd = clkdm->sleepdep_srcs; cd && cd->clkdm_name; cd++) {
101 if (!omap_chip_is(cd->omap_chip))
102 continue;
103 if (!cd->clkdm) 99 if (!cd->clkdm)
104 continue; /* only happens if data is erroneous */ 100 continue; /* only happens if data is erroneous */
105 101
diff --git a/arch/arm/mach-omap2/clockdomain44xx.c b/arch/arm/mach-omap2/clockdomain44xx.c
index b43706aa08bd..935c7f03dab9 100644
--- a/arch/arm/mach-omap2/clockdomain44xx.c
+++ b/arch/arm/mach-omap2/clockdomain44xx.c
@@ -52,8 +52,6 @@ static int omap4_clkdm_clear_all_wkup_sleep_deps(struct clockdomain *clkdm)
52 u32 mask = 0; 52 u32 mask = 0;
53 53
54 for (cd = clkdm->wkdep_srcs; cd && cd->clkdm_name; cd++) { 54 for (cd = clkdm->wkdep_srcs; cd && cd->clkdm_name; cd++) {
55 if (!omap_chip_is(cd->omap_chip))
56 continue;
57 if (!cd->clkdm) 55 if (!cd->clkdm)
58 continue; /* only happens if data is erroneous */ 56 continue; /* only happens if data is erroneous */
59 57
diff --git a/arch/arm/mach-omap2/clockdomains2420_data.c b/arch/arm/mach-omap2/clockdomains2420_data.c
new file mode 100644
index 000000000000..0ab8e46d5b2b
--- /dev/null
+++ b/arch/arm/mach-omap2/clockdomains2420_data.c
@@ -0,0 +1,154 @@
1/*
2 * OMAP2420 clockdomains
3 *
4 * Copyright (C) 2008-2011 Texas Instruments, Inc.
5 * Copyright (C) 2008-2010 Nokia Corporation
6 *
7 * Paul Walmsley, Jouni Högander
8 *
9 * This file contains clockdomains and clockdomain wakeup dependencies
10 * for OMAP2420 chips. Some notes:
11 *
12 * A useful validation rule for struct clockdomain: Any clockdomain
13 * referenced by a wkdep_srcs must have a dep_bit assigned. So
14 * wkdep_srcs are really just software-controllable dependencies.
15 * Non-software-controllable dependencies do exist, but they are not
16 * encoded below (yet).
17 *
18 * 24xx does not support programmable sleep dependencies (SLEEPDEP)
19 *
20 * The overly-specific dep_bit names are due to a bit name collision
21 * with CM_FCLKEN_{DSP,IVA2}. The DSP/IVA2 PM_WKDEP and CM_SLEEPDEP shift
22 * value are the same for all powerdomains: 2
23 *
24 * XXX should dep_bit be a mask, so we can test to see if it is 0 as a
25 * sanity check?
26 * XXX encode hardware fixed wakeup dependencies -- esp. for 3430 CORE
27 */
28
29/*
30 * To-Do List
31 * -> Port the Sleep/Wakeup dependencies for the domains
32 * from the Power domain framework
33 */
34
35#include <linux/kernel.h>
36#include <linux/io.h>
37
38#include "clockdomain.h"
39#include "prm2xxx_3xxx.h"
40#include "cm2xxx_3xxx.h"
41#include "cm-regbits-24xx.h"
42#include "prm-regbits-24xx.h"
43
44/*
45 * Clockdomain dependencies for wkdeps
46 *
47 * XXX Hardware dependencies (e.g., dependencies that cannot be
48 * changed in software) are not included here yet, but should be.
49 */
50
51/* Wakeup dependency source arrays */
52
53/* 2420-specific possible wakeup dependencies */
54
55/* 2420 PM_WKDEP_MPU: CORE, DSP, WKUP */
56static struct clkdm_dep mpu_2420_wkdeps[] = {
57 { .clkdm_name = "core_l3_clkdm" },
58 { .clkdm_name = "core_l4_clkdm" },
59 { .clkdm_name = "dsp_clkdm" },
60 { .clkdm_name = "wkup_clkdm" },
61 { NULL },
62};
63
64/* 2420 PM_WKDEP_CORE: DSP, GFX, MPU, WKUP */
65static struct clkdm_dep core_2420_wkdeps[] = {
66 { .clkdm_name = "dsp_clkdm" },
67 { .clkdm_name = "gfx_clkdm" },
68 { .clkdm_name = "mpu_clkdm" },
69 { .clkdm_name = "wkup_clkdm" },
70 { NULL },
71};
72
73/*
74 * 2420-only clockdomains
75 */
76
77static struct clockdomain mpu_2420_clkdm = {
78 .name = "mpu_clkdm",
79 .pwrdm = { .name = "mpu_pwrdm" },
80 .flags = CLKDM_CAN_HWSUP,
81 .wkdep_srcs = mpu_2420_wkdeps,
82 .clktrctrl_mask = OMAP24XX_AUTOSTATE_MPU_MASK,
83};
84
85static struct clockdomain iva1_2420_clkdm = {
86 .name = "iva1_clkdm",
87 .pwrdm = { .name = "dsp_pwrdm" },
88 .flags = CLKDM_CAN_HWSUP_SWSUP,
89 .dep_bit = OMAP24XX_PM_WKDEP_MPU_EN_DSP_SHIFT,
90 .wkdep_srcs = dsp_24xx_wkdeps,
91 .clktrctrl_mask = OMAP2420_AUTOSTATE_IVA_MASK,
92};
93
94static struct clockdomain dsp_2420_clkdm = {
95 .name = "dsp_clkdm",
96 .pwrdm = { .name = "dsp_pwrdm" },
97 .flags = CLKDM_CAN_HWSUP_SWSUP,
98 .clktrctrl_mask = OMAP24XX_AUTOSTATE_DSP_MASK,
99};
100
101static struct clockdomain gfx_2420_clkdm = {
102 .name = "gfx_clkdm",
103 .pwrdm = { .name = "gfx_pwrdm" },
104 .flags = CLKDM_CAN_HWSUP_SWSUP,
105 .wkdep_srcs = gfx_24xx_wkdeps,
106 .clktrctrl_mask = OMAP24XX_AUTOSTATE_GFX_MASK,
107};
108
109static struct clockdomain core_l3_2420_clkdm = {
110 .name = "core_l3_clkdm",
111 .pwrdm = { .name = "core_pwrdm" },
112 .flags = CLKDM_CAN_HWSUP,
113 .wkdep_srcs = core_2420_wkdeps,
114 .clktrctrl_mask = OMAP24XX_AUTOSTATE_L3_MASK,
115};
116
117static struct clockdomain core_l4_2420_clkdm = {
118 .name = "core_l4_clkdm",
119 .pwrdm = { .name = "core_pwrdm" },
120 .flags = CLKDM_CAN_HWSUP,
121 .wkdep_srcs = core_2420_wkdeps,
122 .clktrctrl_mask = OMAP24XX_AUTOSTATE_L4_MASK,
123};
124
125static struct clockdomain dss_2420_clkdm = {
126 .name = "dss_clkdm",
127 .pwrdm = { .name = "core_pwrdm" },
128 .flags = CLKDM_CAN_HWSUP,
129 .clktrctrl_mask = OMAP24XX_AUTOSTATE_DSS_MASK,
130};
131
132static struct clockdomain *clockdomains_omap242x[] __initdata = {
133 &wkup_common_clkdm,
134 &cm_common_clkdm,
135 &prm_common_clkdm,
136 &mpu_2420_clkdm,
137 &iva1_2420_clkdm,
138 &dsp_2420_clkdm,
139 &gfx_2420_clkdm,
140 &core_l3_2420_clkdm,
141 &core_l4_2420_clkdm,
142 &dss_2420_clkdm,
143 NULL,
144};
145
146void __init omap242x_clockdomains_init(void)
147{
148 if (!cpu_is_omap242x())
149 return;
150
151 clkdm_register_platform_funcs(&omap2_clkdm_operations);
152 clkdm_register_clkdms(clockdomains_omap242x);
153 clkdm_complete_init();
154}
diff --git a/arch/arm/mach-omap2/clockdomains2430_data.c b/arch/arm/mach-omap2/clockdomains2430_data.c
new file mode 100644
index 000000000000..3645ed044890
--- /dev/null
+++ b/arch/arm/mach-omap2/clockdomains2430_data.c
@@ -0,0 +1,181 @@
1/*
2 * OMAP2xxx clockdomains
3 *
4 * Copyright (C) 2008-2009 Texas Instruments, Inc.
5 * Copyright (C) 2008-2010 Nokia Corporation
6 *
7 * Paul Walmsley, Jouni Högander
8 *
9 * This file contains clockdomains and clockdomain wakeup dependencies
10 * for OMAP2xxx chips. Some notes:
11 *
12 * A useful validation rule for struct clockdomain: Any clockdomain
13 * referenced by a wkdep_srcs must have a dep_bit assigned. So
14 * wkdep_srcs are really just software-controllable dependencies.
15 * Non-software-controllable dependencies do exist, but they are not
16 * encoded below (yet).
17 *
18 * 24xx does not support programmable sleep dependencies (SLEEPDEP)
19 *
20 * The overly-specific dep_bit names are due to a bit name collision
21 * with CM_FCLKEN_{DSP,IVA2}. The DSP/IVA2 PM_WKDEP and CM_SLEEPDEP shift
22 * value are the same for all powerdomains: 2
23 *
24 * XXX should dep_bit be a mask, so we can test to see if it is 0 as a
25 * sanity check?
26 * XXX encode hardware fixed wakeup dependencies -- esp. for 3430 CORE
27 */
28
29/*
30 * To-Do List
31 * -> Port the Sleep/Wakeup dependencies for the domains
32 * from the Power domain framework
33 */
34
35#include <linux/kernel.h>
36#include <linux/io.h>
37
38#include "clockdomain.h"
39#include "prm2xxx_3xxx.h"
40#include "cm2xxx_3xxx.h"
41#include "cm-regbits-24xx.h"
42#include "prm-regbits-24xx.h"
43
44/*
45 * Clockdomain dependencies for wkdeps
46 *
47 * XXX Hardware dependencies (e.g., dependencies that cannot be
48 * changed in software) are not included here yet, but should be.
49 */
50
51/* Wakeup dependency source arrays */
52
53/* 2430-specific possible wakeup dependencies */
54
55/* 2430 PM_WKDEP_CORE: DSP, GFX, MPU, WKUP, MDM */
56static struct clkdm_dep core_2430_wkdeps[] = {
57 { .clkdm_name = "dsp_clkdm" },
58 { .clkdm_name = "gfx_clkdm" },
59 { .clkdm_name = "mpu_clkdm" },
60 { .clkdm_name = "wkup_clkdm" },
61 { .clkdm_name = "mdm_clkdm" },
62 { NULL },
63};
64
65/* 2430 PM_WKDEP_MPU: CORE, DSP, WKUP, MDM */
66static struct clkdm_dep mpu_2430_wkdeps[] = {
67 { .clkdm_name = "core_l3_clkdm" },
68 { .clkdm_name = "core_l4_clkdm" },
69 { .clkdm_name = "dsp_clkdm" },
70 { .clkdm_name = "wkup_clkdm" },
71 { .clkdm_name = "mdm_clkdm" },
72 { NULL },
73};
74
75/* 2430 PM_WKDEP_MDM: CORE, MPU, WKUP */
76static struct clkdm_dep mdm_2430_wkdeps[] = {
77 { .clkdm_name = "core_l3_clkdm" },
78 { .clkdm_name = "core_l4_clkdm" },
79 { .clkdm_name = "mpu_clkdm" },
80 { .clkdm_name = "wkup_clkdm" },
81 { NULL },
82};
83
84/*
85 * 2430-only clockdomains
86 */
87
88static struct clockdomain mpu_2430_clkdm = {
89 .name = "mpu_clkdm",
90 .pwrdm = { .name = "mpu_pwrdm" },
91 .flags = CLKDM_CAN_HWSUP_SWSUP,
92 .wkdep_srcs = mpu_2430_wkdeps,
93 .clktrctrl_mask = OMAP24XX_AUTOSTATE_MPU_MASK,
94};
95
96/* Another case of bit name collisions between several registers: EN_MDM */
97static struct clockdomain mdm_clkdm = {
98 .name = "mdm_clkdm",
99 .pwrdm = { .name = "mdm_pwrdm" },
100 .flags = CLKDM_CAN_HWSUP_SWSUP,
101 .dep_bit = OMAP2430_PM_WKDEP_MPU_EN_MDM_SHIFT,
102 .wkdep_srcs = mdm_2430_wkdeps,
103 .clktrctrl_mask = OMAP2430_AUTOSTATE_MDM_MASK,
104};
105
106static struct clockdomain dsp_2430_clkdm = {
107 .name = "dsp_clkdm",
108 .pwrdm = { .name = "dsp_pwrdm" },
109 .flags = CLKDM_CAN_HWSUP_SWSUP,
110 .dep_bit = OMAP24XX_PM_WKDEP_MPU_EN_DSP_SHIFT,
111 .wkdep_srcs = dsp_24xx_wkdeps,
112 .clktrctrl_mask = OMAP24XX_AUTOSTATE_DSP_MASK,
113};
114
115static struct clockdomain gfx_2430_clkdm = {
116 .name = "gfx_clkdm",
117 .pwrdm = { .name = "gfx_pwrdm" },
118 .flags = CLKDM_CAN_HWSUP_SWSUP,
119 .wkdep_srcs = gfx_24xx_wkdeps,
120 .clktrctrl_mask = OMAP24XX_AUTOSTATE_GFX_MASK,
121};
122
123/*
124 * XXX add usecounting for clkdm dependencies, otherwise the presence
125 * of a single dep bit for core_l3_24xx_clkdm and core_l4_24xx_clkdm
126 * could cause trouble
127 */
128static struct clockdomain core_l3_2430_clkdm = {
129 .name = "core_l3_clkdm",
130 .pwrdm = { .name = "core_pwrdm" },
131 .flags = CLKDM_CAN_HWSUP,
132 .dep_bit = OMAP24XX_EN_CORE_SHIFT,
133 .wkdep_srcs = core_2430_wkdeps,
134 .clktrctrl_mask = OMAP24XX_AUTOSTATE_L3_MASK,
135};
136
137/*
138 * XXX add usecounting for clkdm dependencies, otherwise the presence
139 * of a single dep bit for core_l3_24xx_clkdm and core_l4_24xx_clkdm
140 * could cause trouble
141 */
142static struct clockdomain core_l4_2430_clkdm = {
143 .name = "core_l4_clkdm",
144 .pwrdm = { .name = "core_pwrdm" },
145 .flags = CLKDM_CAN_HWSUP,
146 .dep_bit = OMAP24XX_EN_CORE_SHIFT,
147 .wkdep_srcs = core_2430_wkdeps,
148 .clktrctrl_mask = OMAP24XX_AUTOSTATE_L4_MASK,
149};
150
151static struct clockdomain dss_2430_clkdm = {
152 .name = "dss_clkdm",
153 .pwrdm = { .name = "core_pwrdm" },
154 .flags = CLKDM_CAN_HWSUP,
155 .clktrctrl_mask = OMAP24XX_AUTOSTATE_DSS_MASK,
156};
157
158static struct clockdomain *clockdomains_omap243x[] __initdata = {
159 &wkup_common_clkdm,
160 &cm_common_clkdm,
161 &prm_common_clkdm,
162 &mpu_2430_clkdm,
163 &mdm_clkdm,
164 &dsp_2430_clkdm,
165 &gfx_2430_clkdm,
166 &core_l3_2430_clkdm,
167 &core_l4_2430_clkdm,
168 &dss_2430_clkdm,
169 NULL,
170};
171
172void __init omap243x_clockdomains_init(void)
173{
174 if (!cpu_is_omap243x())
175 return;
176
177 clkdm_register_platform_funcs(&omap2_clkdm_operations);
178 clkdm_register_clkdms(clockdomains_omap243x);
179 clkdm_complete_init();
180}
181
diff --git a/arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c b/arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c
index 13bde95b6790..0a6a04897d89 100644
--- a/arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c
+++ b/arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * OMAP2/3 clockdomains 2 * OMAP2/3 clockdomain common data
3 * 3 *
4 * Copyright (C) 2008-2009 Texas Instruments, Inc. 4 * Copyright (C) 2008-2011 Texas Instruments, Inc.
5 * Copyright (C) 2008-2010 Nokia Corporation 5 * Copyright (C) 2008-2010 Nokia Corporation
6 * 6 *
7 * Paul Walmsley, Jouni Högander 7 * Paul Walmsley, Jouni Högander
@@ -51,374 +51,28 @@
51 * changed in software) are not included here yet, but should be. 51 * changed in software) are not included here yet, but should be.
52 */ 52 */
53 53
54/* OMAP2/3-common wakeup dependencies */
55
56/*
57 * 2420/2430 PM_WKDEP_GFX: CORE, MPU, WKUP
58 * 3430ES1 PM_WKDEP_GFX: adds IVA2, removes CORE
59 * 3430ES2 PM_WKDEP_SGX: adds IVA2, removes CORE
60 * These can share data since they will never be present simultaneously
61 * on the same device.
62 */
63static struct clkdm_dep gfx_sgx_wkdeps[] = {
64 {
65 .clkdm_name = "core_l3_clkdm",
66 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX)
67 },
68 {
69 .clkdm_name = "core_l4_clkdm",
70 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX)
71 },
72 {
73 .clkdm_name = "iva2_clkdm",
74 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
75 },
76 {
77 .clkdm_name = "mpu_clkdm",
78 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX |
79 CHIP_IS_OMAP3430)
80 },
81 {
82 .clkdm_name = "wkup_clkdm",
83 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX |
84 CHIP_IS_OMAP3430)
85 },
86 { NULL },
87};
88
89
90/* 24XX-specific possible dependencies */
91
92#ifdef CONFIG_ARCH_OMAP2
93
94/* Wakeup dependency source arrays */ 54/* Wakeup dependency source arrays */
95 55
96/* 2420/2430 PM_WKDEP_DSP: CORE, MPU, WKUP */ 56/* 2xxx-specific possible dependencies */
97static struct clkdm_dep dsp_24xx_wkdeps[] = {
98 {
99 .clkdm_name = "core_l3_clkdm",
100 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX)
101 },
102 {
103 .clkdm_name = "core_l4_clkdm",
104 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX)
105 },
106 {
107 .clkdm_name = "mpu_clkdm",
108 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX)
109 },
110 {
111 .clkdm_name = "wkup_clkdm",
112 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX)
113 },
114 { NULL },
115};
116
117/*
118 * 2420 PM_WKDEP_MPU: CORE, DSP, WKUP
119 * 2430 adds MDM
120 */
121static struct clkdm_dep mpu_24xx_wkdeps[] = {
122 {
123 .clkdm_name = "core_l3_clkdm",
124 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX)
125 },
126 {
127 .clkdm_name = "core_l4_clkdm",
128 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX)
129 },
130 {
131 .clkdm_name = "dsp_clkdm",
132 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX)
133 },
134 {
135 .clkdm_name = "wkup_clkdm",
136 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX)
137 },
138 {
139 .clkdm_name = "mdm_clkdm",
140 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
141 },
142 { NULL },
143};
144
145/*
146 * 2420 PM_WKDEP_CORE: DSP, GFX, MPU, WKUP
147 * 2430 adds MDM
148 */
149static struct clkdm_dep core_24xx_wkdeps[] = {
150 {
151 .clkdm_name = "dsp_clkdm",
152 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX)
153 },
154 {
155 .clkdm_name = "gfx_clkdm",
156 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX)
157 },
158 {
159 .clkdm_name = "mpu_clkdm",
160 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX)
161 },
162 {
163 .clkdm_name = "wkup_clkdm",
164 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX)
165 },
166 {
167 .clkdm_name = "mdm_clkdm",
168 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
169 },
170 { NULL },
171};
172
173#endif /* CONFIG_ARCH_OMAP2 */
174
175/* 2430-specific possible wakeup dependencies */
176 57
177#ifdef CONFIG_SOC_OMAP2430 58/* 2xxx PM_WKDEP_GFX: CORE, MPU, WKUP */
178 59struct clkdm_dep gfx_24xx_wkdeps[] = {
179/* 2430 PM_WKDEP_MDM: CORE, MPU, WKUP */ 60 { .clkdm_name = "core_l3_clkdm" },
180static struct clkdm_dep mdm_2430_wkdeps[] = { 61 { .clkdm_name = "core_l4_clkdm" },
181 { 62 { .clkdm_name = "mpu_clkdm" },
182 .clkdm_name = "core_l3_clkdm", 63 { .clkdm_name = "wkup_clkdm" },
183 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX)
184 },
185 {
186 .clkdm_name = "core_l4_clkdm",
187 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX)
188 },
189 {
190 .clkdm_name = "mpu_clkdm",
191 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX)
192 },
193 {
194 .clkdm_name = "wkup_clkdm",
195 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX)
196 },
197 { NULL },
198};
199
200#endif /* CONFIG_SOC_OMAP2430 */
201
202
203/* OMAP3-specific possible dependencies */
204
205#ifdef CONFIG_ARCH_OMAP3
206
207/* 3430: PM_WKDEP_PER: CORE, IVA2, MPU, WKUP */
208static struct clkdm_dep per_wkdeps[] = {
209 {
210 .clkdm_name = "core_l3_clkdm",
211 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
212 },
213 {
214 .clkdm_name = "core_l4_clkdm",
215 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
216 },
217 {
218 .clkdm_name = "iva2_clkdm",
219 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
220 },
221 {
222 .clkdm_name = "mpu_clkdm",
223 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
224 },
225 {
226 .clkdm_name = "wkup_clkdm",
227 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
228 },
229 { NULL },
230};
231
232/* 3430ES2: PM_WKDEP_USBHOST: CORE, IVA2, MPU, WKUP */
233static struct clkdm_dep usbhost_wkdeps[] = {
234 {
235 .clkdm_name = "core_l3_clkdm",
236 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
237 },
238 {
239 .clkdm_name = "core_l4_clkdm",
240 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
241 },
242 {
243 .clkdm_name = "iva2_clkdm",
244 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
245 },
246 {
247 .clkdm_name = "mpu_clkdm",
248 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
249 },
250 {
251 .clkdm_name = "wkup_clkdm",
252 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
253 },
254 { NULL }, 64 { NULL },
255}; 65};
256 66
257/* 3430 PM_WKDEP_MPU: CORE, IVA2, DSS, PER */ 67/* 2xxx PM_WKDEP_DSP: CORE, MPU, WKUP */
258static struct clkdm_dep mpu_3xxx_wkdeps[] = { 68struct clkdm_dep dsp_24xx_wkdeps[] = {
259 { 69 { .clkdm_name = "core_l3_clkdm" },
260 .clkdm_name = "core_l3_clkdm", 70 { .clkdm_name = "core_l4_clkdm" },
261 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) 71 { .clkdm_name = "mpu_clkdm" },
262 }, 72 { .clkdm_name = "wkup_clkdm" },
263 {
264 .clkdm_name = "core_l4_clkdm",
265 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
266 },
267 {
268 .clkdm_name = "iva2_clkdm",
269 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
270 },
271 {
272 .clkdm_name = "dss_clkdm",
273 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
274 },
275 {
276 .clkdm_name = "per_clkdm",
277 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
278 },
279 { NULL }, 73 { NULL },
280}; 74};
281 75
282/* 3430 PM_WKDEP_IVA2: CORE, MPU, WKUP, DSS, PER */
283static struct clkdm_dep iva2_wkdeps[] = {
284 {
285 .clkdm_name = "core_l3_clkdm",
286 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
287 },
288 {
289 .clkdm_name = "core_l4_clkdm",
290 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
291 },
292 {
293 .clkdm_name = "mpu_clkdm",
294 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
295 },
296 {
297 .clkdm_name = "wkup_clkdm",
298 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
299 },
300 {
301 .clkdm_name = "dss_clkdm",
302 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
303 },
304 {
305 .clkdm_name = "per_clkdm",
306 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
307 },
308 { NULL },
309};
310
311
312/* 3430 PM_WKDEP_CAM: IVA2, MPU, WKUP */
313static struct clkdm_dep cam_wkdeps[] = {
314 {
315 .clkdm_name = "iva2_clkdm",
316 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
317 },
318 {
319 .clkdm_name = "mpu_clkdm",
320 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
321 },
322 {
323 .clkdm_name = "wkup_clkdm",
324 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
325 },
326 { NULL },
327};
328
329/* 3430 PM_WKDEP_DSS: IVA2, MPU, WKUP */
330static struct clkdm_dep dss_wkdeps[] = {
331 {
332 .clkdm_name = "iva2_clkdm",
333 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
334 },
335 {
336 .clkdm_name = "mpu_clkdm",
337 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
338 },
339 {
340 .clkdm_name = "wkup_clkdm",
341 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
342 },
343 { NULL },
344};
345
346/* 3430: PM_WKDEP_NEON: MPU */
347static struct clkdm_dep neon_wkdeps[] = {
348 {
349 .clkdm_name = "mpu_clkdm",
350 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
351 },
352 { NULL },
353};
354
355
356/* Sleep dependency source arrays for OMAP3-specific clkdms */
357
358/* 3430: CM_SLEEPDEP_DSS: MPU, IVA */
359static struct clkdm_dep dss_sleepdeps[] = {
360 {
361 .clkdm_name = "mpu_clkdm",
362 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
363 },
364 {
365 .clkdm_name = "iva2_clkdm",
366 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
367 },
368 { NULL },
369};
370
371/* 3430: CM_SLEEPDEP_PER: MPU, IVA */
372static struct clkdm_dep per_sleepdeps[] = {
373 {
374 .clkdm_name = "mpu_clkdm",
375 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
376 },
377 {
378 .clkdm_name = "iva2_clkdm",
379 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
380 },
381 { NULL },
382};
383
384/* 3430ES2: CM_SLEEPDEP_USBHOST: MPU, IVA */
385static struct clkdm_dep usbhost_sleepdeps[] = {
386 {
387 .clkdm_name = "mpu_clkdm",
388 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
389 },
390 {
391 .clkdm_name = "iva2_clkdm",
392 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
393 },
394 { NULL },
395};
396
397/* 3430: CM_SLEEPDEP_CAM: MPU */
398static struct clkdm_dep cam_sleepdeps[] = {
399 {
400 .clkdm_name = "mpu_clkdm",
401 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
402 },
403 { NULL },
404};
405
406/*
407 * 3430ES1: CM_SLEEPDEP_GFX: MPU
408 * 3430ES2: CM_SLEEPDEP_SGX: MPU
409 * These can share data since they will never be present simultaneously
410 * on the same device.
411 */
412static struct clkdm_dep gfx_sgx_sleepdeps[] = {
413 {
414 .clkdm_name = "mpu_clkdm",
415 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
416 },
417 { NULL },
418};
419
420#endif /* CONFIG_ARCH_OMAP3 */
421
422 76
423/* 77/*
424 * OMAP2/3-common clockdomains 78 * OMAP2/3-common clockdomains
@@ -430,439 +84,18 @@ static struct clkdm_dep gfx_sgx_sleepdeps[] = {
430 */ 84 */
431 85
432/* This is an implicit clockdomain - it is never defined as such in TRM */ 86/* This is an implicit clockdomain - it is never defined as such in TRM */
433static struct clockdomain wkup_clkdm = { 87struct clockdomain wkup_common_clkdm = {
434 .name = "wkup_clkdm", 88 .name = "wkup_clkdm",
435 .pwrdm = { .name = "wkup_pwrdm" }, 89 .pwrdm = { .name = "wkup_pwrdm" },
436 .dep_bit = OMAP_EN_WKUP_SHIFT, 90 .dep_bit = OMAP_EN_WKUP_SHIFT,
437 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX | CHIP_IS_OMAP3430),
438}; 91};
439 92
440static struct clockdomain prm_clkdm = { 93struct clockdomain prm_common_clkdm = {
441 .name = "prm_clkdm", 94 .name = "prm_clkdm",
442 .pwrdm = { .name = "wkup_pwrdm" }, 95 .pwrdm = { .name = "wkup_pwrdm" },
443 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX | CHIP_IS_OMAP3430),
444}; 96};
445 97
446static struct clockdomain cm_clkdm = { 98struct clockdomain cm_common_clkdm = {
447 .name = "cm_clkdm", 99 .name = "cm_clkdm",
448 .pwrdm = { .name = "core_pwrdm" }, 100 .pwrdm = { .name = "core_pwrdm" },
449 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX | CHIP_IS_OMAP3430),
450}; 101};
451
452/*
453 * 2420-only clockdomains
454 */
455
456#if defined(CONFIG_SOC_OMAP2420)
457
458static struct clockdomain mpu_2420_clkdm = {
459 .name = "mpu_clkdm",
460 .pwrdm = { .name = "mpu_pwrdm" },
461 .flags = CLKDM_CAN_HWSUP,
462 .wkdep_srcs = mpu_24xx_wkdeps,
463 .clktrctrl_mask = OMAP24XX_AUTOSTATE_MPU_MASK,
464 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
465};
466
467static struct clockdomain iva1_2420_clkdm = {
468 .name = "iva1_clkdm",
469 .pwrdm = { .name = "dsp_pwrdm" },
470 .flags = CLKDM_CAN_HWSUP_SWSUP,
471 .dep_bit = OMAP24XX_PM_WKDEP_MPU_EN_DSP_SHIFT,
472 .wkdep_srcs = dsp_24xx_wkdeps,
473 .clktrctrl_mask = OMAP2420_AUTOSTATE_IVA_MASK,
474 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
475};
476
477static struct clockdomain dsp_2420_clkdm = {
478 .name = "dsp_clkdm",
479 .pwrdm = { .name = "dsp_pwrdm" },
480 .flags = CLKDM_CAN_HWSUP_SWSUP,
481 .clktrctrl_mask = OMAP24XX_AUTOSTATE_DSP_MASK,
482 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
483};
484
485static struct clockdomain gfx_2420_clkdm = {
486 .name = "gfx_clkdm",
487 .pwrdm = { .name = "gfx_pwrdm" },
488 .flags = CLKDM_CAN_HWSUP_SWSUP,
489 .wkdep_srcs = gfx_sgx_wkdeps,
490 .clktrctrl_mask = OMAP24XX_AUTOSTATE_GFX_MASK,
491 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
492};
493
494static struct clockdomain core_l3_2420_clkdm = {
495 .name = "core_l3_clkdm",
496 .pwrdm = { .name = "core_pwrdm" },
497 .flags = CLKDM_CAN_HWSUP,
498 .wkdep_srcs = core_24xx_wkdeps,
499 .clktrctrl_mask = OMAP24XX_AUTOSTATE_L3_MASK,
500 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
501};
502
503static struct clockdomain core_l4_2420_clkdm = {
504 .name = "core_l4_clkdm",
505 .pwrdm = { .name = "core_pwrdm" },
506 .flags = CLKDM_CAN_HWSUP,
507 .wkdep_srcs = core_24xx_wkdeps,
508 .clktrctrl_mask = OMAP24XX_AUTOSTATE_L4_MASK,
509 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
510};
511
512static struct clockdomain dss_2420_clkdm = {
513 .name = "dss_clkdm",
514 .pwrdm = { .name = "core_pwrdm" },
515 .flags = CLKDM_CAN_HWSUP,
516 .clktrctrl_mask = OMAP24XX_AUTOSTATE_DSS_MASK,
517 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
518};
519
520#endif /* CONFIG_SOC_OMAP2420 */
521
522
523/*
524 * 2430-only clockdomains
525 */
526
527#if defined(CONFIG_SOC_OMAP2430)
528
529static struct clockdomain mpu_2430_clkdm = {
530 .name = "mpu_clkdm",
531 .pwrdm = { .name = "mpu_pwrdm" },
532 .flags = CLKDM_CAN_HWSUP_SWSUP,
533 .wkdep_srcs = mpu_24xx_wkdeps,
534 .clktrctrl_mask = OMAP24XX_AUTOSTATE_MPU_MASK,
535 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
536};
537
538/* Another case of bit name collisions between several registers: EN_MDM */
539static struct clockdomain mdm_clkdm = {
540 .name = "mdm_clkdm",
541 .pwrdm = { .name = "mdm_pwrdm" },
542 .flags = CLKDM_CAN_HWSUP_SWSUP,
543 .dep_bit = OMAP2430_PM_WKDEP_MPU_EN_MDM_SHIFT,
544 .wkdep_srcs = mdm_2430_wkdeps,
545 .clktrctrl_mask = OMAP2430_AUTOSTATE_MDM_MASK,
546 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
547};
548
549static struct clockdomain dsp_2430_clkdm = {
550 .name = "dsp_clkdm",
551 .pwrdm = { .name = "dsp_pwrdm" },
552 .flags = CLKDM_CAN_HWSUP_SWSUP,
553 .dep_bit = OMAP24XX_PM_WKDEP_MPU_EN_DSP_SHIFT,
554 .wkdep_srcs = dsp_24xx_wkdeps,
555 .clktrctrl_mask = OMAP24XX_AUTOSTATE_DSP_MASK,
556 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
557};
558
559static struct clockdomain gfx_2430_clkdm = {
560 .name = "gfx_clkdm",
561 .pwrdm = { .name = "gfx_pwrdm" },
562 .flags = CLKDM_CAN_HWSUP_SWSUP,
563 .wkdep_srcs = gfx_sgx_wkdeps,
564 .clktrctrl_mask = OMAP24XX_AUTOSTATE_GFX_MASK,
565 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
566};
567
568/*
569 * XXX add usecounting for clkdm dependencies, otherwise the presence
570 * of a single dep bit for core_l3_24xx_clkdm and core_l4_24xx_clkdm
571 * could cause trouble
572 */
573static struct clockdomain core_l3_2430_clkdm = {
574 .name = "core_l3_clkdm",
575 .pwrdm = { .name = "core_pwrdm" },
576 .flags = CLKDM_CAN_HWSUP,
577 .dep_bit = OMAP24XX_EN_CORE_SHIFT,
578 .wkdep_srcs = core_24xx_wkdeps,
579 .clktrctrl_mask = OMAP24XX_AUTOSTATE_L3_MASK,
580 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
581};
582
583/*
584 * XXX add usecounting for clkdm dependencies, otherwise the presence
585 * of a single dep bit for core_l3_24xx_clkdm and core_l4_24xx_clkdm
586 * could cause trouble
587 */
588static struct clockdomain core_l4_2430_clkdm = {
589 .name = "core_l4_clkdm",
590 .pwrdm = { .name = "core_pwrdm" },
591 .flags = CLKDM_CAN_HWSUP,
592 .dep_bit = OMAP24XX_EN_CORE_SHIFT,
593 .wkdep_srcs = core_24xx_wkdeps,
594 .clktrctrl_mask = OMAP24XX_AUTOSTATE_L4_MASK,
595 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
596};
597
598static struct clockdomain dss_2430_clkdm = {
599 .name = "dss_clkdm",
600 .pwrdm = { .name = "core_pwrdm" },
601 .flags = CLKDM_CAN_HWSUP,
602 .clktrctrl_mask = OMAP24XX_AUTOSTATE_DSS_MASK,
603 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
604};
605
606#endif /* CONFIG_SOC_OMAP2430 */
607
608
609/*
610 * OMAP3 clockdomains
611 */
612
613#if defined(CONFIG_ARCH_OMAP3)
614
615static struct clockdomain mpu_3xxx_clkdm = {
616 .name = "mpu_clkdm",
617 .pwrdm = { .name = "mpu_pwrdm" },
618 .flags = CLKDM_CAN_HWSUP | CLKDM_CAN_FORCE_WAKEUP,
619 .dep_bit = OMAP3430_EN_MPU_SHIFT,
620 .wkdep_srcs = mpu_3xxx_wkdeps,
621 .clktrctrl_mask = OMAP3430_CLKTRCTRL_MPU_MASK,
622 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
623};
624
625static struct clockdomain neon_clkdm = {
626 .name = "neon_clkdm",
627 .pwrdm = { .name = "neon_pwrdm" },
628 .flags = CLKDM_CAN_HWSUP_SWSUP,
629 .wkdep_srcs = neon_wkdeps,
630 .clktrctrl_mask = OMAP3430_CLKTRCTRL_NEON_MASK,
631 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
632};
633
634static struct clockdomain iva2_clkdm = {
635 .name = "iva2_clkdm",
636 .pwrdm = { .name = "iva2_pwrdm" },
637 .flags = CLKDM_CAN_HWSUP_SWSUP,
638 .dep_bit = OMAP3430_PM_WKDEP_MPU_EN_IVA2_SHIFT,
639 .wkdep_srcs = iva2_wkdeps,
640 .clktrctrl_mask = OMAP3430_CLKTRCTRL_IVA2_MASK,
641 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
642};
643
644static struct clockdomain gfx_3430es1_clkdm = {
645 .name = "gfx_clkdm",
646 .pwrdm = { .name = "gfx_pwrdm" },
647 .flags = CLKDM_CAN_HWSUP_SWSUP,
648 .wkdep_srcs = gfx_sgx_wkdeps,
649 .sleepdep_srcs = gfx_sgx_sleepdeps,
650 .clktrctrl_mask = OMAP3430ES1_CLKTRCTRL_GFX_MASK,
651 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES1),
652};
653
654static struct clockdomain sgx_clkdm = {
655 .name = "sgx_clkdm",
656 .pwrdm = { .name = "sgx_pwrdm" },
657 .flags = CLKDM_CAN_HWSUP_SWSUP,
658 .wkdep_srcs = gfx_sgx_wkdeps,
659 .sleepdep_srcs = gfx_sgx_sleepdeps,
660 .clktrctrl_mask = OMAP3430ES2_CLKTRCTRL_SGX_MASK,
661 .omap_chip = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES2),
662};
663
664/*
665 * The die-to-die clockdomain was documented in the 34xx ES1 TRM, but
666 * then that information was removed from the 34xx ES2+ TRM. It is
667 * unclear whether the core is still there, but the clockdomain logic
668 * is there, and must be programmed to an appropriate state if the
669 * CORE clockdomain is to become inactive.
670 */
671static struct clockdomain d2d_clkdm = {
672 .name = "d2d_clkdm",
673 .pwrdm = { .name = "core_pwrdm" },
674 .flags = CLKDM_CAN_HWSUP_SWSUP,
675 .clktrctrl_mask = OMAP3430ES1_CLKTRCTRL_D2D_MASK,
676 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
677};
678
679/*
680 * XXX add usecounting for clkdm dependencies, otherwise the presence
681 * of a single dep bit for core_l3_3xxx_clkdm and core_l4_3xxx_clkdm
682 * could cause trouble
683 */
684static struct clockdomain core_l3_3xxx_clkdm = {
685 .name = "core_l3_clkdm",
686 .pwrdm = { .name = "core_pwrdm" },
687 .flags = CLKDM_CAN_HWSUP,
688 .dep_bit = OMAP3430_EN_CORE_SHIFT,
689 .clktrctrl_mask = OMAP3430_CLKTRCTRL_L3_MASK,
690 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
691};
692
693/*
694 * XXX add usecounting for clkdm dependencies, otherwise the presence
695 * of a single dep bit for core_l3_3xxx_clkdm and core_l4_3xxx_clkdm
696 * could cause trouble
697 */
698static struct clockdomain core_l4_3xxx_clkdm = {
699 .name = "core_l4_clkdm",
700 .pwrdm = { .name = "core_pwrdm" },
701 .flags = CLKDM_CAN_HWSUP,
702 .dep_bit = OMAP3430_EN_CORE_SHIFT,
703 .clktrctrl_mask = OMAP3430_CLKTRCTRL_L4_MASK,
704 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
705};
706
707/* Another case of bit name collisions between several registers: EN_DSS */
708static struct clockdomain dss_3xxx_clkdm = {
709 .name = "dss_clkdm",
710 .pwrdm = { .name = "dss_pwrdm" },
711 .flags = CLKDM_CAN_HWSUP_SWSUP,
712 .dep_bit = OMAP3430_PM_WKDEP_MPU_EN_DSS_SHIFT,
713 .wkdep_srcs = dss_wkdeps,
714 .sleepdep_srcs = dss_sleepdeps,
715 .clktrctrl_mask = OMAP3430_CLKTRCTRL_DSS_MASK,
716 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
717};
718
719static struct clockdomain cam_clkdm = {
720 .name = "cam_clkdm",
721 .pwrdm = { .name = "cam_pwrdm" },
722 .flags = CLKDM_CAN_HWSUP_SWSUP,
723 .wkdep_srcs = cam_wkdeps,
724 .sleepdep_srcs = cam_sleepdeps,
725 .clktrctrl_mask = OMAP3430_CLKTRCTRL_CAM_MASK,
726 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
727};
728
729static struct clockdomain usbhost_clkdm = {
730 .name = "usbhost_clkdm",
731 .pwrdm = { .name = "usbhost_pwrdm" },
732 .flags = CLKDM_CAN_HWSUP_SWSUP,
733 .wkdep_srcs = usbhost_wkdeps,
734 .sleepdep_srcs = usbhost_sleepdeps,
735 .clktrctrl_mask = OMAP3430ES2_CLKTRCTRL_USBHOST_MASK,
736 .omap_chip = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES2),
737};
738
739static struct clockdomain per_clkdm = {
740 .name = "per_clkdm",
741 .pwrdm = { .name = "per_pwrdm" },
742 .flags = CLKDM_CAN_HWSUP_SWSUP,
743 .dep_bit = OMAP3430_EN_PER_SHIFT,
744 .wkdep_srcs = per_wkdeps,
745 .sleepdep_srcs = per_sleepdeps,
746 .clktrctrl_mask = OMAP3430_CLKTRCTRL_PER_MASK,
747 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
748};
749
750/*
751 * Disable hw supervised mode for emu_clkdm, because emu_pwrdm is
752 * switched of even if sdti is in use
753 */
754static struct clockdomain emu_clkdm = {
755 .name = "emu_clkdm",
756 .pwrdm = { .name = "emu_pwrdm" },
757 .flags = /* CLKDM_CAN_ENABLE_AUTO | */CLKDM_CAN_SWSUP,
758 .clktrctrl_mask = OMAP3430_CLKTRCTRL_EMU_MASK,
759 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
760};
761
762static struct clockdomain dpll1_clkdm = {
763 .name = "dpll1_clkdm",
764 .pwrdm = { .name = "dpll1_pwrdm" },
765 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
766};
767
768static struct clockdomain dpll2_clkdm = {
769 .name = "dpll2_clkdm",
770 .pwrdm = { .name = "dpll2_pwrdm" },
771 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
772};
773
774static struct clockdomain dpll3_clkdm = {
775 .name = "dpll3_clkdm",
776 .pwrdm = { .name = "dpll3_pwrdm" },
777 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
778};
779
780static struct clockdomain dpll4_clkdm = {
781 .name = "dpll4_clkdm",
782 .pwrdm = { .name = "dpll4_pwrdm" },
783 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
784};
785
786static struct clockdomain dpll5_clkdm = {
787 .name = "dpll5_clkdm",
788 .pwrdm = { .name = "dpll5_pwrdm" },
789 .omap_chip = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES2),
790};
791
792#endif /* CONFIG_ARCH_OMAP3 */
793
794/*
795 * Clockdomain hwsup dependencies (OMAP3 only)
796 */
797
798static struct clkdm_autodep clkdm_autodeps[] = {
799 {
800 .clkdm = { .name = "mpu_clkdm" },
801 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
802 },
803 {
804 .clkdm = { .name = "iva2_clkdm" },
805 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
806 },
807 {
808 .clkdm = { .name = NULL },
809 }
810};
811
812static struct clockdomain *clockdomains_omap2[] __initdata = {
813 &wkup_clkdm,
814 &cm_clkdm,
815 &prm_clkdm,
816
817#ifdef CONFIG_SOC_OMAP2420
818 &mpu_2420_clkdm,
819 &iva1_2420_clkdm,
820 &dsp_2420_clkdm,
821 &gfx_2420_clkdm,
822 &core_l3_2420_clkdm,
823 &core_l4_2420_clkdm,
824 &dss_2420_clkdm,
825#endif
826
827#ifdef CONFIG_SOC_OMAP2430
828 &mpu_2430_clkdm,
829 &mdm_clkdm,
830 &dsp_2430_clkdm,
831 &gfx_2430_clkdm,
832 &core_l3_2430_clkdm,
833 &core_l4_2430_clkdm,
834 &dss_2430_clkdm,
835#endif
836
837#ifdef CONFIG_ARCH_OMAP3
838 &mpu_3xxx_clkdm,
839 &neon_clkdm,
840 &iva2_clkdm,
841 &gfx_3430es1_clkdm,
842 &sgx_clkdm,
843 &d2d_clkdm,
844 &core_l3_3xxx_clkdm,
845 &core_l4_3xxx_clkdm,
846 &dss_3xxx_clkdm,
847 &cam_clkdm,
848 &usbhost_clkdm,
849 &per_clkdm,
850 &emu_clkdm,
851 &dpll1_clkdm,
852 &dpll2_clkdm,
853 &dpll3_clkdm,
854 &dpll4_clkdm,
855 &dpll5_clkdm,
856#endif
857 NULL,
858};
859
860void __init omap2xxx_clockdomains_init(void)
861{
862 clkdm_init(clockdomains_omap2, clkdm_autodeps, &omap2_clkdm_operations);
863}
864
865void __init omap3xxx_clockdomains_init(void)
866{
867 clkdm_init(clockdomains_omap2, clkdm_autodeps, &omap3_clkdm_operations);
868}
diff --git a/arch/arm/mach-omap2/clockdomains3xxx_data.c b/arch/arm/mach-omap2/clockdomains3xxx_data.c
new file mode 100644
index 000000000000..b84e138d99c8
--- /dev/null
+++ b/arch/arm/mach-omap2/clockdomains3xxx_data.c
@@ -0,0 +1,398 @@
1/*
2 * OMAP3xxx clockdomains
3 *
4 * Copyright (C) 2008-2011 Texas Instruments, Inc.
5 * Copyright (C) 2008-2010 Nokia Corporation
6 *
7 * Paul Walmsley, Jouni Högander
8 *
9 * This file contains clockdomains and clockdomain wakeup/sleep
10 * dependencies for the OMAP3xxx chips. Some notes:
11 *
12 * A useful validation rule for struct clockdomain: Any clockdomain
13 * referenced by a wkdep_srcs or sleepdep_srcs array must have a
14 * dep_bit assigned. So wkdep_srcs/sleepdep_srcs are really just
15 * software-controllable dependencies. Non-software-controllable
16 * dependencies do exist, but they are not encoded below (yet).
17 *
18 * The overly-specific dep_bit names are due to a bit name collision
19 * with CM_FCLKEN_{DSP,IVA2}. The DSP/IVA2 PM_WKDEP and CM_SLEEPDEP shift
20 * value are the same for all powerdomains: 2
21 *
22 * XXX should dep_bit be a mask, so we can test to see if it is 0 as a
23 * sanity check?
24 * XXX encode hardware fixed wakeup dependencies -- esp. for 3430 CORE
25 */
26
27/*
28 * To-Do List
29 * -> Port the Sleep/Wakeup dependencies for the domains
30 * from the Power domain framework
31 */
32
33#include <linux/kernel.h>
34#include <linux/io.h>
35
36#include "clockdomain.h"
37#include "prm2xxx_3xxx.h"
38#include "cm2xxx_3xxx.h"
39#include "cm-regbits-34xx.h"
40#include "prm-regbits-34xx.h"
41
42/*
43 * Clockdomain dependencies for wkdeps/sleepdeps
44 *
45 * XXX Hardware dependencies (e.g., dependencies that cannot be
46 * changed in software) are not included here yet, but should be.
47 */
48
49/* OMAP3-specific possible dependencies */
50
51/*
52 * 3430ES1 PM_WKDEP_GFX: adds IVA2, removes CORE
53 * 3430ES2 PM_WKDEP_SGX: adds IVA2, removes CORE
54 */
55static struct clkdm_dep gfx_sgx_3xxx_wkdeps[] = {
56 { .clkdm_name = "iva2_clkdm", },
57 { .clkdm_name = "mpu_clkdm", },
58 { .clkdm_name = "wkup_clkdm", },
59 { NULL },
60};
61
62/* 3430: PM_WKDEP_PER: CORE, IVA2, MPU, WKUP */
63static struct clkdm_dep per_wkdeps[] = {
64 { .clkdm_name = "core_l3_clkdm" },
65 { .clkdm_name = "core_l4_clkdm" },
66 { .clkdm_name = "iva2_clkdm" },
67 { .clkdm_name = "mpu_clkdm" },
68 { .clkdm_name = "wkup_clkdm" },
69 { NULL },
70};
71
72/* 3430ES2: PM_WKDEP_USBHOST: CORE, IVA2, MPU, WKUP */
73static struct clkdm_dep usbhost_wkdeps[] = {
74 { .clkdm_name = "core_l3_clkdm" },
75 { .clkdm_name = "core_l4_clkdm" },
76 { .clkdm_name = "iva2_clkdm" },
77 { .clkdm_name = "mpu_clkdm" },
78 { .clkdm_name = "wkup_clkdm" },
79 { NULL },
80};
81
82/* 3430 PM_WKDEP_MPU: CORE, IVA2, DSS, PER */
83static struct clkdm_dep mpu_3xxx_wkdeps[] = {
84 { .clkdm_name = "core_l3_clkdm" },
85 { .clkdm_name = "core_l4_clkdm" },
86 { .clkdm_name = "iva2_clkdm" },
87 { .clkdm_name = "dss_clkdm" },
88 { .clkdm_name = "per_clkdm" },
89 { NULL },
90};
91
92/* 3430 PM_WKDEP_IVA2: CORE, MPU, WKUP, DSS, PER */
93static struct clkdm_dep iva2_wkdeps[] = {
94 { .clkdm_name = "core_l3_clkdm" },
95 { .clkdm_name = "core_l4_clkdm" },
96 { .clkdm_name = "mpu_clkdm" },
97 { .clkdm_name = "wkup_clkdm" },
98 { .clkdm_name = "dss_clkdm" },
99 { .clkdm_name = "per_clkdm" },
100 { NULL },
101};
102
103/* 3430 PM_WKDEP_CAM: IVA2, MPU, WKUP */
104static struct clkdm_dep cam_wkdeps[] = {
105 { .clkdm_name = "iva2_clkdm" },
106 { .clkdm_name = "mpu_clkdm" },
107 { .clkdm_name = "wkup_clkdm" },
108 { NULL },
109};
110
111/* 3430 PM_WKDEP_DSS: IVA2, MPU, WKUP */
112static struct clkdm_dep dss_wkdeps[] = {
113 { .clkdm_name = "iva2_clkdm" },
114 { .clkdm_name = "mpu_clkdm" },
115 { .clkdm_name = "wkup_clkdm" },
116 { NULL },
117};
118
119/* 3430: PM_WKDEP_NEON: MPU */
120static struct clkdm_dep neon_wkdeps[] = {
121 { .clkdm_name = "mpu_clkdm" },
122 { NULL },
123};
124
125/* Sleep dependency source arrays for OMAP3-specific clkdms */
126
127/* 3430: CM_SLEEPDEP_DSS: MPU, IVA */
128static struct clkdm_dep dss_sleepdeps[] = {
129 { .clkdm_name = "mpu_clkdm" },
130 { .clkdm_name = "iva2_clkdm" },
131 { NULL },
132};
133
134/* 3430: CM_SLEEPDEP_PER: MPU, IVA */
135static struct clkdm_dep per_sleepdeps[] = {
136 { .clkdm_name = "mpu_clkdm" },
137 { .clkdm_name = "iva2_clkdm" },
138 { NULL },
139};
140
141/* 3430ES2: CM_SLEEPDEP_USBHOST: MPU, IVA */
142static struct clkdm_dep usbhost_sleepdeps[] = {
143 { .clkdm_name = "mpu_clkdm" },
144 { .clkdm_name = "iva2_clkdm" },
145 { NULL },
146};
147
148/* 3430: CM_SLEEPDEP_CAM: MPU */
149static struct clkdm_dep cam_sleepdeps[] = {
150 { .clkdm_name = "mpu_clkdm" },
151 { NULL },
152};
153
154/*
155 * 3430ES1: CM_SLEEPDEP_GFX: MPU
156 * 3430ES2: CM_SLEEPDEP_SGX: MPU
157 * These can share data since they will never be present simultaneously
158 * on the same device.
159 */
160static struct clkdm_dep gfx_sgx_sleepdeps[] = {
161 { .clkdm_name = "mpu_clkdm" },
162 { NULL },
163};
164
165/*
166 * OMAP3 clockdomains
167 */
168
169static struct clockdomain mpu_3xxx_clkdm = {
170 .name = "mpu_clkdm",
171 .pwrdm = { .name = "mpu_pwrdm" },
172 .flags = CLKDM_CAN_HWSUP | CLKDM_CAN_FORCE_WAKEUP,
173 .dep_bit = OMAP3430_EN_MPU_SHIFT,
174 .wkdep_srcs = mpu_3xxx_wkdeps,
175 .clktrctrl_mask = OMAP3430_CLKTRCTRL_MPU_MASK,
176};
177
178static struct clockdomain neon_clkdm = {
179 .name = "neon_clkdm",
180 .pwrdm = { .name = "neon_pwrdm" },
181 .flags = CLKDM_CAN_HWSUP_SWSUP,
182 .wkdep_srcs = neon_wkdeps,
183 .clktrctrl_mask = OMAP3430_CLKTRCTRL_NEON_MASK,
184};
185
186static struct clockdomain iva2_clkdm = {
187 .name = "iva2_clkdm",
188 .pwrdm = { .name = "iva2_pwrdm" },
189 .flags = CLKDM_CAN_HWSUP_SWSUP,
190 .dep_bit = OMAP3430_PM_WKDEP_MPU_EN_IVA2_SHIFT,
191 .wkdep_srcs = iva2_wkdeps,
192 .clktrctrl_mask = OMAP3430_CLKTRCTRL_IVA2_MASK,
193};
194
195static struct clockdomain gfx_3430es1_clkdm = {
196 .name = "gfx_clkdm",
197 .pwrdm = { .name = "gfx_pwrdm" },
198 .flags = CLKDM_CAN_HWSUP_SWSUP,
199 .wkdep_srcs = gfx_sgx_3xxx_wkdeps,
200 .sleepdep_srcs = gfx_sgx_sleepdeps,
201 .clktrctrl_mask = OMAP3430ES1_CLKTRCTRL_GFX_MASK,
202};
203
204static struct clockdomain sgx_clkdm = {
205 .name = "sgx_clkdm",
206 .pwrdm = { .name = "sgx_pwrdm" },
207 .flags = CLKDM_CAN_HWSUP_SWSUP,
208 .wkdep_srcs = gfx_sgx_3xxx_wkdeps,
209 .sleepdep_srcs = gfx_sgx_sleepdeps,
210 .clktrctrl_mask = OMAP3430ES2_CLKTRCTRL_SGX_MASK,
211};
212
213/*
214 * The die-to-die clockdomain was documented in the 34xx ES1 TRM, but
215 * then that information was removed from the 34xx ES2+ TRM. It is
216 * unclear whether the core is still there, but the clockdomain logic
217 * is there, and must be programmed to an appropriate state if the
218 * CORE clockdomain is to become inactive.
219 */
220static struct clockdomain d2d_clkdm = {
221 .name = "d2d_clkdm",
222 .pwrdm = { .name = "core_pwrdm" },
223 .flags = CLKDM_CAN_HWSUP_SWSUP,
224 .clktrctrl_mask = OMAP3430ES1_CLKTRCTRL_D2D_MASK,
225};
226
227/*
228 * XXX add usecounting for clkdm dependencies, otherwise the presence
229 * of a single dep bit for core_l3_3xxx_clkdm and core_l4_3xxx_clkdm
230 * could cause trouble
231 */
232static struct clockdomain core_l3_3xxx_clkdm = {
233 .name = "core_l3_clkdm",
234 .pwrdm = { .name = "core_pwrdm" },
235 .flags = CLKDM_CAN_HWSUP,
236 .dep_bit = OMAP3430_EN_CORE_SHIFT,
237 .clktrctrl_mask = OMAP3430_CLKTRCTRL_L3_MASK,
238};
239
240/*
241 * XXX add usecounting for clkdm dependencies, otherwise the presence
242 * of a single dep bit for core_l3_3xxx_clkdm and core_l4_3xxx_clkdm
243 * could cause trouble
244 */
245static struct clockdomain core_l4_3xxx_clkdm = {
246 .name = "core_l4_clkdm",
247 .pwrdm = { .name = "core_pwrdm" },
248 .flags = CLKDM_CAN_HWSUP,
249 .dep_bit = OMAP3430_EN_CORE_SHIFT,
250 .clktrctrl_mask = OMAP3430_CLKTRCTRL_L4_MASK,
251};
252
253/* Another case of bit name collisions between several registers: EN_DSS */
254static struct clockdomain dss_3xxx_clkdm = {
255 .name = "dss_clkdm",
256 .pwrdm = { .name = "dss_pwrdm" },
257 .flags = CLKDM_CAN_HWSUP_SWSUP,
258 .dep_bit = OMAP3430_PM_WKDEP_MPU_EN_DSS_SHIFT,
259 .wkdep_srcs = dss_wkdeps,
260 .sleepdep_srcs = dss_sleepdeps,
261 .clktrctrl_mask = OMAP3430_CLKTRCTRL_DSS_MASK,
262};
263
264static struct clockdomain cam_clkdm = {
265 .name = "cam_clkdm",
266 .pwrdm = { .name = "cam_pwrdm" },
267 .flags = CLKDM_CAN_HWSUP_SWSUP,
268 .wkdep_srcs = cam_wkdeps,
269 .sleepdep_srcs = cam_sleepdeps,
270 .clktrctrl_mask = OMAP3430_CLKTRCTRL_CAM_MASK,
271};
272
273static struct clockdomain usbhost_clkdm = {
274 .name = "usbhost_clkdm",
275 .pwrdm = { .name = "usbhost_pwrdm" },
276 .flags = CLKDM_CAN_HWSUP_SWSUP,
277 .wkdep_srcs = usbhost_wkdeps,
278 .sleepdep_srcs = usbhost_sleepdeps,
279 .clktrctrl_mask = OMAP3430ES2_CLKTRCTRL_USBHOST_MASK,
280};
281
282static struct clockdomain per_clkdm = {
283 .name = "per_clkdm",
284 .pwrdm = { .name = "per_pwrdm" },
285 .flags = CLKDM_CAN_HWSUP_SWSUP,
286 .dep_bit = OMAP3430_EN_PER_SHIFT,
287 .wkdep_srcs = per_wkdeps,
288 .sleepdep_srcs = per_sleepdeps,
289 .clktrctrl_mask = OMAP3430_CLKTRCTRL_PER_MASK,
290};
291
292/*
293 * Disable hw supervised mode for emu_clkdm, because emu_pwrdm is
294 * switched of even if sdti is in use
295 */
296static struct clockdomain emu_clkdm = {
297 .name = "emu_clkdm",
298 .pwrdm = { .name = "emu_pwrdm" },
299 .flags = /* CLKDM_CAN_ENABLE_AUTO | */CLKDM_CAN_SWSUP,
300 .clktrctrl_mask = OMAP3430_CLKTRCTRL_EMU_MASK,
301};
302
303static struct clockdomain dpll1_clkdm = {
304 .name = "dpll1_clkdm",
305 .pwrdm = { .name = "dpll1_pwrdm" },
306};
307
308static struct clockdomain dpll2_clkdm = {
309 .name = "dpll2_clkdm",
310 .pwrdm = { .name = "dpll2_pwrdm" },
311};
312
313static struct clockdomain dpll3_clkdm = {
314 .name = "dpll3_clkdm",
315 .pwrdm = { .name = "dpll3_pwrdm" },
316};
317
318static struct clockdomain dpll4_clkdm = {
319 .name = "dpll4_clkdm",
320 .pwrdm = { .name = "dpll4_pwrdm" },
321};
322
323static struct clockdomain dpll5_clkdm = {
324 .name = "dpll5_clkdm",
325 .pwrdm = { .name = "dpll5_pwrdm" },
326};
327
328/*
329 * Clockdomain hwsup dependencies
330 */
331
332static struct clkdm_autodep clkdm_autodeps[] = {
333 {
334 .clkdm = { .name = "mpu_clkdm" },
335 },
336 {
337 .clkdm = { .name = "iva2_clkdm" },
338 },
339 {
340 .clkdm = { .name = NULL },
341 }
342};
343
344/*
345 *
346 */
347
348static struct clockdomain *clockdomains_omap3430_common[] __initdata = {
349 &wkup_common_clkdm,
350 &cm_common_clkdm,
351 &prm_common_clkdm,
352 &mpu_3xxx_clkdm,
353 &neon_clkdm,
354 &iva2_clkdm,
355 &d2d_clkdm,
356 &core_l3_3xxx_clkdm,
357 &core_l4_3xxx_clkdm,
358 &dss_3xxx_clkdm,
359 &cam_clkdm,
360 &per_clkdm,
361 &emu_clkdm,
362 &dpll1_clkdm,
363 &dpll2_clkdm,
364 &dpll3_clkdm,
365 &dpll4_clkdm,
366 NULL
367};
368
369static struct clockdomain *clockdomains_omap3430es1[] __initdata = {
370 &gfx_3430es1_clkdm,
371 NULL,
372};
373
374static struct clockdomain *clockdomains_omap3430es2plus[] __initdata = {
375 &sgx_clkdm,
376 &dpll5_clkdm,
377 &usbhost_clkdm,
378 NULL,
379};
380
381void __init omap3xxx_clockdomains_init(void)
382{
383 struct clockdomain **sc;
384
385 if (!cpu_is_omap34xx())
386 return;
387
388 clkdm_register_platform_funcs(&omap3_clkdm_operations);
389 clkdm_register_clkdms(clockdomains_omap3430_common);
390
391 sc = (omap_rev() == OMAP3430_REV_ES1_0) ? clockdomains_omap3430es1 :
392 clockdomains_omap3430es2plus;
393
394 clkdm_register_clkdms(sc);
395
396 clkdm_register_autodeps(clkdm_autodeps);
397 clkdm_complete_init();
398}
diff --git a/arch/arm/mach-omap2/clockdomains44xx_data.c b/arch/arm/mach-omap2/clockdomains44xx_data.c
index dccc651fa0d0..9299ac291d28 100644
--- a/arch/arm/mach-omap2/clockdomains44xx_data.c
+++ b/arch/arm/mach-omap2/clockdomains44xx_data.c
@@ -34,350 +34,122 @@
34/* Static Dependencies for OMAP4 Clock Domains */ 34/* Static Dependencies for OMAP4 Clock Domains */
35 35
36static struct clkdm_dep d2d_wkup_sleep_deps[] = { 36static struct clkdm_dep d2d_wkup_sleep_deps[] = {
37 { 37 { .clkdm_name = "abe_clkdm" },
38 .clkdm_name = "abe_clkdm", 38 { .clkdm_name = "ivahd_clkdm" },
39 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) 39 { .clkdm_name = "l3_1_clkdm" },
40 }, 40 { .clkdm_name = "l3_2_clkdm" },
41 { 41 { .clkdm_name = "l3_emif_clkdm" },
42 .clkdm_name = "ivahd_clkdm", 42 { .clkdm_name = "l3_init_clkdm" },
43 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) 43 { .clkdm_name = "l4_cfg_clkdm" },
44 }, 44 { .clkdm_name = "l4_per_clkdm" },
45 {
46 .clkdm_name = "l3_1_clkdm",
47 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
48 },
49 {
50 .clkdm_name = "l3_2_clkdm",
51 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
52 },
53 {
54 .clkdm_name = "l3_emif_clkdm",
55 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
56 },
57 {
58 .clkdm_name = "l3_init_clkdm",
59 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
60 },
61 {
62 .clkdm_name = "l4_cfg_clkdm",
63 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
64 },
65 {
66 .clkdm_name = "l4_per_clkdm",
67 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
68 },
69 { NULL }, 45 { NULL },
70}; 46};
71 47
72static struct clkdm_dep ducati_wkup_sleep_deps[] = { 48static struct clkdm_dep ducati_wkup_sleep_deps[] = {
73 { 49 { .clkdm_name = "abe_clkdm" },
74 .clkdm_name = "abe_clkdm", 50 { .clkdm_name = "ivahd_clkdm" },
75 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) 51 { .clkdm_name = "l3_1_clkdm" },
76 }, 52 { .clkdm_name = "l3_2_clkdm" },
77 { 53 { .clkdm_name = "l3_dss_clkdm" },
78 .clkdm_name = "ivahd_clkdm", 54 { .clkdm_name = "l3_emif_clkdm" },
79 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) 55 { .clkdm_name = "l3_gfx_clkdm" },
80 }, 56 { .clkdm_name = "l3_init_clkdm" },
81 { 57 { .clkdm_name = "l4_cfg_clkdm" },
82 .clkdm_name = "l3_1_clkdm", 58 { .clkdm_name = "l4_per_clkdm" },
83 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) 59 { .clkdm_name = "l4_secure_clkdm" },
84 }, 60 { .clkdm_name = "l4_wkup_clkdm" },
85 { 61 { .clkdm_name = "tesla_clkdm" },
86 .clkdm_name = "l3_2_clkdm",
87 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
88 },
89 {
90 .clkdm_name = "l3_dss_clkdm",
91 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
92 },
93 {
94 .clkdm_name = "l3_emif_clkdm",
95 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
96 },
97 {
98 .clkdm_name = "l3_gfx_clkdm",
99 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
100 },
101 {
102 .clkdm_name = "l3_init_clkdm",
103 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
104 },
105 {
106 .clkdm_name = "l4_cfg_clkdm",
107 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
108 },
109 {
110 .clkdm_name = "l4_per_clkdm",
111 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
112 },
113 {
114 .clkdm_name = "l4_secure_clkdm",
115 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
116 },
117 {
118 .clkdm_name = "l4_wkup_clkdm",
119 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
120 },
121 {
122 .clkdm_name = "tesla_clkdm",
123 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
124 },
125 { NULL }, 62 { NULL },
126}; 63};
127 64
128static struct clkdm_dep iss_wkup_sleep_deps[] = { 65static struct clkdm_dep iss_wkup_sleep_deps[] = {
129 { 66 { .clkdm_name = "ivahd_clkdm" },
130 .clkdm_name = "ivahd_clkdm", 67 { .clkdm_name = "l3_1_clkdm" },
131 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) 68 { .clkdm_name = "l3_emif_clkdm" },
132 },
133 {
134 .clkdm_name = "l3_1_clkdm",
135 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
136 },
137 {
138 .clkdm_name = "l3_emif_clkdm",
139 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
140 },
141 { NULL }, 69 { NULL },
142}; 70};
143 71
144static struct clkdm_dep ivahd_wkup_sleep_deps[] = { 72static struct clkdm_dep ivahd_wkup_sleep_deps[] = {
145 { 73 { .clkdm_name = "l3_1_clkdm" },
146 .clkdm_name = "l3_1_clkdm", 74 { .clkdm_name = "l3_emif_clkdm" },
147 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
148 },
149 {
150 .clkdm_name = "l3_emif_clkdm",
151 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
152 },
153 { NULL }, 75 { NULL },
154}; 76};
155 77
156static struct clkdm_dep l3_dma_wkup_sleep_deps[] = { 78static struct clkdm_dep l3_dma_wkup_sleep_deps[] = {
157 { 79 { .clkdm_name = "abe_clkdm" },
158 .clkdm_name = "abe_clkdm", 80 { .clkdm_name = "ducati_clkdm" },
159 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) 81 { .clkdm_name = "ivahd_clkdm" },
160 }, 82 { .clkdm_name = "l3_1_clkdm" },
161 { 83 { .clkdm_name = "l3_dss_clkdm" },
162 .clkdm_name = "ducati_clkdm", 84 { .clkdm_name = "l3_emif_clkdm" },
163 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) 85 { .clkdm_name = "l3_init_clkdm" },
164 }, 86 { .clkdm_name = "l4_cfg_clkdm" },
165 { 87 { .clkdm_name = "l4_per_clkdm" },
166 .clkdm_name = "ivahd_clkdm", 88 { .clkdm_name = "l4_secure_clkdm" },
167 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) 89 { .clkdm_name = "l4_wkup_clkdm" },
168 },
169 {
170 .clkdm_name = "l3_1_clkdm",
171 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
172 },
173 {
174 .clkdm_name = "l3_dss_clkdm",
175 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
176 },
177 {
178 .clkdm_name = "l3_emif_clkdm",
179 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
180 },
181 {
182 .clkdm_name = "l3_init_clkdm",
183 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
184 },
185 {
186 .clkdm_name = "l4_cfg_clkdm",
187 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
188 },
189 {
190 .clkdm_name = "l4_per_clkdm",
191 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
192 },
193 {
194 .clkdm_name = "l4_secure_clkdm",
195 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
196 },
197 {
198 .clkdm_name = "l4_wkup_clkdm",
199 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
200 },
201 { NULL }, 90 { NULL },
202}; 91};
203 92
204static struct clkdm_dep l3_dss_wkup_sleep_deps[] = { 93static struct clkdm_dep l3_dss_wkup_sleep_deps[] = {
205 { 94 { .clkdm_name = "ivahd_clkdm" },
206 .clkdm_name = "ivahd_clkdm", 95 { .clkdm_name = "l3_2_clkdm" },
207 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) 96 { .clkdm_name = "l3_emif_clkdm" },
208 },
209 {
210 .clkdm_name = "l3_2_clkdm",
211 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
212 },
213 {
214 .clkdm_name = "l3_emif_clkdm",
215 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
216 },
217 { NULL }, 97 { NULL },
218}; 98};
219 99
220static struct clkdm_dep l3_gfx_wkup_sleep_deps[] = { 100static struct clkdm_dep l3_gfx_wkup_sleep_deps[] = {
221 { 101 { .clkdm_name = "ivahd_clkdm" },
222 .clkdm_name = "ivahd_clkdm", 102 { .clkdm_name = "l3_1_clkdm" },
223 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) 103 { .clkdm_name = "l3_emif_clkdm" },
224 },
225 {
226 .clkdm_name = "l3_1_clkdm",
227 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
228 },
229 {
230 .clkdm_name = "l3_emif_clkdm",
231 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
232 },
233 { NULL }, 104 { NULL },
234}; 105};
235 106
236static struct clkdm_dep l3_init_wkup_sleep_deps[] = { 107static struct clkdm_dep l3_init_wkup_sleep_deps[] = {
237 { 108 { .clkdm_name = "abe_clkdm" },
238 .clkdm_name = "abe_clkdm", 109 { .clkdm_name = "ivahd_clkdm" },
239 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) 110 { .clkdm_name = "l3_emif_clkdm" },
240 }, 111 { .clkdm_name = "l4_cfg_clkdm" },
241 { 112 { .clkdm_name = "l4_per_clkdm" },
242 .clkdm_name = "ivahd_clkdm", 113 { .clkdm_name = "l4_secure_clkdm" },
243 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) 114 { .clkdm_name = "l4_wkup_clkdm" },
244 },
245 {
246 .clkdm_name = "l3_emif_clkdm",
247 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
248 },
249 {
250 .clkdm_name = "l4_cfg_clkdm",
251 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
252 },
253 {
254 .clkdm_name = "l4_per_clkdm",
255 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
256 },
257 {
258 .clkdm_name = "l4_secure_clkdm",
259 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
260 },
261 {
262 .clkdm_name = "l4_wkup_clkdm",
263 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
264 },
265 { NULL }, 115 { NULL },
266}; 116};
267 117
268static struct clkdm_dep l4_secure_wkup_sleep_deps[] = { 118static struct clkdm_dep l4_secure_wkup_sleep_deps[] = {
269 { 119 { .clkdm_name = "l3_1_clkdm" },
270 .clkdm_name = "l3_1_clkdm", 120 { .clkdm_name = "l3_emif_clkdm" },
271 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) 121 { .clkdm_name = "l4_per_clkdm" },
272 },
273 {
274 .clkdm_name = "l3_emif_clkdm",
275 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
276 },
277 {
278 .clkdm_name = "l4_per_clkdm",
279 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
280 },
281 { NULL }, 122 { NULL },
282}; 123};
283 124
284static struct clkdm_dep mpu_wkup_sleep_deps[] = { 125static struct clkdm_dep mpu_wkup_sleep_deps[] = {
285 { 126 { .clkdm_name = "abe_clkdm" },
286 .clkdm_name = "abe_clkdm", 127 { .clkdm_name = "ducati_clkdm" },
287 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) 128 { .clkdm_name = "ivahd_clkdm" },
288 }, 129 { .clkdm_name = "l3_1_clkdm" },
289 { 130 { .clkdm_name = "l3_2_clkdm" },
290 .clkdm_name = "ducati_clkdm", 131 { .clkdm_name = "l3_dss_clkdm" },
291 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) 132 { .clkdm_name = "l3_emif_clkdm" },
292 }, 133 { .clkdm_name = "l3_gfx_clkdm" },
293 { 134 { .clkdm_name = "l3_init_clkdm" },
294 .clkdm_name = "ivahd_clkdm", 135 { .clkdm_name = "l4_cfg_clkdm" },
295 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) 136 { .clkdm_name = "l4_per_clkdm" },
296 }, 137 { .clkdm_name = "l4_secure_clkdm" },
297 { 138 { .clkdm_name = "l4_wkup_clkdm" },
298 .clkdm_name = "l3_1_clkdm", 139 { .clkdm_name = "tesla_clkdm" },
299 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
300 },
301 {
302 .clkdm_name = "l3_2_clkdm",
303 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
304 },
305 {
306 .clkdm_name = "l3_dss_clkdm",
307 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
308 },
309 {
310 .clkdm_name = "l3_emif_clkdm",
311 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
312 },
313 {
314 .clkdm_name = "l3_gfx_clkdm",
315 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
316 },
317 {
318 .clkdm_name = "l3_init_clkdm",
319 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
320 },
321 {
322 .clkdm_name = "l4_cfg_clkdm",
323 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
324 },
325 {
326 .clkdm_name = "l4_per_clkdm",
327 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
328 },
329 {
330 .clkdm_name = "l4_secure_clkdm",
331 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
332 },
333 {
334 .clkdm_name = "l4_wkup_clkdm",
335 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
336 },
337 {
338 .clkdm_name = "tesla_clkdm",
339 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
340 },
341 { NULL }, 140 { NULL },
342}; 141};
343 142
344static struct clkdm_dep tesla_wkup_sleep_deps[] = { 143static struct clkdm_dep tesla_wkup_sleep_deps[] = {
345 { 144 { .clkdm_name = "abe_clkdm" },
346 .clkdm_name = "abe_clkdm", 145 { .clkdm_name = "ivahd_clkdm" },
347 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) 146 { .clkdm_name = "l3_1_clkdm" },
348 }, 147 { .clkdm_name = "l3_2_clkdm" },
349 { 148 { .clkdm_name = "l3_emif_clkdm" },
350 .clkdm_name = "ivahd_clkdm", 149 { .clkdm_name = "l3_init_clkdm" },
351 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) 150 { .clkdm_name = "l4_cfg_clkdm" },
352 }, 151 { .clkdm_name = "l4_per_clkdm" },
353 { 152 { .clkdm_name = "l4_wkup_clkdm" },
354 .clkdm_name = "l3_1_clkdm",
355 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
356 },
357 {
358 .clkdm_name = "l3_2_clkdm",
359 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
360 },
361 {
362 .clkdm_name = "l3_emif_clkdm",
363 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
364 },
365 {
366 .clkdm_name = "l3_init_clkdm",
367 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
368 },
369 {
370 .clkdm_name = "l4_cfg_clkdm",
371 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
372 },
373 {
374 .clkdm_name = "l4_per_clkdm",
375 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
376 },
377 {
378 .clkdm_name = "l4_wkup_clkdm",
379 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
380 },
381 { NULL }, 153 { NULL },
382}; 154};
383 155
@@ -388,7 +160,6 @@ static struct clockdomain l4_cefuse_44xx_clkdm = {
388 .cm_inst = OMAP4430_CM2_CEFUSE_INST, 160 .cm_inst = OMAP4430_CM2_CEFUSE_INST,
389 .clkdm_offs = OMAP4430_CM2_CEFUSE_CEFUSE_CDOFFS, 161 .clkdm_offs = OMAP4430_CM2_CEFUSE_CEFUSE_CDOFFS,
390 .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP, 162 .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
391 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
392}; 163};
393 164
394static struct clockdomain l4_cfg_44xx_clkdm = { 165static struct clockdomain l4_cfg_44xx_clkdm = {
@@ -399,7 +170,6 @@ static struct clockdomain l4_cfg_44xx_clkdm = {
399 .clkdm_offs = OMAP4430_CM2_CORE_L4CFG_CDOFFS, 170 .clkdm_offs = OMAP4430_CM2_CORE_L4CFG_CDOFFS,
400 .dep_bit = OMAP4430_L4CFG_STATDEP_SHIFT, 171 .dep_bit = OMAP4430_L4CFG_STATDEP_SHIFT,
401 .flags = CLKDM_CAN_HWSUP, 172 .flags = CLKDM_CAN_HWSUP,
402 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
403}; 173};
404 174
405static struct clockdomain tesla_44xx_clkdm = { 175static struct clockdomain tesla_44xx_clkdm = {
@@ -412,7 +182,6 @@ static struct clockdomain tesla_44xx_clkdm = {
412 .wkdep_srcs = tesla_wkup_sleep_deps, 182 .wkdep_srcs = tesla_wkup_sleep_deps,
413 .sleepdep_srcs = tesla_wkup_sleep_deps, 183 .sleepdep_srcs = tesla_wkup_sleep_deps,
414 .flags = CLKDM_CAN_HWSUP_SWSUP, 184 .flags = CLKDM_CAN_HWSUP_SWSUP,
415 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
416}; 185};
417 186
418static struct clockdomain l3_gfx_44xx_clkdm = { 187static struct clockdomain l3_gfx_44xx_clkdm = {
@@ -425,7 +194,6 @@ static struct clockdomain l3_gfx_44xx_clkdm = {
425 .wkdep_srcs = l3_gfx_wkup_sleep_deps, 194 .wkdep_srcs = l3_gfx_wkup_sleep_deps,
426 .sleepdep_srcs = l3_gfx_wkup_sleep_deps, 195 .sleepdep_srcs = l3_gfx_wkup_sleep_deps,
427 .flags = CLKDM_CAN_HWSUP_SWSUP, 196 .flags = CLKDM_CAN_HWSUP_SWSUP,
428 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
429}; 197};
430 198
431static struct clockdomain ivahd_44xx_clkdm = { 199static struct clockdomain ivahd_44xx_clkdm = {
@@ -438,7 +206,6 @@ static struct clockdomain ivahd_44xx_clkdm = {
438 .wkdep_srcs = ivahd_wkup_sleep_deps, 206 .wkdep_srcs = ivahd_wkup_sleep_deps,
439 .sleepdep_srcs = ivahd_wkup_sleep_deps, 207 .sleepdep_srcs = ivahd_wkup_sleep_deps,
440 .flags = CLKDM_CAN_HWSUP_SWSUP, 208 .flags = CLKDM_CAN_HWSUP_SWSUP,
441 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
442}; 209};
443 210
444static struct clockdomain l4_secure_44xx_clkdm = { 211static struct clockdomain l4_secure_44xx_clkdm = {
@@ -451,7 +218,6 @@ static struct clockdomain l4_secure_44xx_clkdm = {
451 .wkdep_srcs = l4_secure_wkup_sleep_deps, 218 .wkdep_srcs = l4_secure_wkup_sleep_deps,
452 .sleepdep_srcs = l4_secure_wkup_sleep_deps, 219 .sleepdep_srcs = l4_secure_wkup_sleep_deps,
453 .flags = CLKDM_CAN_HWSUP_SWSUP, 220 .flags = CLKDM_CAN_HWSUP_SWSUP,
454 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
455}; 221};
456 222
457static struct clockdomain l4_per_44xx_clkdm = { 223static struct clockdomain l4_per_44xx_clkdm = {
@@ -462,7 +228,6 @@ static struct clockdomain l4_per_44xx_clkdm = {
462 .clkdm_offs = OMAP4430_CM2_L4PER_L4PER_CDOFFS, 228 .clkdm_offs = OMAP4430_CM2_L4PER_L4PER_CDOFFS,
463 .dep_bit = OMAP4430_L4PER_STATDEP_SHIFT, 229 .dep_bit = OMAP4430_L4PER_STATDEP_SHIFT,
464 .flags = CLKDM_CAN_HWSUP_SWSUP, 230 .flags = CLKDM_CAN_HWSUP_SWSUP,
465 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
466}; 231};
467 232
468static struct clockdomain abe_44xx_clkdm = { 233static struct clockdomain abe_44xx_clkdm = {
@@ -473,7 +238,6 @@ static struct clockdomain abe_44xx_clkdm = {
473 .clkdm_offs = OMAP4430_CM1_ABE_ABE_CDOFFS, 238 .clkdm_offs = OMAP4430_CM1_ABE_ABE_CDOFFS,
474 .dep_bit = OMAP4430_ABE_STATDEP_SHIFT, 239 .dep_bit = OMAP4430_ABE_STATDEP_SHIFT,
475 .flags = CLKDM_CAN_HWSUP_SWSUP, 240 .flags = CLKDM_CAN_HWSUP_SWSUP,
476 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
477}; 241};
478 242
479static struct clockdomain l3_instr_44xx_clkdm = { 243static struct clockdomain l3_instr_44xx_clkdm = {
@@ -482,7 +246,6 @@ static struct clockdomain l3_instr_44xx_clkdm = {
482 .prcm_partition = OMAP4430_CM2_PARTITION, 246 .prcm_partition = OMAP4430_CM2_PARTITION,
483 .cm_inst = OMAP4430_CM2_CORE_INST, 247 .cm_inst = OMAP4430_CM2_CORE_INST,
484 .clkdm_offs = OMAP4430_CM2_CORE_L3INSTR_CDOFFS, 248 .clkdm_offs = OMAP4430_CM2_CORE_L3INSTR_CDOFFS,
485 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
486}; 249};
487 250
488static struct clockdomain l3_init_44xx_clkdm = { 251static struct clockdomain l3_init_44xx_clkdm = {
@@ -495,7 +258,6 @@ static struct clockdomain l3_init_44xx_clkdm = {
495 .wkdep_srcs = l3_init_wkup_sleep_deps, 258 .wkdep_srcs = l3_init_wkup_sleep_deps,
496 .sleepdep_srcs = l3_init_wkup_sleep_deps, 259 .sleepdep_srcs = l3_init_wkup_sleep_deps,
497 .flags = CLKDM_CAN_HWSUP_SWSUP, 260 .flags = CLKDM_CAN_HWSUP_SWSUP,
498 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
499}; 261};
500 262
501static struct clockdomain d2d_44xx_clkdm = { 263static struct clockdomain d2d_44xx_clkdm = {
@@ -507,7 +269,6 @@ static struct clockdomain d2d_44xx_clkdm = {
507 .wkdep_srcs = d2d_wkup_sleep_deps, 269 .wkdep_srcs = d2d_wkup_sleep_deps,
508 .sleepdep_srcs = d2d_wkup_sleep_deps, 270 .sleepdep_srcs = d2d_wkup_sleep_deps,
509 .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP, 271 .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
510 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
511}; 272};
512 273
513static struct clockdomain mpu0_44xx_clkdm = { 274static struct clockdomain mpu0_44xx_clkdm = {
@@ -517,7 +278,6 @@ static struct clockdomain mpu0_44xx_clkdm = {
517 .cm_inst = OMAP4430_PRCM_MPU_CPU0_INST, 278 .cm_inst = OMAP4430_PRCM_MPU_CPU0_INST,
518 .clkdm_offs = OMAP4430_PRCM_MPU_CPU0_CPU0_CDOFFS, 279 .clkdm_offs = OMAP4430_PRCM_MPU_CPU0_CPU0_CDOFFS,
519 .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP, 280 .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
520 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
521}; 281};
522 282
523static struct clockdomain mpu1_44xx_clkdm = { 283static struct clockdomain mpu1_44xx_clkdm = {
@@ -527,7 +287,6 @@ static struct clockdomain mpu1_44xx_clkdm = {
527 .cm_inst = OMAP4430_PRCM_MPU_CPU1_INST, 287 .cm_inst = OMAP4430_PRCM_MPU_CPU1_INST,
528 .clkdm_offs = OMAP4430_PRCM_MPU_CPU1_CPU1_CDOFFS, 288 .clkdm_offs = OMAP4430_PRCM_MPU_CPU1_CPU1_CDOFFS,
529 .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP, 289 .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
530 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
531}; 290};
532 291
533static struct clockdomain l3_emif_44xx_clkdm = { 292static struct clockdomain l3_emif_44xx_clkdm = {
@@ -538,7 +297,6 @@ static struct clockdomain l3_emif_44xx_clkdm = {
538 .clkdm_offs = OMAP4430_CM2_CORE_MEMIF_CDOFFS, 297 .clkdm_offs = OMAP4430_CM2_CORE_MEMIF_CDOFFS,
539 .dep_bit = OMAP4430_MEMIF_STATDEP_SHIFT, 298 .dep_bit = OMAP4430_MEMIF_STATDEP_SHIFT,
540 .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP, 299 .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
541 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
542}; 300};
543 301
544static struct clockdomain l4_ao_44xx_clkdm = { 302static struct clockdomain l4_ao_44xx_clkdm = {
@@ -548,7 +306,6 @@ static struct clockdomain l4_ao_44xx_clkdm = {
548 .cm_inst = OMAP4430_CM2_ALWAYS_ON_INST, 306 .cm_inst = OMAP4430_CM2_ALWAYS_ON_INST,
549 .clkdm_offs = OMAP4430_CM2_ALWAYS_ON_ALWON_CDOFFS, 307 .clkdm_offs = OMAP4430_CM2_ALWAYS_ON_ALWON_CDOFFS,
550 .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP, 308 .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
551 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
552}; 309};
553 310
554static struct clockdomain ducati_44xx_clkdm = { 311static struct clockdomain ducati_44xx_clkdm = {
@@ -561,7 +318,6 @@ static struct clockdomain ducati_44xx_clkdm = {
561 .wkdep_srcs = ducati_wkup_sleep_deps, 318 .wkdep_srcs = ducati_wkup_sleep_deps,
562 .sleepdep_srcs = ducati_wkup_sleep_deps, 319 .sleepdep_srcs = ducati_wkup_sleep_deps,
563 .flags = CLKDM_CAN_HWSUP_SWSUP, 320 .flags = CLKDM_CAN_HWSUP_SWSUP,
564 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
565}; 321};
566 322
567static struct clockdomain mpu_44xx_clkdm = { 323static struct clockdomain mpu_44xx_clkdm = {
@@ -573,7 +329,6 @@ static struct clockdomain mpu_44xx_clkdm = {
573 .wkdep_srcs = mpu_wkup_sleep_deps, 329 .wkdep_srcs = mpu_wkup_sleep_deps,
574 .sleepdep_srcs = mpu_wkup_sleep_deps, 330 .sleepdep_srcs = mpu_wkup_sleep_deps,
575 .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP, 331 .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
576 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
577}; 332};
578 333
579static struct clockdomain l3_2_44xx_clkdm = { 334static struct clockdomain l3_2_44xx_clkdm = {
@@ -584,7 +339,6 @@ static struct clockdomain l3_2_44xx_clkdm = {
584 .clkdm_offs = OMAP4430_CM2_CORE_L3_2_CDOFFS, 339 .clkdm_offs = OMAP4430_CM2_CORE_L3_2_CDOFFS,
585 .dep_bit = OMAP4430_L3_2_STATDEP_SHIFT, 340 .dep_bit = OMAP4430_L3_2_STATDEP_SHIFT,
586 .flags = CLKDM_CAN_HWSUP, 341 .flags = CLKDM_CAN_HWSUP,
587 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
588}; 342};
589 343
590static struct clockdomain l3_1_44xx_clkdm = { 344static struct clockdomain l3_1_44xx_clkdm = {
@@ -595,7 +349,6 @@ static struct clockdomain l3_1_44xx_clkdm = {
595 .clkdm_offs = OMAP4430_CM2_CORE_L3_1_CDOFFS, 349 .clkdm_offs = OMAP4430_CM2_CORE_L3_1_CDOFFS,
596 .dep_bit = OMAP4430_L3_1_STATDEP_SHIFT, 350 .dep_bit = OMAP4430_L3_1_STATDEP_SHIFT,
597 .flags = CLKDM_CAN_HWSUP, 351 .flags = CLKDM_CAN_HWSUP,
598 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
599}; 352};
600 353
601static struct clockdomain iss_44xx_clkdm = { 354static struct clockdomain iss_44xx_clkdm = {
@@ -607,7 +360,6 @@ static struct clockdomain iss_44xx_clkdm = {
607 .wkdep_srcs = iss_wkup_sleep_deps, 360 .wkdep_srcs = iss_wkup_sleep_deps,
608 .sleepdep_srcs = iss_wkup_sleep_deps, 361 .sleepdep_srcs = iss_wkup_sleep_deps,
609 .flags = CLKDM_CAN_HWSUP_SWSUP, 362 .flags = CLKDM_CAN_HWSUP_SWSUP,
610 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
611}; 363};
612 364
613static struct clockdomain l3_dss_44xx_clkdm = { 365static struct clockdomain l3_dss_44xx_clkdm = {
@@ -620,7 +372,6 @@ static struct clockdomain l3_dss_44xx_clkdm = {
620 .wkdep_srcs = l3_dss_wkup_sleep_deps, 372 .wkdep_srcs = l3_dss_wkup_sleep_deps,
621 .sleepdep_srcs = l3_dss_wkup_sleep_deps, 373 .sleepdep_srcs = l3_dss_wkup_sleep_deps,
622 .flags = CLKDM_CAN_HWSUP_SWSUP, 374 .flags = CLKDM_CAN_HWSUP_SWSUP,
623 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
624}; 375};
625 376
626static struct clockdomain l4_wkup_44xx_clkdm = { 377static struct clockdomain l4_wkup_44xx_clkdm = {
@@ -631,7 +382,6 @@ static struct clockdomain l4_wkup_44xx_clkdm = {
631 .clkdm_offs = OMAP4430_PRM_WKUP_CM_WKUP_CDOFFS, 382 .clkdm_offs = OMAP4430_PRM_WKUP_CM_WKUP_CDOFFS,
632 .dep_bit = OMAP4430_L4WKUP_STATDEP_SHIFT, 383 .dep_bit = OMAP4430_L4WKUP_STATDEP_SHIFT,
633 .flags = CLKDM_CAN_HWSUP, 384 .flags = CLKDM_CAN_HWSUP,
634 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
635}; 385};
636 386
637static struct clockdomain emu_sys_44xx_clkdm = { 387static struct clockdomain emu_sys_44xx_clkdm = {
@@ -641,7 +391,6 @@ static struct clockdomain emu_sys_44xx_clkdm = {
641 .cm_inst = OMAP4430_PRM_EMU_CM_INST, 391 .cm_inst = OMAP4430_PRM_EMU_CM_INST,
642 .clkdm_offs = OMAP4430_PRM_EMU_CM_EMU_CDOFFS, 392 .clkdm_offs = OMAP4430_PRM_EMU_CM_EMU_CDOFFS,
643 .flags = CLKDM_CAN_HWSUP, 393 .flags = CLKDM_CAN_HWSUP,
644 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
645}; 394};
646 395
647static struct clockdomain l3_dma_44xx_clkdm = { 396static struct clockdomain l3_dma_44xx_clkdm = {
@@ -653,7 +402,6 @@ static struct clockdomain l3_dma_44xx_clkdm = {
653 .wkdep_srcs = l3_dma_wkup_sleep_deps, 402 .wkdep_srcs = l3_dma_wkup_sleep_deps,
654 .sleepdep_srcs = l3_dma_wkup_sleep_deps, 403 .sleepdep_srcs = l3_dma_wkup_sleep_deps,
655 .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP, 404 .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
656 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
657}; 405};
658 406
659/* As clockdomains are added or removed above, this list must also be changed */ 407/* As clockdomains are added or removed above, this list must also be changed */
@@ -685,7 +433,10 @@ static struct clockdomain *clockdomains_omap44xx[] __initdata = {
685 NULL 433 NULL
686}; 434};
687 435
436
688void __init omap44xx_clockdomains_init(void) 437void __init omap44xx_clockdomains_init(void)
689{ 438{
690 clkdm_init(clockdomains_omap44xx, NULL, &omap4_clkdm_operations); 439 clkdm_register_platform_funcs(&omap4_clkdm_operations);
440 clkdm_register_clkdms(clockdomains_omap44xx);
441 clkdm_complete_init();
691} 442}
diff --git a/arch/arm/mach-omap2/common.c b/arch/arm/mach-omap2/common.c
index 3f20cbb9967b..de61f15c48e2 100644
--- a/arch/arm/mach-omap2/common.c
+++ b/arch/arm/mach-omap2/common.c
@@ -56,6 +56,12 @@ void __init omap2_set_globals_242x(void)
56{ 56{
57 __omap2_set_globals(&omap242x_globals); 57 __omap2_set_globals(&omap242x_globals);
58} 58}
59
60void __init omap242x_map_io(void)
61{
62 omap2_set_globals_242x();
63 omap242x_map_common_io();
64}
59#endif 65#endif
60 66
61#if defined(CONFIG_SOC_OMAP2430) 67#if defined(CONFIG_SOC_OMAP2430)
@@ -74,6 +80,12 @@ void __init omap2_set_globals_243x(void)
74{ 80{
75 __omap2_set_globals(&omap243x_globals); 81 __omap2_set_globals(&omap243x_globals);
76} 82}
83
84void __init omap243x_map_io(void)
85{
86 omap2_set_globals_243x();
87 omap243x_map_common_io();
88}
77#endif 89#endif
78 90
79#if defined(CONFIG_ARCH_OMAP3) 91#if defined(CONFIG_ARCH_OMAP3)
@@ -138,5 +150,11 @@ void __init omap2_set_globals_443x(void)
138 omap2_set_globals_control(&omap4_globals); 150 omap2_set_globals_control(&omap4_globals);
139 omap2_set_globals_prcm(&omap4_globals); 151 omap2_set_globals_prcm(&omap4_globals);
140} 152}
153
154void __init omap4_map_io(void)
155{
156 omap2_set_globals_443x();
157 omap44xx_map_common_io();
158}
141#endif 159#endif
142 160
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index ae8ea5b3b1a0..406b56cfedbc 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -43,7 +43,7 @@ static int __init omap3_l3_init(void)
43{ 43{
44 int l; 44 int l;
45 struct omap_hwmod *oh; 45 struct omap_hwmod *oh;
46 struct omap_device *od; 46 struct platform_device *pdev;
47 char oh_name[L3_MODULES_MAX_LEN]; 47 char oh_name[L3_MODULES_MAX_LEN];
48 48
49 /* 49 /*
@@ -60,12 +60,12 @@ static int __init omap3_l3_init(void)
60 if (!oh) 60 if (!oh)
61 pr_err("could not look up %s\n", oh_name); 61 pr_err("could not look up %s\n", oh_name);
62 62
63 od = omap_device_build("omap_l3_smx", 0, oh, NULL, 0, 63 pdev = omap_device_build("omap_l3_smx", 0, oh, NULL, 0,
64 NULL, 0, 0); 64 NULL, 0, 0);
65 65
66 WARN(IS_ERR(od), "could not build omap_device for %s\n", oh_name); 66 WARN(IS_ERR(pdev), "could not build omap_device for %s\n", oh_name);
67 67
68 return IS_ERR(od) ? PTR_ERR(od) : 0; 68 return IS_ERR(pdev) ? PTR_ERR(pdev) : 0;
69} 69}
70postcore_initcall(omap3_l3_init); 70postcore_initcall(omap3_l3_init);
71 71
@@ -73,7 +73,7 @@ static int __init omap4_l3_init(void)
73{ 73{
74 int l, i; 74 int l, i;
75 struct omap_hwmod *oh[3]; 75 struct omap_hwmod *oh[3];
76 struct omap_device *od; 76 struct platform_device *pdev;
77 char oh_name[L3_MODULES_MAX_LEN]; 77 char oh_name[L3_MODULES_MAX_LEN];
78 78
79 /* 79 /*
@@ -91,12 +91,12 @@ static int __init omap4_l3_init(void)
91 pr_err("could not look up %s\n", oh_name); 91 pr_err("could not look up %s\n", oh_name);
92 } 92 }
93 93
94 od = omap_device_build_ss("omap_l3_noc", 0, oh, 3, NULL, 94 pdev = omap_device_build_ss("omap_l3_noc", 0, oh, 3, NULL,
95 0, NULL, 0, 0); 95 0, NULL, 0, 0);
96 96
97 WARN(IS_ERR(od), "could not build omap_device for %s\n", oh_name); 97 WARN(IS_ERR(pdev), "could not build omap_device for %s\n", oh_name);
98 98
99 return IS_ERR(od) ? PTR_ERR(od) : 0; 99 return IS_ERR(pdev) ? PTR_ERR(pdev) : 0;
100} 100}
101postcore_initcall(omap4_l3_init); 101postcore_initcall(omap4_l3_init);
102 102
@@ -231,7 +231,7 @@ struct omap_device_pm_latency omap_keyboard_latency[] = {
231int __init omap4_keyboard_init(struct omap4_keypad_platform_data 231int __init omap4_keyboard_init(struct omap4_keypad_platform_data
232 *sdp4430_keypad_data, struct omap_board_data *bdata) 232 *sdp4430_keypad_data, struct omap_board_data *bdata)
233{ 233{
234 struct omap_device *od; 234 struct platform_device *pdev;
235 struct omap_hwmod *oh; 235 struct omap_hwmod *oh;
236 struct omap4_keypad_platform_data *keypad_data; 236 struct omap4_keypad_platform_data *keypad_data;
237 unsigned int id = -1; 237 unsigned int id = -1;
@@ -246,15 +246,15 @@ int __init omap4_keyboard_init(struct omap4_keypad_platform_data
246 246
247 keypad_data = sdp4430_keypad_data; 247 keypad_data = sdp4430_keypad_data;
248 248
249 od = omap_device_build(name, id, oh, keypad_data, 249 pdev = omap_device_build(name, id, oh, keypad_data,
250 sizeof(struct omap4_keypad_platform_data), 250 sizeof(struct omap4_keypad_platform_data),
251 omap_keyboard_latency, 251 omap_keyboard_latency,
252 ARRAY_SIZE(omap_keyboard_latency), 0); 252 ARRAY_SIZE(omap_keyboard_latency), 0);
253 253
254 if (IS_ERR(od)) { 254 if (IS_ERR(pdev)) {
255 WARN(1, "Can't build omap_device for %s:%s.\n", 255 WARN(1, "Can't build omap_device for %s:%s.\n",
256 name, oh->name); 256 name, oh->name);
257 return PTR_ERR(od); 257 return PTR_ERR(pdev);
258 } 258 }
259 oh->mux = omap_hwmod_mux_init(bdata->pads, bdata->pads_cnt); 259 oh->mux = omap_hwmod_mux_init(bdata->pads, bdata->pads_cnt);
260 260
@@ -273,7 +273,7 @@ static struct omap_device_pm_latency mbox_latencies[] = {
273static inline void omap_init_mbox(void) 273static inline void omap_init_mbox(void)
274{ 274{
275 struct omap_hwmod *oh; 275 struct omap_hwmod *oh;
276 struct omap_device *od; 276 struct platform_device *pdev;
277 277
278 oh = omap_hwmod_lookup("mailbox"); 278 oh = omap_hwmod_lookup("mailbox");
279 if (!oh) { 279 if (!oh) {
@@ -281,10 +281,10 @@ static inline void omap_init_mbox(void)
281 return; 281 return;
282 } 282 }
283 283
284 od = omap_device_build("omap-mailbox", -1, oh, NULL, 0, 284 pdev = omap_device_build("omap-mailbox", -1, oh, NULL, 0,
285 mbox_latencies, ARRAY_SIZE(mbox_latencies), 0); 285 mbox_latencies, ARRAY_SIZE(mbox_latencies), 0);
286 WARN(IS_ERR(od), "%s: could not build device, err %ld\n", 286 WARN(IS_ERR(pdev), "%s: could not build device, err %ld\n",
287 __func__, PTR_ERR(od)); 287 __func__, PTR_ERR(pdev));
288} 288}
289#else 289#else
290static inline void omap_init_mbox(void) { } 290static inline void omap_init_mbox(void) { }
@@ -375,7 +375,7 @@ struct omap_device_pm_latency omap_mcspi_latency[] = {
375 375
376static int omap_mcspi_init(struct omap_hwmod *oh, void *unused) 376static int omap_mcspi_init(struct omap_hwmod *oh, void *unused)
377{ 377{
378 struct omap_device *od; 378 struct platform_device *pdev;
379 char *name = "omap2_mcspi"; 379 char *name = "omap2_mcspi";
380 struct omap2_mcspi_platform_config *pdata; 380 struct omap2_mcspi_platform_config *pdata;
381 static int spi_num; 381 static int spi_num;
@@ -402,10 +402,10 @@ static int omap_mcspi_init(struct omap_hwmod *oh, void *unused)
402 } 402 }
403 403
404 spi_num++; 404 spi_num++;
405 od = omap_device_build(name, spi_num, oh, pdata, 405 pdev = omap_device_build(name, spi_num, oh, pdata,
406 sizeof(*pdata), omap_mcspi_latency, 406 sizeof(*pdata), omap_mcspi_latency,
407 ARRAY_SIZE(omap_mcspi_latency), 0); 407 ARRAY_SIZE(omap_mcspi_latency), 0);
408 WARN(IS_ERR(od), "Can't build omap_device for %s:%s\n", 408 WARN(IS_ERR(pdev), "Can't build omap_device for %s:%s\n",
409 name, oh->name); 409 name, oh->name);
410 kfree(pdata); 410 kfree(pdata);
411 return 0; 411 return 0;
@@ -741,7 +741,7 @@ static struct omap_device_pm_latency omap_wdt_latency[] = {
741static int __init omap_init_wdt(void) 741static int __init omap_init_wdt(void)
742{ 742{
743 int id = -1; 743 int id = -1;
744 struct omap_device *od; 744 struct platform_device *pdev;
745 struct omap_hwmod *oh; 745 struct omap_hwmod *oh;
746 char *oh_name = "wd_timer2"; 746 char *oh_name = "wd_timer2";
747 char *dev_name = "omap_wdt"; 747 char *dev_name = "omap_wdt";
@@ -755,10 +755,10 @@ static int __init omap_init_wdt(void)
755 return -EINVAL; 755 return -EINVAL;
756 } 756 }
757 757
758 od = omap_device_build(dev_name, id, oh, NULL, 0, 758 pdev = omap_device_build(dev_name, id, oh, NULL, 0,
759 omap_wdt_latency, 759 omap_wdt_latency,
760 ARRAY_SIZE(omap_wdt_latency), 0); 760 ARRAY_SIZE(omap_wdt_latency), 0);
761 WARN(IS_ERR(od), "Can't build omap_device for %s:%s.\n", 761 WARN(IS_ERR(pdev), "Can't build omap_device for %s:%s.\n",
762 dev_name, oh->name); 762 dev_name, oh->name);
763 return 0; 763 return 0;
764} 764}
diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c
index 62510ec863c6..836f0f7d8c00 100644
--- a/arch/arm/mach-omap2/display.c
+++ b/arch/arm/mach-omap2/display.c
@@ -127,7 +127,7 @@ int __init omap_display_init(struct omap_dss_board_info *board_data)
127{ 127{
128 int r = 0; 128 int r = 0;
129 struct omap_hwmod *oh; 129 struct omap_hwmod *oh;
130 struct omap_device *od; 130 struct platform_device *pdev;
131 int i, oh_count; 131 int i, oh_count;
132 struct omap_display_platform_data pdata; 132 struct omap_display_platform_data pdata;
133 const struct omap_dss_hwmod_data *curr_dss_hwmod; 133 const struct omap_dss_hwmod_data *curr_dss_hwmod;
@@ -162,13 +162,13 @@ int __init omap_display_init(struct omap_dss_board_info *board_data)
162 return -ENODEV; 162 return -ENODEV;
163 } 163 }
164 164
165 od = omap_device_build(curr_dss_hwmod[i].dev_name, 165 pdev = omap_device_build(curr_dss_hwmod[i].dev_name,
166 curr_dss_hwmod[i].id, oh, &pdata, 166 curr_dss_hwmod[i].id, oh, &pdata,
167 sizeof(struct omap_display_platform_data), 167 sizeof(struct omap_display_platform_data),
168 omap_dss_latency, 168 omap_dss_latency,
169 ARRAY_SIZE(omap_dss_latency), 0); 169 ARRAY_SIZE(omap_dss_latency), 0);
170 170
171 if (WARN((IS_ERR(od)), "Could not build omap_device for %s\n", 171 if (WARN((IS_ERR(pdev)), "Could not build omap_device for %s\n",
172 curr_dss_hwmod[i].oh_name)) 172 curr_dss_hwmod[i].oh_name))
173 return -ENODEV; 173 return -ENODEV;
174 } 174 }
diff --git a/arch/arm/mach-omap2/dma.c b/arch/arm/mach-omap2/dma.c
index c9ff0e79703d..ae8cb3fb1830 100644
--- a/arch/arm/mach-omap2/dma.c
+++ b/arch/arm/mach-omap2/dma.c
@@ -228,7 +228,7 @@ static u32 configure_dma_errata(void)
228/* One time initializations */ 228/* One time initializations */
229static int __init omap2_system_dma_init_dev(struct omap_hwmod *oh, void *unused) 229static int __init omap2_system_dma_init_dev(struct omap_hwmod *oh, void *unused)
230{ 230{
231 struct omap_device *od; 231 struct platform_device *pdev;
232 struct omap_system_dma_plat_info *p; 232 struct omap_system_dma_plat_info *p;
233 struct resource *mem; 233 struct resource *mem;
234 char *name = "omap_dma_system"; 234 char *name = "omap_dma_system";
@@ -258,23 +258,23 @@ static int __init omap2_system_dma_init_dev(struct omap_hwmod *oh, void *unused)
258 258
259 p->errata = configure_dma_errata(); 259 p->errata = configure_dma_errata();
260 260
261 od = omap_device_build(name, 0, oh, p, sizeof(*p), 261 pdev = omap_device_build(name, 0, oh, p, sizeof(*p),
262 omap2_dma_latency, ARRAY_SIZE(omap2_dma_latency), 0); 262 omap2_dma_latency, ARRAY_SIZE(omap2_dma_latency), 0);
263 kfree(p); 263 kfree(p);
264 if (IS_ERR(od)) { 264 if (IS_ERR(pdev)) {
265 pr_err("%s: Can't build omap_device for %s:%s.\n", 265 pr_err("%s: Can't build omap_device for %s:%s.\n",
266 __func__, name, oh->name); 266 __func__, name, oh->name);
267 return PTR_ERR(od); 267 return PTR_ERR(pdev);
268 } 268 }
269 269
270 mem = platform_get_resource(&od->pdev, IORESOURCE_MEM, 0); 270 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
271 if (!mem) { 271 if (!mem) {
272 dev_err(&od->pdev.dev, "%s: no mem resource\n", __func__); 272 dev_err(&pdev->dev, "%s: no mem resource\n", __func__);
273 return -EINVAL; 273 return -EINVAL;
274 } 274 }
275 dma_base = ioremap(mem->start, resource_size(mem)); 275 dma_base = ioremap(mem->start, resource_size(mem));
276 if (!dma_base) { 276 if (!dma_base) {
277 dev_err(&od->pdev.dev, "%s: ioremap fail\n", __func__); 277 dev_err(&pdev->dev, "%s: ioremap fail\n", __func__);
278 return -ENOMEM; 278 return -ENOMEM;
279 } 279 }
280 280
@@ -283,7 +283,7 @@ static int __init omap2_system_dma_init_dev(struct omap_hwmod *oh, void *unused)
283 (d->lch_count), GFP_KERNEL); 283 (d->lch_count), GFP_KERNEL);
284 284
285 if (!d->chan) { 285 if (!d->chan) {
286 dev_err(&od->pdev.dev, "%s: kzalloc fail\n", __func__); 286 dev_err(&pdev->dev, "%s: kzalloc fail\n", __func__);
287 return -ENOMEM; 287 return -ENOMEM;
288 } 288 }
289 return 0; 289 return 0;
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index 2765cdc3152d..652ccc574196 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -34,7 +34,7 @@ static struct omap_device_pm_latency omap_gpio_latency[] = {
34 34
35static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused) 35static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
36{ 36{
37 struct omap_device *od; 37 struct platform_device *pdev;
38 struct omap_gpio_platform_data *pdata; 38 struct omap_gpio_platform_data *pdata;
39 struct omap_gpio_dev_attr *dev_attr; 39 struct omap_gpio_dev_attr *dev_attr;
40 char *name = "omap_gpio"; 40 char *name = "omap_gpio";
@@ -107,19 +107,19 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
107 return -EINVAL; 107 return -EINVAL;
108 } 108 }
109 109
110 od = omap_device_build(name, id - 1, oh, pdata, 110 pdev = omap_device_build(name, id - 1, oh, pdata,
111 sizeof(*pdata), omap_gpio_latency, 111 sizeof(*pdata), omap_gpio_latency,
112 ARRAY_SIZE(omap_gpio_latency), 112 ARRAY_SIZE(omap_gpio_latency),
113 false); 113 false);
114 kfree(pdata); 114 kfree(pdata);
115 115
116 if (IS_ERR(od)) { 116 if (IS_ERR(pdev)) {
117 WARN(1, "Can't build omap_device for %s:%s.\n", 117 WARN(1, "Can't build omap_device for %s:%s.\n",
118 name, oh->name); 118 name, oh->name);
119 return PTR_ERR(od); 119 return PTR_ERR(pdev);
120 } 120 }
121 121
122 omap_device_disable_idle_on_suspend(od); 122 omap_device_disable_idle_on_suspend(pdev);
123 123
124 gpio_bank_count++; 124 gpio_bank_count++;
125 return 0; 125 return 0;
diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c
index 097a42d81e59..2dc002a388b3 100644
--- a/arch/arm/mach-omap2/hsmmc.c
+++ b/arch/arm/mach-omap2/hsmmc.c
@@ -426,7 +426,7 @@ static struct omap_device_pm_latency omap_hsmmc_latency[] = {
426void __init omap_init_hsmmc(struct omap2_hsmmc_info *hsmmcinfo, int ctrl_nr) 426void __init omap_init_hsmmc(struct omap2_hsmmc_info *hsmmcinfo, int ctrl_nr)
427{ 427{
428 struct omap_hwmod *oh; 428 struct omap_hwmod *oh;
429 struct omap_device *od; 429 struct platform_device *pdev;
430 struct omap_device_pm_latency *ohl; 430 struct omap_device_pm_latency *ohl;
431 char oh_name[MAX_OMAP_MMC_HWMOD_NAME_LEN]; 431 char oh_name[MAX_OMAP_MMC_HWMOD_NAME_LEN];
432 struct omap_mmc_platform_data *mmc_data; 432 struct omap_mmc_platform_data *mmc_data;
@@ -467,9 +467,9 @@ void __init omap_init_hsmmc(struct omap2_hsmmc_info *hsmmcinfo, int ctrl_nr)
467 mmc_data->controller_flags = mmc_dev_attr->flags; 467 mmc_data->controller_flags = mmc_dev_attr->flags;
468 } 468 }
469 469
470 od = omap_device_build(name, ctrl_nr - 1, oh, mmc_data, 470 pdev = omap_device_build(name, ctrl_nr - 1, oh, mmc_data,
471 sizeof(struct omap_mmc_platform_data), ohl, ohl_cnt, false); 471 sizeof(struct omap_mmc_platform_data), ohl, ohl_cnt, false);
472 if (IS_ERR(od)) { 472 if (IS_ERR(pdev)) {
473 WARN(1, "Can't build omap_device for %s:%s.\n", name, oh->name); 473 WARN(1, "Can't build omap_device for %s:%s.\n", name, oh->name);
474 kfree(mmc_data->slots[0].name); 474 kfree(mmc_data->slots[0].name);
475 goto done; 475 goto done;
@@ -478,7 +478,7 @@ void __init omap_init_hsmmc(struct omap2_hsmmc_info *hsmmcinfo, int ctrl_nr)
478 * return device handle to board setup code 478 * return device handle to board setup code
479 * required to populate for regulator framework structure 479 * required to populate for regulator framework structure
480 */ 480 */
481 hsmmcinfo->dev = &od->pdev.dev; 481 hsmmcinfo->dev = &pdev->dev;
482 482
483done: 483done:
484 kfree(mmc_data); 484 kfree(mmc_data);
diff --git a/arch/arm/mach-omap2/hwspinlock.c b/arch/arm/mach-omap2/hwspinlock.c
index 06d4a80660a5..0b3ae9d9c3b3 100644
--- a/arch/arm/mach-omap2/hwspinlock.c
+++ b/arch/arm/mach-omap2/hwspinlock.c
@@ -35,7 +35,7 @@ int __init hwspinlocks_init(void)
35{ 35{
36 int retval = 0; 36 int retval = 0;
37 struct omap_hwmod *oh; 37 struct omap_hwmod *oh;
38 struct omap_device *od; 38 struct platform_device *pdev;
39 const char *oh_name = "spinlock"; 39 const char *oh_name = "spinlock";
40 const char *dev_name = "omap_hwspinlock"; 40 const char *dev_name = "omap_hwspinlock";
41 41
@@ -48,13 +48,13 @@ int __init hwspinlocks_init(void)
48 if (oh == NULL) 48 if (oh == NULL)
49 return -EINVAL; 49 return -EINVAL;
50 50
51 od = omap_device_build(dev_name, 0, oh, NULL, 0, 51 pdev = omap_device_build(dev_name, 0, oh, NULL, 0,
52 omap_spinlock_latency, 52 omap_spinlock_latency,
53 ARRAY_SIZE(omap_spinlock_latency), false); 53 ARRAY_SIZE(omap_spinlock_latency), false);
54 if (IS_ERR(od)) { 54 if (IS_ERR(pdev)) {
55 pr_err("Can't build omap_device for %s:%s\n", dev_name, 55 pr_err("Can't build omap_device for %s:%s\n", dev_name,
56 oh_name); 56 oh_name);
57 retval = PTR_ERR(od); 57 retval = PTR_ERR(pdev);
58 } 58 }
59 59
60 return retval; 60 return retval;
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 37efb8696927..d27daf921c7e 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -28,7 +28,6 @@
28 28
29#include "control.h" 29#include "control.h"
30 30
31static struct omap_chip_id omap_chip;
32static unsigned int omap_revision; 31static unsigned int omap_revision;
33 32
34u32 omap_features; 33u32 omap_features;
@@ -39,19 +38,6 @@ unsigned int omap_rev(void)
39} 38}
40EXPORT_SYMBOL(omap_rev); 39EXPORT_SYMBOL(omap_rev);
41 40
42/**
43 * omap_chip_is - test whether currently running OMAP matches a chip type
44 * @oc: omap_chip_t to test against
45 *
46 * Test whether the currently-running OMAP chip matches the supplied
47 * chip type 'oc'. Returns 1 upon a match; 0 upon failure.
48 */
49int omap_chip_is(struct omap_chip_id oci)
50{
51 return (oci.oc & omap_chip.oc) ? 1 : 0;
52}
53EXPORT_SYMBOL(omap_chip_is);
54
55int omap_type(void) 41int omap_type(void)
56{ 42{
57 u32 val = 0; 43 u32 val = 0;
@@ -242,14 +228,12 @@ static void __init ti816x_check_features(void)
242 omap_features = OMAP3_HAS_NEON; 228 omap_features = OMAP3_HAS_NEON;
243} 229}
244 230
245static void __init omap3_check_revision(void) 231static void __init omap3_check_revision(const char **cpu_rev)
246{ 232{
247 u32 cpuid, idcode; 233 u32 cpuid, idcode;
248 u16 hawkeye; 234 u16 hawkeye;
249 u8 rev; 235 u8 rev;
250 236
251 omap_chip.oc = CHIP_IS_OMAP3430;
252
253 /* 237 /*
254 * We cannot access revision registers on ES1.0. 238 * We cannot access revision registers on ES1.0.
255 * If the processor type is Cortex-A8 and the revision is 0x0 239 * If the processor type is Cortex-A8 and the revision is 0x0
@@ -258,7 +242,7 @@ static void __init omap3_check_revision(void)
258 cpuid = read_cpuid(CPUID_ID); 242 cpuid = read_cpuid(CPUID_ID);
259 if ((((cpuid >> 4) & 0xfff) == 0xc08) && ((cpuid & 0xf) == 0x0)) { 243 if ((((cpuid >> 4) & 0xfff) == 0xc08) && ((cpuid & 0xf) == 0x0)) {
260 omap_revision = OMAP3430_REV_ES1_0; 244 omap_revision = OMAP3430_REV_ES1_0;
261 omap_chip.oc |= CHIP_IS_OMAP3430ES1; 245 *cpu_rev = "1.0";
262 return; 246 return;
263 } 247 }
264 248
@@ -279,77 +263,85 @@ static void __init omap3_check_revision(void)
279 case 0: /* Take care of early samples */ 263 case 0: /* Take care of early samples */
280 case 1: 264 case 1:
281 omap_revision = OMAP3430_REV_ES2_0; 265 omap_revision = OMAP3430_REV_ES2_0;
282 omap_chip.oc |= CHIP_IS_OMAP3430ES2; 266 *cpu_rev = "2.0";
283 break; 267 break;
284 case 2: 268 case 2:
285 omap_revision = OMAP3430_REV_ES2_1; 269 omap_revision = OMAP3430_REV_ES2_1;
286 omap_chip.oc |= CHIP_IS_OMAP3430ES2; 270 *cpu_rev = "2.1";
287 break; 271 break;
288 case 3: 272 case 3:
289 omap_revision = OMAP3430_REV_ES3_0; 273 omap_revision = OMAP3430_REV_ES3_0;
290 omap_chip.oc |= CHIP_IS_OMAP3430ES3_0; 274 *cpu_rev = "3.0";
291 break; 275 break;
292 case 4: 276 case 4:
293 omap_revision = OMAP3430_REV_ES3_1; 277 omap_revision = OMAP3430_REV_ES3_1;
294 omap_chip.oc |= CHIP_IS_OMAP3430ES3_1; 278 *cpu_rev = "3.1";
295 break; 279 break;
296 case 7: 280 case 7:
297 /* FALLTHROUGH */ 281 /* FALLTHROUGH */
298 default: 282 default:
299 /* Use the latest known revision as default */ 283 /* Use the latest known revision as default */
300 omap_revision = OMAP3430_REV_ES3_1_2; 284 omap_revision = OMAP3430_REV_ES3_1_2;
301 285 *cpu_rev = "3.1.2";
302 /* REVISIT: Add CHIP_IS_OMAP3430ES3_1_2? */
303 omap_chip.oc |= CHIP_IS_OMAP3430ES3_1;
304 } 286 }
305 break; 287 break;
306 case 0xb868: 288 case 0xb868:
307 /* Handle OMAP35xx/AM35xx devices 289 /*
290 * Handle OMAP/AM 3505/3517 devices
308 * 291 *
309 * Set the device to be OMAP3505 here. Actual device 292 * Set the device to be OMAP3517 here. Actual device
310 * is identified later based on the features. 293 * is identified later based on the features.
311 *
312 * REVISIT: AM3505/AM3517 should have their own CHIP_IS
313 */ 294 */
314 omap_revision = OMAP3505_REV(rev); 295 switch (rev) {
315 omap_chip.oc |= CHIP_IS_OMAP3430ES3_1; 296 case 0:
297 omap_revision = OMAP3517_REV_ES1_0;
298 *cpu_rev = "1.0";
299 break;
300 case 1:
301 /* FALLTHROUGH */
302 default:
303 omap_revision = OMAP3517_REV_ES1_1;
304 *cpu_rev = "1.1";
305 }
316 break; 306 break;
317 case 0xb891: 307 case 0xb891:
318 /* Handle 36xx devices */ 308 /* Handle 36xx devices */
319 omap_chip.oc |= CHIP_IS_OMAP3630ES1;
320 309
321 switch(rev) { 310 switch(rev) {
322 case 0: /* Take care of early samples */ 311 case 0: /* Take care of early samples */
323 omap_revision = OMAP3630_REV_ES1_0; 312 omap_revision = OMAP3630_REV_ES1_0;
313 *cpu_rev = "1.0";
324 break; 314 break;
325 case 1: 315 case 1:
326 omap_revision = OMAP3630_REV_ES1_1; 316 omap_revision = OMAP3630_REV_ES1_1;
327 omap_chip.oc |= CHIP_IS_OMAP3630ES1_1; 317 *cpu_rev = "1.1";
328 break; 318 break;
329 case 2: 319 case 2:
320 /* FALLTHROUGH */
330 default: 321 default:
331 omap_revision = OMAP3630_REV_ES1_2; 322 omap_revision = OMAP3630_REV_ES1_2;
332 omap_chip.oc |= CHIP_IS_OMAP3630ES1_2; 323 *cpu_rev = "1.2";
333 } 324 }
334 break; 325 break;
335 case 0xb81e: 326 case 0xb81e:
336 omap_chip.oc = CHIP_IS_TI816X;
337
338 switch (rev) { 327 switch (rev) {
339 case 0: 328 case 0:
340 omap_revision = TI8168_REV_ES1_0; 329 omap_revision = TI8168_REV_ES1_0;
330 *cpu_rev = "1.0";
341 break; 331 break;
342 case 1: 332 case 1:
333 /* FALLTHROUGH */
334 default:
343 omap_revision = TI8168_REV_ES1_1; 335 omap_revision = TI8168_REV_ES1_1;
336 *cpu_rev = "1.1";
344 break; 337 break;
345 default:
346 omap_revision = TI8168_REV_ES1_1;
347 } 338 }
348 break; 339 break;
349 default: 340 default:
350 /* Unknown default to latest silicon rev as default*/ 341 /* Unknown default to latest silicon rev as default */
351 omap_revision = OMAP3630_REV_ES1_2; 342 omap_revision = OMAP3630_REV_ES1_2;
352 omap_chip.oc |= CHIP_IS_OMAP3630ES1_2; 343 *cpu_rev = "1.2";
344 pr_warn("Warning: unknown chip type; assuming OMAP3630ES1.2\n");
353 } 345 }
354} 346}
355 347
@@ -382,24 +374,20 @@ static void __init omap4_check_revision(void)
382 switch (rev) { 374 switch (rev) {
383 case 0: 375 case 0:
384 omap_revision = OMAP4430_REV_ES1_0; 376 omap_revision = OMAP4430_REV_ES1_0;
385 omap_chip.oc |= CHIP_IS_OMAP4430ES1;
386 break; 377 break;
387 case 1: 378 case 1:
388 default: 379 default:
389 omap_revision = OMAP4430_REV_ES2_0; 380 omap_revision = OMAP4430_REV_ES2_0;
390 omap_chip.oc |= CHIP_IS_OMAP4430ES2;
391 } 381 }
392 break; 382 break;
393 case 0xb95c: 383 case 0xb95c:
394 switch (rev) { 384 switch (rev) {
395 case 3: 385 case 3:
396 omap_revision = OMAP4430_REV_ES2_1; 386 omap_revision = OMAP4430_REV_ES2_1;
397 omap_chip.oc |= CHIP_IS_OMAP4430ES2_1;
398 break; 387 break;
399 case 4: 388 case 4:
400 default: 389 default:
401 omap_revision = OMAP4430_REV_ES2_2; 390 omap_revision = OMAP4430_REV_ES2_2;
402 omap_chip.oc |= CHIP_IS_OMAP4430ES2_2;
403 } 391 }
404 break; 392 break;
405 case 0xb94e: 393 case 0xb94e:
@@ -407,14 +395,12 @@ static void __init omap4_check_revision(void)
407 case 0: 395 case 0:
408 default: 396 default:
409 omap_revision = OMAP4460_REV_ES1_0; 397 omap_revision = OMAP4460_REV_ES1_0;
410 omap_chip.oc |= CHIP_IS_OMAP4460ES1_0;
411 break; 398 break;
412 } 399 }
413 break; 400 break;
414 default: 401 default:
415 /* Unknown default to latest silicon rev as default */ 402 /* Unknown default to latest silicon rev as default */
416 omap_revision = OMAP4430_REV_ES2_2; 403 omap_revision = OMAP4430_REV_ES2_2;
417 omap_chip.oc |= CHIP_IS_OMAP4430ES2_2;
418 } 404 }
419 405
420 pr_info("OMAP%04x ES%d.%d\n", omap_rev() >> 16, 406 pr_info("OMAP%04x ES%d.%d\n", omap_rev() >> 16,
@@ -425,94 +411,33 @@ static void __init omap4_check_revision(void)
425 if (omap3_has_ ##feat()) \ 411 if (omap3_has_ ##feat()) \
426 printk(#feat" "); 412 printk(#feat" ");
427 413
428static void __init omap3_cpuinfo(void) 414static void __init omap3_cpuinfo(const char *cpu_rev)
429{ 415{
430 u8 rev = GET_OMAP_REVISION(); 416 const char *cpu_name;
431 char cpu_name[16], cpu_rev[16];
432 417
433 /* OMAP3430 and OMAP3530 are assumed to be same. 418 /*
419 * OMAP3430 and OMAP3530 are assumed to be same.
434 * 420 *
435 * OMAP3525, OMAP3515 and OMAP3503 can be detected only based 421 * OMAP3525, OMAP3515 and OMAP3503 can be detected only based
436 * on available features. Upon detection, update the CPU id 422 * on available features. Upon detection, update the CPU id
437 * and CPU class bits. 423 * and CPU class bits.
438 */ 424 */
439 if (cpu_is_omap3630()) { 425 if (cpu_is_omap3630()) {
440 strcpy(cpu_name, "OMAP3630"); 426 cpu_name = "OMAP3630";
441 } else if (cpu_is_omap3505()) { 427 } else if (cpu_is_omap3517()) {
442 /* 428 /* AM35xx devices */
443 * AM35xx devices 429 cpu_name = (omap3_has_sgx()) ? "AM3517" : "AM3505";
444 */
445 if (omap3_has_sgx()) {
446 omap_revision = OMAP3517_REV(rev);
447 strcpy(cpu_name, "AM3517");
448 } else {
449 /* Already set in omap3_check_revision() */
450 strcpy(cpu_name, "AM3505");
451 }
452 } else if (cpu_is_ti816x()) { 430 } else if (cpu_is_ti816x()) {
453 strcpy(cpu_name, "TI816X"); 431 cpu_name = "TI816X";
454 } else if (omap3_has_iva() && omap3_has_sgx()) { 432 } else if (omap3_has_iva() && omap3_has_sgx()) {
455 /* OMAP3430, OMAP3525, OMAP3515, OMAP3503 devices */ 433 /* OMAP3430, OMAP3525, OMAP3515, OMAP3503 devices */
456 strcpy(cpu_name, "OMAP3430/3530"); 434 cpu_name = "OMAP3430/3530";
457 } else if (omap3_has_iva()) { 435 } else if (omap3_has_iva()) {
458 omap_revision = OMAP3525_REV(rev); 436 cpu_name = "OMAP3525";
459 strcpy(cpu_name, "OMAP3525");
460 } else if (omap3_has_sgx()) { 437 } else if (omap3_has_sgx()) {
461 omap_revision = OMAP3515_REV(rev); 438 cpu_name = "OMAP3515";
462 strcpy(cpu_name, "OMAP3515");
463 } else { 439 } else {
464 omap_revision = OMAP3503_REV(rev); 440 cpu_name = "OMAP3503";
465 strcpy(cpu_name, "OMAP3503");
466 }
467
468 if (cpu_is_omap3630() || cpu_is_ti816x()) {
469 switch (rev) {
470 case OMAP_REVBITS_00:
471 strcpy(cpu_rev, "1.0");
472 break;
473 case OMAP_REVBITS_01:
474 strcpy(cpu_rev, "1.1");
475 break;
476 case OMAP_REVBITS_02:
477 /* FALLTHROUGH */
478 default:
479 /* Use the latest known revision as default */
480 strcpy(cpu_rev, "1.2");
481 }
482 } else if (cpu_is_omap3505() || cpu_is_omap3517()) {
483 switch (rev) {
484 case OMAP_REVBITS_00:
485 strcpy(cpu_rev, "1.0");
486 break;
487 case OMAP_REVBITS_01:
488 /* FALLTHROUGH */
489 default:
490 /* Use the latest known revision as default */
491 strcpy(cpu_rev, "1.1");
492 }
493 } else {
494 switch (rev) {
495 case OMAP_REVBITS_00:
496 strcpy(cpu_rev, "1.0");
497 break;
498 case OMAP_REVBITS_01:
499 strcpy(cpu_rev, "2.0");
500 break;
501 case OMAP_REVBITS_02:
502 strcpy(cpu_rev, "2.1");
503 break;
504 case OMAP_REVBITS_03:
505 strcpy(cpu_rev, "3.0");
506 break;
507 case OMAP_REVBITS_04:
508 strcpy(cpu_rev, "3.1");
509 break;
510 case OMAP_REVBITS_05:
511 /* FALLTHROUGH */
512 default:
513 /* Use the latest known revision as default */
514 strcpy(cpu_rev, "3.1.2");
515 }
516 } 441 }
517 442
518 /* Print verbose information */ 443 /* Print verbose information */
@@ -533,6 +458,8 @@ static void __init omap3_cpuinfo(void)
533 */ 458 */
534void __init omap2_check_revision(void) 459void __init omap2_check_revision(void)
535{ 460{
461 const char *cpu_rev;
462
536 /* 463 /*
537 * At this point we have an idea about the processor revision set 464 * At this point we have an idea about the processor revision set
538 * earlier with omap2_set_globals_tap(). 465 * earlier with omap2_set_globals_tap().
@@ -540,7 +467,7 @@ void __init omap2_check_revision(void)
540 if (cpu_is_omap24xx()) { 467 if (cpu_is_omap24xx()) {
541 omap24xx_check_revision(); 468 omap24xx_check_revision();
542 } else if (cpu_is_omap34xx()) { 469 } else if (cpu_is_omap34xx()) {
543 omap3_check_revision(); 470 omap3_check_revision(&cpu_rev);
544 471
545 /* TI816X doesn't have feature register */ 472 /* TI816X doesn't have feature register */
546 if (!cpu_is_ti816x()) 473 if (!cpu_is_ti816x())
@@ -548,7 +475,7 @@ void __init omap2_check_revision(void)
548 else 475 else
549 ti816x_check_features(); 476 ti816x_check_features();
550 477
551 omap3_cpuinfo(); 478 omap3_cpuinfo(cpu_rev);
552 return; 479 return;
553 } else if (cpu_is_omap44xx()) { 480 } else if (cpu_is_omap44xx()) {
554 omap4_check_revision(); 481 omap4_check_revision();
@@ -557,22 +484,6 @@ void __init omap2_check_revision(void)
557 } else { 484 } else {
558 pr_err("OMAP revision unknown, please fix!\n"); 485 pr_err("OMAP revision unknown, please fix!\n");
559 } 486 }
560
561 /*
562 * OK, now we know the exact revision. Initialize omap_chip bits
563 * for powerdowmain and clockdomain code.
564 */
565 if (cpu_is_omap243x()) {
566 /* Currently only supports 2430ES2.1 and 2430-all */
567 omap_chip.oc |= CHIP_IS_OMAP2430;
568 return;
569 } else if (cpu_is_omap242x()) {
570 /* Currently only supports 2420ES2.1.1 and 2420-all */
571 omap_chip.oc |= CHIP_IS_OMAP2420;
572 return;
573 }
574
575 pr_err("Uninitialized omap_chip, please fix!\n");
576} 487}
577 488
578/* 489/*
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index d6d01cb7f28a..c14308caf9d3 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -341,12 +341,12 @@ void __init omap2_init_common_infrastructure(void)
341 u8 postsetup_state; 341 u8 postsetup_state;
342 342
343 if (cpu_is_omap242x()) { 343 if (cpu_is_omap242x()) {
344 omap2xxx_powerdomains_init(); 344 omap242x_powerdomains_init();
345 omap2xxx_clockdomains_init(); 345 omap242x_clockdomains_init();
346 omap2420_hwmod_init(); 346 omap2420_hwmod_init();
347 } else if (cpu_is_omap243x()) { 347 } else if (cpu_is_omap243x()) {
348 omap2xxx_powerdomains_init(); 348 omap243x_powerdomains_init();
349 omap2xxx_clockdomains_init(); 349 omap243x_clockdomains_init();
350 omap2430_hwmod_init(); 350 omap2430_hwmod_init();
351 } else if (cpu_is_omap34xx()) { 351 } else if (cpu_is_omap34xx()) {
352 omap3xxx_powerdomains_init(); 352 omap3xxx_powerdomains_init();
@@ -376,7 +376,7 @@ void __init omap2_init_common_infrastructure(void)
376 * omap_hwmod_late_init(), so boards that desire full watchdog 376 * omap_hwmod_late_init(), so boards that desire full watchdog
377 * coverage of kernel initialization can reprogram the 377 * coverage of kernel initialization can reprogram the
378 * postsetup_state between the calls to 378 * postsetup_state between the calls to
379 * omap2_init_common_infra() and omap2_init_common_devices(). 379 * omap2_init_common_infra() and omap_sdrc_init().
380 * 380 *
381 * XXX ideally we could detect whether the MPU WDT was currently 381 * XXX ideally we could detect whether the MPU WDT was currently
382 * enabled here and make this conditional 382 * enabled here and make this conditional
@@ -400,7 +400,47 @@ void __init omap2_init_common_infrastructure(void)
400 pr_err("Could not init clock framework - unknown SoC\n"); 400 pr_err("Could not init clock framework - unknown SoC\n");
401} 401}
402 402
403void __init omap2_init_common_devices(struct omap_sdrc_params *sdrc_cs0, 403void __init omap2420_init_early(void)
404{
405 omap2_init_common_infrastructure();
406}
407
408void __init omap2430_init_early(void)
409{
410 omap2_init_common_infrastructure();
411}
412
413void __init omap3430_init_early(void)
414{
415 omap2_init_common_infrastructure();
416}
417
418void __init omap35xx_init_early(void)
419{
420 omap2_init_common_infrastructure();
421}
422
423void __init omap3630_init_early(void)
424{
425 omap2_init_common_infrastructure();
426}
427
428void __init am35xx_init_early(void)
429{
430 omap2_init_common_infrastructure();
431}
432
433void __init ti816x_init_early(void)
434{
435 omap2_init_common_infrastructure();
436}
437
438void __init omap4430_init_early(void)
439{
440 omap2_init_common_infrastructure();
441}
442
443void __init omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
404 struct omap_sdrc_params *sdrc_cs1) 444 struct omap_sdrc_params *sdrc_cs1)
405{ 445{
406 if (cpu_is_omap24xx() || omap3_has_sdrc()) { 446 if (cpu_is_omap24xx() || omap3_has_sdrc()) {
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c
index 4a6ef6ab8458..5063f253c4b9 100644
--- a/arch/arm/mach-omap2/mcbsp.c
+++ b/arch/arm/mach-omap2/mcbsp.c
@@ -27,66 +27,69 @@
27 27
28#include "control.h" 28#include "control.h"
29 29
30/* McBSP internal signal muxing functions */ 30/*
31 * FIXME: Find a mechanism to enable/disable runtime the McBSP ICLK autoidle.
32 * Sidetone needs non-gated ICLK and sidetone autoidle is broken.
33 */
34#include "cm2xxx_3xxx.h"
35#include "cm-regbits-34xx.h"
31 36
32void omap2_mcbsp1_mux_clkr_src(u8 mux) 37/* McBSP internal signal muxing function */
38static int omap2_mcbsp1_mux_rx_clk(struct device *dev, const char *signal,
39 const char *src)
33{ 40{
34 u32 v; 41 u32 v;
35 42
36 v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0); 43 v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
37 if (mux == CLKR_SRC_CLKR)
38 v &= ~OMAP2_MCBSP1_CLKR_MASK;
39 else if (mux == CLKR_SRC_CLKX)
40 v |= OMAP2_MCBSP1_CLKR_MASK;
41 omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
42}
43EXPORT_SYMBOL(omap2_mcbsp1_mux_clkr_src);
44 44
45void omap2_mcbsp1_mux_fsr_src(u8 mux) 45 if (!strcmp(signal, "clkr")) {
46{ 46 if (!strcmp(src, "clkr"))
47 u32 v; 47 v &= ~OMAP2_MCBSP1_CLKR_MASK;
48 else if (!strcmp(src, "clkx"))
49 v |= OMAP2_MCBSP1_CLKR_MASK;
50 else
51 return -EINVAL;
52 } else if (!strcmp(signal, "fsr")) {
53 if (!strcmp(src, "fsr"))
54 v &= ~OMAP2_MCBSP1_FSR_MASK;
55 else if (!strcmp(src, "fsx"))
56 v |= OMAP2_MCBSP1_FSR_MASK;
57 else
58 return -EINVAL;
59 } else {
60 return -EINVAL;
61 }
48 62
49 v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
50 if (mux == FSR_SRC_FSR)
51 v &= ~OMAP2_MCBSP1_FSR_MASK;
52 else if (mux == FSR_SRC_FSX)
53 v |= OMAP2_MCBSP1_FSR_MASK;
54 omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0); 63 omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
64
65 return 0;
55} 66}
56EXPORT_SYMBOL(omap2_mcbsp1_mux_fsr_src);
57 67
58/* McBSP CLKS source switching function */ 68/* McBSP CLKS source switching function */
59 69static int omap2_mcbsp_set_clk_src(struct device *dev, struct clk *clk,
60int omap2_mcbsp_set_clks_src(u8 id, u8 fck_src_id) 70 const char *src)
61{ 71{
62 struct omap_mcbsp *mcbsp;
63 struct clk *fck_src; 72 struct clk *fck_src;
64 char *fck_src_name; 73 char *fck_src_name;
65 int r; 74 int r;
66 75
67 if (!omap_mcbsp_check_valid_id(id)) { 76 if (!strcmp(src, "clks_ext"))
68 pr_err("%s: Invalid id (%d)\n", __func__, id + 1);
69 return -EINVAL;
70 }
71 mcbsp = id_to_mcbsp_ptr(id);
72
73 if (fck_src_id == MCBSP_CLKS_PAD_SRC)
74 fck_src_name = "pad_fck"; 77 fck_src_name = "pad_fck";
75 else if (fck_src_id == MCBSP_CLKS_PRCM_SRC) 78 else if (!strcmp(src, "clks_fclk"))
76 fck_src_name = "prcm_fck"; 79 fck_src_name = "prcm_fck";
77 else 80 else
78 return -EINVAL; 81 return -EINVAL;
79 82
80 fck_src = clk_get(mcbsp->dev, fck_src_name); 83 fck_src = clk_get(dev, fck_src_name);
81 if (IS_ERR_OR_NULL(fck_src)) { 84 if (IS_ERR_OR_NULL(fck_src)) {
82 pr_err("omap-mcbsp: %s: could not clk_get() %s\n", "clks", 85 pr_err("omap-mcbsp: %s: could not clk_get() %s\n", "clks",
83 fck_src_name); 86 fck_src_name);
84 return -EINVAL; 87 return -EINVAL;
85 } 88 }
86 89
87 pm_runtime_put_sync(mcbsp->dev); 90 pm_runtime_put_sync(dev);
88 91
89 r = clk_set_parent(mcbsp->fclk, fck_src); 92 r = clk_set_parent(clk, fck_src);
90 if (IS_ERR_VALUE(r)) { 93 if (IS_ERR_VALUE(r)) {
91 pr_err("omap-mcbsp: %s: could not clk_set_parent() to %s\n", 94 pr_err("omap-mcbsp: %s: could not clk_set_parent() to %s\n",
92 "clks", fck_src_name); 95 "clks", fck_src_name);
@@ -94,13 +97,30 @@ int omap2_mcbsp_set_clks_src(u8 id, u8 fck_src_id)
94 return -EINVAL; 97 return -EINVAL;
95 } 98 }
96 99
97 pm_runtime_get_sync(mcbsp->dev); 100 pm_runtime_get_sync(dev);
98 101
99 clk_put(fck_src); 102 clk_put(fck_src);
100 103
101 return 0; 104 return 0;
102} 105}
103EXPORT_SYMBOL(omap2_mcbsp_set_clks_src); 106
107static int omap3_enable_st_clock(unsigned int id, bool enable)
108{
109 unsigned int w;
110
111 /*
112 * Sidetone uses McBSP ICLK - which must not idle when sidetones
113 * are enabled or sidetones start sounding ugly.
114 */
115 w = omap2_cm_read_mod_reg(OMAP3430_PER_MOD, CM_AUTOIDLE);
116 if (enable)
117 w &= ~(1 << (id - 2));
118 else
119 w |= 1 << (id - 2);
120 omap2_cm_write_mod_reg(w, OMAP3430_PER_MOD, CM_AUTOIDLE);
121
122 return 0;
123}
104 124
105struct omap_device_pm_latency omap2_mcbsp_latency[] = { 125struct omap_device_pm_latency omap2_mcbsp_latency[] = {
106 { 126 {
@@ -116,7 +136,7 @@ static int omap_init_mcbsp(struct omap_hwmod *oh, void *unused)
116 char *name = "omap-mcbsp"; 136 char *name = "omap-mcbsp";
117 struct omap_hwmod *oh_device[2]; 137 struct omap_hwmod *oh_device[2];
118 struct omap_mcbsp_platform_data *pdata = NULL; 138 struct omap_mcbsp_platform_data *pdata = NULL;
119 struct omap_device *od; 139 struct platform_device *pdev;
120 140
121 sscanf(oh->name, "mcbsp%d", &id); 141 sscanf(oh->name, "mcbsp%d", &id);
122 142
@@ -126,7 +146,13 @@ static int omap_init_mcbsp(struct omap_hwmod *oh, void *unused)
126 return -ENOMEM; 146 return -ENOMEM;
127 } 147 }
128 148
129 pdata->mcbsp_config_type = oh->class->rev; 149 pdata->reg_step = 4;
150 if (oh->class->rev < MCBSP_CONFIG_TYPE2) {
151 pdata->reg_size = 2;
152 } else {
153 pdata->reg_size = 4;
154 pdata->has_ccr = true;
155 }
130 156
131 if (oh->class->rev == MCBSP_CONFIG_TYPE3) { 157 if (oh->class->rev == MCBSP_CONFIG_TYPE3) {
132 if (id == 2) 158 if (id == 2)
@@ -137,22 +163,29 @@ static int omap_init_mcbsp(struct omap_hwmod *oh, void *unused)
137 pdata->buffer_size = 0x80; 163 pdata->buffer_size = 0x80;
138 } 164 }
139 165
166 if (oh->class->rev >= MCBSP_CONFIG_TYPE3)
167 pdata->has_wakeup = true;
168
140 oh_device[0] = oh; 169 oh_device[0] = oh;
141 170
142 if (oh->dev_attr) { 171 if (oh->dev_attr) {
143 oh_device[1] = omap_hwmod_lookup(( 172 oh_device[1] = omap_hwmod_lookup((
144 (struct omap_mcbsp_dev_attr *)(oh->dev_attr))->sidetone); 173 (struct omap_mcbsp_dev_attr *)(oh->dev_attr))->sidetone);
174 pdata->enable_st_clock = omap3_enable_st_clock;
145 count++; 175 count++;
146 } 176 }
147 od = omap_device_build_ss(name, id, oh_device, count, pdata, 177 pdev = omap_device_build_ss(name, id, oh_device, count, pdata,
148 sizeof(*pdata), omap2_mcbsp_latency, 178 sizeof(*pdata), omap2_mcbsp_latency,
149 ARRAY_SIZE(omap2_mcbsp_latency), false); 179 ARRAY_SIZE(omap2_mcbsp_latency), false);
150 kfree(pdata); 180 kfree(pdata);
151 if (IS_ERR(od)) { 181 if (IS_ERR(pdev)) {
152 pr_err("%s: Can't build omap_device for %s:%s.\n", __func__, 182 pr_err("%s: Can't build omap_device for %s:%s.\n", __func__,
153 name, oh->name); 183 name, oh->name);
154 return PTR_ERR(od); 184 return PTR_ERR(pdev);
155 } 185 }
186 pdata->set_clk_src = omap2_mcbsp_set_clk_src;
187 if (id == 1)
188 pdata->mux_signal = omap2_mcbsp1_mux_rx_clk;
156 omap_mcbsp_count++; 189 omap_mcbsp_count++;
157 return 0; 190 return 0;
158} 191}
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 84cc0bdda3ae..d71380705080 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -1954,9 +1954,6 @@ int __init omap_hwmod_register(struct omap_hwmod **ohs)
1954 1954
1955 i = 0; 1955 i = 0;
1956 do { 1956 do {
1957 if (!omap_chip_is(ohs[i]->omap_chip))
1958 continue;
1959
1960 r = _register(ohs[i]); 1957 r = _register(ohs[i]);
1961 WARN(r, "omap_hwmod: %s: _register returned %d\n", ohs[i]->name, 1958 WARN(r, "omap_hwmod: %s: _register returned %d\n", ohs[i]->name,
1962 r); 1959 r);
diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
index a015c69068f6..b6ea69a5c2f8 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
@@ -100,7 +100,6 @@ static struct omap_hwmod omap2420_l3_main_hwmod = {
100 .masters_cnt = ARRAY_SIZE(omap2420_l3_main_masters), 100 .masters_cnt = ARRAY_SIZE(omap2420_l3_main_masters),
101 .slaves = omap2420_l3_main_slaves, 101 .slaves = omap2420_l3_main_slaves,
102 .slaves_cnt = ARRAY_SIZE(omap2420_l3_main_slaves), 102 .slaves_cnt = ARRAY_SIZE(omap2420_l3_main_slaves),
103 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
104 .flags = HWMOD_NO_IDLEST, 103 .flags = HWMOD_NO_IDLEST,
105}; 104};
106 105
@@ -206,7 +205,6 @@ static struct omap_hwmod omap2420_l4_core_hwmod = {
206 .masters_cnt = ARRAY_SIZE(omap2420_l4_core_masters), 205 .masters_cnt = ARRAY_SIZE(omap2420_l4_core_masters),
207 .slaves = omap2420_l4_core_slaves, 206 .slaves = omap2420_l4_core_slaves,
208 .slaves_cnt = ARRAY_SIZE(omap2420_l4_core_slaves), 207 .slaves_cnt = ARRAY_SIZE(omap2420_l4_core_slaves),
209 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
210 .flags = HWMOD_NO_IDLEST, 208 .flags = HWMOD_NO_IDLEST,
211}; 209};
212 210
@@ -227,7 +225,6 @@ static struct omap_hwmod omap2420_l4_wkup_hwmod = {
227 .masters_cnt = ARRAY_SIZE(omap2420_l4_wkup_masters), 225 .masters_cnt = ARRAY_SIZE(omap2420_l4_wkup_masters),
228 .slaves = omap2420_l4_wkup_slaves, 226 .slaves = omap2420_l4_wkup_slaves,
229 .slaves_cnt = ARRAY_SIZE(omap2420_l4_wkup_slaves), 227 .slaves_cnt = ARRAY_SIZE(omap2420_l4_wkup_slaves),
230 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
231 .flags = HWMOD_NO_IDLEST, 228 .flags = HWMOD_NO_IDLEST,
232}; 229};
233 230
@@ -243,7 +240,6 @@ static struct omap_hwmod omap2420_mpu_hwmod = {
243 .main_clk = "mpu_ck", 240 .main_clk = "mpu_ck",
244 .masters = omap2420_mpu_masters, 241 .masters = omap2420_mpu_masters,
245 .masters_cnt = ARRAY_SIZE(omap2420_mpu_masters), 242 .masters_cnt = ARRAY_SIZE(omap2420_mpu_masters),
246 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
247}; 243};
248 244
249/* 245/*
@@ -271,7 +267,6 @@ static struct omap_hwmod omap2420_iva_hwmod = {
271 .class = &iva_hwmod_class, 267 .class = &iva_hwmod_class,
272 .masters = omap2420_iva_masters, 268 .masters = omap2420_iva_masters,
273 .masters_cnt = ARRAY_SIZE(omap2420_iva_masters), 269 .masters_cnt = ARRAY_SIZE(omap2420_iva_masters),
274 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
275}; 270};
276 271
277/* timer1 */ 272/* timer1 */
@@ -317,7 +312,6 @@ static struct omap_hwmod omap2420_timer1_hwmod = {
317 .slaves = omap2420_timer1_slaves, 312 .slaves = omap2420_timer1_slaves,
318 .slaves_cnt = ARRAY_SIZE(omap2420_timer1_slaves), 313 .slaves_cnt = ARRAY_SIZE(omap2420_timer1_slaves),
319 .class = &omap2xxx_timer_hwmod_class, 314 .class = &omap2xxx_timer_hwmod_class,
320 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
321}; 315};
322 316
323/* timer2 */ 317/* timer2 */
@@ -354,7 +348,6 @@ static struct omap_hwmod omap2420_timer2_hwmod = {
354 .slaves = omap2420_timer2_slaves, 348 .slaves = omap2420_timer2_slaves,
355 .slaves_cnt = ARRAY_SIZE(omap2420_timer2_slaves), 349 .slaves_cnt = ARRAY_SIZE(omap2420_timer2_slaves),
356 .class = &omap2xxx_timer_hwmod_class, 350 .class = &omap2xxx_timer_hwmod_class,
357 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
358}; 351};
359 352
360/* timer3 */ 353/* timer3 */
@@ -391,7 +384,6 @@ static struct omap_hwmod omap2420_timer3_hwmod = {
391 .slaves = omap2420_timer3_slaves, 384 .slaves = omap2420_timer3_slaves,
392 .slaves_cnt = ARRAY_SIZE(omap2420_timer3_slaves), 385 .slaves_cnt = ARRAY_SIZE(omap2420_timer3_slaves),
393 .class = &omap2xxx_timer_hwmod_class, 386 .class = &omap2xxx_timer_hwmod_class,
394 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
395}; 387};
396 388
397/* timer4 */ 389/* timer4 */
@@ -428,7 +420,6 @@ static struct omap_hwmod omap2420_timer4_hwmod = {
428 .slaves = omap2420_timer4_slaves, 420 .slaves = omap2420_timer4_slaves,
429 .slaves_cnt = ARRAY_SIZE(omap2420_timer4_slaves), 421 .slaves_cnt = ARRAY_SIZE(omap2420_timer4_slaves),
430 .class = &omap2xxx_timer_hwmod_class, 422 .class = &omap2xxx_timer_hwmod_class,
431 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
432}; 423};
433 424
434/* timer5 */ 425/* timer5 */
@@ -465,7 +456,6 @@ static struct omap_hwmod omap2420_timer5_hwmod = {
465 .slaves = omap2420_timer5_slaves, 456 .slaves = omap2420_timer5_slaves,
466 .slaves_cnt = ARRAY_SIZE(omap2420_timer5_slaves), 457 .slaves_cnt = ARRAY_SIZE(omap2420_timer5_slaves),
467 .class = &omap2xxx_timer_hwmod_class, 458 .class = &omap2xxx_timer_hwmod_class,
468 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
469}; 459};
470 460
471 461
@@ -503,7 +493,6 @@ static struct omap_hwmod omap2420_timer6_hwmod = {
503 .slaves = omap2420_timer6_slaves, 493 .slaves = omap2420_timer6_slaves,
504 .slaves_cnt = ARRAY_SIZE(omap2420_timer6_slaves), 494 .slaves_cnt = ARRAY_SIZE(omap2420_timer6_slaves),
505 .class = &omap2xxx_timer_hwmod_class, 495 .class = &omap2xxx_timer_hwmod_class,
506 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
507}; 496};
508 497
509/* timer7 */ 498/* timer7 */
@@ -540,7 +529,6 @@ static struct omap_hwmod omap2420_timer7_hwmod = {
540 .slaves = omap2420_timer7_slaves, 529 .slaves = omap2420_timer7_slaves,
541 .slaves_cnt = ARRAY_SIZE(omap2420_timer7_slaves), 530 .slaves_cnt = ARRAY_SIZE(omap2420_timer7_slaves),
542 .class = &omap2xxx_timer_hwmod_class, 531 .class = &omap2xxx_timer_hwmod_class,
543 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
544}; 532};
545 533
546/* timer8 */ 534/* timer8 */
@@ -577,7 +565,6 @@ static struct omap_hwmod omap2420_timer8_hwmod = {
577 .slaves = omap2420_timer8_slaves, 565 .slaves = omap2420_timer8_slaves,
578 .slaves_cnt = ARRAY_SIZE(omap2420_timer8_slaves), 566 .slaves_cnt = ARRAY_SIZE(omap2420_timer8_slaves),
579 .class = &omap2xxx_timer_hwmod_class, 567 .class = &omap2xxx_timer_hwmod_class,
580 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
581}; 568};
582 569
583/* timer9 */ 570/* timer9 */
@@ -614,7 +601,6 @@ static struct omap_hwmod omap2420_timer9_hwmod = {
614 .slaves = omap2420_timer9_slaves, 601 .slaves = omap2420_timer9_slaves,
615 .slaves_cnt = ARRAY_SIZE(omap2420_timer9_slaves), 602 .slaves_cnt = ARRAY_SIZE(omap2420_timer9_slaves),
616 .class = &omap2xxx_timer_hwmod_class, 603 .class = &omap2xxx_timer_hwmod_class,
617 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
618}; 604};
619 605
620/* timer10 */ 606/* timer10 */
@@ -651,7 +637,6 @@ static struct omap_hwmod omap2420_timer10_hwmod = {
651 .slaves = omap2420_timer10_slaves, 637 .slaves = omap2420_timer10_slaves,
652 .slaves_cnt = ARRAY_SIZE(omap2420_timer10_slaves), 638 .slaves_cnt = ARRAY_SIZE(omap2420_timer10_slaves),
653 .class = &omap2xxx_timer_hwmod_class, 639 .class = &omap2xxx_timer_hwmod_class,
654 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
655}; 640};
656 641
657/* timer11 */ 642/* timer11 */
@@ -688,7 +673,6 @@ static struct omap_hwmod omap2420_timer11_hwmod = {
688 .slaves = omap2420_timer11_slaves, 673 .slaves = omap2420_timer11_slaves,
689 .slaves_cnt = ARRAY_SIZE(omap2420_timer11_slaves), 674 .slaves_cnt = ARRAY_SIZE(omap2420_timer11_slaves),
690 .class = &omap2xxx_timer_hwmod_class, 675 .class = &omap2xxx_timer_hwmod_class,
691 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
692}; 676};
693 677
694/* timer12 */ 678/* timer12 */
@@ -725,7 +709,6 @@ static struct omap_hwmod omap2420_timer12_hwmod = {
725 .slaves = omap2420_timer12_slaves, 709 .slaves = omap2420_timer12_slaves,
726 .slaves_cnt = ARRAY_SIZE(omap2420_timer12_slaves), 710 .slaves_cnt = ARRAY_SIZE(omap2420_timer12_slaves),
727 .class = &omap2xxx_timer_hwmod_class, 711 .class = &omap2xxx_timer_hwmod_class,
728 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
729}; 712};
730 713
731/* l4_wkup -> wd_timer2 */ 714/* l4_wkup -> wd_timer2 */
@@ -766,7 +749,6 @@ static struct omap_hwmod omap2420_wd_timer2_hwmod = {
766 }, 749 },
767 .slaves = omap2420_wd_timer2_slaves, 750 .slaves = omap2420_wd_timer2_slaves,
768 .slaves_cnt = ARRAY_SIZE(omap2420_wd_timer2_slaves), 751 .slaves_cnt = ARRAY_SIZE(omap2420_wd_timer2_slaves),
769 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
770}; 752};
771 753
772/* UART1 */ 754/* UART1 */
@@ -792,7 +774,6 @@ static struct omap_hwmod omap2420_uart1_hwmod = {
792 .slaves = omap2420_uart1_slaves, 774 .slaves = omap2420_uart1_slaves,
793 .slaves_cnt = ARRAY_SIZE(omap2420_uart1_slaves), 775 .slaves_cnt = ARRAY_SIZE(omap2420_uart1_slaves),
794 .class = &omap2_uart_class, 776 .class = &omap2_uart_class,
795 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
796}; 777};
797 778
798/* UART2 */ 779/* UART2 */
@@ -818,7 +799,6 @@ static struct omap_hwmod omap2420_uart2_hwmod = {
818 .slaves = omap2420_uart2_slaves, 799 .slaves = omap2420_uart2_slaves,
819 .slaves_cnt = ARRAY_SIZE(omap2420_uart2_slaves), 800 .slaves_cnt = ARRAY_SIZE(omap2420_uart2_slaves),
820 .class = &omap2_uart_class, 801 .class = &omap2_uart_class,
821 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
822}; 802};
823 803
824/* UART3 */ 804/* UART3 */
@@ -844,7 +824,6 @@ static struct omap_hwmod omap2420_uart3_hwmod = {
844 .slaves = omap2420_uart3_slaves, 824 .slaves = omap2420_uart3_slaves,
845 .slaves_cnt = ARRAY_SIZE(omap2420_uart3_slaves), 825 .slaves_cnt = ARRAY_SIZE(omap2420_uart3_slaves),
846 .class = &omap2_uart_class, 826 .class = &omap2_uart_class,
847 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
848}; 827};
849 828
850/* dss */ 829/* dss */
@@ -898,7 +877,6 @@ static struct omap_hwmod omap2420_dss_core_hwmod = {
898 .slaves_cnt = ARRAY_SIZE(omap2420_dss_slaves), 877 .slaves_cnt = ARRAY_SIZE(omap2420_dss_slaves),
899 .masters = omap2420_dss_masters, 878 .masters = omap2420_dss_masters,
900 .masters_cnt = ARRAY_SIZE(omap2420_dss_masters), 879 .masters_cnt = ARRAY_SIZE(omap2420_dss_masters),
901 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
902 .flags = HWMOD_NO_IDLEST, 880 .flags = HWMOD_NO_IDLEST,
903}; 881};
904 882
@@ -938,7 +916,6 @@ static struct omap_hwmod omap2420_dss_dispc_hwmod = {
938 }, 916 },
939 .slaves = omap2420_dss_dispc_slaves, 917 .slaves = omap2420_dss_dispc_slaves,
940 .slaves_cnt = ARRAY_SIZE(omap2420_dss_dispc_slaves), 918 .slaves_cnt = ARRAY_SIZE(omap2420_dss_dispc_slaves),
941 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
942 .flags = HWMOD_NO_IDLEST, 919 .flags = HWMOD_NO_IDLEST,
943}; 920};
944 921
@@ -975,7 +952,6 @@ static struct omap_hwmod omap2420_dss_rfbi_hwmod = {
975 }, 952 },
976 .slaves = omap2420_dss_rfbi_slaves, 953 .slaves = omap2420_dss_rfbi_slaves,
977 .slaves_cnt = ARRAY_SIZE(omap2420_dss_rfbi_slaves), 954 .slaves_cnt = ARRAY_SIZE(omap2420_dss_rfbi_slaves),
978 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
979 .flags = HWMOD_NO_IDLEST, 955 .flags = HWMOD_NO_IDLEST,
980}; 956};
981 957
@@ -1013,7 +989,6 @@ static struct omap_hwmod omap2420_dss_venc_hwmod = {
1013 }, 989 },
1014 .slaves = omap2420_dss_venc_slaves, 990 .slaves = omap2420_dss_venc_slaves,
1015 .slaves_cnt = ARRAY_SIZE(omap2420_dss_venc_slaves), 991 .slaves_cnt = ARRAY_SIZE(omap2420_dss_venc_slaves),
1016 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
1017 .flags = HWMOD_NO_IDLEST, 992 .flags = HWMOD_NO_IDLEST,
1018}; 993};
1019 994
@@ -1064,7 +1039,6 @@ static struct omap_hwmod omap2420_i2c1_hwmod = {
1064 .slaves_cnt = ARRAY_SIZE(omap2420_i2c1_slaves), 1039 .slaves_cnt = ARRAY_SIZE(omap2420_i2c1_slaves),
1065 .class = &i2c_class, 1040 .class = &i2c_class,
1066 .dev_attr = &i2c_dev_attr, 1041 .dev_attr = &i2c_dev_attr,
1067 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
1068 .flags = HWMOD_16BIT_REG, 1042 .flags = HWMOD_16BIT_REG,
1069}; 1043};
1070 1044
@@ -1092,7 +1066,6 @@ static struct omap_hwmod omap2420_i2c2_hwmod = {
1092 .slaves_cnt = ARRAY_SIZE(omap2420_i2c2_slaves), 1066 .slaves_cnt = ARRAY_SIZE(omap2420_i2c2_slaves),
1093 .class = &i2c_class, 1067 .class = &i2c_class,
1094 .dev_attr = &i2c_dev_attr, 1068 .dev_attr = &i2c_dev_attr,
1095 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
1096 .flags = HWMOD_16BIT_REG, 1069 .flags = HWMOD_16BIT_REG,
1097}; 1070};
1098 1071
@@ -1197,7 +1170,6 @@ static struct omap_hwmod omap2420_gpio1_hwmod = {
1197 .slaves_cnt = ARRAY_SIZE(omap2420_gpio1_slaves), 1170 .slaves_cnt = ARRAY_SIZE(omap2420_gpio1_slaves),
1198 .class = &omap2xxx_gpio_hwmod_class, 1171 .class = &omap2xxx_gpio_hwmod_class,
1199 .dev_attr = &gpio_dev_attr, 1172 .dev_attr = &gpio_dev_attr,
1200 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
1201}; 1173};
1202 1174
1203/* gpio2 */ 1175/* gpio2 */
@@ -1223,7 +1195,6 @@ static struct omap_hwmod omap2420_gpio2_hwmod = {
1223 .slaves_cnt = ARRAY_SIZE(omap2420_gpio2_slaves), 1195 .slaves_cnt = ARRAY_SIZE(omap2420_gpio2_slaves),
1224 .class = &omap2xxx_gpio_hwmod_class, 1196 .class = &omap2xxx_gpio_hwmod_class,
1225 .dev_attr = &gpio_dev_attr, 1197 .dev_attr = &gpio_dev_attr,
1226 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
1227}; 1198};
1228 1199
1229/* gpio3 */ 1200/* gpio3 */
@@ -1249,7 +1220,6 @@ static struct omap_hwmod omap2420_gpio3_hwmod = {
1249 .slaves_cnt = ARRAY_SIZE(omap2420_gpio3_slaves), 1220 .slaves_cnt = ARRAY_SIZE(omap2420_gpio3_slaves),
1250 .class = &omap2xxx_gpio_hwmod_class, 1221 .class = &omap2xxx_gpio_hwmod_class,
1251 .dev_attr = &gpio_dev_attr, 1222 .dev_attr = &gpio_dev_attr,
1252 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
1253}; 1223};
1254 1224
1255/* gpio4 */ 1225/* gpio4 */
@@ -1275,7 +1245,6 @@ static struct omap_hwmod omap2420_gpio4_hwmod = {
1275 .slaves_cnt = ARRAY_SIZE(omap2420_gpio4_slaves), 1245 .slaves_cnt = ARRAY_SIZE(omap2420_gpio4_slaves),
1276 .class = &omap2xxx_gpio_hwmod_class, 1246 .class = &omap2xxx_gpio_hwmod_class,
1277 .dev_attr = &gpio_dev_attr, 1247 .dev_attr = &gpio_dev_attr,
1278 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
1279}; 1248};
1280 1249
1281/* dma attributes */ 1250/* dma attributes */
@@ -1322,7 +1291,6 @@ static struct omap_hwmod omap2420_dma_system_hwmod = {
1322 .masters = omap2420_dma_system_masters, 1291 .masters = omap2420_dma_system_masters,
1323 .masters_cnt = ARRAY_SIZE(omap2420_dma_system_masters), 1292 .masters_cnt = ARRAY_SIZE(omap2420_dma_system_masters),
1324 .dev_attr = &dma_dev_attr, 1293 .dev_attr = &dma_dev_attr,
1325 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
1326 .flags = HWMOD_NO_IDLEST, 1294 .flags = HWMOD_NO_IDLEST,
1327}; 1295};
1328 1296
@@ -1363,7 +1331,6 @@ static struct omap_hwmod omap2420_mailbox_hwmod = {
1363 }, 1331 },
1364 .slaves = omap2420_mailbox_slaves, 1332 .slaves = omap2420_mailbox_slaves,
1365 .slaves_cnt = ARRAY_SIZE(omap2420_mailbox_slaves), 1333 .slaves_cnt = ARRAY_SIZE(omap2420_mailbox_slaves),
1366 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
1367}; 1334};
1368 1335
1369/* mcspi1 */ 1336/* mcspi1 */
@@ -1393,7 +1360,6 @@ static struct omap_hwmod omap2420_mcspi1_hwmod = {
1393 .slaves_cnt = ARRAY_SIZE(omap2420_mcspi1_slaves), 1360 .slaves_cnt = ARRAY_SIZE(omap2420_mcspi1_slaves),
1394 .class = &omap2xxx_mcspi_class, 1361 .class = &omap2xxx_mcspi_class,
1395 .dev_attr = &omap_mcspi1_dev_attr, 1362 .dev_attr = &omap_mcspi1_dev_attr,
1396 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
1397}; 1363};
1398 1364
1399/* mcspi2 */ 1365/* mcspi2 */
@@ -1423,7 +1389,6 @@ static struct omap_hwmod omap2420_mcspi2_hwmod = {
1423 .slaves_cnt = ARRAY_SIZE(omap2420_mcspi2_slaves), 1389 .slaves_cnt = ARRAY_SIZE(omap2420_mcspi2_slaves),
1424 .class = &omap2xxx_mcspi_class, 1390 .class = &omap2xxx_mcspi_class,
1425 .dev_attr = &omap_mcspi2_dev_attr, 1391 .dev_attr = &omap_mcspi2_dev_attr,
1426 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
1427}; 1392};
1428 1393
1429/* 1394/*
@@ -1473,7 +1438,6 @@ static struct omap_hwmod omap2420_mcbsp1_hwmod = {
1473 }, 1438 },
1474 .slaves = omap2420_mcbsp1_slaves, 1439 .slaves = omap2420_mcbsp1_slaves,
1475 .slaves_cnt = ARRAY_SIZE(omap2420_mcbsp1_slaves), 1440 .slaves_cnt = ARRAY_SIZE(omap2420_mcbsp1_slaves),
1476 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
1477}; 1441};
1478 1442
1479/* mcbsp2 */ 1443/* mcbsp2 */
@@ -1514,7 +1478,6 @@ static struct omap_hwmod omap2420_mcbsp2_hwmod = {
1514 }, 1478 },
1515 .slaves = omap2420_mcbsp2_slaves, 1479 .slaves = omap2420_mcbsp2_slaves,
1516 .slaves_cnt = ARRAY_SIZE(omap2420_mcbsp2_slaves), 1480 .slaves_cnt = ARRAY_SIZE(omap2420_mcbsp2_slaves),
1517 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
1518}; 1481};
1519 1482
1520static __initdata struct omap_hwmod *omap2420_hwmods[] = { 1483static __initdata struct omap_hwmod *omap2420_hwmods[] = {
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
index 408193d8e044..56de8d616313 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
@@ -110,7 +110,6 @@ static struct omap_hwmod omap2430_l3_main_hwmod = {
110 .masters_cnt = ARRAY_SIZE(omap2430_l3_main_masters), 110 .masters_cnt = ARRAY_SIZE(omap2430_l3_main_masters),
111 .slaves = omap2430_l3_main_slaves, 111 .slaves = omap2430_l3_main_slaves,
112 .slaves_cnt = ARRAY_SIZE(omap2430_l3_main_slaves), 112 .slaves_cnt = ARRAY_SIZE(omap2430_l3_main_slaves),
113 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
114 .flags = HWMOD_NO_IDLEST, 113 .flags = HWMOD_NO_IDLEST,
115}; 114};
116 115
@@ -250,7 +249,6 @@ static struct omap_hwmod omap2430_l4_core_hwmod = {
250 .masters_cnt = ARRAY_SIZE(omap2430_l4_core_masters), 249 .masters_cnt = ARRAY_SIZE(omap2430_l4_core_masters),
251 .slaves = omap2430_l4_core_slaves, 250 .slaves = omap2430_l4_core_slaves,
252 .slaves_cnt = ARRAY_SIZE(omap2430_l4_core_slaves), 251 .slaves_cnt = ARRAY_SIZE(omap2430_l4_core_slaves),
253 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
254 .flags = HWMOD_NO_IDLEST, 252 .flags = HWMOD_NO_IDLEST,
255}; 253};
256 254
@@ -301,7 +299,6 @@ static struct omap_hwmod omap2430_l4_wkup_hwmod = {
301 .masters_cnt = ARRAY_SIZE(omap2430_l4_wkup_masters), 299 .masters_cnt = ARRAY_SIZE(omap2430_l4_wkup_masters),
302 .slaves = omap2430_l4_wkup_slaves, 300 .slaves = omap2430_l4_wkup_slaves,
303 .slaves_cnt = ARRAY_SIZE(omap2430_l4_wkup_slaves), 301 .slaves_cnt = ARRAY_SIZE(omap2430_l4_wkup_slaves),
304 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
305 .flags = HWMOD_NO_IDLEST, 302 .flags = HWMOD_NO_IDLEST,
306}; 303};
307 304
@@ -317,7 +314,6 @@ static struct omap_hwmod omap2430_mpu_hwmod = {
317 .main_clk = "mpu_ck", 314 .main_clk = "mpu_ck",
318 .masters = omap2430_mpu_masters, 315 .masters = omap2430_mpu_masters,
319 .masters_cnt = ARRAY_SIZE(omap2430_mpu_masters), 316 .masters_cnt = ARRAY_SIZE(omap2430_mpu_masters),
320 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
321}; 317};
322 318
323/* 319/*
@@ -345,7 +341,6 @@ static struct omap_hwmod omap2430_iva_hwmod = {
345 .class = &iva_hwmod_class, 341 .class = &iva_hwmod_class,
346 .masters = omap2430_iva_masters, 342 .masters = omap2430_iva_masters,
347 .masters_cnt = ARRAY_SIZE(omap2430_iva_masters), 343 .masters_cnt = ARRAY_SIZE(omap2430_iva_masters),
348 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
349}; 344};
350 345
351/* timer1 */ 346/* timer1 */
@@ -391,7 +386,6 @@ static struct omap_hwmod omap2430_timer1_hwmod = {
391 .slaves = omap2430_timer1_slaves, 386 .slaves = omap2430_timer1_slaves,
392 .slaves_cnt = ARRAY_SIZE(omap2430_timer1_slaves), 387 .slaves_cnt = ARRAY_SIZE(omap2430_timer1_slaves),
393 .class = &omap2xxx_timer_hwmod_class, 388 .class = &omap2xxx_timer_hwmod_class,
394 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
395}; 389};
396 390
397/* timer2 */ 391/* timer2 */
@@ -428,7 +422,6 @@ static struct omap_hwmod omap2430_timer2_hwmod = {
428 .slaves = omap2430_timer2_slaves, 422 .slaves = omap2430_timer2_slaves,
429 .slaves_cnt = ARRAY_SIZE(omap2430_timer2_slaves), 423 .slaves_cnt = ARRAY_SIZE(omap2430_timer2_slaves),
430 .class = &omap2xxx_timer_hwmod_class, 424 .class = &omap2xxx_timer_hwmod_class,
431 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
432}; 425};
433 426
434/* timer3 */ 427/* timer3 */
@@ -465,7 +458,6 @@ static struct omap_hwmod omap2430_timer3_hwmod = {
465 .slaves = omap2430_timer3_slaves, 458 .slaves = omap2430_timer3_slaves,
466 .slaves_cnt = ARRAY_SIZE(omap2430_timer3_slaves), 459 .slaves_cnt = ARRAY_SIZE(omap2430_timer3_slaves),
467 .class = &omap2xxx_timer_hwmod_class, 460 .class = &omap2xxx_timer_hwmod_class,
468 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
469}; 461};
470 462
471/* timer4 */ 463/* timer4 */
@@ -502,7 +494,6 @@ static struct omap_hwmod omap2430_timer4_hwmod = {
502 .slaves = omap2430_timer4_slaves, 494 .slaves = omap2430_timer4_slaves,
503 .slaves_cnt = ARRAY_SIZE(omap2430_timer4_slaves), 495 .slaves_cnt = ARRAY_SIZE(omap2430_timer4_slaves),
504 .class = &omap2xxx_timer_hwmod_class, 496 .class = &omap2xxx_timer_hwmod_class,
505 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
506}; 497};
507 498
508/* timer5 */ 499/* timer5 */
@@ -539,7 +530,6 @@ static struct omap_hwmod omap2430_timer5_hwmod = {
539 .slaves = omap2430_timer5_slaves, 530 .slaves = omap2430_timer5_slaves,
540 .slaves_cnt = ARRAY_SIZE(omap2430_timer5_slaves), 531 .slaves_cnt = ARRAY_SIZE(omap2430_timer5_slaves),
541 .class = &omap2xxx_timer_hwmod_class, 532 .class = &omap2xxx_timer_hwmod_class,
542 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
543}; 533};
544 534
545/* timer6 */ 535/* timer6 */
@@ -576,7 +566,6 @@ static struct omap_hwmod omap2430_timer6_hwmod = {
576 .slaves = omap2430_timer6_slaves, 566 .slaves = omap2430_timer6_slaves,
577 .slaves_cnt = ARRAY_SIZE(omap2430_timer6_slaves), 567 .slaves_cnt = ARRAY_SIZE(omap2430_timer6_slaves),
578 .class = &omap2xxx_timer_hwmod_class, 568 .class = &omap2xxx_timer_hwmod_class,
579 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
580}; 569};
581 570
582/* timer7 */ 571/* timer7 */
@@ -613,7 +602,6 @@ static struct omap_hwmod omap2430_timer7_hwmod = {
613 .slaves = omap2430_timer7_slaves, 602 .slaves = omap2430_timer7_slaves,
614 .slaves_cnt = ARRAY_SIZE(omap2430_timer7_slaves), 603 .slaves_cnt = ARRAY_SIZE(omap2430_timer7_slaves),
615 .class = &omap2xxx_timer_hwmod_class, 604 .class = &omap2xxx_timer_hwmod_class,
616 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
617}; 605};
618 606
619/* timer8 */ 607/* timer8 */
@@ -650,7 +638,6 @@ static struct omap_hwmod omap2430_timer8_hwmod = {
650 .slaves = omap2430_timer8_slaves, 638 .slaves = omap2430_timer8_slaves,
651 .slaves_cnt = ARRAY_SIZE(omap2430_timer8_slaves), 639 .slaves_cnt = ARRAY_SIZE(omap2430_timer8_slaves),
652 .class = &omap2xxx_timer_hwmod_class, 640 .class = &omap2xxx_timer_hwmod_class,
653 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
654}; 641};
655 642
656/* timer9 */ 643/* timer9 */
@@ -687,7 +674,6 @@ static struct omap_hwmod omap2430_timer9_hwmod = {
687 .slaves = omap2430_timer9_slaves, 674 .slaves = omap2430_timer9_slaves,
688 .slaves_cnt = ARRAY_SIZE(omap2430_timer9_slaves), 675 .slaves_cnt = ARRAY_SIZE(omap2430_timer9_slaves),
689 .class = &omap2xxx_timer_hwmod_class, 676 .class = &omap2xxx_timer_hwmod_class,
690 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
691}; 677};
692 678
693/* timer10 */ 679/* timer10 */
@@ -724,7 +710,6 @@ static struct omap_hwmod omap2430_timer10_hwmod = {
724 .slaves = omap2430_timer10_slaves, 710 .slaves = omap2430_timer10_slaves,
725 .slaves_cnt = ARRAY_SIZE(omap2430_timer10_slaves), 711 .slaves_cnt = ARRAY_SIZE(omap2430_timer10_slaves),
726 .class = &omap2xxx_timer_hwmod_class, 712 .class = &omap2xxx_timer_hwmod_class,
727 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
728}; 713};
729 714
730/* timer11 */ 715/* timer11 */
@@ -761,7 +746,6 @@ static struct omap_hwmod omap2430_timer11_hwmod = {
761 .slaves = omap2430_timer11_slaves, 746 .slaves = omap2430_timer11_slaves,
762 .slaves_cnt = ARRAY_SIZE(omap2430_timer11_slaves), 747 .slaves_cnt = ARRAY_SIZE(omap2430_timer11_slaves),
763 .class = &omap2xxx_timer_hwmod_class, 748 .class = &omap2xxx_timer_hwmod_class,
764 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
765}; 749};
766 750
767/* timer12 */ 751/* timer12 */
@@ -798,7 +782,6 @@ static struct omap_hwmod omap2430_timer12_hwmod = {
798 .slaves = omap2430_timer12_slaves, 782 .slaves = omap2430_timer12_slaves,
799 .slaves_cnt = ARRAY_SIZE(omap2430_timer12_slaves), 783 .slaves_cnt = ARRAY_SIZE(omap2430_timer12_slaves),
800 .class = &omap2xxx_timer_hwmod_class, 784 .class = &omap2xxx_timer_hwmod_class,
801 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
802}; 785};
803 786
804/* l4_wkup -> wd_timer2 */ 787/* l4_wkup -> wd_timer2 */
@@ -839,7 +822,6 @@ static struct omap_hwmod omap2430_wd_timer2_hwmod = {
839 }, 822 },
840 .slaves = omap2430_wd_timer2_slaves, 823 .slaves = omap2430_wd_timer2_slaves,
841 .slaves_cnt = ARRAY_SIZE(omap2430_wd_timer2_slaves), 824 .slaves_cnt = ARRAY_SIZE(omap2430_wd_timer2_slaves),
842 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
843}; 825};
844 826
845/* UART1 */ 827/* UART1 */
@@ -865,7 +847,6 @@ static struct omap_hwmod omap2430_uart1_hwmod = {
865 .slaves = omap2430_uart1_slaves, 847 .slaves = omap2430_uart1_slaves,
866 .slaves_cnt = ARRAY_SIZE(omap2430_uart1_slaves), 848 .slaves_cnt = ARRAY_SIZE(omap2430_uart1_slaves),
867 .class = &omap2_uart_class, 849 .class = &omap2_uart_class,
868 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
869}; 850};
870 851
871/* UART2 */ 852/* UART2 */
@@ -891,7 +872,6 @@ static struct omap_hwmod omap2430_uart2_hwmod = {
891 .slaves = omap2430_uart2_slaves, 872 .slaves = omap2430_uart2_slaves,
892 .slaves_cnt = ARRAY_SIZE(omap2430_uart2_slaves), 873 .slaves_cnt = ARRAY_SIZE(omap2430_uart2_slaves),
893 .class = &omap2_uart_class, 874 .class = &omap2_uart_class,
894 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
895}; 875};
896 876
897/* UART3 */ 877/* UART3 */
@@ -917,7 +897,6 @@ static struct omap_hwmod omap2430_uart3_hwmod = {
917 .slaves = omap2430_uart3_slaves, 897 .slaves = omap2430_uart3_slaves,
918 .slaves_cnt = ARRAY_SIZE(omap2430_uart3_slaves), 898 .slaves_cnt = ARRAY_SIZE(omap2430_uart3_slaves),
919 .class = &omap2_uart_class, 899 .class = &omap2_uart_class,
920 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
921}; 900};
922 901
923/* dss */ 902/* dss */
@@ -965,7 +944,6 @@ static struct omap_hwmod omap2430_dss_core_hwmod = {
965 .slaves_cnt = ARRAY_SIZE(omap2430_dss_slaves), 944 .slaves_cnt = ARRAY_SIZE(omap2430_dss_slaves),
966 .masters = omap2430_dss_masters, 945 .masters = omap2430_dss_masters,
967 .masters_cnt = ARRAY_SIZE(omap2430_dss_masters), 946 .masters_cnt = ARRAY_SIZE(omap2430_dss_masters),
968 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
969 .flags = HWMOD_NO_IDLEST, 947 .flags = HWMOD_NO_IDLEST,
970}; 948};
971 949
@@ -999,7 +977,6 @@ static struct omap_hwmod omap2430_dss_dispc_hwmod = {
999 }, 977 },
1000 .slaves = omap2430_dss_dispc_slaves, 978 .slaves = omap2430_dss_dispc_slaves,
1001 .slaves_cnt = ARRAY_SIZE(omap2430_dss_dispc_slaves), 979 .slaves_cnt = ARRAY_SIZE(omap2430_dss_dispc_slaves),
1002 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
1003 .flags = HWMOD_NO_IDLEST, 980 .flags = HWMOD_NO_IDLEST,
1004}; 981};
1005 982
@@ -1030,7 +1007,6 @@ static struct omap_hwmod omap2430_dss_rfbi_hwmod = {
1030 }, 1007 },
1031 .slaves = omap2430_dss_rfbi_slaves, 1008 .slaves = omap2430_dss_rfbi_slaves,
1032 .slaves_cnt = ARRAY_SIZE(omap2430_dss_rfbi_slaves), 1009 .slaves_cnt = ARRAY_SIZE(omap2430_dss_rfbi_slaves),
1033 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
1034 .flags = HWMOD_NO_IDLEST, 1010 .flags = HWMOD_NO_IDLEST,
1035}; 1011};
1036 1012
@@ -1062,7 +1038,6 @@ static struct omap_hwmod omap2430_dss_venc_hwmod = {
1062 }, 1038 },
1063 .slaves = omap2430_dss_venc_slaves, 1039 .slaves = omap2430_dss_venc_slaves,
1064 .slaves_cnt = ARRAY_SIZE(omap2430_dss_venc_slaves), 1040 .slaves_cnt = ARRAY_SIZE(omap2430_dss_venc_slaves),
1065 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
1066 .flags = HWMOD_NO_IDLEST, 1041 .flags = HWMOD_NO_IDLEST,
1067}; 1042};
1068 1043
@@ -1123,7 +1098,6 @@ static struct omap_hwmod omap2430_i2c1_hwmod = {
1123 .slaves_cnt = ARRAY_SIZE(omap2430_i2c1_slaves), 1098 .slaves_cnt = ARRAY_SIZE(omap2430_i2c1_slaves),
1124 .class = &i2c_class, 1099 .class = &i2c_class,
1125 .dev_attr = &i2c_dev_attr, 1100 .dev_attr = &i2c_dev_attr,
1126 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
1127}; 1101};
1128 1102
1129/* I2C2 */ 1103/* I2C2 */
@@ -1151,7 +1125,6 @@ static struct omap_hwmod omap2430_i2c2_hwmod = {
1151 .slaves_cnt = ARRAY_SIZE(omap2430_i2c2_slaves), 1125 .slaves_cnt = ARRAY_SIZE(omap2430_i2c2_slaves),
1152 .class = &i2c_class, 1126 .class = &i2c_class,
1153 .dev_attr = &i2c_dev_attr, 1127 .dev_attr = &i2c_dev_attr,
1154 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
1155}; 1128};
1156 1129
1157/* l4_wkup -> gpio1 */ 1130/* l4_wkup -> gpio1 */
@@ -1273,7 +1246,6 @@ static struct omap_hwmod omap2430_gpio1_hwmod = {
1273 .slaves_cnt = ARRAY_SIZE(omap2430_gpio1_slaves), 1246 .slaves_cnt = ARRAY_SIZE(omap2430_gpio1_slaves),
1274 .class = &omap2xxx_gpio_hwmod_class, 1247 .class = &omap2xxx_gpio_hwmod_class,
1275 .dev_attr = &gpio_dev_attr, 1248 .dev_attr = &gpio_dev_attr,
1276 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
1277}; 1249};
1278 1250
1279/* gpio2 */ 1251/* gpio2 */
@@ -1299,7 +1271,6 @@ static struct omap_hwmod omap2430_gpio2_hwmod = {
1299 .slaves_cnt = ARRAY_SIZE(omap2430_gpio2_slaves), 1271 .slaves_cnt = ARRAY_SIZE(omap2430_gpio2_slaves),
1300 .class = &omap2xxx_gpio_hwmod_class, 1272 .class = &omap2xxx_gpio_hwmod_class,
1301 .dev_attr = &gpio_dev_attr, 1273 .dev_attr = &gpio_dev_attr,
1302 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
1303}; 1274};
1304 1275
1305/* gpio3 */ 1276/* gpio3 */
@@ -1325,7 +1296,6 @@ static struct omap_hwmod omap2430_gpio3_hwmod = {
1325 .slaves_cnt = ARRAY_SIZE(omap2430_gpio3_slaves), 1296 .slaves_cnt = ARRAY_SIZE(omap2430_gpio3_slaves),
1326 .class = &omap2xxx_gpio_hwmod_class, 1297 .class = &omap2xxx_gpio_hwmod_class,
1327 .dev_attr = &gpio_dev_attr, 1298 .dev_attr = &gpio_dev_attr,
1328 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
1329}; 1299};
1330 1300
1331/* gpio4 */ 1301/* gpio4 */
@@ -1351,7 +1321,6 @@ static struct omap_hwmod omap2430_gpio4_hwmod = {
1351 .slaves_cnt = ARRAY_SIZE(omap2430_gpio4_slaves), 1321 .slaves_cnt = ARRAY_SIZE(omap2430_gpio4_slaves),
1352 .class = &omap2xxx_gpio_hwmod_class, 1322 .class = &omap2xxx_gpio_hwmod_class,
1353 .dev_attr = &gpio_dev_attr, 1323 .dev_attr = &gpio_dev_attr,
1354 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
1355}; 1324};
1356 1325
1357/* gpio5 */ 1326/* gpio5 */
@@ -1382,7 +1351,6 @@ static struct omap_hwmod omap2430_gpio5_hwmod = {
1382 .slaves_cnt = ARRAY_SIZE(omap2430_gpio5_slaves), 1351 .slaves_cnt = ARRAY_SIZE(omap2430_gpio5_slaves),
1383 .class = &omap2xxx_gpio_hwmod_class, 1352 .class = &omap2xxx_gpio_hwmod_class,
1384 .dev_attr = &gpio_dev_attr, 1353 .dev_attr = &gpio_dev_attr,
1385 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
1386}; 1354};
1387 1355
1388/* dma attributes */ 1356/* dma attributes */
@@ -1429,7 +1397,6 @@ static struct omap_hwmod omap2430_dma_system_hwmod = {
1429 .masters = omap2430_dma_system_masters, 1397 .masters = omap2430_dma_system_masters,
1430 .masters_cnt = ARRAY_SIZE(omap2430_dma_system_masters), 1398 .masters_cnt = ARRAY_SIZE(omap2430_dma_system_masters),
1431 .dev_attr = &dma_dev_attr, 1399 .dev_attr = &dma_dev_attr,
1432 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
1433 .flags = HWMOD_NO_IDLEST, 1400 .flags = HWMOD_NO_IDLEST,
1434}; 1401};
1435 1402
@@ -1469,7 +1436,6 @@ static struct omap_hwmod omap2430_mailbox_hwmod = {
1469 }, 1436 },
1470 .slaves = omap2430_mailbox_slaves, 1437 .slaves = omap2430_mailbox_slaves,
1471 .slaves_cnt = ARRAY_SIZE(omap2430_mailbox_slaves), 1438 .slaves_cnt = ARRAY_SIZE(omap2430_mailbox_slaves),
1472 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
1473}; 1439};
1474 1440
1475/* mcspi1 */ 1441/* mcspi1 */
@@ -1499,7 +1465,6 @@ static struct omap_hwmod omap2430_mcspi1_hwmod = {
1499 .slaves_cnt = ARRAY_SIZE(omap2430_mcspi1_slaves), 1465 .slaves_cnt = ARRAY_SIZE(omap2430_mcspi1_slaves),
1500 .class = &omap2xxx_mcspi_class, 1466 .class = &omap2xxx_mcspi_class,
1501 .dev_attr = &omap_mcspi1_dev_attr, 1467 .dev_attr = &omap_mcspi1_dev_attr,
1502 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
1503}; 1468};
1504 1469
1505/* mcspi2 */ 1470/* mcspi2 */
@@ -1529,7 +1494,6 @@ static struct omap_hwmod omap2430_mcspi2_hwmod = {
1529 .slaves_cnt = ARRAY_SIZE(omap2430_mcspi2_slaves), 1494 .slaves_cnt = ARRAY_SIZE(omap2430_mcspi2_slaves),
1530 .class = &omap2xxx_mcspi_class, 1495 .class = &omap2xxx_mcspi_class,
1531 .dev_attr = &omap_mcspi2_dev_attr, 1496 .dev_attr = &omap_mcspi2_dev_attr,
1532 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
1533}; 1497};
1534 1498
1535/* mcspi3 */ 1499/* mcspi3 */
@@ -1572,7 +1536,6 @@ static struct omap_hwmod omap2430_mcspi3_hwmod = {
1572 .slaves_cnt = ARRAY_SIZE(omap2430_mcspi3_slaves), 1536 .slaves_cnt = ARRAY_SIZE(omap2430_mcspi3_slaves),
1573 .class = &omap2xxx_mcspi_class, 1537 .class = &omap2xxx_mcspi_class,
1574 .dev_attr = &omap_mcspi3_dev_attr, 1538 .dev_attr = &omap_mcspi3_dev_attr,
1575 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
1576}; 1539};
1577 1540
1578/* 1541/*
@@ -1628,7 +1591,6 @@ static struct omap_hwmod omap2430_usbhsotg_hwmod = {
1628 */ 1591 */
1629 .flags = HWMOD_NO_OCP_AUTOIDLE | HWMOD_SWSUP_SIDLE 1592 .flags = HWMOD_NO_OCP_AUTOIDLE | HWMOD_SWSUP_SIDLE
1630 | HWMOD_SWSUP_MSTANDBY, 1593 | HWMOD_SWSUP_MSTANDBY,
1631 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
1632}; 1594};
1633 1595
1634/* 1596/*
@@ -1689,7 +1651,6 @@ static struct omap_hwmod omap2430_mcbsp1_hwmod = {
1689 }, 1651 },
1690 .slaves = omap2430_mcbsp1_slaves, 1652 .slaves = omap2430_mcbsp1_slaves,
1691 .slaves_cnt = ARRAY_SIZE(omap2430_mcbsp1_slaves), 1653 .slaves_cnt = ARRAY_SIZE(omap2430_mcbsp1_slaves),
1692 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
1693}; 1654};
1694 1655
1695/* mcbsp2 */ 1656/* mcbsp2 */
@@ -1731,7 +1692,6 @@ static struct omap_hwmod omap2430_mcbsp2_hwmod = {
1731 }, 1692 },
1732 .slaves = omap2430_mcbsp2_slaves, 1693 .slaves = omap2430_mcbsp2_slaves,
1733 .slaves_cnt = ARRAY_SIZE(omap2430_mcbsp2_slaves), 1694 .slaves_cnt = ARRAY_SIZE(omap2430_mcbsp2_slaves),
1734 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
1735}; 1695};
1736 1696
1737/* mcbsp3 */ 1697/* mcbsp3 */
@@ -1783,7 +1743,6 @@ static struct omap_hwmod omap2430_mcbsp3_hwmod = {
1783 }, 1743 },
1784 .slaves = omap2430_mcbsp3_slaves, 1744 .slaves = omap2430_mcbsp3_slaves,
1785 .slaves_cnt = ARRAY_SIZE(omap2430_mcbsp3_slaves), 1745 .slaves_cnt = ARRAY_SIZE(omap2430_mcbsp3_slaves),
1786 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
1787}; 1746};
1788 1747
1789/* mcbsp4 */ 1748/* mcbsp4 */
@@ -1841,7 +1800,6 @@ static struct omap_hwmod omap2430_mcbsp4_hwmod = {
1841 }, 1800 },
1842 .slaves = omap2430_mcbsp4_slaves, 1801 .slaves = omap2430_mcbsp4_slaves,
1843 .slaves_cnt = ARRAY_SIZE(omap2430_mcbsp4_slaves), 1802 .slaves_cnt = ARRAY_SIZE(omap2430_mcbsp4_slaves),
1844 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
1845}; 1803};
1846 1804
1847/* mcbsp5 */ 1805/* mcbsp5 */
@@ -1899,7 +1857,6 @@ static struct omap_hwmod omap2430_mcbsp5_hwmod = {
1899 }, 1857 },
1900 .slaves = omap2430_mcbsp5_slaves, 1858 .slaves = omap2430_mcbsp5_slaves,
1901 .slaves_cnt = ARRAY_SIZE(omap2430_mcbsp5_slaves), 1859 .slaves_cnt = ARRAY_SIZE(omap2430_mcbsp5_slaves),
1902 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
1903}; 1860};
1904 1861
1905/* MMC/SD/SDIO common */ 1862/* MMC/SD/SDIO common */
@@ -1966,7 +1923,6 @@ static struct omap_hwmod omap2430_mmc1_hwmod = {
1966 .slaves = omap2430_mmc1_slaves, 1923 .slaves = omap2430_mmc1_slaves,
1967 .slaves_cnt = ARRAY_SIZE(omap2430_mmc1_slaves), 1924 .slaves_cnt = ARRAY_SIZE(omap2430_mmc1_slaves),
1968 .class = &omap2430_mmc_class, 1925 .class = &omap2430_mmc_class,
1969 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
1970}; 1926};
1971 1927
1972/* MMC/SD/SDIO2 */ 1928/* MMC/SD/SDIO2 */
@@ -2010,7 +1966,6 @@ static struct omap_hwmod omap2430_mmc2_hwmod = {
2010 .slaves = omap2430_mmc2_slaves, 1966 .slaves = omap2430_mmc2_slaves,
2011 .slaves_cnt = ARRAY_SIZE(omap2430_mmc2_slaves), 1967 .slaves_cnt = ARRAY_SIZE(omap2430_mmc2_slaves),
2012 .class = &omap2430_mmc_class, 1968 .class = &omap2430_mmc_class,
2013 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
2014}; 1969};
2015 1970
2016static __initdata struct omap_hwmod *omap2430_hwmods[] = { 1971static __initdata struct omap_hwmod *omap2430_hwmods[] = {
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index 25bf43b5a4ec..ab35acbc2d1d 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -156,7 +156,6 @@ static struct omap_hwmod omap3xxx_l3_main_hwmod = {
156 .masters_cnt = ARRAY_SIZE(omap3xxx_l3_main_masters), 156 .masters_cnt = ARRAY_SIZE(omap3xxx_l3_main_masters),
157 .slaves = omap3xxx_l3_main_slaves, 157 .slaves = omap3xxx_l3_main_slaves,
158 .slaves_cnt = ARRAY_SIZE(omap3xxx_l3_main_slaves), 158 .slaves_cnt = ARRAY_SIZE(omap3xxx_l3_main_slaves),
159 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
160 .flags = HWMOD_NO_IDLEST, 159 .flags = HWMOD_NO_IDLEST,
161}; 160};
162 161
@@ -459,7 +458,6 @@ static struct omap_hwmod omap3xxx_l4_core_hwmod = {
459 .class = &l4_hwmod_class, 458 .class = &l4_hwmod_class,
460 .slaves = omap3xxx_l4_core_slaves, 459 .slaves = omap3xxx_l4_core_slaves,
461 .slaves_cnt = ARRAY_SIZE(omap3xxx_l4_core_slaves), 460 .slaves_cnt = ARRAY_SIZE(omap3xxx_l4_core_slaves),
462 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
463 .flags = HWMOD_NO_IDLEST, 461 .flags = HWMOD_NO_IDLEST,
464}; 462};
465 463
@@ -474,7 +472,6 @@ static struct omap_hwmod omap3xxx_l4_per_hwmod = {
474 .class = &l4_hwmod_class, 472 .class = &l4_hwmod_class,
475 .slaves = omap3xxx_l4_per_slaves, 473 .slaves = omap3xxx_l4_per_slaves,
476 .slaves_cnt = ARRAY_SIZE(omap3xxx_l4_per_slaves), 474 .slaves_cnt = ARRAY_SIZE(omap3xxx_l4_per_slaves),
477 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
478 .flags = HWMOD_NO_IDLEST, 475 .flags = HWMOD_NO_IDLEST,
479}; 476};
480 477
@@ -489,7 +486,6 @@ static struct omap_hwmod omap3xxx_l4_wkup_hwmod = {
489 .class = &l4_hwmod_class, 486 .class = &l4_hwmod_class,
490 .slaves = omap3xxx_l4_wkup_slaves, 487 .slaves = omap3xxx_l4_wkup_slaves,
491 .slaves_cnt = ARRAY_SIZE(omap3xxx_l4_wkup_slaves), 488 .slaves_cnt = ARRAY_SIZE(omap3xxx_l4_wkup_slaves),
492 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
493 .flags = HWMOD_NO_IDLEST, 489 .flags = HWMOD_NO_IDLEST,
494}; 490};
495 491
@@ -505,7 +501,6 @@ static struct omap_hwmod omap3xxx_mpu_hwmod = {
505 .main_clk = "arm_fck", 501 .main_clk = "arm_fck",
506 .masters = omap3xxx_mpu_masters, 502 .masters = omap3xxx_mpu_masters,
507 .masters_cnt = ARRAY_SIZE(omap3xxx_mpu_masters), 503 .masters_cnt = ARRAY_SIZE(omap3xxx_mpu_masters),
508 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
509}; 504};
510 505
511/* 506/*
@@ -533,7 +528,6 @@ static struct omap_hwmod omap3xxx_iva_hwmod = {
533 .class = &iva_hwmod_class, 528 .class = &iva_hwmod_class,
534 .masters = omap3xxx_iva_masters, 529 .masters = omap3xxx_iva_masters,
535 .masters_cnt = ARRAY_SIZE(omap3xxx_iva_masters), 530 .masters_cnt = ARRAY_SIZE(omap3xxx_iva_masters),
536 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
537}; 531};
538 532
539/* timer class */ 533/* timer class */
@@ -613,7 +607,6 @@ static struct omap_hwmod omap3xxx_timer1_hwmod = {
613 .slaves = omap3xxx_timer1_slaves, 607 .slaves = omap3xxx_timer1_slaves,
614 .slaves_cnt = ARRAY_SIZE(omap3xxx_timer1_slaves), 608 .slaves_cnt = ARRAY_SIZE(omap3xxx_timer1_slaves),
615 .class = &omap3xxx_timer_1ms_hwmod_class, 609 .class = &omap3xxx_timer_1ms_hwmod_class,
616 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
617}; 610};
618 611
619/* timer2 */ 612/* timer2 */
@@ -659,7 +652,6 @@ static struct omap_hwmod omap3xxx_timer2_hwmod = {
659 .slaves = omap3xxx_timer2_slaves, 652 .slaves = omap3xxx_timer2_slaves,
660 .slaves_cnt = ARRAY_SIZE(omap3xxx_timer2_slaves), 653 .slaves_cnt = ARRAY_SIZE(omap3xxx_timer2_slaves),
661 .class = &omap3xxx_timer_1ms_hwmod_class, 654 .class = &omap3xxx_timer_1ms_hwmod_class,
662 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
663}; 655};
664 656
665/* timer3 */ 657/* timer3 */
@@ -705,7 +697,6 @@ static struct omap_hwmod omap3xxx_timer3_hwmod = {
705 .slaves = omap3xxx_timer3_slaves, 697 .slaves = omap3xxx_timer3_slaves,
706 .slaves_cnt = ARRAY_SIZE(omap3xxx_timer3_slaves), 698 .slaves_cnt = ARRAY_SIZE(omap3xxx_timer3_slaves),
707 .class = &omap3xxx_timer_hwmod_class, 699 .class = &omap3xxx_timer_hwmod_class,
708 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
709}; 700};
710 701
711/* timer4 */ 702/* timer4 */
@@ -751,7 +742,6 @@ static struct omap_hwmod omap3xxx_timer4_hwmod = {
751 .slaves = omap3xxx_timer4_slaves, 742 .slaves = omap3xxx_timer4_slaves,
752 .slaves_cnt = ARRAY_SIZE(omap3xxx_timer4_slaves), 743 .slaves_cnt = ARRAY_SIZE(omap3xxx_timer4_slaves),
753 .class = &omap3xxx_timer_hwmod_class, 744 .class = &omap3xxx_timer_hwmod_class,
754 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
755}; 745};
756 746
757/* timer5 */ 747/* timer5 */
@@ -797,7 +787,6 @@ static struct omap_hwmod omap3xxx_timer5_hwmod = {
797 .slaves = omap3xxx_timer5_slaves, 787 .slaves = omap3xxx_timer5_slaves,
798 .slaves_cnt = ARRAY_SIZE(omap3xxx_timer5_slaves), 788 .slaves_cnt = ARRAY_SIZE(omap3xxx_timer5_slaves),
799 .class = &omap3xxx_timer_hwmod_class, 789 .class = &omap3xxx_timer_hwmod_class,
800 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
801}; 790};
802 791
803/* timer6 */ 792/* timer6 */
@@ -843,7 +832,6 @@ static struct omap_hwmod omap3xxx_timer6_hwmod = {
843 .slaves = omap3xxx_timer6_slaves, 832 .slaves = omap3xxx_timer6_slaves,
844 .slaves_cnt = ARRAY_SIZE(omap3xxx_timer6_slaves), 833 .slaves_cnt = ARRAY_SIZE(omap3xxx_timer6_slaves),
845 .class = &omap3xxx_timer_hwmod_class, 834 .class = &omap3xxx_timer_hwmod_class,
846 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
847}; 835};
848 836
849/* timer7 */ 837/* timer7 */
@@ -889,7 +877,6 @@ static struct omap_hwmod omap3xxx_timer7_hwmod = {
889 .slaves = omap3xxx_timer7_slaves, 877 .slaves = omap3xxx_timer7_slaves,
890 .slaves_cnt = ARRAY_SIZE(omap3xxx_timer7_slaves), 878 .slaves_cnt = ARRAY_SIZE(omap3xxx_timer7_slaves),
891 .class = &omap3xxx_timer_hwmod_class, 879 .class = &omap3xxx_timer_hwmod_class,
892 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
893}; 880};
894 881
895/* timer8 */ 882/* timer8 */
@@ -935,7 +922,6 @@ static struct omap_hwmod omap3xxx_timer8_hwmod = {
935 .slaves = omap3xxx_timer8_slaves, 922 .slaves = omap3xxx_timer8_slaves,
936 .slaves_cnt = ARRAY_SIZE(omap3xxx_timer8_slaves), 923 .slaves_cnt = ARRAY_SIZE(omap3xxx_timer8_slaves),
937 .class = &omap3xxx_timer_hwmod_class, 924 .class = &omap3xxx_timer_hwmod_class,
938 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
939}; 925};
940 926
941/* timer9 */ 927/* timer9 */
@@ -981,7 +967,6 @@ static struct omap_hwmod omap3xxx_timer9_hwmod = {
981 .slaves = omap3xxx_timer9_slaves, 967 .slaves = omap3xxx_timer9_slaves,
982 .slaves_cnt = ARRAY_SIZE(omap3xxx_timer9_slaves), 968 .slaves_cnt = ARRAY_SIZE(omap3xxx_timer9_slaves),
983 .class = &omap3xxx_timer_hwmod_class, 969 .class = &omap3xxx_timer_hwmod_class,
984 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
985}; 970};
986 971
987/* timer10 */ 972/* timer10 */
@@ -1018,7 +1003,6 @@ static struct omap_hwmod omap3xxx_timer10_hwmod = {
1018 .slaves = omap3xxx_timer10_slaves, 1003 .slaves = omap3xxx_timer10_slaves,
1019 .slaves_cnt = ARRAY_SIZE(omap3xxx_timer10_slaves), 1004 .slaves_cnt = ARRAY_SIZE(omap3xxx_timer10_slaves),
1020 .class = &omap3xxx_timer_1ms_hwmod_class, 1005 .class = &omap3xxx_timer_1ms_hwmod_class,
1021 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
1022}; 1006};
1023 1007
1024/* timer11 */ 1008/* timer11 */
@@ -1055,7 +1039,6 @@ static struct omap_hwmod omap3xxx_timer11_hwmod = {
1055 .slaves = omap3xxx_timer11_slaves, 1039 .slaves = omap3xxx_timer11_slaves,
1056 .slaves_cnt = ARRAY_SIZE(omap3xxx_timer11_slaves), 1040 .slaves_cnt = ARRAY_SIZE(omap3xxx_timer11_slaves),
1057 .class = &omap3xxx_timer_hwmod_class, 1041 .class = &omap3xxx_timer_hwmod_class,
1058 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
1059}; 1042};
1060 1043
1061/* timer12*/ 1044/* timer12*/
@@ -1105,7 +1088,6 @@ static struct omap_hwmod omap3xxx_timer12_hwmod = {
1105 .slaves = omap3xxx_timer12_slaves, 1088 .slaves = omap3xxx_timer12_slaves,
1106 .slaves_cnt = ARRAY_SIZE(omap3xxx_timer12_slaves), 1089 .slaves_cnt = ARRAY_SIZE(omap3xxx_timer12_slaves),
1107 .class = &omap3xxx_timer_hwmod_class, 1090 .class = &omap3xxx_timer_hwmod_class,
1108 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
1109}; 1091};
1110 1092
1111/* l4_wkup -> wd_timer2 */ 1093/* l4_wkup -> wd_timer2 */
@@ -1182,7 +1164,6 @@ static struct omap_hwmod omap3xxx_wd_timer2_hwmod = {
1182 }, 1164 },
1183 .slaves = omap3xxx_wd_timer2_slaves, 1165 .slaves = omap3xxx_wd_timer2_slaves,
1184 .slaves_cnt = ARRAY_SIZE(omap3xxx_wd_timer2_slaves), 1166 .slaves_cnt = ARRAY_SIZE(omap3xxx_wd_timer2_slaves),
1185 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
1186 /* 1167 /*
1187 * XXX: Use software supervised mode, HW supervised smartidle seems to 1168 * XXX: Use software supervised mode, HW supervised smartidle seems to
1188 * block CORE power domain idle transitions. Maybe a HW bug in wdt2? 1169 * block CORE power domain idle transitions. Maybe a HW bug in wdt2?
@@ -1213,7 +1194,6 @@ static struct omap_hwmod omap3xxx_uart1_hwmod = {
1213 .slaves = omap3xxx_uart1_slaves, 1194 .slaves = omap3xxx_uart1_slaves,
1214 .slaves_cnt = ARRAY_SIZE(omap3xxx_uart1_slaves), 1195 .slaves_cnt = ARRAY_SIZE(omap3xxx_uart1_slaves),
1215 .class = &omap2_uart_class, 1196 .class = &omap2_uart_class,
1216 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
1217}; 1197};
1218 1198
1219/* UART2 */ 1199/* UART2 */
@@ -1239,7 +1219,6 @@ static struct omap_hwmod omap3xxx_uart2_hwmod = {
1239 .slaves = omap3xxx_uart2_slaves, 1219 .slaves = omap3xxx_uart2_slaves,
1240 .slaves_cnt = ARRAY_SIZE(omap3xxx_uart2_slaves), 1220 .slaves_cnt = ARRAY_SIZE(omap3xxx_uart2_slaves),
1241 .class = &omap2_uart_class, 1221 .class = &omap2_uart_class,
1242 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
1243}; 1222};
1244 1223
1245/* UART3 */ 1224/* UART3 */
@@ -1265,7 +1244,6 @@ static struct omap_hwmod omap3xxx_uart3_hwmod = {
1265 .slaves = omap3xxx_uart3_slaves, 1244 .slaves = omap3xxx_uart3_slaves,
1266 .slaves_cnt = ARRAY_SIZE(omap3xxx_uart3_slaves), 1245 .slaves_cnt = ARRAY_SIZE(omap3xxx_uart3_slaves),
1267 .class = &omap2_uart_class, 1246 .class = &omap2_uart_class,
1268 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
1269}; 1247};
1270 1248
1271/* UART4 */ 1249/* UART4 */
@@ -1302,7 +1280,6 @@ static struct omap_hwmod omap3xxx_uart4_hwmod = {
1302 .slaves = omap3xxx_uart4_slaves, 1280 .slaves = omap3xxx_uart4_slaves,
1303 .slaves_cnt = ARRAY_SIZE(omap3xxx_uart4_slaves), 1281 .slaves_cnt = ARRAY_SIZE(omap3xxx_uart4_slaves),
1304 .class = &omap2_uart_class, 1282 .class = &omap2_uart_class,
1305 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3630ES1),
1306}; 1283};
1307 1284
1308static struct omap_hwmod_class i2c_class = { 1285static struct omap_hwmod_class i2c_class = {
@@ -1390,7 +1367,6 @@ static struct omap_hwmod omap3430es1_dss_core_hwmod = {
1390 .slaves_cnt = ARRAY_SIZE(omap3430es1_dss_slaves), 1367 .slaves_cnt = ARRAY_SIZE(omap3430es1_dss_slaves),
1391 .masters = omap3xxx_dss_masters, 1368 .masters = omap3xxx_dss_masters,
1392 .masters_cnt = ARRAY_SIZE(omap3xxx_dss_masters), 1369 .masters_cnt = ARRAY_SIZE(omap3xxx_dss_masters),
1393 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES1),
1394 .flags = HWMOD_NO_IDLEST, 1370 .flags = HWMOD_NO_IDLEST,
1395}; 1371};
1396 1372
@@ -1415,8 +1391,6 @@ static struct omap_hwmod omap3xxx_dss_core_hwmod = {
1415 .slaves_cnt = ARRAY_SIZE(omap3xxx_dss_slaves), 1391 .slaves_cnt = ARRAY_SIZE(omap3xxx_dss_slaves),
1416 .masters = omap3xxx_dss_masters, 1392 .masters = omap3xxx_dss_masters,
1417 .masters_cnt = ARRAY_SIZE(omap3xxx_dss_masters), 1393 .masters_cnt = ARRAY_SIZE(omap3xxx_dss_masters),
1418 .omap_chip = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES2 |
1419 CHIP_IS_OMAP3630ES1 | CHIP_GE_OMAP3630ES1_1),
1420}; 1394};
1421 1395
1422/* l4_core -> dss_dispc */ 1396/* l4_core -> dss_dispc */
@@ -1454,9 +1428,6 @@ static struct omap_hwmod omap3xxx_dss_dispc_hwmod = {
1454 }, 1428 },
1455 .slaves = omap3xxx_dss_dispc_slaves, 1429 .slaves = omap3xxx_dss_dispc_slaves,
1456 .slaves_cnt = ARRAY_SIZE(omap3xxx_dss_dispc_slaves), 1430 .slaves_cnt = ARRAY_SIZE(omap3xxx_dss_dispc_slaves),
1457 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES1 |
1458 CHIP_GE_OMAP3430ES2 | CHIP_IS_OMAP3630ES1 |
1459 CHIP_GE_OMAP3630ES1_1),
1460 .flags = HWMOD_NO_IDLEST, 1431 .flags = HWMOD_NO_IDLEST,
1461}; 1432};
1462 1433
@@ -1518,9 +1489,6 @@ static struct omap_hwmod omap3xxx_dss_dsi1_hwmod = {
1518 }, 1489 },
1519 .slaves = omap3xxx_dss_dsi1_slaves, 1490 .slaves = omap3xxx_dss_dsi1_slaves,
1520 .slaves_cnt = ARRAY_SIZE(omap3xxx_dss_dsi1_slaves), 1491 .slaves_cnt = ARRAY_SIZE(omap3xxx_dss_dsi1_slaves),
1521 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES1 |
1522 CHIP_GE_OMAP3430ES2 | CHIP_IS_OMAP3630ES1 |
1523 CHIP_GE_OMAP3630ES1_1),
1524 .flags = HWMOD_NO_IDLEST, 1492 .flags = HWMOD_NO_IDLEST,
1525}; 1493};
1526 1494
@@ -1558,9 +1526,6 @@ static struct omap_hwmod omap3xxx_dss_rfbi_hwmod = {
1558 }, 1526 },
1559 .slaves = omap3xxx_dss_rfbi_slaves, 1527 .slaves = omap3xxx_dss_rfbi_slaves,
1560 .slaves_cnt = ARRAY_SIZE(omap3xxx_dss_rfbi_slaves), 1528 .slaves_cnt = ARRAY_SIZE(omap3xxx_dss_rfbi_slaves),
1561 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES1 |
1562 CHIP_GE_OMAP3430ES2 | CHIP_IS_OMAP3630ES1 |
1563 CHIP_GE_OMAP3630ES1_1),
1564 .flags = HWMOD_NO_IDLEST, 1529 .flags = HWMOD_NO_IDLEST,
1565}; 1530};
1566 1531
@@ -1599,9 +1564,6 @@ static struct omap_hwmod omap3xxx_dss_venc_hwmod = {
1599 }, 1564 },
1600 .slaves = omap3xxx_dss_venc_slaves, 1565 .slaves = omap3xxx_dss_venc_slaves,
1601 .slaves_cnt = ARRAY_SIZE(omap3xxx_dss_venc_slaves), 1566 .slaves_cnt = ARRAY_SIZE(omap3xxx_dss_venc_slaves),
1602 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES1 |
1603 CHIP_GE_OMAP3430ES2 | CHIP_IS_OMAP3630ES1 |
1604 CHIP_GE_OMAP3630ES1_1),
1605 .flags = HWMOD_NO_IDLEST, 1567 .flags = HWMOD_NO_IDLEST,
1606}; 1568};
1607 1569
@@ -1637,7 +1599,6 @@ static struct omap_hwmod omap3xxx_i2c1_hwmod = {
1637 .slaves_cnt = ARRAY_SIZE(omap3xxx_i2c1_slaves), 1599 .slaves_cnt = ARRAY_SIZE(omap3xxx_i2c1_slaves),
1638 .class = &i2c_class, 1600 .class = &i2c_class,
1639 .dev_attr = &i2c1_dev_attr, 1601 .dev_attr = &i2c1_dev_attr,
1640 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
1641}; 1602};
1642 1603
1643/* I2C2 */ 1604/* I2C2 */
@@ -1672,7 +1633,6 @@ static struct omap_hwmod omap3xxx_i2c2_hwmod = {
1672 .slaves_cnt = ARRAY_SIZE(omap3xxx_i2c2_slaves), 1633 .slaves_cnt = ARRAY_SIZE(omap3xxx_i2c2_slaves),
1673 .class = &i2c_class, 1634 .class = &i2c_class,
1674 .dev_attr = &i2c2_dev_attr, 1635 .dev_attr = &i2c2_dev_attr,
1675 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
1676}; 1636};
1677 1637
1678/* I2C3 */ 1638/* I2C3 */
@@ -1718,7 +1678,6 @@ static struct omap_hwmod omap3xxx_i2c3_hwmod = {
1718 .slaves_cnt = ARRAY_SIZE(omap3xxx_i2c3_slaves), 1678 .slaves_cnt = ARRAY_SIZE(omap3xxx_i2c3_slaves),
1719 .class = &i2c_class, 1679 .class = &i2c_class,
1720 .dev_attr = &i2c3_dev_attr, 1680 .dev_attr = &i2c3_dev_attr,
1721 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
1722}; 1681};
1723 1682
1724/* l4_wkup -> gpio1 */ 1683/* l4_wkup -> gpio1 */
@@ -1880,7 +1839,6 @@ static struct omap_hwmod omap3xxx_gpio1_hwmod = {
1880 .slaves_cnt = ARRAY_SIZE(omap3xxx_gpio1_slaves), 1839 .slaves_cnt = ARRAY_SIZE(omap3xxx_gpio1_slaves),
1881 .class = &omap3xxx_gpio_hwmod_class, 1840 .class = &omap3xxx_gpio_hwmod_class,
1882 .dev_attr = &gpio_dev_attr, 1841 .dev_attr = &gpio_dev_attr,
1883 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
1884}; 1842};
1885 1843
1886/* gpio2 */ 1844/* gpio2 */
@@ -1912,7 +1870,6 @@ static struct omap_hwmod omap3xxx_gpio2_hwmod = {
1912 .slaves_cnt = ARRAY_SIZE(omap3xxx_gpio2_slaves), 1870 .slaves_cnt = ARRAY_SIZE(omap3xxx_gpio2_slaves),
1913 .class = &omap3xxx_gpio_hwmod_class, 1871 .class = &omap3xxx_gpio_hwmod_class,
1914 .dev_attr = &gpio_dev_attr, 1872 .dev_attr = &gpio_dev_attr,
1915 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
1916}; 1873};
1917 1874
1918/* gpio3 */ 1875/* gpio3 */
@@ -1944,7 +1901,6 @@ static struct omap_hwmod omap3xxx_gpio3_hwmod = {
1944 .slaves_cnt = ARRAY_SIZE(omap3xxx_gpio3_slaves), 1901 .slaves_cnt = ARRAY_SIZE(omap3xxx_gpio3_slaves),
1945 .class = &omap3xxx_gpio_hwmod_class, 1902 .class = &omap3xxx_gpio_hwmod_class,
1946 .dev_attr = &gpio_dev_attr, 1903 .dev_attr = &gpio_dev_attr,
1947 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
1948}; 1904};
1949 1905
1950/* gpio4 */ 1906/* gpio4 */
@@ -1976,7 +1932,6 @@ static struct omap_hwmod omap3xxx_gpio4_hwmod = {
1976 .slaves_cnt = ARRAY_SIZE(omap3xxx_gpio4_slaves), 1932 .slaves_cnt = ARRAY_SIZE(omap3xxx_gpio4_slaves),
1977 .class = &omap3xxx_gpio_hwmod_class, 1933 .class = &omap3xxx_gpio_hwmod_class,
1978 .dev_attr = &gpio_dev_attr, 1934 .dev_attr = &gpio_dev_attr,
1979 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
1980}; 1935};
1981 1936
1982/* gpio5 */ 1937/* gpio5 */
@@ -2013,7 +1968,6 @@ static struct omap_hwmod omap3xxx_gpio5_hwmod = {
2013 .slaves_cnt = ARRAY_SIZE(omap3xxx_gpio5_slaves), 1968 .slaves_cnt = ARRAY_SIZE(omap3xxx_gpio5_slaves),
2014 .class = &omap3xxx_gpio_hwmod_class, 1969 .class = &omap3xxx_gpio_hwmod_class,
2015 .dev_attr = &gpio_dev_attr, 1970 .dev_attr = &gpio_dev_attr,
2016 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
2017}; 1971};
2018 1972
2019/* gpio6 */ 1973/* gpio6 */
@@ -2050,7 +2004,6 @@ static struct omap_hwmod omap3xxx_gpio6_hwmod = {
2050 .slaves_cnt = ARRAY_SIZE(omap3xxx_gpio6_slaves), 2004 .slaves_cnt = ARRAY_SIZE(omap3xxx_gpio6_slaves),
2051 .class = &omap3xxx_gpio_hwmod_class, 2005 .class = &omap3xxx_gpio_hwmod_class,
2052 .dev_attr = &gpio_dev_attr, 2006 .dev_attr = &gpio_dev_attr,
2053 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
2054}; 2007};
2055 2008
2056/* dma_system -> L3 */ 2009/* dma_system -> L3 */
@@ -2134,7 +2087,6 @@ static struct omap_hwmod omap3xxx_dma_system_hwmod = {
2134 .masters = omap3xxx_dma_system_masters, 2087 .masters = omap3xxx_dma_system_masters,
2135 .masters_cnt = ARRAY_SIZE(omap3xxx_dma_system_masters), 2088 .masters_cnt = ARRAY_SIZE(omap3xxx_dma_system_masters),
2136 .dev_attr = &dma_dev_attr, 2089 .dev_attr = &dma_dev_attr,
2137 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
2138 .flags = HWMOD_NO_IDLEST, 2090 .flags = HWMOD_NO_IDLEST,
2139}; 2091};
2140 2092
@@ -2207,7 +2159,6 @@ static struct omap_hwmod omap3xxx_mcbsp1_hwmod = {
2207 }, 2159 },
2208 .slaves = omap3xxx_mcbsp1_slaves, 2160 .slaves = omap3xxx_mcbsp1_slaves,
2209 .slaves_cnt = ARRAY_SIZE(omap3xxx_mcbsp1_slaves), 2161 .slaves_cnt = ARRAY_SIZE(omap3xxx_mcbsp1_slaves),
2210 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
2211}; 2162};
2212 2163
2213/* mcbsp2 */ 2164/* mcbsp2 */
@@ -2264,7 +2215,6 @@ static struct omap_hwmod omap3xxx_mcbsp2_hwmod = {
2264 .slaves = omap3xxx_mcbsp2_slaves, 2215 .slaves = omap3xxx_mcbsp2_slaves,
2265 .slaves_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_slaves), 2216 .slaves_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_slaves),
2266 .dev_attr = &omap34xx_mcbsp2_dev_attr, 2217 .dev_attr = &omap34xx_mcbsp2_dev_attr,
2267 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
2268}; 2218};
2269 2219
2270/* mcbsp3 */ 2220/* mcbsp3 */
@@ -2321,7 +2271,6 @@ static struct omap_hwmod omap3xxx_mcbsp3_hwmod = {
2321 .slaves = omap3xxx_mcbsp3_slaves, 2271 .slaves = omap3xxx_mcbsp3_slaves,
2322 .slaves_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_slaves), 2272 .slaves_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_slaves),
2323 .dev_attr = &omap34xx_mcbsp3_dev_attr, 2273 .dev_attr = &omap34xx_mcbsp3_dev_attr,
2324 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
2325}; 2274};
2326 2275
2327/* mcbsp4 */ 2276/* mcbsp4 */
@@ -2379,7 +2328,6 @@ static struct omap_hwmod omap3xxx_mcbsp4_hwmod = {
2379 }, 2328 },
2380 .slaves = omap3xxx_mcbsp4_slaves, 2329 .slaves = omap3xxx_mcbsp4_slaves,
2381 .slaves_cnt = ARRAY_SIZE(omap3xxx_mcbsp4_slaves), 2330 .slaves_cnt = ARRAY_SIZE(omap3xxx_mcbsp4_slaves),
2382 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
2383}; 2331};
2384 2332
2385/* mcbsp5 */ 2333/* mcbsp5 */
@@ -2437,7 +2385,6 @@ static struct omap_hwmod omap3xxx_mcbsp5_hwmod = {
2437 }, 2385 },
2438 .slaves = omap3xxx_mcbsp5_slaves, 2386 .slaves = omap3xxx_mcbsp5_slaves,
2439 .slaves_cnt = ARRAY_SIZE(omap3xxx_mcbsp5_slaves), 2387 .slaves_cnt = ARRAY_SIZE(omap3xxx_mcbsp5_slaves),
2440 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
2441}; 2388};
2442/* 'mcbsp sidetone' class */ 2389/* 'mcbsp sidetone' class */
2443 2390
@@ -2498,7 +2445,6 @@ static struct omap_hwmod omap3xxx_mcbsp2_sidetone_hwmod = {
2498 }, 2445 },
2499 .slaves = omap3xxx_mcbsp2_sidetone_slaves, 2446 .slaves = omap3xxx_mcbsp2_sidetone_slaves,
2500 .slaves_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_sidetone_slaves), 2447 .slaves_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_sidetone_slaves),
2501 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
2502}; 2448};
2503 2449
2504/* mcbsp3_sidetone */ 2450/* mcbsp3_sidetone */
@@ -2547,7 +2493,6 @@ static struct omap_hwmod omap3xxx_mcbsp3_sidetone_hwmod = {
2547 }, 2493 },
2548 .slaves = omap3xxx_mcbsp3_sidetone_slaves, 2494 .slaves = omap3xxx_mcbsp3_sidetone_slaves,
2549 .slaves_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_sidetone_slaves), 2495 .slaves_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_sidetone_slaves),
2550 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
2551}; 2496};
2552 2497
2553 2498
@@ -2609,9 +2554,6 @@ static struct omap_hwmod omap34xx_sr1_hwmod = {
2609 }, 2554 },
2610 .slaves = omap3_sr1_slaves, 2555 .slaves = omap3_sr1_slaves,
2611 .slaves_cnt = ARRAY_SIZE(omap3_sr1_slaves), 2556 .slaves_cnt = ARRAY_SIZE(omap3_sr1_slaves),
2612 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES2 |
2613 CHIP_IS_OMAP3430ES3_0 |
2614 CHIP_IS_OMAP3430ES3_1),
2615 .flags = HWMOD_SET_DEFAULT_CLOCKACT, 2557 .flags = HWMOD_SET_DEFAULT_CLOCKACT,
2616}; 2558};
2617 2559
@@ -2631,7 +2573,6 @@ static struct omap_hwmod omap36xx_sr1_hwmod = {
2631 }, 2573 },
2632 .slaves = omap3_sr1_slaves, 2574 .slaves = omap3_sr1_slaves,
2633 .slaves_cnt = ARRAY_SIZE(omap3_sr1_slaves), 2575 .slaves_cnt = ARRAY_SIZE(omap3_sr1_slaves),
2634 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3630ES1),
2635}; 2576};
2636 2577
2637/* SR2 */ 2578/* SR2 */
@@ -2655,9 +2596,6 @@ static struct omap_hwmod omap34xx_sr2_hwmod = {
2655 }, 2596 },
2656 .slaves = omap3_sr2_slaves, 2597 .slaves = omap3_sr2_slaves,
2657 .slaves_cnt = ARRAY_SIZE(omap3_sr2_slaves), 2598 .slaves_cnt = ARRAY_SIZE(omap3_sr2_slaves),
2658 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES2 |
2659 CHIP_IS_OMAP3430ES3_0 |
2660 CHIP_IS_OMAP3430ES3_1),
2661 .flags = HWMOD_SET_DEFAULT_CLOCKACT, 2599 .flags = HWMOD_SET_DEFAULT_CLOCKACT,
2662}; 2600};
2663 2601
@@ -2677,7 +2615,6 @@ static struct omap_hwmod omap36xx_sr2_hwmod = {
2677 }, 2615 },
2678 .slaves = omap3_sr2_slaves, 2616 .slaves = omap3_sr2_slaves,
2679 .slaves_cnt = ARRAY_SIZE(omap3_sr2_slaves), 2617 .slaves_cnt = ARRAY_SIZE(omap3_sr2_slaves),
2680 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3630ES1),
2681}; 2618};
2682 2619
2683/* 2620/*
@@ -2745,7 +2682,6 @@ static struct omap_hwmod omap3xxx_mailbox_hwmod = {
2745 }, 2682 },
2746 .slaves = omap3xxx_mailbox_slaves, 2683 .slaves = omap3xxx_mailbox_slaves,
2747 .slaves_cnt = ARRAY_SIZE(omap3xxx_mailbox_slaves), 2684 .slaves_cnt = ARRAY_SIZE(omap3xxx_mailbox_slaves),
2748 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
2749}; 2685};
2750 2686
2751/* l4 core -> mcspi1 interface */ 2687/* l4 core -> mcspi1 interface */
@@ -2843,7 +2779,6 @@ static struct omap_hwmod omap34xx_mcspi1 = {
2843 .slaves_cnt = ARRAY_SIZE(omap34xx_mcspi1_slaves), 2779 .slaves_cnt = ARRAY_SIZE(omap34xx_mcspi1_slaves),
2844 .class = &omap34xx_mcspi_class, 2780 .class = &omap34xx_mcspi_class,
2845 .dev_attr = &omap_mcspi1_dev_attr, 2781 .dev_attr = &omap_mcspi1_dev_attr,
2846 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
2847}; 2782};
2848 2783
2849/* mcspi2 */ 2784/* mcspi2 */
@@ -2873,7 +2808,6 @@ static struct omap_hwmod omap34xx_mcspi2 = {
2873 .slaves_cnt = ARRAY_SIZE(omap34xx_mcspi2_slaves), 2808 .slaves_cnt = ARRAY_SIZE(omap34xx_mcspi2_slaves),
2874 .class = &omap34xx_mcspi_class, 2809 .class = &omap34xx_mcspi_class,
2875 .dev_attr = &omap_mcspi2_dev_attr, 2810 .dev_attr = &omap_mcspi2_dev_attr,
2876 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
2877}; 2811};
2878 2812
2879/* mcspi3 */ 2813/* mcspi3 */
@@ -2916,7 +2850,6 @@ static struct omap_hwmod omap34xx_mcspi3 = {
2916 .slaves_cnt = ARRAY_SIZE(omap34xx_mcspi3_slaves), 2850 .slaves_cnt = ARRAY_SIZE(omap34xx_mcspi3_slaves),
2917 .class = &omap34xx_mcspi_class, 2851 .class = &omap34xx_mcspi_class,
2918 .dev_attr = &omap_mcspi3_dev_attr, 2852 .dev_attr = &omap_mcspi3_dev_attr,
2919 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
2920}; 2853};
2921 2854
2922/* SPI4 */ 2855/* SPI4 */
@@ -2957,7 +2890,6 @@ static struct omap_hwmod omap34xx_mcspi4 = {
2957 .slaves_cnt = ARRAY_SIZE(omap34xx_mcspi4_slaves), 2890 .slaves_cnt = ARRAY_SIZE(omap34xx_mcspi4_slaves),
2958 .class = &omap34xx_mcspi_class, 2891 .class = &omap34xx_mcspi_class,
2959 .dev_attr = &omap_mcspi4_dev_attr, 2892 .dev_attr = &omap_mcspi4_dev_attr,
2960 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
2961}; 2893};
2962 2894
2963/* 2895/*
@@ -3014,7 +2946,6 @@ static struct omap_hwmod omap3xxx_usbhsotg_hwmod = {
3014 */ 2946 */
3015 .flags = HWMOD_NO_OCP_AUTOIDLE | HWMOD_SWSUP_SIDLE 2947 .flags = HWMOD_NO_OCP_AUTOIDLE | HWMOD_SWSUP_SIDLE
3016 | HWMOD_SWSUP_MSTANDBY, 2948 | HWMOD_SWSUP_MSTANDBY,
3017 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
3018}; 2949};
3019 2950
3020/* usb_otg_hs */ 2951/* usb_otg_hs */
@@ -3042,7 +2973,6 @@ static struct omap_hwmod am35xx_usbhsotg_hwmod = {
3042 .slaves = am35xx_usbhsotg_slaves, 2973 .slaves = am35xx_usbhsotg_slaves,
3043 .slaves_cnt = ARRAY_SIZE(am35xx_usbhsotg_slaves), 2974 .slaves_cnt = ARRAY_SIZE(am35xx_usbhsotg_slaves),
3044 .class = &am35xx_usbotg_class, 2975 .class = &am35xx_usbotg_class,
3045 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES3_1)
3046}; 2976};
3047 2977
3048/* MMC/SD/SDIO common */ 2978/* MMC/SD/SDIO common */
@@ -3108,7 +3038,6 @@ static struct omap_hwmod omap3xxx_mmc1_hwmod = {
3108 .slaves = omap3xxx_mmc1_slaves, 3038 .slaves = omap3xxx_mmc1_slaves,
3109 .slaves_cnt = ARRAY_SIZE(omap3xxx_mmc1_slaves), 3039 .slaves_cnt = ARRAY_SIZE(omap3xxx_mmc1_slaves),
3110 .class = &omap34xx_mmc_class, 3040 .class = &omap34xx_mmc_class,
3111 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
3112}; 3041};
3113 3042
3114/* MMC/SD/SDIO2 */ 3043/* MMC/SD/SDIO2 */
@@ -3151,7 +3080,6 @@ static struct omap_hwmod omap3xxx_mmc2_hwmod = {
3151 .slaves = omap3xxx_mmc2_slaves, 3080 .slaves = omap3xxx_mmc2_slaves,
3152 .slaves_cnt = ARRAY_SIZE(omap3xxx_mmc2_slaves), 3081 .slaves_cnt = ARRAY_SIZE(omap3xxx_mmc2_slaves),
3153 .class = &omap34xx_mmc_class, 3082 .class = &omap34xx_mmc_class,
3154 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
3155}; 3083};
3156 3084
3157/* MMC/SD/SDIO3 */ 3085/* MMC/SD/SDIO3 */
@@ -3193,7 +3121,6 @@ static struct omap_hwmod omap3xxx_mmc3_hwmod = {
3193 .slaves = omap3xxx_mmc3_slaves, 3121 .slaves = omap3xxx_mmc3_slaves,
3194 .slaves_cnt = ARRAY_SIZE(omap3xxx_mmc3_slaves), 3122 .slaves_cnt = ARRAY_SIZE(omap3xxx_mmc3_slaves),
3195 .class = &omap34xx_mmc_class, 3123 .class = &omap34xx_mmc_class,
3196 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
3197}; 3124};
3198 3125
3199static __initdata struct omap_hwmod *omap3xxx_hwmods[] = { 3126static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
@@ -3224,10 +3151,7 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
3224 &omap3xxx_uart1_hwmod, 3151 &omap3xxx_uart1_hwmod,
3225 &omap3xxx_uart2_hwmod, 3152 &omap3xxx_uart2_hwmod,
3226 &omap3xxx_uart3_hwmod, 3153 &omap3xxx_uart3_hwmod,
3227 &omap3xxx_uart4_hwmod,
3228 /* dss class */ 3154 /* dss class */
3229 &omap3430es1_dss_core_hwmod,
3230 &omap3xxx_dss_core_hwmod,
3231 &omap3xxx_dss_dispc_hwmod, 3155 &omap3xxx_dss_dispc_hwmod,
3232 &omap3xxx_dss_dsi1_hwmod, 3156 &omap3xxx_dss_dsi1_hwmod,
3233 &omap3xxx_dss_rfbi_hwmod, 3157 &omap3xxx_dss_rfbi_hwmod,
@@ -3239,9 +3163,6 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
3239 &omap3xxx_i2c3_hwmod, 3163 &omap3xxx_i2c3_hwmod,
3240 &omap34xx_sr1_hwmod, 3164 &omap34xx_sr1_hwmod,
3241 &omap34xx_sr2_hwmod, 3165 &omap34xx_sr2_hwmod,
3242 &omap36xx_sr1_hwmod,
3243 &omap36xx_sr2_hwmod,
3244
3245 3166
3246 /* gpio class */ 3167 /* gpio class */
3247 &omap3xxx_gpio1_hwmod, 3168 &omap3xxx_gpio1_hwmod,
@@ -3272,16 +3193,96 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
3272 &omap34xx_mcspi3, 3193 &omap34xx_mcspi3,
3273 &omap34xx_mcspi4, 3194 &omap34xx_mcspi4,
3274 3195
3275 /* usbotg class */ 3196 NULL,
3197};
3198
3199/* 3430ES1-only hwmods */
3200static __initdata struct omap_hwmod *omap3430es1_hwmods[] = {
3201 &omap3430es1_dss_core_hwmod,
3202 NULL
3203};
3204
3205/* 3430ES2+-only hwmods */
3206static __initdata struct omap_hwmod *omap3430es2plus_hwmods[] = {
3207 &omap3xxx_dss_core_hwmod,
3276 &omap3xxx_usbhsotg_hwmod, 3208 &omap3xxx_usbhsotg_hwmod,
3209 NULL
3210};
3277 3211
3278 /* usbotg for am35x */ 3212/* 34xx-only hwmods (all ES revisions) */
3279 &am35xx_usbhsotg_hwmod, 3213static __initdata struct omap_hwmod *omap34xx_hwmods[] = {
3214 &omap34xx_sr1_hwmod,
3215 &omap34xx_sr2_hwmod,
3216 NULL
3217};
3280 3218
3281 NULL, 3219/* 36xx-only hwmods (all ES revisions) */
3220static __initdata struct omap_hwmod *omap36xx_hwmods[] = {
3221 &omap3xxx_uart4_hwmod,
3222 &omap3xxx_dss_core_hwmod,
3223 &omap36xx_sr1_hwmod,
3224 &omap36xx_sr2_hwmod,
3225 &omap3xxx_usbhsotg_hwmod,
3226 NULL
3227};
3228
3229static __initdata struct omap_hwmod *am35xx_hwmods[] = {
3230 &omap3xxx_dss_core_hwmod, /* XXX ??? */
3231 &am35xx_usbhsotg_hwmod,
3232 NULL
3282}; 3233};
3283 3234
3284int __init omap3xxx_hwmod_init(void) 3235int __init omap3xxx_hwmod_init(void)
3285{ 3236{
3286 return omap_hwmod_register(omap3xxx_hwmods); 3237 int r;
3238 struct omap_hwmod **h = NULL;
3239 unsigned int rev;
3240
3241 /* Register hwmods common to all OMAP3 */
3242 r = omap_hwmod_register(omap3xxx_hwmods);
3243 if (!r)
3244 return r;
3245
3246 rev = omap_rev();
3247
3248 /*
3249 * Register hwmods common to individual OMAP3 families, all
3250 * silicon revisions (e.g., 34xx, or AM3505/3517, or 36xx)
3251 * All possible revisions should be included in this conditional.
3252 */
3253 if (rev == OMAP3430_REV_ES1_0 || rev == OMAP3430_REV_ES2_0 ||
3254 rev == OMAP3430_REV_ES2_1 || rev == OMAP3430_REV_ES3_0 ||
3255 rev == OMAP3430_REV_ES3_1 || rev == OMAP3430_REV_ES3_1_2) {
3256 h = omap34xx_hwmods;
3257 } else if (rev == OMAP3517_REV_ES1_0 || rev == OMAP3517_REV_ES1_1) {
3258 h = am35xx_hwmods;
3259 } else if (rev == OMAP3630_REV_ES1_0 || rev == OMAP3630_REV_ES1_1 ||
3260 rev == OMAP3630_REV_ES1_2) {
3261 h = omap36xx_hwmods;
3262 } else {
3263 WARN(1, "OMAP3 hwmod family init: unknown chip type\n");
3264 return -EINVAL;
3265 };
3266
3267 r = omap_hwmod_register(h);
3268 if (!r)
3269 return r;
3270
3271 /*
3272 * Register hwmods specific to certain ES levels of a
3273 * particular family of silicon (e.g., 34xx ES1.0)
3274 */
3275 h = NULL;
3276 if (rev == OMAP3430_REV_ES1_0) {
3277 h = omap3430es1_hwmods;
3278 } else if (rev == OMAP3430_REV_ES2_0 || rev == OMAP3430_REV_ES2_1 ||
3279 rev == OMAP3430_REV_ES3_0 || rev == OMAP3430_REV_ES3_1 ||
3280 rev == OMAP3430_REV_ES3_1_2) {
3281 h = omap3430es2plus_hwmods;
3282 };
3283
3284 if (h)
3285 r = omap_hwmod_register(h);
3286
3287 return r;
3287} 3288}
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 79325c65c23c..fd1074a024b8 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -133,7 +133,6 @@ static struct omap_hwmod omap44xx_dmm_hwmod = {
133 .slaves = omap44xx_dmm_slaves, 133 .slaves = omap44xx_dmm_slaves,
134 .slaves_cnt = ARRAY_SIZE(omap44xx_dmm_slaves), 134 .slaves_cnt = ARRAY_SIZE(omap44xx_dmm_slaves),
135 .mpu_irqs = omap44xx_dmm_irqs, 135 .mpu_irqs = omap44xx_dmm_irqs,
136 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
137}; 136};
138 137
139/* 138/*
@@ -189,7 +188,6 @@ static struct omap_hwmod omap44xx_emif_fw_hwmod = {
189 }, 188 },
190 .slaves = omap44xx_emif_fw_slaves, 189 .slaves = omap44xx_emif_fw_slaves,
191 .slaves_cnt = ARRAY_SIZE(omap44xx_emif_fw_slaves), 190 .slaves_cnt = ARRAY_SIZE(omap44xx_emif_fw_slaves),
192 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
193}; 191};
194 192
195/* 193/*
@@ -236,7 +234,6 @@ static struct omap_hwmod omap44xx_l3_instr_hwmod = {
236 }, 234 },
237 .slaves = omap44xx_l3_instr_slaves, 235 .slaves = omap44xx_l3_instr_slaves,
238 .slaves_cnt = ARRAY_SIZE(omap44xx_l3_instr_slaves), 236 .slaves_cnt = ARRAY_SIZE(omap44xx_l3_instr_slaves),
239 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
240}; 237};
241 238
242/* l3_main_1 */ 239/* l3_main_1 */
@@ -336,7 +333,6 @@ static struct omap_hwmod omap44xx_l3_main_1_hwmod = {
336 }, 333 },
337 .slaves = omap44xx_l3_main_1_slaves, 334 .slaves = omap44xx_l3_main_1_slaves,
338 .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_1_slaves), 335 .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_1_slaves),
339 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
340}; 336};
341 337
342/* l3_main_2 */ 338/* l3_main_2 */
@@ -438,7 +434,6 @@ static struct omap_hwmod omap44xx_l3_main_2_hwmod = {
438 }, 434 },
439 .slaves = omap44xx_l3_main_2_slaves, 435 .slaves = omap44xx_l3_main_2_slaves,
440 .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_2_slaves), 436 .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_2_slaves),
441 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
442}; 437};
443 438
444/* l3_main_3 */ 439/* l3_main_3 */
@@ -496,7 +491,6 @@ static struct omap_hwmod omap44xx_l3_main_3_hwmod = {
496 }, 491 },
497 .slaves = omap44xx_l3_main_3_slaves, 492 .slaves = omap44xx_l3_main_3_slaves,
498 .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_3_slaves), 493 .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_3_slaves),
499 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
500}; 494};
501 495
502/* 496/*
@@ -559,7 +553,6 @@ static struct omap_hwmod omap44xx_l4_abe_hwmod = {
559 }, 553 },
560 .slaves = omap44xx_l4_abe_slaves, 554 .slaves = omap44xx_l4_abe_slaves,
561 .slaves_cnt = ARRAY_SIZE(omap44xx_l4_abe_slaves), 555 .slaves_cnt = ARRAY_SIZE(omap44xx_l4_abe_slaves),
562 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
563}; 556};
564 557
565/* l4_cfg */ 558/* l4_cfg */
@@ -588,7 +581,6 @@ static struct omap_hwmod omap44xx_l4_cfg_hwmod = {
588 }, 581 },
589 .slaves = omap44xx_l4_cfg_slaves, 582 .slaves = omap44xx_l4_cfg_slaves,
590 .slaves_cnt = ARRAY_SIZE(omap44xx_l4_cfg_slaves), 583 .slaves_cnt = ARRAY_SIZE(omap44xx_l4_cfg_slaves),
591 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
592}; 584};
593 585
594/* l4_per */ 586/* l4_per */
@@ -617,7 +609,6 @@ static struct omap_hwmod omap44xx_l4_per_hwmod = {
617 }, 609 },
618 .slaves = omap44xx_l4_per_slaves, 610 .slaves = omap44xx_l4_per_slaves,
619 .slaves_cnt = ARRAY_SIZE(omap44xx_l4_per_slaves), 611 .slaves_cnt = ARRAY_SIZE(omap44xx_l4_per_slaves),
620 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
621}; 612};
622 613
623/* l4_wkup */ 614/* l4_wkup */
@@ -646,7 +637,6 @@ static struct omap_hwmod omap44xx_l4_wkup_hwmod = {
646 }, 637 },
647 .slaves = omap44xx_l4_wkup_slaves, 638 .slaves = omap44xx_l4_wkup_slaves,
648 .slaves_cnt = ARRAY_SIZE(omap44xx_l4_wkup_slaves), 639 .slaves_cnt = ARRAY_SIZE(omap44xx_l4_wkup_slaves),
649 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
650}; 640};
651 641
652/* 642/*
@@ -677,7 +667,6 @@ static struct omap_hwmod omap44xx_mpu_private_hwmod = {
677 .clkdm_name = "mpuss_clkdm", 667 .clkdm_name = "mpuss_clkdm",
678 .slaves = omap44xx_mpu_private_slaves, 668 .slaves = omap44xx_mpu_private_slaves,
679 .slaves_cnt = ARRAY_SIZE(omap44xx_mpu_private_slaves), 669 .slaves_cnt = ARRAY_SIZE(omap44xx_mpu_private_slaves),
680 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
681}; 670};
682 671
683/* 672/*
@@ -828,7 +817,6 @@ static struct omap_hwmod omap44xx_aess_hwmod = {
828 .slaves_cnt = ARRAY_SIZE(omap44xx_aess_slaves), 817 .slaves_cnt = ARRAY_SIZE(omap44xx_aess_slaves),
829 .masters = omap44xx_aess_masters, 818 .masters = omap44xx_aess_masters,
830 .masters_cnt = ARRAY_SIZE(omap44xx_aess_masters), 819 .masters_cnt = ARRAY_SIZE(omap44xx_aess_masters),
831 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
832}; 820};
833 821
834/* 822/*
@@ -856,7 +844,6 @@ static struct omap_hwmod omap44xx_bandgap_hwmod = {
856 }, 844 },
857 .opt_clks = bandgap_opt_clks, 845 .opt_clks = bandgap_opt_clks,
858 .opt_clks_cnt = ARRAY_SIZE(bandgap_opt_clks), 846 .opt_clks_cnt = ARRAY_SIZE(bandgap_opt_clks),
859 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
860}; 847};
861 848
862/* 849/*
@@ -917,7 +904,6 @@ static struct omap_hwmod omap44xx_counter_32k_hwmod = {
917 }, 904 },
918 .slaves = omap44xx_counter_32k_slaves, 905 .slaves = omap44xx_counter_32k_slaves,
919 .slaves_cnt = ARRAY_SIZE(omap44xx_counter_32k_slaves), 906 .slaves_cnt = ARRAY_SIZE(omap44xx_counter_32k_slaves),
920 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
921}; 907};
922 908
923/* 909/*
@@ -1005,7 +991,6 @@ static struct omap_hwmod omap44xx_dma_system_hwmod = {
1005 .slaves_cnt = ARRAY_SIZE(omap44xx_dma_system_slaves), 991 .slaves_cnt = ARRAY_SIZE(omap44xx_dma_system_slaves),
1006 .masters = omap44xx_dma_system_masters, 992 .masters = omap44xx_dma_system_masters,
1007 .masters_cnt = ARRAY_SIZE(omap44xx_dma_system_masters), 993 .masters_cnt = ARRAY_SIZE(omap44xx_dma_system_masters),
1008 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
1009}; 994};
1010 995
1011/* 996/*
@@ -1098,7 +1083,6 @@ static struct omap_hwmod omap44xx_dmic_hwmod = {
1098 }, 1083 },
1099 .slaves = omap44xx_dmic_slaves, 1084 .slaves = omap44xx_dmic_slaves,
1100 .slaves_cnt = ARRAY_SIZE(omap44xx_dmic_slaves), 1085 .slaves_cnt = ARRAY_SIZE(omap44xx_dmic_slaves),
1101 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
1102}; 1086};
1103 1087
1104/* 1088/*
@@ -1164,7 +1148,6 @@ static struct omap_hwmod omap44xx_dsp_c0_hwmod = {
1164 .rstctrl_offs = OMAP4_RM_TESLA_RSTCTRL_OFFSET, 1148 .rstctrl_offs = OMAP4_RM_TESLA_RSTCTRL_OFFSET,
1165 }, 1149 },
1166 }, 1150 },
1167 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
1168}; 1151};
1169 1152
1170static struct omap_hwmod omap44xx_dsp_hwmod = { 1153static struct omap_hwmod omap44xx_dsp_hwmod = {
@@ -1187,7 +1170,6 @@ static struct omap_hwmod omap44xx_dsp_hwmod = {
1187 .slaves_cnt = ARRAY_SIZE(omap44xx_dsp_slaves), 1170 .slaves_cnt = ARRAY_SIZE(omap44xx_dsp_slaves),
1188 .masters = omap44xx_dsp_masters, 1171 .masters = omap44xx_dsp_masters,
1189 .masters_cnt = ARRAY_SIZE(omap44xx_dsp_masters), 1172 .masters_cnt = ARRAY_SIZE(omap44xx_dsp_masters),
1190 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
1191}; 1173};
1192 1174
1193/* 1175/*
@@ -1278,7 +1260,6 @@ static struct omap_hwmod omap44xx_dss_hwmod = {
1278 .slaves_cnt = ARRAY_SIZE(omap44xx_dss_slaves), 1260 .slaves_cnt = ARRAY_SIZE(omap44xx_dss_slaves),
1279 .masters = omap44xx_dss_masters, 1261 .masters = omap44xx_dss_masters,
1280 .masters_cnt = ARRAY_SIZE(omap44xx_dss_masters), 1262 .masters_cnt = ARRAY_SIZE(omap44xx_dss_masters),
1281 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
1282}; 1263};
1283 1264
1284/* 1265/*
@@ -1381,7 +1362,6 @@ static struct omap_hwmod omap44xx_dss_dispc_hwmod = {
1381 .opt_clks_cnt = ARRAY_SIZE(dss_dispc_opt_clks), 1362 .opt_clks_cnt = ARRAY_SIZE(dss_dispc_opt_clks),
1382 .slaves = omap44xx_dss_dispc_slaves, 1363 .slaves = omap44xx_dss_dispc_slaves,
1383 .slaves_cnt = ARRAY_SIZE(omap44xx_dss_dispc_slaves), 1364 .slaves_cnt = ARRAY_SIZE(omap44xx_dss_dispc_slaves),
1384 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
1385}; 1365};
1386 1366
1387/* 1367/*
@@ -1480,7 +1460,6 @@ static struct omap_hwmod omap44xx_dss_dsi1_hwmod = {
1480 .opt_clks_cnt = ARRAY_SIZE(dss_dsi1_opt_clks), 1460 .opt_clks_cnt = ARRAY_SIZE(dss_dsi1_opt_clks),
1481 .slaves = omap44xx_dss_dsi1_slaves, 1461 .slaves = omap44xx_dss_dsi1_slaves,
1482 .slaves_cnt = ARRAY_SIZE(omap44xx_dss_dsi1_slaves), 1462 .slaves_cnt = ARRAY_SIZE(omap44xx_dss_dsi1_slaves),
1483 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
1484}; 1463};
1485 1464
1486/* dss_dsi2 */ 1465/* dss_dsi2 */
@@ -1558,7 +1537,6 @@ static struct omap_hwmod omap44xx_dss_dsi2_hwmod = {
1558 .opt_clks_cnt = ARRAY_SIZE(dss_dsi2_opt_clks), 1537 .opt_clks_cnt = ARRAY_SIZE(dss_dsi2_opt_clks),
1559 .slaves = omap44xx_dss_dsi2_slaves, 1538 .slaves = omap44xx_dss_dsi2_slaves,
1560 .slaves_cnt = ARRAY_SIZE(omap44xx_dss_dsi2_slaves), 1539 .slaves_cnt = ARRAY_SIZE(omap44xx_dss_dsi2_slaves),
1561 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
1562}; 1540};
1563 1541
1564/* 1542/*
@@ -1656,7 +1634,6 @@ static struct omap_hwmod omap44xx_dss_hdmi_hwmod = {
1656 .opt_clks_cnt = ARRAY_SIZE(dss_hdmi_opt_clks), 1634 .opt_clks_cnt = ARRAY_SIZE(dss_hdmi_opt_clks),
1657 .slaves = omap44xx_dss_hdmi_slaves, 1635 .slaves = omap44xx_dss_hdmi_slaves,
1658 .slaves_cnt = ARRAY_SIZE(omap44xx_dss_hdmi_slaves), 1636 .slaves_cnt = ARRAY_SIZE(omap44xx_dss_hdmi_slaves),
1659 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
1660}; 1637};
1661 1638
1662/* 1639/*
@@ -1748,7 +1725,6 @@ static struct omap_hwmod omap44xx_dss_rfbi_hwmod = {
1748 .opt_clks_cnt = ARRAY_SIZE(dss_rfbi_opt_clks), 1725 .opt_clks_cnt = ARRAY_SIZE(dss_rfbi_opt_clks),
1749 .slaves = omap44xx_dss_rfbi_slaves, 1726 .slaves = omap44xx_dss_rfbi_slaves,
1750 .slaves_cnt = ARRAY_SIZE(omap44xx_dss_rfbi_slaves), 1727 .slaves_cnt = ARRAY_SIZE(omap44xx_dss_rfbi_slaves),
1751 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
1752}; 1728};
1753 1729
1754/* 1730/*
@@ -1817,7 +1793,6 @@ static struct omap_hwmod omap44xx_dss_venc_hwmod = {
1817 }, 1793 },
1818 .slaves = omap44xx_dss_venc_slaves, 1794 .slaves = omap44xx_dss_venc_slaves,
1819 .slaves_cnt = ARRAY_SIZE(omap44xx_dss_venc_slaves), 1795 .slaves_cnt = ARRAY_SIZE(omap44xx_dss_venc_slaves),
1820 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
1821}; 1796};
1822 1797
1823/* 1798/*
@@ -1901,7 +1876,6 @@ static struct omap_hwmod omap44xx_gpio1_hwmod = {
1901 .dev_attr = &gpio_dev_attr, 1876 .dev_attr = &gpio_dev_attr,
1902 .slaves = omap44xx_gpio1_slaves, 1877 .slaves = omap44xx_gpio1_slaves,
1903 .slaves_cnt = ARRAY_SIZE(omap44xx_gpio1_slaves), 1878 .slaves_cnt = ARRAY_SIZE(omap44xx_gpio1_slaves),
1904 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
1905}; 1879};
1906 1880
1907/* gpio2 */ 1881/* gpio2 */
@@ -1957,7 +1931,6 @@ static struct omap_hwmod omap44xx_gpio2_hwmod = {
1957 .dev_attr = &gpio_dev_attr, 1931 .dev_attr = &gpio_dev_attr,
1958 .slaves = omap44xx_gpio2_slaves, 1932 .slaves = omap44xx_gpio2_slaves,
1959 .slaves_cnt = ARRAY_SIZE(omap44xx_gpio2_slaves), 1933 .slaves_cnt = ARRAY_SIZE(omap44xx_gpio2_slaves),
1960 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
1961}; 1934};
1962 1935
1963/* gpio3 */ 1936/* gpio3 */
@@ -2013,7 +1986,6 @@ static struct omap_hwmod omap44xx_gpio3_hwmod = {
2013 .dev_attr = &gpio_dev_attr, 1986 .dev_attr = &gpio_dev_attr,
2014 .slaves = omap44xx_gpio3_slaves, 1987 .slaves = omap44xx_gpio3_slaves,
2015 .slaves_cnt = ARRAY_SIZE(omap44xx_gpio3_slaves), 1988 .slaves_cnt = ARRAY_SIZE(omap44xx_gpio3_slaves),
2016 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
2017}; 1989};
2018 1990
2019/* gpio4 */ 1991/* gpio4 */
@@ -2069,7 +2041,6 @@ static struct omap_hwmod omap44xx_gpio4_hwmod = {
2069 .dev_attr = &gpio_dev_attr, 2041 .dev_attr = &gpio_dev_attr,
2070 .slaves = omap44xx_gpio4_slaves, 2042 .slaves = omap44xx_gpio4_slaves,
2071 .slaves_cnt = ARRAY_SIZE(omap44xx_gpio4_slaves), 2043 .slaves_cnt = ARRAY_SIZE(omap44xx_gpio4_slaves),
2072 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
2073}; 2044};
2074 2045
2075/* gpio5 */ 2046/* gpio5 */
@@ -2125,7 +2096,6 @@ static struct omap_hwmod omap44xx_gpio5_hwmod = {
2125 .dev_attr = &gpio_dev_attr, 2096 .dev_attr = &gpio_dev_attr,
2126 .slaves = omap44xx_gpio5_slaves, 2097 .slaves = omap44xx_gpio5_slaves,
2127 .slaves_cnt = ARRAY_SIZE(omap44xx_gpio5_slaves), 2098 .slaves_cnt = ARRAY_SIZE(omap44xx_gpio5_slaves),
2128 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
2129}; 2099};
2130 2100
2131/* gpio6 */ 2101/* gpio6 */
@@ -2181,7 +2151,6 @@ static struct omap_hwmod omap44xx_gpio6_hwmod = {
2181 .dev_attr = &gpio_dev_attr, 2151 .dev_attr = &gpio_dev_attr,
2182 .slaves = omap44xx_gpio6_slaves, 2152 .slaves = omap44xx_gpio6_slaves,
2183 .slaves_cnt = ARRAY_SIZE(omap44xx_gpio6_slaves), 2153 .slaves_cnt = ARRAY_SIZE(omap44xx_gpio6_slaves),
2184 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
2185}; 2154};
2186 2155
2187/* 2156/*
@@ -2261,7 +2230,6 @@ static struct omap_hwmod omap44xx_hsi_hwmod = {
2261 .slaves_cnt = ARRAY_SIZE(omap44xx_hsi_slaves), 2230 .slaves_cnt = ARRAY_SIZE(omap44xx_hsi_slaves),
2262 .masters = omap44xx_hsi_masters, 2231 .masters = omap44xx_hsi_masters,
2263 .masters_cnt = ARRAY_SIZE(omap44xx_hsi_masters), 2232 .masters_cnt = ARRAY_SIZE(omap44xx_hsi_masters),
2264 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
2265}; 2233};
2266 2234
2267/* 2235/*
@@ -2345,7 +2313,6 @@ static struct omap_hwmod omap44xx_i2c1_hwmod = {
2345 .slaves = omap44xx_i2c1_slaves, 2313 .slaves = omap44xx_i2c1_slaves,
2346 .slaves_cnt = ARRAY_SIZE(omap44xx_i2c1_slaves), 2314 .slaves_cnt = ARRAY_SIZE(omap44xx_i2c1_slaves),
2347 .dev_attr = &i2c_dev_attr, 2315 .dev_attr = &i2c_dev_attr,
2348 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
2349}; 2316};
2350 2317
2351/* i2c2 */ 2318/* i2c2 */
@@ -2402,7 +2369,6 @@ static struct omap_hwmod omap44xx_i2c2_hwmod = {
2402 .slaves = omap44xx_i2c2_slaves, 2369 .slaves = omap44xx_i2c2_slaves,
2403 .slaves_cnt = ARRAY_SIZE(omap44xx_i2c2_slaves), 2370 .slaves_cnt = ARRAY_SIZE(omap44xx_i2c2_slaves),
2404 .dev_attr = &i2c_dev_attr, 2371 .dev_attr = &i2c_dev_attr,
2405 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
2406}; 2372};
2407 2373
2408/* i2c3 */ 2374/* i2c3 */
@@ -2459,7 +2425,6 @@ static struct omap_hwmod omap44xx_i2c3_hwmod = {
2459 .slaves = omap44xx_i2c3_slaves, 2425 .slaves = omap44xx_i2c3_slaves,
2460 .slaves_cnt = ARRAY_SIZE(omap44xx_i2c3_slaves), 2426 .slaves_cnt = ARRAY_SIZE(omap44xx_i2c3_slaves),
2461 .dev_attr = &i2c_dev_attr, 2427 .dev_attr = &i2c_dev_attr,
2462 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
2463}; 2428};
2464 2429
2465/* i2c4 */ 2430/* i2c4 */
@@ -2516,7 +2481,6 @@ static struct omap_hwmod omap44xx_i2c4_hwmod = {
2516 .slaves = omap44xx_i2c4_slaves, 2481 .slaves = omap44xx_i2c4_slaves,
2517 .slaves_cnt = ARRAY_SIZE(omap44xx_i2c4_slaves), 2482 .slaves_cnt = ARRAY_SIZE(omap44xx_i2c4_slaves),
2518 .dev_attr = &i2c_dev_attr, 2483 .dev_attr = &i2c_dev_attr,
2519 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
2520}; 2484};
2521 2485
2522/* 2486/*
@@ -2577,7 +2541,6 @@ static struct omap_hwmod omap44xx_ipu_c0_hwmod = {
2577 .rstctrl_offs = OMAP4_RM_DUCATI_RSTCTRL_OFFSET, 2541 .rstctrl_offs = OMAP4_RM_DUCATI_RSTCTRL_OFFSET,
2578 }, 2542 },
2579 }, 2543 },
2580 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
2581}; 2544};
2582 2545
2583/* Pseudo hwmod for reset control purpose only */ 2546/* Pseudo hwmod for reset control purpose only */
@@ -2593,7 +2556,6 @@ static struct omap_hwmod omap44xx_ipu_c1_hwmod = {
2593 .rstctrl_offs = OMAP4_RM_DUCATI_RSTCTRL_OFFSET, 2556 .rstctrl_offs = OMAP4_RM_DUCATI_RSTCTRL_OFFSET,
2594 }, 2557 },
2595 }, 2558 },
2596 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
2597}; 2559};
2598 2560
2599static struct omap_hwmod omap44xx_ipu_hwmod = { 2561static struct omap_hwmod omap44xx_ipu_hwmod = {
@@ -2616,7 +2578,6 @@ static struct omap_hwmod omap44xx_ipu_hwmod = {
2616 .slaves_cnt = ARRAY_SIZE(omap44xx_ipu_slaves), 2578 .slaves_cnt = ARRAY_SIZE(omap44xx_ipu_slaves),
2617 .masters = omap44xx_ipu_masters, 2579 .masters = omap44xx_ipu_masters,
2618 .masters_cnt = ARRAY_SIZE(omap44xx_ipu_masters), 2580 .masters_cnt = ARRAY_SIZE(omap44xx_ipu_masters),
2619 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
2620}; 2581};
2621 2582
2622/* 2583/*
@@ -2706,7 +2667,6 @@ static struct omap_hwmod omap44xx_iss_hwmod = {
2706 .slaves_cnt = ARRAY_SIZE(omap44xx_iss_slaves), 2667 .slaves_cnt = ARRAY_SIZE(omap44xx_iss_slaves),
2707 .masters = omap44xx_iss_masters, 2668 .masters = omap44xx_iss_masters,
2708 .masters_cnt = ARRAY_SIZE(omap44xx_iss_masters), 2669 .masters_cnt = ARRAY_SIZE(omap44xx_iss_masters),
2709 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
2710}; 2670};
2711 2671
2712/* 2672/*
@@ -2781,7 +2741,6 @@ static struct omap_hwmod omap44xx_iva_seq0_hwmod = {
2781 .rstctrl_offs = OMAP4_RM_IVAHD_RSTCTRL_OFFSET, 2741 .rstctrl_offs = OMAP4_RM_IVAHD_RSTCTRL_OFFSET,
2782 }, 2742 },
2783 }, 2743 },
2784 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
2785}; 2744};
2786 2745
2787/* Pseudo hwmod for reset control purpose only */ 2746/* Pseudo hwmod for reset control purpose only */
@@ -2797,7 +2756,6 @@ static struct omap_hwmod omap44xx_iva_seq1_hwmod = {
2797 .rstctrl_offs = OMAP4_RM_IVAHD_RSTCTRL_OFFSET, 2756 .rstctrl_offs = OMAP4_RM_IVAHD_RSTCTRL_OFFSET,
2798 }, 2757 },
2799 }, 2758 },
2800 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
2801}; 2759};
2802 2760
2803static struct omap_hwmod omap44xx_iva_hwmod = { 2761static struct omap_hwmod omap44xx_iva_hwmod = {
@@ -2820,7 +2778,6 @@ static struct omap_hwmod omap44xx_iva_hwmod = {
2820 .slaves_cnt = ARRAY_SIZE(omap44xx_iva_slaves), 2778 .slaves_cnt = ARRAY_SIZE(omap44xx_iva_slaves),
2821 .masters = omap44xx_iva_masters, 2779 .masters = omap44xx_iva_masters,
2822 .masters_cnt = ARRAY_SIZE(omap44xx_iva_masters), 2780 .masters_cnt = ARRAY_SIZE(omap44xx_iva_masters),
2823 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
2824}; 2781};
2825 2782
2826/* 2783/*
@@ -2890,7 +2847,6 @@ static struct omap_hwmod omap44xx_kbd_hwmod = {
2890 }, 2847 },
2891 .slaves = omap44xx_kbd_slaves, 2848 .slaves = omap44xx_kbd_slaves,
2892 .slaves_cnt = ARRAY_SIZE(omap44xx_kbd_slaves), 2849 .slaves_cnt = ARRAY_SIZE(omap44xx_kbd_slaves),
2893 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
2894}; 2850};
2895 2851
2896/* 2852/*
@@ -2956,7 +2912,6 @@ static struct omap_hwmod omap44xx_mailbox_hwmod = {
2956 }, 2912 },
2957 .slaves = omap44xx_mailbox_slaves, 2913 .slaves = omap44xx_mailbox_slaves,
2958 .slaves_cnt = ARRAY_SIZE(omap44xx_mailbox_slaves), 2914 .slaves_cnt = ARRAY_SIZE(omap44xx_mailbox_slaves),
2959 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
2960}; 2915};
2961 2916
2962/* 2917/*
@@ -3051,7 +3006,6 @@ static struct omap_hwmod omap44xx_mcbsp1_hwmod = {
3051 }, 3006 },
3052 .slaves = omap44xx_mcbsp1_slaves, 3007 .slaves = omap44xx_mcbsp1_slaves,
3053 .slaves_cnt = ARRAY_SIZE(omap44xx_mcbsp1_slaves), 3008 .slaves_cnt = ARRAY_SIZE(omap44xx_mcbsp1_slaves),
3054 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
3055}; 3009};
3056 3010
3057/* mcbsp2 */ 3011/* mcbsp2 */
@@ -3127,7 +3081,6 @@ static struct omap_hwmod omap44xx_mcbsp2_hwmod = {
3127 }, 3081 },
3128 .slaves = omap44xx_mcbsp2_slaves, 3082 .slaves = omap44xx_mcbsp2_slaves,
3129 .slaves_cnt = ARRAY_SIZE(omap44xx_mcbsp2_slaves), 3083 .slaves_cnt = ARRAY_SIZE(omap44xx_mcbsp2_slaves),
3130 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
3131}; 3084};
3132 3085
3133/* mcbsp3 */ 3086/* mcbsp3 */
@@ -3203,7 +3156,6 @@ static struct omap_hwmod omap44xx_mcbsp3_hwmod = {
3203 }, 3156 },
3204 .slaves = omap44xx_mcbsp3_slaves, 3157 .slaves = omap44xx_mcbsp3_slaves,
3205 .slaves_cnt = ARRAY_SIZE(omap44xx_mcbsp3_slaves), 3158 .slaves_cnt = ARRAY_SIZE(omap44xx_mcbsp3_slaves),
3206 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
3207}; 3159};
3208 3160
3209/* mcbsp4 */ 3161/* mcbsp4 */
@@ -3258,7 +3210,6 @@ static struct omap_hwmod omap44xx_mcbsp4_hwmod = {
3258 }, 3210 },
3259 .slaves = omap44xx_mcbsp4_slaves, 3211 .slaves = omap44xx_mcbsp4_slaves,
3260 .slaves_cnt = ARRAY_SIZE(omap44xx_mcbsp4_slaves), 3212 .slaves_cnt = ARRAY_SIZE(omap44xx_mcbsp4_slaves),
3261 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
3262}; 3213};
3263 3214
3264/* 3215/*
@@ -3353,7 +3304,6 @@ static struct omap_hwmod omap44xx_mcpdm_hwmod = {
3353 }, 3304 },
3354 .slaves = omap44xx_mcpdm_slaves, 3305 .slaves = omap44xx_mcpdm_slaves,
3355 .slaves_cnt = ARRAY_SIZE(omap44xx_mcpdm_slaves), 3306 .slaves_cnt = ARRAY_SIZE(omap44xx_mcpdm_slaves),
3356 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
3357}; 3307};
3358 3308
3359/* 3309/*
@@ -3442,7 +3392,6 @@ static struct omap_hwmod omap44xx_mcspi1_hwmod = {
3442 .dev_attr = &mcspi1_dev_attr, 3392 .dev_attr = &mcspi1_dev_attr,
3443 .slaves = omap44xx_mcspi1_slaves, 3393 .slaves = omap44xx_mcspi1_slaves,
3444 .slaves_cnt = ARRAY_SIZE(omap44xx_mcspi1_slaves), 3394 .slaves_cnt = ARRAY_SIZE(omap44xx_mcspi1_slaves),
3445 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
3446}; 3395};
3447 3396
3448/* mcspi2 */ 3397/* mcspi2 */
@@ -3505,7 +3454,6 @@ static struct omap_hwmod omap44xx_mcspi2_hwmod = {
3505 .dev_attr = &mcspi2_dev_attr, 3454 .dev_attr = &mcspi2_dev_attr,
3506 .slaves = omap44xx_mcspi2_slaves, 3455 .slaves = omap44xx_mcspi2_slaves,
3507 .slaves_cnt = ARRAY_SIZE(omap44xx_mcspi2_slaves), 3456 .slaves_cnt = ARRAY_SIZE(omap44xx_mcspi2_slaves),
3508 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
3509}; 3457};
3510 3458
3511/* mcspi3 */ 3459/* mcspi3 */
@@ -3568,7 +3516,6 @@ static struct omap_hwmod omap44xx_mcspi3_hwmod = {
3568 .dev_attr = &mcspi3_dev_attr, 3516 .dev_attr = &mcspi3_dev_attr,
3569 .slaves = omap44xx_mcspi3_slaves, 3517 .slaves = omap44xx_mcspi3_slaves,
3570 .slaves_cnt = ARRAY_SIZE(omap44xx_mcspi3_slaves), 3518 .slaves_cnt = ARRAY_SIZE(omap44xx_mcspi3_slaves),
3571 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
3572}; 3519};
3573 3520
3574/* mcspi4 */ 3521/* mcspi4 */
@@ -3629,7 +3576,6 @@ static struct omap_hwmod omap44xx_mcspi4_hwmod = {
3629 .dev_attr = &mcspi4_dev_attr, 3576 .dev_attr = &mcspi4_dev_attr,
3630 .slaves = omap44xx_mcspi4_slaves, 3577 .slaves = omap44xx_mcspi4_slaves,
3631 .slaves_cnt = ARRAY_SIZE(omap44xx_mcspi4_slaves), 3578 .slaves_cnt = ARRAY_SIZE(omap44xx_mcspi4_slaves),
3632 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
3633}; 3579};
3634 3580
3635/* 3581/*
@@ -3718,7 +3664,6 @@ static struct omap_hwmod omap44xx_mmc1_hwmod = {
3718 .slaves_cnt = ARRAY_SIZE(omap44xx_mmc1_slaves), 3664 .slaves_cnt = ARRAY_SIZE(omap44xx_mmc1_slaves),
3719 .masters = omap44xx_mmc1_masters, 3665 .masters = omap44xx_mmc1_masters,
3720 .masters_cnt = ARRAY_SIZE(omap44xx_mmc1_masters), 3666 .masters_cnt = ARRAY_SIZE(omap44xx_mmc1_masters),
3721 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
3722}; 3667};
3723 3668
3724/* mmc2 */ 3669/* mmc2 */
@@ -3779,7 +3724,6 @@ static struct omap_hwmod omap44xx_mmc2_hwmod = {
3779 .slaves_cnt = ARRAY_SIZE(omap44xx_mmc2_slaves), 3724 .slaves_cnt = ARRAY_SIZE(omap44xx_mmc2_slaves),
3780 .masters = omap44xx_mmc2_masters, 3725 .masters = omap44xx_mmc2_masters,
3781 .masters_cnt = ARRAY_SIZE(omap44xx_mmc2_masters), 3726 .masters_cnt = ARRAY_SIZE(omap44xx_mmc2_masters),
3782 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
3783}; 3727};
3784 3728
3785/* mmc3 */ 3729/* mmc3 */
@@ -3834,7 +3778,6 @@ static struct omap_hwmod omap44xx_mmc3_hwmod = {
3834 }, 3778 },
3835 .slaves = omap44xx_mmc3_slaves, 3779 .slaves = omap44xx_mmc3_slaves,
3836 .slaves_cnt = ARRAY_SIZE(omap44xx_mmc3_slaves), 3780 .slaves_cnt = ARRAY_SIZE(omap44xx_mmc3_slaves),
3837 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
3838}; 3781};
3839 3782
3840/* mmc4 */ 3783/* mmc4 */
@@ -3890,7 +3833,6 @@ static struct omap_hwmod omap44xx_mmc4_hwmod = {
3890 }, 3833 },
3891 .slaves = omap44xx_mmc4_slaves, 3834 .slaves = omap44xx_mmc4_slaves,
3892 .slaves_cnt = ARRAY_SIZE(omap44xx_mmc4_slaves), 3835 .slaves_cnt = ARRAY_SIZE(omap44xx_mmc4_slaves),
3893 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
3894}; 3836};
3895 3837
3896/* mmc5 */ 3838/* mmc5 */
@@ -3945,7 +3887,6 @@ static struct omap_hwmod omap44xx_mmc5_hwmod = {
3945 }, 3887 },
3946 .slaves = omap44xx_mmc5_slaves, 3888 .slaves = omap44xx_mmc5_slaves,
3947 .slaves_cnt = ARRAY_SIZE(omap44xx_mmc5_slaves), 3889 .slaves_cnt = ARRAY_SIZE(omap44xx_mmc5_slaves),
3948 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
3949}; 3890};
3950 3891
3951/* 3892/*
@@ -3987,7 +3928,6 @@ static struct omap_hwmod omap44xx_mpu_hwmod = {
3987 }, 3928 },
3988 .masters = omap44xx_mpu_masters, 3929 .masters = omap44xx_mpu_masters,
3989 .masters_cnt = ARRAY_SIZE(omap44xx_mpu_masters), 3930 .masters_cnt = ARRAY_SIZE(omap44xx_mpu_masters),
3990 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
3991}; 3931};
3992 3932
3993/* 3933/*
@@ -4063,7 +4003,6 @@ static struct omap_hwmod omap44xx_smartreflex_core_hwmod = {
4063 }, 4003 },
4064 .slaves = omap44xx_smartreflex_core_slaves, 4004 .slaves = omap44xx_smartreflex_core_slaves,
4065 .slaves_cnt = ARRAY_SIZE(omap44xx_smartreflex_core_slaves), 4005 .slaves_cnt = ARRAY_SIZE(omap44xx_smartreflex_core_slaves),
4066 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
4067}; 4006};
4068 4007
4069/* smartreflex_iva */ 4008/* smartreflex_iva */
@@ -4112,7 +4051,6 @@ static struct omap_hwmod omap44xx_smartreflex_iva_hwmod = {
4112 }, 4051 },
4113 .slaves = omap44xx_smartreflex_iva_slaves, 4052 .slaves = omap44xx_smartreflex_iva_slaves,
4114 .slaves_cnt = ARRAY_SIZE(omap44xx_smartreflex_iva_slaves), 4053 .slaves_cnt = ARRAY_SIZE(omap44xx_smartreflex_iva_slaves),
4115 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
4116}; 4054};
4117 4055
4118/* smartreflex_mpu */ 4056/* smartreflex_mpu */
@@ -4161,7 +4099,6 @@ static struct omap_hwmod omap44xx_smartreflex_mpu_hwmod = {
4161 }, 4099 },
4162 .slaves = omap44xx_smartreflex_mpu_slaves, 4100 .slaves = omap44xx_smartreflex_mpu_slaves,
4163 .slaves_cnt = ARRAY_SIZE(omap44xx_smartreflex_mpu_slaves), 4101 .slaves_cnt = ARRAY_SIZE(omap44xx_smartreflex_mpu_slaves),
4164 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
4165}; 4102};
4166 4103
4167/* 4104/*
@@ -4224,7 +4161,6 @@ static struct omap_hwmod omap44xx_spinlock_hwmod = {
4224 }, 4161 },
4225 .slaves = omap44xx_spinlock_slaves, 4162 .slaves = omap44xx_spinlock_slaves,
4226 .slaves_cnt = ARRAY_SIZE(omap44xx_spinlock_slaves), 4163 .slaves_cnt = ARRAY_SIZE(omap44xx_spinlock_slaves),
4227 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
4228}; 4164};
4229 4165
4230/* 4166/*
@@ -4310,7 +4246,6 @@ static struct omap_hwmod omap44xx_timer1_hwmod = {
4310 }, 4246 },
4311 .slaves = omap44xx_timer1_slaves, 4247 .slaves = omap44xx_timer1_slaves,
4312 .slaves_cnt = ARRAY_SIZE(omap44xx_timer1_slaves), 4248 .slaves_cnt = ARRAY_SIZE(omap44xx_timer1_slaves),
4313 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
4314}; 4249};
4315 4250
4316/* timer2 */ 4251/* timer2 */
@@ -4358,7 +4293,6 @@ static struct omap_hwmod omap44xx_timer2_hwmod = {
4358 }, 4293 },
4359 .slaves = omap44xx_timer2_slaves, 4294 .slaves = omap44xx_timer2_slaves,
4360 .slaves_cnt = ARRAY_SIZE(omap44xx_timer2_slaves), 4295 .slaves_cnt = ARRAY_SIZE(omap44xx_timer2_slaves),
4361 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
4362}; 4296};
4363 4297
4364/* timer3 */ 4298/* timer3 */
@@ -4406,7 +4340,6 @@ static struct omap_hwmod omap44xx_timer3_hwmod = {
4406 }, 4340 },
4407 .slaves = omap44xx_timer3_slaves, 4341 .slaves = omap44xx_timer3_slaves,
4408 .slaves_cnt = ARRAY_SIZE(omap44xx_timer3_slaves), 4342 .slaves_cnt = ARRAY_SIZE(omap44xx_timer3_slaves),
4409 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
4410}; 4343};
4411 4344
4412/* timer4 */ 4345/* timer4 */
@@ -4454,7 +4387,6 @@ static struct omap_hwmod omap44xx_timer4_hwmod = {
4454 }, 4387 },
4455 .slaves = omap44xx_timer4_slaves, 4388 .slaves = omap44xx_timer4_slaves,
4456 .slaves_cnt = ARRAY_SIZE(omap44xx_timer4_slaves), 4389 .slaves_cnt = ARRAY_SIZE(omap44xx_timer4_slaves),
4457 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
4458}; 4390};
4459 4391
4460/* timer5 */ 4392/* timer5 */
@@ -4521,7 +4453,6 @@ static struct omap_hwmod omap44xx_timer5_hwmod = {
4521 }, 4453 },
4522 .slaves = omap44xx_timer5_slaves, 4454 .slaves = omap44xx_timer5_slaves,
4523 .slaves_cnt = ARRAY_SIZE(omap44xx_timer5_slaves), 4455 .slaves_cnt = ARRAY_SIZE(omap44xx_timer5_slaves),
4524 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
4525}; 4456};
4526 4457
4527/* timer6 */ 4458/* timer6 */
@@ -4589,7 +4520,6 @@ static struct omap_hwmod omap44xx_timer6_hwmod = {
4589 }, 4520 },
4590 .slaves = omap44xx_timer6_slaves, 4521 .slaves = omap44xx_timer6_slaves,
4591 .slaves_cnt = ARRAY_SIZE(omap44xx_timer6_slaves), 4522 .slaves_cnt = ARRAY_SIZE(omap44xx_timer6_slaves),
4592 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
4593}; 4523};
4594 4524
4595/* timer7 */ 4525/* timer7 */
@@ -4656,7 +4586,6 @@ static struct omap_hwmod omap44xx_timer7_hwmod = {
4656 }, 4586 },
4657 .slaves = omap44xx_timer7_slaves, 4587 .slaves = omap44xx_timer7_slaves,
4658 .slaves_cnt = ARRAY_SIZE(omap44xx_timer7_slaves), 4588 .slaves_cnt = ARRAY_SIZE(omap44xx_timer7_slaves),
4659 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
4660}; 4589};
4661 4590
4662/* timer8 */ 4591/* timer8 */
@@ -4723,7 +4652,6 @@ static struct omap_hwmod omap44xx_timer8_hwmod = {
4723 }, 4652 },
4724 .slaves = omap44xx_timer8_slaves, 4653 .slaves = omap44xx_timer8_slaves,
4725 .slaves_cnt = ARRAY_SIZE(omap44xx_timer8_slaves), 4654 .slaves_cnt = ARRAY_SIZE(omap44xx_timer8_slaves),
4726 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
4727}; 4655};
4728 4656
4729/* timer9 */ 4657/* timer9 */
@@ -4771,7 +4699,6 @@ static struct omap_hwmod omap44xx_timer9_hwmod = {
4771 }, 4699 },
4772 .slaves = omap44xx_timer9_slaves, 4700 .slaves = omap44xx_timer9_slaves,
4773 .slaves_cnt = ARRAY_SIZE(omap44xx_timer9_slaves), 4701 .slaves_cnt = ARRAY_SIZE(omap44xx_timer9_slaves),
4774 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
4775}; 4702};
4776 4703
4777/* timer10 */ 4704/* timer10 */
@@ -4819,7 +4746,6 @@ static struct omap_hwmod omap44xx_timer10_hwmod = {
4819 }, 4746 },
4820 .slaves = omap44xx_timer10_slaves, 4747 .slaves = omap44xx_timer10_slaves,
4821 .slaves_cnt = ARRAY_SIZE(omap44xx_timer10_slaves), 4748 .slaves_cnt = ARRAY_SIZE(omap44xx_timer10_slaves),
4822 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
4823}; 4749};
4824 4750
4825/* timer11 */ 4751/* timer11 */
@@ -4867,7 +4793,6 @@ static struct omap_hwmod omap44xx_timer11_hwmod = {
4867 }, 4793 },
4868 .slaves = omap44xx_timer11_slaves, 4794 .slaves = omap44xx_timer11_slaves,
4869 .slaves_cnt = ARRAY_SIZE(omap44xx_timer11_slaves), 4795 .slaves_cnt = ARRAY_SIZE(omap44xx_timer11_slaves),
4870 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
4871}; 4796};
4872 4797
4873/* 4798/*
@@ -4944,7 +4869,6 @@ static struct omap_hwmod omap44xx_uart1_hwmod = {
4944 }, 4869 },
4945 .slaves = omap44xx_uart1_slaves, 4870 .slaves = omap44xx_uart1_slaves,
4946 .slaves_cnt = ARRAY_SIZE(omap44xx_uart1_slaves), 4871 .slaves_cnt = ARRAY_SIZE(omap44xx_uart1_slaves),
4947 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
4948}; 4872};
4949 4873
4950/* uart2 */ 4874/* uart2 */
@@ -4999,7 +4923,6 @@ static struct omap_hwmod omap44xx_uart2_hwmod = {
4999 }, 4923 },
5000 .slaves = omap44xx_uart2_slaves, 4924 .slaves = omap44xx_uart2_slaves,
5001 .slaves_cnt = ARRAY_SIZE(omap44xx_uart2_slaves), 4925 .slaves_cnt = ARRAY_SIZE(omap44xx_uart2_slaves),
5002 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
5003}; 4926};
5004 4927
5005/* uart3 */ 4928/* uart3 */
@@ -5055,7 +4978,6 @@ static struct omap_hwmod omap44xx_uart3_hwmod = {
5055 }, 4978 },
5056 .slaves = omap44xx_uart3_slaves, 4979 .slaves = omap44xx_uart3_slaves,
5057 .slaves_cnt = ARRAY_SIZE(omap44xx_uart3_slaves), 4980 .slaves_cnt = ARRAY_SIZE(omap44xx_uart3_slaves),
5058 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
5059}; 4981};
5060 4982
5061/* uart4 */ 4983/* uart4 */
@@ -5110,7 +5032,6 @@ static struct omap_hwmod omap44xx_uart4_hwmod = {
5110 }, 5032 },
5111 .slaves = omap44xx_uart4_slaves, 5033 .slaves = omap44xx_uart4_slaves,
5112 .slaves_cnt = ARRAY_SIZE(omap44xx_uart4_slaves), 5034 .slaves_cnt = ARRAY_SIZE(omap44xx_uart4_slaves),
5113 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
5114}; 5035};
5115 5036
5116/* 5037/*
@@ -5195,7 +5116,6 @@ static struct omap_hwmod omap44xx_usb_otg_hs_hwmod = {
5195 .slaves_cnt = ARRAY_SIZE(omap44xx_usb_otg_hs_slaves), 5116 .slaves_cnt = ARRAY_SIZE(omap44xx_usb_otg_hs_slaves),
5196 .masters = omap44xx_usb_otg_hs_masters, 5117 .masters = omap44xx_usb_otg_hs_masters,
5197 .masters_cnt = ARRAY_SIZE(omap44xx_usb_otg_hs_masters), 5118 .masters_cnt = ARRAY_SIZE(omap44xx_usb_otg_hs_masters),
5198 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
5199}; 5119};
5200 5120
5201/* 5121/*
@@ -5266,7 +5186,6 @@ static struct omap_hwmod omap44xx_wd_timer2_hwmod = {
5266 }, 5186 },
5267 .slaves = omap44xx_wd_timer2_slaves, 5187 .slaves = omap44xx_wd_timer2_slaves,
5268 .slaves_cnt = ARRAY_SIZE(omap44xx_wd_timer2_slaves), 5188 .slaves_cnt = ARRAY_SIZE(omap44xx_wd_timer2_slaves),
5269 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
5270}; 5189};
5271 5190
5272/* wd_timer3 */ 5191/* wd_timer3 */
@@ -5333,7 +5252,6 @@ static struct omap_hwmod omap44xx_wd_timer3_hwmod = {
5333 }, 5252 },
5334 .slaves = omap44xx_wd_timer3_slaves, 5253 .slaves = omap44xx_wd_timer3_slaves,
5335 .slaves_cnt = ARRAY_SIZE(omap44xx_wd_timer3_slaves), 5254 .slaves_cnt = ARRAY_SIZE(omap44xx_wd_timer3_slaves),
5336 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
5337}; 5255};
5338 5256
5339static __initdata struct omap_hwmod *omap44xx_hwmods[] = { 5257static __initdata struct omap_hwmod *omap44xx_hwmods[] = {
diff --git a/arch/arm/mach-omap2/opp.c b/arch/arm/mach-omap2/opp.c
index ab8b35b780b5..9262a6b47702 100644
--- a/arch/arm/mach-omap2/opp.c
+++ b/arch/arm/mach-omap2/opp.c
@@ -69,7 +69,7 @@ int __init omap_init_opp_table(struct omap_opp_def *opp_def,
69 opp_def->hwmod_name, i); 69 opp_def->hwmod_name, i);
70 return -EINVAL; 70 return -EINVAL;
71 } 71 }
72 dev = &oh->od->pdev.dev; 72 dev = &oh->od->pdev->dev;
73 73
74 r = opp_add(dev, opp_def->freq, opp_def->u_volt); 74 r = opp_add(dev, opp_def->freq, opp_def->u_volt);
75 if (r) { 75 if (r) {
diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
index 472bf22d5e84..25b8c7f43852 100644
--- a/arch/arm/mach-omap2/pm.c
+++ b/arch/arm/mach-omap2/pm.c
@@ -60,19 +60,19 @@ EXPORT_SYMBOL(omap4_get_dsp_device);
60static int _init_omap_device(char *name, struct device **new_dev) 60static int _init_omap_device(char *name, struct device **new_dev)
61{ 61{
62 struct omap_hwmod *oh; 62 struct omap_hwmod *oh;
63 struct omap_device *od; 63 struct platform_device *pdev;
64 64
65 oh = omap_hwmod_lookup(name); 65 oh = omap_hwmod_lookup(name);
66 if (WARN(!oh, "%s: could not find omap_hwmod for %s\n", 66 if (WARN(!oh, "%s: could not find omap_hwmod for %s\n",
67 __func__, name)) 67 __func__, name))
68 return -ENODEV; 68 return -ENODEV;
69 69
70 od = omap_device_build(oh->name, 0, oh, NULL, 0, pm_lats, 0, false); 70 pdev = omap_device_build(oh->name, 0, oh, NULL, 0, pm_lats, 0, false);
71 if (WARN(IS_ERR(od), "%s: could not build omap_device for %s\n", 71 if (WARN(IS_ERR(pdev), "%s: could not build omap_device for %s\n",
72 __func__, name)) 72 __func__, name))
73 return -ENODEV; 73 return -ENODEV;
74 74
75 *new_dev = &od->pdev.dev; 75 *new_dev = &pdev->dev;
76 76
77 return 0; 77 return 0;
78} 78}
@@ -136,8 +136,8 @@ int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state)
136 136
137 ret = pwrdm_set_next_pwrst(pwrdm, state); 137 ret = pwrdm_set_next_pwrst(pwrdm, state);
138 if (ret) { 138 if (ret) {
139 printk(KERN_ERR "Unable to set state of powerdomain: %s\n", 139 pr_err("%s: unable to set state of powerdomain: %s\n",
140 pwrdm->name); 140 __func__, pwrdm->name);
141 goto err; 141 goto err;
142 } 142 }
143 143
@@ -161,11 +161,11 @@ err:
161} 161}
162 162
163/* 163/*
164 * This API is to be called during init to put the various voltage 164 * This API is to be called during init to set the various voltage
165 * domains to the voltage as per the opp table. Typically we boot up 165 * domains to the voltage as per the opp table. Typically we boot up
166 * at the nominal voltage. So this function finds out the rate of 166 * at the nominal voltage. So this function finds out the rate of
167 * the clock associated with the voltage domain, finds out the correct 167 * the clock associated with the voltage domain, finds out the correct
168 * opp entry and puts the voltage domain to the voltage specifies 168 * opp entry and sets the voltage domain to the voltage specified
169 * in the opp entry 169 * in the opp entry
170 */ 170 */
171static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name, 171static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name,
@@ -177,21 +177,20 @@ static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name,
177 unsigned long freq, bootup_volt; 177 unsigned long freq, bootup_volt;
178 178
179 if (!vdd_name || !clk_name || !dev) { 179 if (!vdd_name || !clk_name || !dev) {
180 printk(KERN_ERR "%s: Invalid parameters!\n", __func__); 180 pr_err("%s: invalid parameters\n", __func__);
181 goto exit; 181 goto exit;
182 } 182 }
183 183
184 voltdm = omap_voltage_domain_lookup(vdd_name); 184 voltdm = omap_voltage_domain_lookup(vdd_name);
185 if (IS_ERR(voltdm)) { 185 if (IS_ERR(voltdm)) {
186 printk(KERN_ERR "%s: Unable to get vdd pointer for vdd_%s\n", 186 pr_err("%s: unable to get vdd pointer for vdd_%s\n",
187 __func__, vdd_name); 187 __func__, vdd_name);
188 goto exit; 188 goto exit;
189 } 189 }
190 190
191 clk = clk_get(NULL, clk_name); 191 clk = clk_get(NULL, clk_name);
192 if (IS_ERR(clk)) { 192 if (IS_ERR(clk)) {
193 printk(KERN_ERR "%s: unable to get clk %s\n", 193 pr_err("%s: unable to get clk %s\n", __func__, clk_name);
194 __func__, clk_name);
195 goto exit; 194 goto exit;
196 } 195 }
197 196
@@ -200,14 +199,14 @@ static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name,
200 199
201 opp = opp_find_freq_ceil(dev, &freq); 200 opp = opp_find_freq_ceil(dev, &freq);
202 if (IS_ERR(opp)) { 201 if (IS_ERR(opp)) {
203 printk(KERN_ERR "%s: unable to find boot up OPP for vdd_%s\n", 202 pr_err("%s: unable to find boot up OPP for vdd_%s\n",
204 __func__, vdd_name); 203 __func__, vdd_name);
205 goto exit; 204 goto exit;
206 } 205 }
207 206
208 bootup_volt = opp_get_voltage(opp); 207 bootup_volt = opp_get_voltage(opp);
209 if (!bootup_volt) { 208 if (!bootup_volt) {
210 printk(KERN_ERR "%s: unable to find voltage corresponding" 209 pr_err("%s: unable to find voltage corresponding "
211 "to the bootup OPP for vdd_%s\n", __func__, vdd_name); 210 "to the bootup OPP for vdd_%s\n", __func__, vdd_name);
212 goto exit; 211 goto exit;
213 } 212 }
@@ -216,8 +215,7 @@ static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name,
216 return 0; 215 return 0;
217 216
218exit: 217exit:
219 printk(KERN_ERR "%s: Unable to put vdd_%s to its init voltage\n\n", 218 pr_err("%s: unable to set vdd_%s\n", __func__, vdd_name);
220 __func__, vdd_name);
221 return -EINVAL; 219 return -EINVAL;
222} 220}
223 221
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c
index bf089e743ed9..cf0c216132ab 100644
--- a/arch/arm/mach-omap2/pm24xx.c
+++ b/arch/arm/mach-omap2/pm24xx.c
@@ -53,8 +53,6 @@
53#include "powerdomain.h" 53#include "powerdomain.h"
54#include "clockdomain.h" 54#include "clockdomain.h"
55 55
56static int omap2_pm_debug;
57
58#ifdef CONFIG_SUSPEND 56#ifdef CONFIG_SUSPEND
59static suspend_state_t suspend_state = PM_SUSPEND_ON; 57static suspend_state_t suspend_state = PM_SUSPEND_ON;
60static inline bool is_suspending(void) 58static inline bool is_suspending(void)
@@ -96,7 +94,6 @@ static int omap2_fclks_active(void)
96static void omap2_enter_full_retention(void) 94static void omap2_enter_full_retention(void)
97{ 95{
98 u32 l; 96 u32 l;
99 struct timespec ts_preidle, ts_postidle, ts_idle;
100 97
101 /* There is 1 reference hold for all children of the oscillator 98 /* There is 1 reference hold for all children of the oscillator
102 * clock, the following will remove it. If no one else uses the 99 * clock, the following will remove it. If no one else uses the
@@ -124,10 +121,6 @@ static void omap2_enter_full_retention(void)
124 121
125 omap2_gpio_prepare_for_idle(0); 122 omap2_gpio_prepare_for_idle(0);
126 123
127 if (omap2_pm_debug) {
128 getnstimeofday(&ts_preidle);
129 }
130
131 /* One last check for pending IRQs to avoid extra latency due 124 /* One last check for pending IRQs to avoid extra latency due
132 * to sleeping unnecessarily. */ 125 * to sleeping unnecessarily. */
133 if (omap_irq_pending()) 126 if (omap_irq_pending())
@@ -155,13 +148,6 @@ static void omap2_enter_full_retention(void)
155 console_unlock(); 148 console_unlock();
156 149
157no_sleep: 150no_sleep:
158 if (omap2_pm_debug) {
159 unsigned long long tmp;
160
161 getnstimeofday(&ts_postidle);
162 ts_idle = timespec_sub(ts_postidle, ts_preidle);
163 tmp = timespec_to_ns(&ts_idle) * NSEC_PER_USEC;
164 }
165 omap2_gpio_resume_after_idle(); 151 omap2_gpio_resume_after_idle();
166 152
167 clk_enable(osc_ck); 153 clk_enable(osc_ck);
@@ -219,7 +205,6 @@ static int omap2_allow_mpu_retention(void)
219static void omap2_enter_mpu_retention(void) 205static void omap2_enter_mpu_retention(void)
220{ 206{
221 int only_idle = 0; 207 int only_idle = 0;
222 struct timespec ts_preidle, ts_postidle, ts_idle;
223 208
224 /* Putting MPU into the WFI state while a transfer is active 209 /* Putting MPU into the WFI state while a transfer is active
225 * seems to cause the I2C block to timeout. Why? Good question. */ 210 * seems to cause the I2C block to timeout. Why? Good question. */
@@ -246,19 +231,7 @@ static void omap2_enter_mpu_retention(void)
246 only_idle = 1; 231 only_idle = 1;
247 } 232 }
248 233
249 if (omap2_pm_debug) {
250 getnstimeofday(&ts_preidle);
251 }
252
253 omap2_sram_idle(); 234 omap2_sram_idle();
254
255 if (omap2_pm_debug) {
256 unsigned long long tmp;
257
258 getnstimeofday(&ts_postidle);
259 ts_idle = timespec_sub(ts_postidle, ts_preidle);
260 tmp = timespec_to_ns(&ts_idle) * NSEC_PER_USEC;
261 }
262} 235}
263 236
264static int omap2_can_sleep(void) 237static int omap2_can_sleep(void)
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 7255d9bce868..c8cbd00a41af 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -55,7 +55,7 @@
55static suspend_state_t suspend_state = PM_SUSPEND_ON; 55static suspend_state_t suspend_state = PM_SUSPEND_ON;
56static inline bool is_suspending(void) 56static inline bool is_suspending(void)
57{ 57{
58 return (suspend_state != PM_SUSPEND_ON); 58 return (suspend_state != PM_SUSPEND_ON) && console_suspend_enabled;
59} 59}
60#else 60#else
61static inline bool is_suspending(void) 61static inline bool is_suspending(void)
diff --git a/arch/arm/mach-omap2/powerdomain-common.c b/arch/arm/mach-omap2/powerdomain-common.c
index 171fccd208c7..f97afff68d6d 100644
--- a/arch/arm/mach-omap2/powerdomain-common.c
+++ b/arch/arm/mach-omap2/powerdomain-common.c
@@ -1,9 +1,8 @@
1/* 1/*
2 * linux/arch/arm/mach-omap2/powerdomain-common.c 2 * Common powerdomain framework functions
3 * Contains common powerdomain framework functions
4 * 3 *
5 * Copyright (C) 2010 Texas Instruments, Inc. 4 * Copyright (C) 2010-2011 Texas Instruments, Inc.
6 * Copyright (C) 2010 Nokia Corporation 5 * Copyright (C) 2010 Nokia Corporation
7 * 6 *
8 * Derived from mach-omap2/powerdomain.c written by Paul Walmsley 7 * Derived from mach-omap2/powerdomain.c written by Paul Walmsley
9 * 8 *
diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c
index ef71fdd40fc4..896cb4c5eb1a 100644
--- a/arch/arm/mach-omap2/powerdomain.c
+++ b/arch/arm/mach-omap2/powerdomain.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * OMAP powerdomain control 2 * OMAP powerdomain control
3 * 3 *
4 * Copyright (C) 2007-2008 Texas Instruments, Inc. 4 * Copyright (C) 2007-2008, 2011 Texas Instruments, Inc.
5 * Copyright (C) 2007-2011 Nokia Corporation 5 * Copyright (C) 2007-2011 Nokia Corporation
6 * 6 *
7 * Written by Paul Walmsley 7 * Written by Paul Walmsley
@@ -81,9 +81,6 @@ static int _pwrdm_register(struct powerdomain *pwrdm)
81 if (!pwrdm || !pwrdm->name) 81 if (!pwrdm || !pwrdm->name)
82 return -EINVAL; 82 return -EINVAL;
83 83
84 if (!omap_chip_is(pwrdm->omap_chip))
85 return -EINVAL;
86
87 if (cpu_is_omap44xx() && 84 if (cpu_is_omap44xx() &&
88 pwrdm->prcm_partition == OMAP4430_INVALID_PRCM_PARTITION) { 85 pwrdm->prcm_partition == OMAP4430_INVALID_PRCM_PARTITION) {
89 pr_err("powerdomain: %s: missing OMAP4 PRCM partition ID\n", 86 pr_err("powerdomain: %s: missing OMAP4 PRCM partition ID\n",
@@ -194,36 +191,76 @@ static int _pwrdm_post_transition_cb(struct powerdomain *pwrdm, void *unused)
194/* Public functions */ 191/* Public functions */
195 192
196/** 193/**
197 * pwrdm_init - set up the powerdomain layer 194 * pwrdm_register_platform_funcs - register powerdomain implementation fns
198 * @pwrdms: array of struct powerdomain pointers to register 195 * @po: func pointers for arch specific implementations
199 * @custom_funcs: func pointers for arch specific implementations 196 *
197 * Register the list of function pointers used to implement the
198 * powerdomain functions on different OMAP SoCs. Should be called
199 * before any other pwrdm_register*() function. Returns -EINVAL if
200 * @po is null, -EEXIST if platform functions have already been
201 * registered, or 0 upon success.
202 */
203int pwrdm_register_platform_funcs(struct pwrdm_ops *po)
204{
205 if (!po)
206 return -EINVAL;
207
208 if (arch_pwrdm)
209 return -EEXIST;
210
211 arch_pwrdm = po;
212
213 return 0;
214}
215
216/**
217 * pwrdm_register_pwrdms - register SoC powerdomains
218 * @ps: pointer to an array of struct powerdomain to register
200 * 219 *
201 * Loop through the array of powerdomains @pwrdms, registering all 220 * Register the powerdomains available on a particular OMAP SoC. Must
202 * that are available on the current CPU. Also, program all 221 * be called after pwrdm_register_platform_funcs(). May be called
203 * powerdomain target state as ON; this is to prevent domains from 222 * multiple times. Returns -EACCES if called before
204 * hitting low power states (if bootloader has target states set to 223 * pwrdm_register_platform_funcs(); -EINVAL if the argument @ps is
205 * something other than ON) and potentially even losing context while 224 * null; or 0 upon success.
206 * PM is not fully initialized. The PM late init code can then program
207 * the desired target state for all the power domains. No return
208 * value.
209 */ 225 */
210void pwrdm_init(struct powerdomain **pwrdms, struct pwrdm_ops *custom_funcs) 226int pwrdm_register_pwrdms(struct powerdomain **ps)
211{ 227{
212 struct powerdomain **p = NULL; 228 struct powerdomain **p = NULL;
213 struct powerdomain *temp_p;
214 229
215 if (!custom_funcs) 230 if (!arch_pwrdm)
216 WARN(1, "powerdomain: No custom pwrdm functions registered\n"); 231 return -EEXIST;
217 else
218 arch_pwrdm = custom_funcs;
219 232
220 if (pwrdms) { 233 if (!ps)
221 for (p = pwrdms; *p; p++) 234 return -EINVAL;
222 _pwrdm_register(*p); 235
223 } 236 for (p = ps; *p; p++)
237 _pwrdm_register(*p);
238
239 return 0;
240}
241
242/**
243 * pwrdm_complete_init - set up the powerdomain layer
244 *
245 * Do whatever is necessary to initialize registered powerdomains and
246 * powerdomain code. Currently, this programs the next power state
247 * for each powerdomain to ON. This prevents powerdomains from
248 * unexpectedly losing context or entering high wakeup latency modes
249 * with non-power-management-enabled kernels. Must be called after
250 * pwrdm_register_pwrdms(). Returns -EACCES if called before
251 * pwrdm_register_pwrdms(), or 0 upon success.
252 */
253int pwrdm_complete_init(void)
254{
255 struct powerdomain *temp_p;
256
257 if (list_empty(&pwrdm_list))
258 return -EACCES;
224 259
225 list_for_each_entry(temp_p, &pwrdm_list, node) 260 list_for_each_entry(temp_p, &pwrdm_list, node)
226 pwrdm_set_next_pwrst(temp_p, PWRDM_POWER_ON); 261 pwrdm_set_next_pwrst(temp_p, PWRDM_POWER_ON);
262
263 return 0;
227} 264}
228 265
229/** 266/**
diff --git a/arch/arm/mach-omap2/powerdomain.h b/arch/arm/mach-omap2/powerdomain.h
index d23d979b9c34..8febd84e5e31 100644
--- a/arch/arm/mach-omap2/powerdomain.h
+++ b/arch/arm/mach-omap2/powerdomain.h
@@ -78,7 +78,6 @@ struct powerdomain;
78/** 78/**
79 * struct powerdomain - OMAP powerdomain 79 * struct powerdomain - OMAP powerdomain
80 * @name: Powerdomain name 80 * @name: Powerdomain name
81 * @omap_chip: represents the OMAP chip types containing this pwrdm
82 * @prcm_offs: the address offset from CM_BASE/PRM_BASE 81 * @prcm_offs: the address offset from CM_BASE/PRM_BASE
83 * @prcm_partition: (OMAP4 only) the PRCM partition ID containing @prcm_offs 82 * @prcm_partition: (OMAP4 only) the PRCM partition ID containing @prcm_offs
84 * @pwrsts: Possible powerdomain power states 83 * @pwrsts: Possible powerdomain power states
@@ -98,7 +97,6 @@ struct powerdomain;
98 */ 97 */
99struct powerdomain { 98struct powerdomain {
100 const char *name; 99 const char *name;
101 const struct omap_chip_id omap_chip;
102 const s16 prcm_offs; 100 const s16 prcm_offs;
103 const u8 pwrsts; 101 const u8 pwrsts;
104 const u8 pwrsts_logic_ret; 102 const u8 pwrsts_logic_ret;
@@ -162,7 +160,9 @@ struct pwrdm_ops {
162 int (*pwrdm_wait_transition)(struct powerdomain *pwrdm); 160 int (*pwrdm_wait_transition)(struct powerdomain *pwrdm);
163}; 161};
164 162
165void pwrdm_init(struct powerdomain **pwrdm_list, struct pwrdm_ops *custom_funcs); 163int pwrdm_register_platform_funcs(struct pwrdm_ops *custom_funcs);
164int pwrdm_register_pwrdms(struct powerdomain **pwrdm_list);
165int pwrdm_complete_init(void);
166 166
167struct powerdomain *pwrdm_lookup(const char *name); 167struct powerdomain *pwrdm_lookup(const char *name);
168 168
@@ -210,7 +210,8 @@ int pwrdm_set_lowpwrstchange(struct powerdomain *pwrdm);
210u32 pwrdm_get_context_loss_count(struct powerdomain *pwrdm); 210u32 pwrdm_get_context_loss_count(struct powerdomain *pwrdm);
211bool pwrdm_can_ever_lose_context(struct powerdomain *pwrdm); 211bool pwrdm_can_ever_lose_context(struct powerdomain *pwrdm);
212 212
213extern void omap2xxx_powerdomains_init(void); 213extern void omap242x_powerdomains_init(void);
214extern void omap243x_powerdomains_init(void);
214extern void omap3xxx_powerdomains_init(void); 215extern void omap3xxx_powerdomains_init(void);
215extern void omap44xx_powerdomains_init(void); 216extern void omap44xx_powerdomains_init(void);
216 217
diff --git a/arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.c b/arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.c
index 4210c3399769..bf30483d5cb0 100644
--- a/arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.c
+++ b/arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * OMAP2/3 common powerdomain definitions 2 * OMAP2/3 common powerdomain definitions
3 * 3 *
4 * Copyright (C) 2007-2008 Texas Instruments, Inc. 4 * Copyright (C) 2007-2008, 2011 Texas Instruments, Inc.
5 * Copyright (C) 2007-2011 Nokia Corporation 5 * Copyright (C) 2007-2011 Nokia Corporation
6 * 6 *
7 * Paul Walmsley, Jouni Högander 7 * Paul Walmsley, Jouni Högander
@@ -12,20 +12,6 @@
12 */ 12 */
13 13
14/* 14/*
15 * To Do List
16 * -> Move the Sleep/Wakeup dependencies from Power Domain framework to
17 * Clock Domain Framework
18 */
19
20/*
21 * This file contains all of the powerdomains that have some element
22 * of software control for the OMAP24xx and OMAP34xx chips.
23 *
24 * This is not an exhaustive listing of powerdomains on the chips; only
25 * powerdomains that can be controlled in software.
26 */
27
28/*
29 * The names for the DSP/IVA2 powerdomains are confusing. 15 * The names for the DSP/IVA2 powerdomains are confusing.
30 * 16 *
31 * Most OMAP chips have an on-board DSP. 17 * Most OMAP chips have an on-board DSP.
@@ -59,8 +45,6 @@
59struct powerdomain gfx_omap2_pwrdm = { 45struct powerdomain gfx_omap2_pwrdm = {
60 .name = "gfx_pwrdm", 46 .name = "gfx_pwrdm",
61 .prcm_offs = GFX_MOD, 47 .prcm_offs = GFX_MOD,
62 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX |
63 CHIP_IS_OMAP3430ES1),
64 .pwrsts = PWRSTS_OFF_RET_ON, 48 .pwrsts = PWRSTS_OFF_RET_ON,
65 .pwrsts_logic_ret = PWRSTS_RET, 49 .pwrsts_logic_ret = PWRSTS_RET,
66 .banks = 1, 50 .banks = 1,
@@ -75,6 +59,5 @@ struct powerdomain gfx_omap2_pwrdm = {
75struct powerdomain wkup_omap2_pwrdm = { 59struct powerdomain wkup_omap2_pwrdm = {
76 .name = "wkup_pwrdm", 60 .name = "wkup_pwrdm",
77 .prcm_offs = WKUP_MOD, 61 .prcm_offs = WKUP_MOD,
78 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX | CHIP_IS_OMAP3430),
79 .pwrsts = PWRSTS_ON, 62 .pwrsts = PWRSTS_ON,
80}; 63};
diff --git a/arch/arm/mach-omap2/powerdomains2xxx_data.c b/arch/arm/mach-omap2/powerdomains2xxx_data.c
index cc389fb2005d..bb4394e3b621 100644
--- a/arch/arm/mach-omap2/powerdomains2xxx_data.c
+++ b/arch/arm/mach-omap2/powerdomains2xxx_data.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * OMAP2XXX powerdomain definitions 2 * OMAP2XXX powerdomain definitions
3 * 3 *
4 * Copyright (C) 2007-2008 Texas Instruments, Inc. 4 * Copyright (C) 2007-2008, 2011 Texas Instruments, Inc.
5 * Copyright (C) 2007-2011 Nokia Corporation 5 * Copyright (C) 2007-2011 Nokia Corporation
6 * 6 *
7 * Paul Walmsley, Jouni Högander 7 * Paul Walmsley, Jouni Högander
@@ -28,7 +28,6 @@
28static struct powerdomain dsp_pwrdm = { 28static struct powerdomain dsp_pwrdm = {
29 .name = "dsp_pwrdm", 29 .name = "dsp_pwrdm",
30 .prcm_offs = OMAP24XX_DSP_MOD, 30 .prcm_offs = OMAP24XX_DSP_MOD,
31 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX),
32 .pwrsts = PWRSTS_OFF_RET_ON, 31 .pwrsts = PWRSTS_OFF_RET_ON,
33 .pwrsts_logic_ret = PWRSTS_RET, 32 .pwrsts_logic_ret = PWRSTS_RET,
34 .banks = 1, 33 .banks = 1,
@@ -43,7 +42,6 @@ static struct powerdomain dsp_pwrdm = {
43static struct powerdomain mpu_24xx_pwrdm = { 42static struct powerdomain mpu_24xx_pwrdm = {
44 .name = "mpu_pwrdm", 43 .name = "mpu_pwrdm",
45 .prcm_offs = MPU_MOD, 44 .prcm_offs = MPU_MOD,
46 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX),
47 .pwrsts = PWRSTS_OFF_RET_ON, 45 .pwrsts = PWRSTS_OFF_RET_ON,
48 .pwrsts_logic_ret = PWRSTS_OFF_RET, 46 .pwrsts_logic_ret = PWRSTS_OFF_RET,
49 .banks = 1, 47 .banks = 1,
@@ -58,7 +56,6 @@ static struct powerdomain mpu_24xx_pwrdm = {
58static struct powerdomain core_24xx_pwrdm = { 56static struct powerdomain core_24xx_pwrdm = {
59 .name = "core_pwrdm", 57 .name = "core_pwrdm",
60 .prcm_offs = CORE_MOD, 58 .prcm_offs = CORE_MOD,
61 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX),
62 .pwrsts = PWRSTS_OFF_RET_ON, 59 .pwrsts = PWRSTS_OFF_RET_ON,
63 .banks = 3, 60 .banks = 3,
64 .pwrsts_mem_ret = { 61 .pwrsts_mem_ret = {
@@ -78,14 +75,11 @@ static struct powerdomain core_24xx_pwrdm = {
78 * 2430-specific powerdomains 75 * 2430-specific powerdomains
79 */ 76 */
80 77
81#ifdef CONFIG_SOC_OMAP2430
82
83/* XXX 2430 KILLDOMAINWKUP bit? No current users apparently */ 78/* XXX 2430 KILLDOMAINWKUP bit? No current users apparently */
84 79
85static struct powerdomain mdm_pwrdm = { 80static struct powerdomain mdm_pwrdm = {
86 .name = "mdm_pwrdm", 81 .name = "mdm_pwrdm",
87 .prcm_offs = OMAP2430_MDM_MOD, 82 .prcm_offs = OMAP2430_MDM_MOD,
88 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
89 .pwrsts = PWRSTS_OFF_RET_ON, 83 .pwrsts = PWRSTS_OFF_RET_ON,
90 .pwrsts_logic_ret = PWRSTS_RET, 84 .pwrsts_logic_ret = PWRSTS_RET,
91 .banks = 1, 85 .banks = 1,
@@ -97,27 +91,41 @@ static struct powerdomain mdm_pwrdm = {
97 }, 91 },
98}; 92};
99 93
100#endif /* CONFIG_SOC_OMAP2430 */ 94/*
101 95 *
102/* As powerdomains are added or removed above, this list must also be changed */ 96 */
103static struct powerdomain *powerdomains_omap2xxx[] __initdata = {
104 97
98static struct powerdomain *powerdomains_omap24xx[] __initdata = {
105 &wkup_omap2_pwrdm, 99 &wkup_omap2_pwrdm,
106 &gfx_omap2_pwrdm, 100 &gfx_omap2_pwrdm,
107
108#ifdef CONFIG_ARCH_OMAP2
109 &dsp_pwrdm, 101 &dsp_pwrdm,
110 &mpu_24xx_pwrdm, 102 &mpu_24xx_pwrdm,
111 &core_24xx_pwrdm, 103 &core_24xx_pwrdm,
112#endif 104 NULL
105};
113 106
114#ifdef CONFIG_SOC_OMAP2430 107static struct powerdomain *powerdomains_omap2430[] __initdata = {
115 &mdm_pwrdm, 108 &mdm_pwrdm,
116#endif
117 NULL 109 NULL
118}; 110};
119 111
120void __init omap2xxx_powerdomains_init(void) 112void __init omap242x_powerdomains_init(void)
113{
114 if (!cpu_is_omap2420())
115 return;
116
117 pwrdm_register_platform_funcs(&omap2_pwrdm_operations);
118 pwrdm_register_pwrdms(powerdomains_omap24xx);
119 pwrdm_complete_init();
120}
121
122void __init omap243x_powerdomains_init(void)
121{ 123{
122 pwrdm_init(powerdomains_omap2xxx, &omap2_pwrdm_operations); 124 if (!cpu_is_omap2430())
125 return;
126
127 pwrdm_register_platform_funcs(&omap2_pwrdm_operations);
128 pwrdm_register_pwrdms(powerdomains_omap24xx);
129 pwrdm_register_pwrdms(powerdomains_omap2430);
130 pwrdm_complete_init();
123} 131}
diff --git a/arch/arm/mach-omap2/powerdomains3xxx_data.c b/arch/arm/mach-omap2/powerdomains3xxx_data.c
index 469a920a74dc..e4f3a7d6ecfc 100644
--- a/arch/arm/mach-omap2/powerdomains3xxx_data.c
+++ b/arch/arm/mach-omap2/powerdomains3xxx_data.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * OMAP3 powerdomain definitions 2 * OMAP3 powerdomain definitions
3 * 3 *
4 * Copyright (C) 2007-2008 Texas Instruments, Inc. 4 * Copyright (C) 2007-2008, 2011 Texas Instruments, Inc.
5 * Copyright (C) 2007-2011 Nokia Corporation 5 * Copyright (C) 2007-2011 Nokia Corporation
6 * 6 *
7 * Paul Walmsley, Jouni Högander 7 * Paul Walmsley, Jouni Högander
@@ -14,6 +14,8 @@
14#include <linux/kernel.h> 14#include <linux/kernel.h>
15#include <linux/init.h> 15#include <linux/init.h>
16 16
17#include <plat/cpu.h>
18
17#include "powerdomain.h" 19#include "powerdomain.h"
18#include "powerdomains2xxx_3xxx_data.h" 20#include "powerdomains2xxx_3xxx_data.h"
19 21
@@ -27,8 +29,6 @@
27 * 34XX-specific powerdomains, dependencies 29 * 34XX-specific powerdomains, dependencies
28 */ 30 */
29 31
30#ifdef CONFIG_ARCH_OMAP3
31
32/* 32/*
33 * Powerdomains 33 * Powerdomains
34 */ 34 */
@@ -36,7 +36,6 @@
36static struct powerdomain iva2_pwrdm = { 36static struct powerdomain iva2_pwrdm = {
37 .name = "iva2_pwrdm", 37 .name = "iva2_pwrdm",
38 .prcm_offs = OMAP3430_IVA2_MOD, 38 .prcm_offs = OMAP3430_IVA2_MOD,
39 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
40 .pwrsts = PWRSTS_OFF_RET_ON, 39 .pwrsts = PWRSTS_OFF_RET_ON,
41 .pwrsts_logic_ret = PWRSTS_OFF_RET, 40 .pwrsts_logic_ret = PWRSTS_OFF_RET,
42 .banks = 4, 41 .banks = 4,
@@ -57,7 +56,6 @@ static struct powerdomain iva2_pwrdm = {
57static struct powerdomain mpu_3xxx_pwrdm = { 56static struct powerdomain mpu_3xxx_pwrdm = {
58 .name = "mpu_pwrdm", 57 .name = "mpu_pwrdm",
59 .prcm_offs = MPU_MOD, 58 .prcm_offs = MPU_MOD,
60 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
61 .pwrsts = PWRSTS_OFF_RET_ON, 59 .pwrsts = PWRSTS_OFF_RET_ON,
62 .pwrsts_logic_ret = PWRSTS_OFF_RET, 60 .pwrsts_logic_ret = PWRSTS_OFF_RET,
63 .flags = PWRDM_HAS_MPU_QUIRK, 61 .flags = PWRDM_HAS_MPU_QUIRK,
@@ -83,10 +81,6 @@ static struct powerdomain mpu_3xxx_pwrdm = {
83static struct powerdomain core_3xxx_pre_es3_1_pwrdm = { 81static struct powerdomain core_3xxx_pre_es3_1_pwrdm = {
84 .name = "core_pwrdm", 82 .name = "core_pwrdm",
85 .prcm_offs = CORE_MOD, 83 .prcm_offs = CORE_MOD,
86 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES1 |
87 CHIP_IS_OMAP3430ES2 |
88 CHIP_IS_OMAP3430ES3_0 |
89 CHIP_IS_OMAP3630ES1),
90 .pwrsts = PWRSTS_OFF_RET_ON, 84 .pwrsts = PWRSTS_OFF_RET_ON,
91 .pwrsts_logic_ret = PWRSTS_OFF_RET, 85 .pwrsts_logic_ret = PWRSTS_OFF_RET,
92 .banks = 2, 86 .banks = 2,
@@ -103,8 +97,6 @@ static struct powerdomain core_3xxx_pre_es3_1_pwrdm = {
103static struct powerdomain core_3xxx_es3_1_pwrdm = { 97static struct powerdomain core_3xxx_es3_1_pwrdm = {
104 .name = "core_pwrdm", 98 .name = "core_pwrdm",
105 .prcm_offs = CORE_MOD, 99 .prcm_offs = CORE_MOD,
106 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES3_1 |
107 CHIP_GE_OMAP3630ES1_1),
108 .pwrsts = PWRSTS_OFF_RET_ON, 100 .pwrsts = PWRSTS_OFF_RET_ON,
109 .pwrsts_logic_ret = PWRSTS_OFF_RET, 101 .pwrsts_logic_ret = PWRSTS_OFF_RET,
110 /* 102 /*
@@ -125,7 +117,6 @@ static struct powerdomain core_3xxx_es3_1_pwrdm = {
125 117
126static struct powerdomain dss_pwrdm = { 118static struct powerdomain dss_pwrdm = {
127 .name = "dss_pwrdm", 119 .name = "dss_pwrdm",
128 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
129 .prcm_offs = OMAP3430_DSS_MOD, 120 .prcm_offs = OMAP3430_DSS_MOD,
130 .pwrsts = PWRSTS_OFF_RET_ON, 121 .pwrsts = PWRSTS_OFF_RET_ON,
131 .pwrsts_logic_ret = PWRSTS_RET, 122 .pwrsts_logic_ret = PWRSTS_RET,
@@ -146,7 +137,6 @@ static struct powerdomain dss_pwrdm = {
146static struct powerdomain sgx_pwrdm = { 137static struct powerdomain sgx_pwrdm = {
147 .name = "sgx_pwrdm", 138 .name = "sgx_pwrdm",
148 .prcm_offs = OMAP3430ES2_SGX_MOD, 139 .prcm_offs = OMAP3430ES2_SGX_MOD,
149 .omap_chip = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES2),
150 /* XXX This is accurate for 3430 SGX, but what about GFX? */ 140 /* XXX This is accurate for 3430 SGX, but what about GFX? */
151 .pwrsts = PWRSTS_OFF_ON, 141 .pwrsts = PWRSTS_OFF_ON,
152 .pwrsts_logic_ret = PWRSTS_RET, 142 .pwrsts_logic_ret = PWRSTS_RET,
@@ -161,7 +151,6 @@ static struct powerdomain sgx_pwrdm = {
161 151
162static struct powerdomain cam_pwrdm = { 152static struct powerdomain cam_pwrdm = {
163 .name = "cam_pwrdm", 153 .name = "cam_pwrdm",
164 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
165 .prcm_offs = OMAP3430_CAM_MOD, 154 .prcm_offs = OMAP3430_CAM_MOD,
166 .pwrsts = PWRSTS_OFF_RET_ON, 155 .pwrsts = PWRSTS_OFF_RET_ON,
167 .pwrsts_logic_ret = PWRSTS_RET, 156 .pwrsts_logic_ret = PWRSTS_RET,
@@ -177,7 +166,6 @@ static struct powerdomain cam_pwrdm = {
177static struct powerdomain per_pwrdm = { 166static struct powerdomain per_pwrdm = {
178 .name = "per_pwrdm", 167 .name = "per_pwrdm",
179 .prcm_offs = OMAP3430_PER_MOD, 168 .prcm_offs = OMAP3430_PER_MOD,
180 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
181 .pwrsts = PWRSTS_OFF_RET_ON, 169 .pwrsts = PWRSTS_OFF_RET_ON,
182 .pwrsts_logic_ret = PWRSTS_OFF_RET, 170 .pwrsts_logic_ret = PWRSTS_OFF_RET,
183 .banks = 1, 171 .banks = 1,
@@ -192,13 +180,11 @@ static struct powerdomain per_pwrdm = {
192static struct powerdomain emu_pwrdm = { 180static struct powerdomain emu_pwrdm = {
193 .name = "emu_pwrdm", 181 .name = "emu_pwrdm",
194 .prcm_offs = OMAP3430_EMU_MOD, 182 .prcm_offs = OMAP3430_EMU_MOD,
195 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
196}; 183};
197 184
198static struct powerdomain neon_pwrdm = { 185static struct powerdomain neon_pwrdm = {
199 .name = "neon_pwrdm", 186 .name = "neon_pwrdm",
200 .prcm_offs = OMAP3430_NEON_MOD, 187 .prcm_offs = OMAP3430_NEON_MOD,
201 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
202 .pwrsts = PWRSTS_OFF_RET_ON, 188 .pwrsts = PWRSTS_OFF_RET_ON,
203 .pwrsts_logic_ret = PWRSTS_RET, 189 .pwrsts_logic_ret = PWRSTS_RET,
204}; 190};
@@ -206,7 +192,6 @@ static struct powerdomain neon_pwrdm = {
206static struct powerdomain usbhost_pwrdm = { 192static struct powerdomain usbhost_pwrdm = {
207 .name = "usbhost_pwrdm", 193 .name = "usbhost_pwrdm",
208 .prcm_offs = OMAP3430ES2_USBHOST_MOD, 194 .prcm_offs = OMAP3430ES2_USBHOST_MOD,
209 .omap_chip = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES2),
210 .pwrsts = PWRSTS_OFF_RET_ON, 195 .pwrsts = PWRSTS_OFF_RET_ON,
211 .pwrsts_logic_ret = PWRSTS_RET, 196 .pwrsts_logic_ret = PWRSTS_RET,
212 /* 197 /*
@@ -228,60 +213,92 @@ static struct powerdomain usbhost_pwrdm = {
228static struct powerdomain dpll1_pwrdm = { 213static struct powerdomain dpll1_pwrdm = {
229 .name = "dpll1_pwrdm", 214 .name = "dpll1_pwrdm",
230 .prcm_offs = MPU_MOD, 215 .prcm_offs = MPU_MOD,
231 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
232}; 216};
233 217
234static struct powerdomain dpll2_pwrdm = { 218static struct powerdomain dpll2_pwrdm = {
235 .name = "dpll2_pwrdm", 219 .name = "dpll2_pwrdm",
236 .prcm_offs = OMAP3430_IVA2_MOD, 220 .prcm_offs = OMAP3430_IVA2_MOD,
237 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
238}; 221};
239 222
240static struct powerdomain dpll3_pwrdm = { 223static struct powerdomain dpll3_pwrdm = {
241 .name = "dpll3_pwrdm", 224 .name = "dpll3_pwrdm",
242 .prcm_offs = PLL_MOD, 225 .prcm_offs = PLL_MOD,
243 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
244}; 226};
245 227
246static struct powerdomain dpll4_pwrdm = { 228static struct powerdomain dpll4_pwrdm = {
247 .name = "dpll4_pwrdm", 229 .name = "dpll4_pwrdm",
248 .prcm_offs = PLL_MOD, 230 .prcm_offs = PLL_MOD,
249 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
250}; 231};
251 232
252static struct powerdomain dpll5_pwrdm = { 233static struct powerdomain dpll5_pwrdm = {
253 .name = "dpll5_pwrdm", 234 .name = "dpll5_pwrdm",
254 .prcm_offs = PLL_MOD, 235 .prcm_offs = PLL_MOD,
255 .omap_chip = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES2),
256}; 236};
257 237
258/* As powerdomains are added or removed above, this list must also be changed */ 238/* As powerdomains are added or removed above, this list must also be changed */
259static struct powerdomain *powerdomains_omap3xxx[] __initdata = { 239static struct powerdomain *powerdomains_omap3430_common[] __initdata = {
260
261 &wkup_omap2_pwrdm, 240 &wkup_omap2_pwrdm,
262 &gfx_omap2_pwrdm,
263 &iva2_pwrdm, 241 &iva2_pwrdm,
264 &mpu_3xxx_pwrdm, 242 &mpu_3xxx_pwrdm,
265 &neon_pwrdm, 243 &neon_pwrdm,
266 &core_3xxx_pre_es3_1_pwrdm,
267 &core_3xxx_es3_1_pwrdm,
268 &cam_pwrdm, 244 &cam_pwrdm,
269 &dss_pwrdm, 245 &dss_pwrdm,
270 &per_pwrdm, 246 &per_pwrdm,
271 &emu_pwrdm, 247 &emu_pwrdm,
272 &sgx_pwrdm,
273 &usbhost_pwrdm,
274 &dpll1_pwrdm, 248 &dpll1_pwrdm,
275 &dpll2_pwrdm, 249 &dpll2_pwrdm,
276 &dpll3_pwrdm, 250 &dpll3_pwrdm,
277 &dpll4_pwrdm, 251 &dpll4_pwrdm,
252 NULL
253};
254
255static struct powerdomain *powerdomains_omap3430es1[] __initdata = {
256 &gfx_omap2_pwrdm,
257 &core_3xxx_pre_es3_1_pwrdm,
258 NULL
259};
260
261/* also includes 3630ES1.0 */
262static struct powerdomain *powerdomains_omap3430es2_es3_0[] __initdata = {
263 &core_3xxx_pre_es3_1_pwrdm,
264 &sgx_pwrdm,
265 &usbhost_pwrdm,
278 &dpll5_pwrdm, 266 &dpll5_pwrdm,
279#endif
280 NULL 267 NULL
281}; 268};
282 269
270/* also includes 3630ES1.1+ */
271static struct powerdomain *powerdomains_omap3430es3_1plus[] __initdata = {
272 &core_3xxx_es3_1_pwrdm,
273 &sgx_pwrdm,
274 &usbhost_pwrdm,
275 &dpll5_pwrdm,
276 NULL
277};
283 278
284void __init omap3xxx_powerdomains_init(void) 279void __init omap3xxx_powerdomains_init(void)
285{ 280{
286 pwrdm_init(powerdomains_omap3xxx, &omap3_pwrdm_operations); 281 unsigned int rev;
282
283 if (!cpu_is_omap34xx())
284 return;
285
286 pwrdm_register_platform_funcs(&omap3_pwrdm_operations);
287 pwrdm_register_pwrdms(powerdomains_omap3430_common);
288
289 rev = omap_rev();
290
291 if (rev == OMAP3430_REV_ES1_0)
292 pwrdm_register_pwrdms(powerdomains_omap3430es1);
293 else if (rev == OMAP3430_REV_ES2_0 || rev == OMAP3430_REV_ES2_1 ||
294 rev == OMAP3430_REV_ES3_0 || rev == OMAP3630_REV_ES1_0)
295 pwrdm_register_pwrdms(powerdomains_omap3430es2_es3_0);
296 else if (rev == OMAP3430_REV_ES3_1 || rev == OMAP3430_REV_ES3_1_2 ||
297 rev == OMAP3517_REV_ES1_0 || rev == OMAP3517_REV_ES1_1 ||
298 rev == OMAP3630_REV_ES1_1 || rev == OMAP3630_REV_ES1_2)
299 pwrdm_register_pwrdms(powerdomains_omap3430es3_1plus);
300 else
301 WARN(1, "OMAP3 powerdomain init: unknown chip type\n");
302
303 pwrdm_complete_init();
287} 304}
diff --git a/arch/arm/mach-omap2/powerdomains44xx_data.c b/arch/arm/mach-omap2/powerdomains44xx_data.c
index 247e79495115..cbce0c9069cd 100644
--- a/arch/arm/mach-omap2/powerdomains44xx_data.c
+++ b/arch/arm/mach-omap2/powerdomains44xx_data.c
@@ -35,7 +35,6 @@ static struct powerdomain core_44xx_pwrdm = {
35 .name = "core_pwrdm", 35 .name = "core_pwrdm",
36 .prcm_offs = OMAP4430_PRM_CORE_INST, 36 .prcm_offs = OMAP4430_PRM_CORE_INST,
37 .prcm_partition = OMAP4430_PRM_PARTITION, 37 .prcm_partition = OMAP4430_PRM_PARTITION,
38 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
39 .pwrsts = PWRSTS_RET_ON, 38 .pwrsts = PWRSTS_RET_ON,
40 .pwrsts_logic_ret = PWRSTS_OFF_RET, 39 .pwrsts_logic_ret = PWRSTS_OFF_RET,
41 .banks = 5, 40 .banks = 5,
@@ -61,7 +60,6 @@ static struct powerdomain gfx_44xx_pwrdm = {
61 .name = "gfx_pwrdm", 60 .name = "gfx_pwrdm",
62 .prcm_offs = OMAP4430_PRM_GFX_INST, 61 .prcm_offs = OMAP4430_PRM_GFX_INST,
63 .prcm_partition = OMAP4430_PRM_PARTITION, 62 .prcm_partition = OMAP4430_PRM_PARTITION,
64 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
65 .pwrsts = PWRSTS_OFF_ON, 63 .pwrsts = PWRSTS_OFF_ON,
66 .banks = 1, 64 .banks = 1,
67 .pwrsts_mem_ret = { 65 .pwrsts_mem_ret = {
@@ -78,7 +76,6 @@ static struct powerdomain abe_44xx_pwrdm = {
78 .name = "abe_pwrdm", 76 .name = "abe_pwrdm",
79 .prcm_offs = OMAP4430_PRM_ABE_INST, 77 .prcm_offs = OMAP4430_PRM_ABE_INST,
80 .prcm_partition = OMAP4430_PRM_PARTITION, 78 .prcm_partition = OMAP4430_PRM_PARTITION,
81 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
82 .pwrsts = PWRSTS_OFF_RET_ON, 79 .pwrsts = PWRSTS_OFF_RET_ON,
83 .pwrsts_logic_ret = PWRSTS_OFF, 80 .pwrsts_logic_ret = PWRSTS_OFF,
84 .banks = 2, 81 .banks = 2,
@@ -98,7 +95,6 @@ static struct powerdomain dss_44xx_pwrdm = {
98 .name = "dss_pwrdm", 95 .name = "dss_pwrdm",
99 .prcm_offs = OMAP4430_PRM_DSS_INST, 96 .prcm_offs = OMAP4430_PRM_DSS_INST,
100 .prcm_partition = OMAP4430_PRM_PARTITION, 97 .prcm_partition = OMAP4430_PRM_PARTITION,
101 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
102 .pwrsts = PWRSTS_OFF_RET_ON, 98 .pwrsts = PWRSTS_OFF_RET_ON,
103 .pwrsts_logic_ret = PWRSTS_OFF, 99 .pwrsts_logic_ret = PWRSTS_OFF,
104 .banks = 1, 100 .banks = 1,
@@ -116,7 +112,6 @@ static struct powerdomain tesla_44xx_pwrdm = {
116 .name = "tesla_pwrdm", 112 .name = "tesla_pwrdm",
117 .prcm_offs = OMAP4430_PRM_TESLA_INST, 113 .prcm_offs = OMAP4430_PRM_TESLA_INST,
118 .prcm_partition = OMAP4430_PRM_PARTITION, 114 .prcm_partition = OMAP4430_PRM_PARTITION,
119 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
120 .pwrsts = PWRSTS_OFF_RET_ON, 115 .pwrsts = PWRSTS_OFF_RET_ON,
121 .pwrsts_logic_ret = PWRSTS_OFF_RET, 116 .pwrsts_logic_ret = PWRSTS_OFF_RET,
122 .banks = 3, 117 .banks = 3,
@@ -138,7 +133,6 @@ static struct powerdomain wkup_44xx_pwrdm = {
138 .name = "wkup_pwrdm", 133 .name = "wkup_pwrdm",
139 .prcm_offs = OMAP4430_PRM_WKUP_INST, 134 .prcm_offs = OMAP4430_PRM_WKUP_INST,
140 .prcm_partition = OMAP4430_PRM_PARTITION, 135 .prcm_partition = OMAP4430_PRM_PARTITION,
141 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
142 .pwrsts = PWRSTS_ON, 136 .pwrsts = PWRSTS_ON,
143 .banks = 1, 137 .banks = 1,
144 .pwrsts_mem_ret = { 138 .pwrsts_mem_ret = {
@@ -154,7 +148,6 @@ static struct powerdomain cpu0_44xx_pwrdm = {
154 .name = "cpu0_pwrdm", 148 .name = "cpu0_pwrdm",
155 .prcm_offs = OMAP4430_PRCM_MPU_CPU0_INST, 149 .prcm_offs = OMAP4430_PRCM_MPU_CPU0_INST,
156 .prcm_partition = OMAP4430_PRCM_MPU_PARTITION, 150 .prcm_partition = OMAP4430_PRCM_MPU_PARTITION,
157 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
158 .pwrsts = PWRSTS_OFF_RET_ON, 151 .pwrsts = PWRSTS_OFF_RET_ON,
159 .pwrsts_logic_ret = PWRSTS_OFF_RET, 152 .pwrsts_logic_ret = PWRSTS_OFF_RET,
160 .banks = 1, 153 .banks = 1,
@@ -171,7 +164,6 @@ static struct powerdomain cpu1_44xx_pwrdm = {
171 .name = "cpu1_pwrdm", 164 .name = "cpu1_pwrdm",
172 .prcm_offs = OMAP4430_PRCM_MPU_CPU1_INST, 165 .prcm_offs = OMAP4430_PRCM_MPU_CPU1_INST,
173 .prcm_partition = OMAP4430_PRCM_MPU_PARTITION, 166 .prcm_partition = OMAP4430_PRCM_MPU_PARTITION,
174 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
175 .pwrsts = PWRSTS_OFF_RET_ON, 167 .pwrsts = PWRSTS_OFF_RET_ON,
176 .pwrsts_logic_ret = PWRSTS_OFF_RET, 168 .pwrsts_logic_ret = PWRSTS_OFF_RET,
177 .banks = 1, 169 .banks = 1,
@@ -188,7 +180,6 @@ static struct powerdomain emu_44xx_pwrdm = {
188 .name = "emu_pwrdm", 180 .name = "emu_pwrdm",
189 .prcm_offs = OMAP4430_PRM_EMU_INST, 181 .prcm_offs = OMAP4430_PRM_EMU_INST,
190 .prcm_partition = OMAP4430_PRM_PARTITION, 182 .prcm_partition = OMAP4430_PRM_PARTITION,
191 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
192 .pwrsts = PWRSTS_OFF_ON, 183 .pwrsts = PWRSTS_OFF_ON,
193 .banks = 1, 184 .banks = 1,
194 .pwrsts_mem_ret = { 185 .pwrsts_mem_ret = {
@@ -204,7 +195,6 @@ static struct powerdomain mpu_44xx_pwrdm = {
204 .name = "mpu_pwrdm", 195 .name = "mpu_pwrdm",
205 .prcm_offs = OMAP4430_PRM_MPU_INST, 196 .prcm_offs = OMAP4430_PRM_MPU_INST,
206 .prcm_partition = OMAP4430_PRM_PARTITION, 197 .prcm_partition = OMAP4430_PRM_PARTITION,
207 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
208 .pwrsts = PWRSTS_RET_ON, 198 .pwrsts = PWRSTS_RET_ON,
209 .pwrsts_logic_ret = PWRSTS_OFF_RET, 199 .pwrsts_logic_ret = PWRSTS_OFF_RET,
210 .banks = 3, 200 .banks = 3,
@@ -225,7 +215,6 @@ static struct powerdomain ivahd_44xx_pwrdm = {
225 .name = "ivahd_pwrdm", 215 .name = "ivahd_pwrdm",
226 .prcm_offs = OMAP4430_PRM_IVAHD_INST, 216 .prcm_offs = OMAP4430_PRM_IVAHD_INST,
227 .prcm_partition = OMAP4430_PRM_PARTITION, 217 .prcm_partition = OMAP4430_PRM_PARTITION,
228 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
229 .pwrsts = PWRSTS_OFF_RET_ON, 218 .pwrsts = PWRSTS_OFF_RET_ON,
230 .pwrsts_logic_ret = PWRSTS_OFF, 219 .pwrsts_logic_ret = PWRSTS_OFF,
231 .banks = 4, 220 .banks = 4,
@@ -249,7 +238,6 @@ static struct powerdomain cam_44xx_pwrdm = {
249 .name = "cam_pwrdm", 238 .name = "cam_pwrdm",
250 .prcm_offs = OMAP4430_PRM_CAM_INST, 239 .prcm_offs = OMAP4430_PRM_CAM_INST,
251 .prcm_partition = OMAP4430_PRM_PARTITION, 240 .prcm_partition = OMAP4430_PRM_PARTITION,
252 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
253 .pwrsts = PWRSTS_OFF_ON, 241 .pwrsts = PWRSTS_OFF_ON,
254 .banks = 1, 242 .banks = 1,
255 .pwrsts_mem_ret = { 243 .pwrsts_mem_ret = {
@@ -266,7 +254,6 @@ static struct powerdomain l3init_44xx_pwrdm = {
266 .name = "l3init_pwrdm", 254 .name = "l3init_pwrdm",
267 .prcm_offs = OMAP4430_PRM_L3INIT_INST, 255 .prcm_offs = OMAP4430_PRM_L3INIT_INST,
268 .prcm_partition = OMAP4430_PRM_PARTITION, 256 .prcm_partition = OMAP4430_PRM_PARTITION,
269 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
270 .pwrsts = PWRSTS_RET_ON, 257 .pwrsts = PWRSTS_RET_ON,
271 .pwrsts_logic_ret = PWRSTS_OFF_RET, 258 .pwrsts_logic_ret = PWRSTS_OFF_RET,
272 .banks = 1, 259 .banks = 1,
@@ -284,7 +271,6 @@ static struct powerdomain l4per_44xx_pwrdm = {
284 .name = "l4per_pwrdm", 271 .name = "l4per_pwrdm",
285 .prcm_offs = OMAP4430_PRM_L4PER_INST, 272 .prcm_offs = OMAP4430_PRM_L4PER_INST,
286 .prcm_partition = OMAP4430_PRM_PARTITION, 273 .prcm_partition = OMAP4430_PRM_PARTITION,
287 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
288 .pwrsts = PWRSTS_RET_ON, 274 .pwrsts = PWRSTS_RET_ON,
289 .pwrsts_logic_ret = PWRSTS_OFF_RET, 275 .pwrsts_logic_ret = PWRSTS_OFF_RET,
290 .banks = 2, 276 .banks = 2,
@@ -307,7 +293,6 @@ static struct powerdomain always_on_core_44xx_pwrdm = {
307 .name = "always_on_core_pwrdm", 293 .name = "always_on_core_pwrdm",
308 .prcm_offs = OMAP4430_PRM_ALWAYS_ON_INST, 294 .prcm_offs = OMAP4430_PRM_ALWAYS_ON_INST,
309 .prcm_partition = OMAP4430_PRM_PARTITION, 295 .prcm_partition = OMAP4430_PRM_PARTITION,
310 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
311 .pwrsts = PWRSTS_ON, 296 .pwrsts = PWRSTS_ON,
312}; 297};
313 298
@@ -316,7 +301,6 @@ static struct powerdomain cefuse_44xx_pwrdm = {
316 .name = "cefuse_pwrdm", 301 .name = "cefuse_pwrdm",
317 .prcm_offs = OMAP4430_PRM_CEFUSE_INST, 302 .prcm_offs = OMAP4430_PRM_CEFUSE_INST,
318 .prcm_partition = OMAP4430_PRM_PARTITION, 303 .prcm_partition = OMAP4430_PRM_PARTITION,
319 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
320 .pwrsts = PWRSTS_OFF_ON, 304 .pwrsts = PWRSTS_OFF_ON,
321 .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, 305 .flags = PWRDM_HAS_LOWPOWERSTATECHANGE,
322}; 306};
@@ -352,5 +336,7 @@ static struct powerdomain *powerdomains_omap44xx[] __initdata = {
352 336
353void __init omap44xx_powerdomains_init(void) 337void __init omap44xx_powerdomains_init(void)
354{ 338{
355 pwrdm_init(powerdomains_omap44xx, &omap4_pwrdm_operations); 339 pwrdm_register_platform_funcs(&omap4_pwrdm_operations);
340 pwrdm_register_pwrdms(powerdomains_omap44xx);
341 pwrdm_complete_init();
356} 342}
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 466fc722fa0f..3d1c1d393f8f 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -711,7 +711,7 @@ void __init omap_serial_init_port(struct omap_board_data *bdata)
711{ 711{
712 struct omap_uart_state *uart; 712 struct omap_uart_state *uart;
713 struct omap_hwmod *oh; 713 struct omap_hwmod *oh;
714 struct omap_device *od; 714 struct platform_device *pdev;
715 void *pdata = NULL; 715 void *pdata = NULL;
716 u32 pdata_size = 0; 716 u32 pdata_size = 0;
717 char *name; 717 char *name;
@@ -799,20 +799,20 @@ void __init omap_serial_init_port(struct omap_board_data *bdata)
799 if (WARN_ON(!oh)) 799 if (WARN_ON(!oh))
800 return; 800 return;
801 801
802 od = omap_device_build(name, uart->num, oh, pdata, pdata_size, 802 pdev = omap_device_build(name, uart->num, oh, pdata, pdata_size,
803 omap_uart_latency, 803 omap_uart_latency,
804 ARRAY_SIZE(omap_uart_latency), false); 804 ARRAY_SIZE(omap_uart_latency), false);
805 WARN(IS_ERR(od), "Could not build omap_device for %s: %s.\n", 805 WARN(IS_ERR(pdev), "Could not build omap_device for %s: %s.\n",
806 name, oh->name); 806 name, oh->name);
807 807
808 omap_device_disable_idle_on_suspend(od); 808 omap_device_disable_idle_on_suspend(pdev);
809 oh->mux = omap_hwmod_mux_init(bdata->pads, bdata->pads_cnt); 809 oh->mux = omap_hwmod_mux_init(bdata->pads, bdata->pads_cnt);
810 810
811 uart->irq = oh->mpu_irqs[0].irq; 811 uart->irq = oh->mpu_irqs[0].irq;
812 uart->regshift = 2; 812 uart->regshift = 2;
813 uart->mapbase = oh->slaves[0]->addr->pa_start; 813 uart->mapbase = oh->slaves[0]->addr->pa_start;
814 uart->membase = omap_hwmod_get_mpu_rt_va(oh); 814 uart->membase = omap_hwmod_get_mpu_rt_va(oh);
815 uart->pdev = &od->pdev; 815 uart->pdev = pdev;
816 816
817 oh->dev_attr = uart; 817 oh->dev_attr = uart;
818 818
@@ -846,8 +846,8 @@ void __init omap_serial_init_port(struct omap_board_data *bdata)
846 846
847 if ((cpu_is_omap34xx() && uart->padconf) || 847 if ((cpu_is_omap34xx() && uart->padconf) ||
848 (uart->wk_en && uart->wk_mask)) { 848 (uart->wk_en && uart->wk_mask)) {
849 device_init_wakeup(&od->pdev.dev, true); 849 device_init_wakeup(&pdev->dev, true);
850 DEV_CREATE_FILE(&od->pdev.dev, &dev_attr_sleep_timeout); 850 DEV_CREATE_FILE(&pdev->dev, &dev_attr_sleep_timeout);
851 } 851 }
852 852
853 /* Enable the MDR1 errata for OMAP3 */ 853 /* Enable the MDR1 errata for OMAP3 */
diff --git a/arch/arm/mach-omap2/sr_device.c b/arch/arm/mach-omap2/sr_device.c
index 10d3c5ee8018..624264d8e1a5 100644
--- a/arch/arm/mach-omap2/sr_device.c
+++ b/arch/arm/mach-omap2/sr_device.c
@@ -80,7 +80,7 @@ static void __init sr_set_nvalues(struct omap_volt_data *volt_data,
80static int sr_dev_init(struct omap_hwmod *oh, void *user) 80static int sr_dev_init(struct omap_hwmod *oh, void *user)
81{ 81{
82 struct omap_sr_data *sr_data; 82 struct omap_sr_data *sr_data;
83 struct omap_device *od; 83 struct platform_device *pdev;
84 struct omap_volt_data *volt_data; 84 struct omap_volt_data *volt_data;
85 char *name = "smartreflex"; 85 char *name = "smartreflex";
86 static int i; 86 static int i;
@@ -120,10 +120,10 @@ static int sr_dev_init(struct omap_hwmod *oh, void *user)
120 120
121 sr_data->enable_on_init = sr_enable_on_init; 121 sr_data->enable_on_init = sr_enable_on_init;
122 122
123 od = omap_device_build(name, i, oh, sr_data, sizeof(*sr_data), 123 pdev = omap_device_build(name, i, oh, sr_data, sizeof(*sr_data),
124 omap_sr_latency, 124 omap_sr_latency,
125 ARRAY_SIZE(omap_sr_latency), 0); 125 ARRAY_SIZE(omap_sr_latency), 0);
126 if (IS_ERR(od)) 126 if (IS_ERR(pdev))
127 pr_warning("%s: Could not build omap_device for %s: %s.\n\n", 127 pr_warning("%s: Could not build omap_device for %s: %s.\n\n",
128 __func__, name, oh->name); 128 __func__, name, oh->name);
129exit: 129exit:
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-27 09:53:17 -0500