diff options
Diffstat (limited to 'arch/arm/mach-omap2')
26 files changed, 480 insertions, 149 deletions
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 4f01533083cc..b7407154c881 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig | |||
@@ -78,8 +78,13 @@ config SOC_OMAP3430 | |||
78 | default y | 78 | default y |
79 | select ARCH_OMAP_OTG | 79 | select ARCH_OMAP_OTG |
80 | 80 | ||
81 | config SOC_OMAPTI816X | 81 | config SOC_OMAPTI81XX |
82 | bool "TI816X support" | 82 | bool "TI81XX support" |
83 | depends on ARCH_OMAP3 | ||
84 | default y | ||
85 | |||
86 | config SOC_OMAPAM33XX | ||
87 | bool "AM33XX support" | ||
83 | depends on ARCH_OMAP3 | 88 | depends on ARCH_OMAP3 |
84 | default y | 89 | default y |
85 | 90 | ||
@@ -316,7 +321,12 @@ config MACH_OMAP_3630SDP | |||
316 | 321 | ||
317 | config MACH_TI8168EVM | 322 | config MACH_TI8168EVM |
318 | bool "TI8168 Evaluation Module" | 323 | bool "TI8168 Evaluation Module" |
319 | depends on SOC_OMAPTI816X | 324 | depends on SOC_OMAPTI81XX |
325 | default y | ||
326 | |||
327 | config MACH_TI8148EVM | ||
328 | bool "TI8148 Evaluation Module" | ||
329 | depends on SOC_OMAPTI81XX | ||
320 | default y | 330 | default y |
321 | 331 | ||
322 | config MACH_OMAP_4430SDP | 332 | config MACH_OMAP_4430SDP |
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index b009f17dee56..6d226a76d057 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile | |||
@@ -232,6 +232,7 @@ obj-$(CONFIG_MACH_CRANEBOARD) += board-am3517crane.o | |||
232 | 232 | ||
233 | obj-$(CONFIG_MACH_SBC3530) += board-omap3stalker.o | 233 | obj-$(CONFIG_MACH_SBC3530) += board-omap3stalker.o |
234 | obj-$(CONFIG_MACH_TI8168EVM) += board-ti8168evm.o | 234 | obj-$(CONFIG_MACH_TI8168EVM) += board-ti8168evm.o |
235 | obj-$(CONFIG_MACH_TI8148EVM) += board-ti8168evm.o | ||
235 | 236 | ||
236 | # Platform specific device init code | 237 | # Platform specific device init code |
237 | 238 | ||
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c index 594c8ab2790d..4b4c9e25a83e 100644 --- a/arch/arm/mach-omap2/board-4430sdp.c +++ b/arch/arm/mach-omap2/board-4430sdp.c | |||
@@ -372,11 +372,17 @@ static struct platform_device sdp4430_vbat = { | |||
372 | }, | 372 | }, |
373 | }; | 373 | }; |
374 | 374 | ||
375 | static struct platform_device sdp4430_dmic_codec = { | ||
376 | .name = "dmic-codec", | ||
377 | .id = -1, | ||
378 | }; | ||
379 | |||
375 | static struct platform_device *sdp4430_devices[] __initdata = { | 380 | static struct platform_device *sdp4430_devices[] __initdata = { |
376 | &sdp4430_gpio_keys_device, | 381 | &sdp4430_gpio_keys_device, |
377 | &sdp4430_leds_gpio, | 382 | &sdp4430_leds_gpio, |
378 | &sdp4430_leds_pwm, | 383 | &sdp4430_leds_pwm, |
379 | &sdp4430_vbat, | 384 | &sdp4430_vbat, |
385 | &sdp4430_dmic_codec, | ||
380 | }; | 386 | }; |
381 | 387 | ||
382 | static struct omap_musb_board_data musb_board_data = { | 388 | static struct omap_musb_board_data musb_board_data = { |
diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c index 1545102d1f9b..e921e3be24a4 100644 --- a/arch/arm/mach-omap2/board-cm-t35.c +++ b/arch/arm/mach-omap2/board-cm-t35.c | |||
@@ -53,7 +53,8 @@ | |||
53 | #include "hsmmc.h" | 53 | #include "hsmmc.h" |
54 | #include "common-board-devices.h" | 54 | #include "common-board-devices.h" |
55 | 55 | ||
56 | #define CM_T35_GPIO_PENDOWN 57 | 56 | #define CM_T35_GPIO_PENDOWN 57 |
57 | #define SB_T35_USB_HUB_RESET_GPIO 167 | ||
57 | 58 | ||
58 | #define CM_T35_SMSC911X_CS 5 | 59 | #define CM_T35_SMSC911X_CS 5 |
59 | #define CM_T35_SMSC911X_GPIO 163 | 60 | #define CM_T35_SMSC911X_GPIO 163 |
@@ -339,8 +340,10 @@ static struct regulator_consumer_supply cm_t35_vsim_supply[] = { | |||
339 | REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"), | 340 | REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"), |
340 | }; | 341 | }; |
341 | 342 | ||
342 | static struct regulator_consumer_supply cm_t35_vdvi_supply[] = { | 343 | static struct regulator_consumer_supply cm_t35_vio_supplies[] = { |
343 | REGULATOR_SUPPLY("vdvi", "omapdss"), | 344 | REGULATOR_SUPPLY("vcc", "spi1.0"), |
345 | REGULATOR_SUPPLY("vdds_dsi", "omapdss"), | ||
346 | REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"), | ||
344 | }; | 347 | }; |
345 | 348 | ||
346 | /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */ | 349 | /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */ |
@@ -373,6 +376,19 @@ static struct regulator_init_data cm_t35_vsim = { | |||
373 | .consumer_supplies = cm_t35_vsim_supply, | 376 | .consumer_supplies = cm_t35_vsim_supply, |
374 | }; | 377 | }; |
375 | 378 | ||
379 | static struct regulator_init_data cm_t35_vio = { | ||
380 | .constraints = { | ||
381 | .min_uV = 1800000, | ||
382 | .max_uV = 1800000, | ||
383 | .apply_uV = true, | ||
384 | .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
385 | | REGULATOR_MODE_STANDBY, | ||
386 | .valid_ops_mask = REGULATOR_CHANGE_MODE, | ||
387 | }, | ||
388 | .num_consumer_supplies = ARRAY_SIZE(cm_t35_vio_supplies), | ||
389 | .consumer_supplies = cm_t35_vio_supplies, | ||
390 | }; | ||
391 | |||
376 | static uint32_t cm_t35_keymap[] = { | 392 | static uint32_t cm_t35_keymap[] = { |
377 | KEY(0, 0, KEY_A), KEY(0, 1, KEY_B), KEY(0, 2, KEY_LEFT), | 393 | KEY(0, 0, KEY_A), KEY(0, 1, KEY_B), KEY(0, 2, KEY_LEFT), |
378 | KEY(1, 0, KEY_UP), KEY(1, 1, KEY_ENTER), KEY(1, 2, KEY_DOWN), | 394 | KEY(1, 0, KEY_UP), KEY(1, 1, KEY_ENTER), KEY(1, 2, KEY_DOWN), |
@@ -421,6 +437,23 @@ static struct usbhs_omap_board_data usbhs_bdata __initdata = { | |||
421 | .reset_gpio_port[2] = -EINVAL | 437 | .reset_gpio_port[2] = -EINVAL |
422 | }; | 438 | }; |
423 | 439 | ||
440 | static void cm_t35_init_usbh(void) | ||
441 | { | ||
442 | int err; | ||
443 | |||
444 | err = gpio_request_one(SB_T35_USB_HUB_RESET_GPIO, | ||
445 | GPIOF_OUT_INIT_LOW, "usb hub rst"); | ||
446 | if (err) { | ||
447 | pr_err("SB-T35: usb hub rst gpio request failed: %d\n", err); | ||
448 | } else { | ||
449 | udelay(10); | ||
450 | gpio_set_value(SB_T35_USB_HUB_RESET_GPIO, 1); | ||
451 | msleep(1); | ||
452 | } | ||
453 | |||
454 | usbhs_init(&usbhs_bdata); | ||
455 | } | ||
456 | |||
424 | static int cm_t35_twl_gpio_setup(struct device *dev, unsigned gpio, | 457 | static int cm_t35_twl_gpio_setup(struct device *dev, unsigned gpio, |
425 | unsigned ngpio) | 458 | unsigned ngpio) |
426 | { | 459 | { |
@@ -456,17 +489,14 @@ static struct twl4030_platform_data cm_t35_twldata = { | |||
456 | .gpio = &cm_t35_gpio_data, | 489 | .gpio = &cm_t35_gpio_data, |
457 | .vmmc1 = &cm_t35_vmmc1, | 490 | .vmmc1 = &cm_t35_vmmc1, |
458 | .vsim = &cm_t35_vsim, | 491 | .vsim = &cm_t35_vsim, |
492 | .vio = &cm_t35_vio, | ||
459 | }; | 493 | }; |
460 | 494 | ||
461 | static void __init cm_t35_init_i2c(void) | 495 | static void __init cm_t35_init_i2c(void) |
462 | { | 496 | { |
463 | omap3_pmic_get_config(&cm_t35_twldata, TWL_COMMON_PDATA_USB, | 497 | omap3_pmic_get_config(&cm_t35_twldata, TWL_COMMON_PDATA_USB, |
464 | TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2); | 498 | TWL_COMMON_REGULATOR_VDAC | |
465 | 499 | TWL_COMMON_PDATA_AUDIO); | |
466 | cm_t35_twldata.vpll2->constraints.name = "VDVI"; | ||
467 | cm_t35_twldata.vpll2->num_consumer_supplies = | ||
468 | ARRAY_SIZE(cm_t35_vdvi_supply); | ||
469 | cm_t35_twldata.vpll2->consumer_supplies = cm_t35_vdvi_supply; | ||
470 | 500 | ||
471 | omap3_pmic_init("tps65930", &cm_t35_twldata); | 501 | omap3_pmic_init("tps65930", &cm_t35_twldata); |
472 | } | 502 | } |
@@ -570,24 +600,28 @@ static void __init cm_t3x_common_dss_mux_init(int mux_mode) | |||
570 | 600 | ||
571 | static void __init cm_t35_init_mux(void) | 601 | static void __init cm_t35_init_mux(void) |
572 | { | 602 | { |
573 | omap_mux_init_signal("gpio_70", OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT); | 603 | int mux_mode = OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT; |
574 | omap_mux_init_signal("gpio_71", OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT); | 604 | |
575 | omap_mux_init_signal("gpio_72", OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT); | 605 | omap_mux_init_signal("dss_data0.dss_data0", mux_mode); |
576 | omap_mux_init_signal("gpio_73", OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT); | 606 | omap_mux_init_signal("dss_data1.dss_data1", mux_mode); |
577 | omap_mux_init_signal("gpio_74", OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT); | 607 | omap_mux_init_signal("dss_data2.dss_data2", mux_mode); |
578 | omap_mux_init_signal("gpio_75", OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT); | 608 | omap_mux_init_signal("dss_data3.dss_data3", mux_mode); |
579 | cm_t3x_common_dss_mux_init(OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT); | 609 | omap_mux_init_signal("dss_data4.dss_data4", mux_mode); |
610 | omap_mux_init_signal("dss_data5.dss_data5", mux_mode); | ||
611 | cm_t3x_common_dss_mux_init(mux_mode); | ||
580 | } | 612 | } |
581 | 613 | ||
582 | static void __init cm_t3730_init_mux(void) | 614 | static void __init cm_t3730_init_mux(void) |
583 | { | 615 | { |
584 | omap_mux_init_signal("sys_boot0", OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT); | 616 | int mux_mode = OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT; |
585 | omap_mux_init_signal("sys_boot1", OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT); | 617 | |
586 | omap_mux_init_signal("sys_boot3", OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT); | 618 | omap_mux_init_signal("sys_boot0", mux_mode); |
587 | omap_mux_init_signal("sys_boot4", OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT); | 619 | omap_mux_init_signal("sys_boot1", mux_mode); |
588 | omap_mux_init_signal("sys_boot5", OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT); | 620 | omap_mux_init_signal("sys_boot3", mux_mode); |
589 | omap_mux_init_signal("sys_boot6", OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT); | 621 | omap_mux_init_signal("sys_boot4", mux_mode); |
590 | cm_t3x_common_dss_mux_init(OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT); | 622 | omap_mux_init_signal("sys_boot5", mux_mode); |
623 | omap_mux_init_signal("sys_boot6", mux_mode); | ||
624 | cm_t3x_common_dss_mux_init(mux_mode); | ||
591 | } | 625 | } |
592 | #else | 626 | #else |
593 | static inline void cm_t35_init_mux(void) {} | 627 | static inline void cm_t35_init_mux(void) {} |
@@ -612,7 +646,7 @@ static void __init cm_t3x_common_init(void) | |||
612 | cm_t35_init_display(); | 646 | cm_t35_init_display(); |
613 | 647 | ||
614 | usb_musb_init(NULL); | 648 | usb_musb_init(NULL); |
615 | usbhs_init(&usbhs_bdata); | 649 | cm_t35_init_usbh(); |
616 | } | 650 | } |
617 | 651 | ||
618 | static void __init cm_t35_init(void) | 652 | static void __init cm_t35_init(void) |
diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c index cef2cf1c0b8d..72d76ed94a65 100644 --- a/arch/arm/mach-omap2/board-n8x0.c +++ b/arch/arm/mach-omap2/board-n8x0.c | |||
@@ -46,7 +46,7 @@ static struct device *mmc_device; | |||
46 | #define TUSB6010_GPIO_ENABLE 0 | 46 | #define TUSB6010_GPIO_ENABLE 0 |
47 | #define TUSB6010_DMACHAN 0x3f | 47 | #define TUSB6010_DMACHAN 0x3f |
48 | 48 | ||
49 | #ifdef CONFIG_USB_MUSB_TUSB6010 | 49 | #if defined(CONFIG_USB_MUSB_TUSB6010) || defined(CONFIG_USB_MUSB_TUSB6010_MODULE) |
50 | /* | 50 | /* |
51 | * Enable or disable power to TUSB6010. When enabling, turn on 3.3 V and | 51 | * Enable or disable power to TUSB6010. When enabling, turn on 3.3 V and |
52 | * 1.5 V voltage regulators of PM companion chip. Companion chip will then | 52 | * 1.5 V voltage regulators of PM companion chip. Companion chip will then |
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c index 108fee6146fc..d67bcdf724d7 100644 --- a/arch/arm/mach-omap2/board-rx51-peripherals.c +++ b/arch/arm/mach-omap2/board-rx51-peripherals.c | |||
@@ -15,6 +15,7 @@ | |||
15 | #include <linux/input/matrix_keypad.h> | 15 | #include <linux/input/matrix_keypad.h> |
16 | #include <linux/spi/spi.h> | 16 | #include <linux/spi/spi.h> |
17 | #include <linux/wl12xx.h> | 17 | #include <linux/wl12xx.h> |
18 | #include <linux/spi/tsc2005.h> | ||
18 | #include <linux/i2c.h> | 19 | #include <linux/i2c.h> |
19 | #include <linux/i2c/twl.h> | 20 | #include <linux/i2c/twl.h> |
20 | #include <linux/clk.h> | 21 | #include <linux/clk.h> |
@@ -58,6 +59,9 @@ | |||
58 | 59 | ||
59 | #define RX51_USB_TRANSCEIVER_RST_GPIO 67 | 60 | #define RX51_USB_TRANSCEIVER_RST_GPIO 67 |
60 | 61 | ||
62 | #define RX51_TSC2005_RESET_GPIO 104 | ||
63 | #define RX51_TSC2005_IRQ_GPIO 100 | ||
64 | |||
61 | /* list all spi devices here */ | 65 | /* list all spi devices here */ |
62 | enum { | 66 | enum { |
63 | RX51_SPI_WL1251, | 67 | RX51_SPI_WL1251, |
@@ -66,6 +70,7 @@ enum { | |||
66 | }; | 70 | }; |
67 | 71 | ||
68 | static struct wl12xx_platform_data wl1251_pdata; | 72 | static struct wl12xx_platform_data wl1251_pdata; |
73 | static struct tsc2005_platform_data tsc2005_pdata; | ||
69 | 74 | ||
70 | #if defined(CONFIG_SENSORS_TSL2563) || defined(CONFIG_SENSORS_TSL2563_MODULE) | 75 | #if defined(CONFIG_SENSORS_TSL2563) || defined(CONFIG_SENSORS_TSL2563_MODULE) |
71 | static struct tsl2563_platform_data rx51_tsl2563_platform_data = { | 76 | static struct tsl2563_platform_data rx51_tsl2563_platform_data = { |
@@ -167,10 +172,10 @@ static struct spi_board_info rx51_peripherals_spi_board_info[] __initdata = { | |||
167 | .modalias = "tsc2005", | 172 | .modalias = "tsc2005", |
168 | .bus_num = 1, | 173 | .bus_num = 1, |
169 | .chip_select = 0, | 174 | .chip_select = 0, |
170 | /* .irq = OMAP_GPIO_IRQ(RX51_TSC2005_IRQ_GPIO),*/ | 175 | .irq = OMAP_GPIO_IRQ(RX51_TSC2005_IRQ_GPIO), |
171 | .max_speed_hz = 6000000, | 176 | .max_speed_hz = 6000000, |
172 | .controller_data = &tsc2005_mcspi_config, | 177 | .controller_data = &tsc2005_mcspi_config, |
173 | /* .platform_data = &tsc2005_config,*/ | 178 | .platform_data = &tsc2005_pdata, |
174 | }, | 179 | }, |
175 | }; | 180 | }; |
176 | 181 | ||
@@ -1086,6 +1091,42 @@ error: | |||
1086 | */ | 1091 | */ |
1087 | } | 1092 | } |
1088 | 1093 | ||
1094 | static struct tsc2005_platform_data tsc2005_pdata = { | ||
1095 | .ts_pressure_max = 2048, | ||
1096 | .ts_pressure_fudge = 2, | ||
1097 | .ts_x_max = 4096, | ||
1098 | .ts_x_fudge = 4, | ||
1099 | .ts_y_max = 4096, | ||
1100 | .ts_y_fudge = 7, | ||
1101 | .ts_x_plate_ohm = 280, | ||
1102 | .esd_timeout_ms = 8000, | ||
1103 | }; | ||
1104 | |||
1105 | static void rx51_tsc2005_set_reset(bool enable) | ||
1106 | { | ||
1107 | gpio_set_value(RX51_TSC2005_RESET_GPIO, enable); | ||
1108 | } | ||
1109 | |||
1110 | static void __init rx51_init_tsc2005(void) | ||
1111 | { | ||
1112 | int r; | ||
1113 | |||
1114 | r = gpio_request_one(RX51_TSC2005_IRQ_GPIO, GPIOF_IN, "tsc2005 IRQ"); | ||
1115 | if (r < 0) { | ||
1116 | printk(KERN_ERR "unable to get %s GPIO\n", "tsc2005 IRQ"); | ||
1117 | rx51_peripherals_spi_board_info[RX51_SPI_TSC2005].irq = 0; | ||
1118 | } | ||
1119 | |||
1120 | r = gpio_request_one(RX51_TSC2005_RESET_GPIO, GPIOF_OUT_INIT_HIGH, | ||
1121 | "tsc2005 reset"); | ||
1122 | if (r >= 0) { | ||
1123 | tsc2005_pdata.set_reset = rx51_tsc2005_set_reset; | ||
1124 | } else { | ||
1125 | printk(KERN_ERR "unable to get %s GPIO\n", "tsc2005 reset"); | ||
1126 | tsc2005_pdata.esd_timeout_ms = 0; | ||
1127 | } | ||
1128 | } | ||
1129 | |||
1089 | void __init rx51_peripherals_init(void) | 1130 | void __init rx51_peripherals_init(void) |
1090 | { | 1131 | { |
1091 | rx51_i2c_init(); | 1132 | rx51_i2c_init(); |
@@ -1094,6 +1135,7 @@ void __init rx51_peripherals_init(void) | |||
1094 | board_smc91x_init(); | 1135 | board_smc91x_init(); |
1095 | rx51_add_gpio_keys(); | 1136 | rx51_add_gpio_keys(); |
1096 | rx51_init_wl1251(); | 1137 | rx51_init_wl1251(); |
1138 | rx51_init_tsc2005(); | ||
1097 | rx51_init_si4713(); | 1139 | rx51_init_si4713(); |
1098 | spi_register_board_info(rx51_peripherals_spi_board_info, | 1140 | spi_register_board_info(rx51_peripherals_spi_board_info, |
1099 | ARRAY_SIZE(rx51_peripherals_spi_board_info)); | 1141 | ARRAY_SIZE(rx51_peripherals_spi_board_info)); |
diff --git a/arch/arm/mach-omap2/board-ti8168evm.c b/arch/arm/mach-omap2/board-ti8168evm.c index 74713e3993e5..ab9a7a9e9d64 100644 --- a/arch/arm/mach-omap2/board-ti8168evm.c +++ b/arch/arm/mach-omap2/board-ti8168evm.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Code for TI8168 EVM. | 2 | * Code for TI8168/TI8148 EVM. |
3 | * | 3 | * |
4 | * Copyright (C) 2010 Texas Instruments, Inc. - http://www.ti.com/ | 4 | * Copyright (C) 2010 Texas Instruments, Inc. - http://www.ti.com/ |
5 | * | 5 | * |
@@ -23,30 +23,45 @@ | |||
23 | #include <plat/irqs.h> | 23 | #include <plat/irqs.h> |
24 | #include <plat/board.h> | 24 | #include <plat/board.h> |
25 | #include "common.h" | 25 | #include "common.h" |
26 | #include <plat/usb.h> | ||
26 | 27 | ||
27 | static struct omap_board_config_kernel ti8168_evm_config[] __initdata = { | 28 | static struct omap_musb_board_data musb_board_data = { |
29 | .set_phy_power = ti81xx_musb_phy_power, | ||
30 | .interface_type = MUSB_INTERFACE_ULPI, | ||
31 | .mode = MUSB_OTG, | ||
32 | .power = 500, | ||
28 | }; | 33 | }; |
29 | 34 | ||
30 | static void __init ti8168_evm_init(void) | 35 | static struct omap_board_config_kernel ti81xx_evm_config[] __initdata = { |
36 | }; | ||
37 | |||
38 | static void __init ti81xx_evm_init(void) | ||
31 | { | 39 | { |
32 | omap_serial_init(); | 40 | omap_serial_init(); |
33 | omap_sdrc_init(NULL, NULL); | 41 | omap_sdrc_init(NULL, NULL); |
34 | omap_board_config = ti8168_evm_config; | 42 | omap_board_config = ti81xx_evm_config; |
35 | omap_board_config_size = ARRAY_SIZE(ti8168_evm_config); | 43 | omap_board_config_size = ARRAY_SIZE(ti81xx_evm_config); |
36 | } | 44 | usb_musb_init(&musb_board_data); |
37 | |||
38 | static void __init ti8168_evm_map_io(void) | ||
39 | { | ||
40 | omapti816x_map_common_io(); | ||
41 | } | 45 | } |
42 | 46 | ||
43 | MACHINE_START(TI8168EVM, "ti8168evm") | 47 | MACHINE_START(TI8168EVM, "ti8168evm") |
44 | /* Maintainer: Texas Instruments */ | 48 | /* Maintainer: Texas Instruments */ |
45 | .atag_offset = 0x100, | 49 | .atag_offset = 0x100, |
46 | .map_io = ti8168_evm_map_io, | 50 | .map_io = ti81xx_map_io, |
47 | .init_early = ti816x_init_early, | 51 | .init_early = ti81xx_init_early, |
48 | .init_irq = ti816x_init_irq, | 52 | .init_irq = ti81xx_init_irq, |
53 | .timer = &omap3_timer, | ||
54 | .init_machine = ti81xx_evm_init, | ||
55 | .restart = omap_prcm_restart, | ||
56 | MACHINE_END | ||
57 | |||
58 | MACHINE_START(TI8148EVM, "ti8148evm") | ||
59 | /* Maintainer: Texas Instruments */ | ||
60 | .atag_offset = 0x100, | ||
61 | .map_io = ti81xx_map_io, | ||
62 | .init_early = ti81xx_init_early, | ||
63 | .init_irq = ti81xx_init_irq, | ||
49 | .timer = &omap3_timer, | 64 | .timer = &omap3_timer, |
50 | .init_machine = ti8168_evm_init, | 65 | .init_machine = ti81xx_evm_init, |
51 | .restart = omap_prcm_restart, | 66 | .restart = omap_prcm_restart, |
52 | MACHINE_END | 67 | MACHINE_END |
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c index 1f3481f8d695..f57ed5baeccf 100644 --- a/arch/arm/mach-omap2/clock.c +++ b/arch/arm/mach-omap2/clock.c | |||
@@ -35,7 +35,7 @@ | |||
35 | #include "cm-regbits-24xx.h" | 35 | #include "cm-regbits-24xx.h" |
36 | #include "cm-regbits-34xx.h" | 36 | #include "cm-regbits-34xx.h" |
37 | 37 | ||
38 | u8 cpu_mask; | 38 | u16 cpu_mask; |
39 | 39 | ||
40 | /* | 40 | /* |
41 | * clkdm_control: if true, then when a clock is enabled in the | 41 | * clkdm_control: if true, then when a clock is enabled in the |
diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h index 2311bc217226..b8c2a686481c 100644 --- a/arch/arm/mach-omap2/clock.h +++ b/arch/arm/mach-omap2/clock.h | |||
@@ -132,7 +132,7 @@ void omap2_clk_print_new_rates(const char *hfclkin_ck_name, | |||
132 | const char *core_ck_name, | 132 | const char *core_ck_name, |
133 | const char *mpu_ck_name); | 133 | const char *mpu_ck_name); |
134 | 134 | ||
135 | extern u8 cpu_mask; | 135 | extern u16 cpu_mask; |
136 | 136 | ||
137 | extern const struct clkops clkops_omap2_dflt_wait; | 137 | extern const struct clkops clkops_omap2_dflt_wait; |
138 | extern const struct clkops clkops_dummy; | 138 | extern const struct clkops clkops_dummy; |
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c index 9d59451446d9..d75e5f6b8a01 100644 --- a/arch/arm/mach-omap2/clock3xxx_data.c +++ b/arch/arm/mach-omap2/clock3xxx_data.c | |||
@@ -3526,6 +3526,10 @@ int __init omap3xxx_clk_init(void) | |||
3526 | } else if (cpu_is_ti816x()) { | 3526 | } else if (cpu_is_ti816x()) { |
3527 | cpu_mask = RATE_IN_TI816X; | 3527 | cpu_mask = RATE_IN_TI816X; |
3528 | cpu_clkflg = CK_TI816X; | 3528 | cpu_clkflg = CK_TI816X; |
3529 | } else if (cpu_is_am33xx()) { | ||
3530 | cpu_mask = RATE_IN_AM33XX; | ||
3531 | } else if (cpu_is_ti814x()) { | ||
3532 | cpu_mask = RATE_IN_TI814X; | ||
3529 | } else if (cpu_is_omap34xx()) { | 3533 | } else if (cpu_is_omap34xx()) { |
3530 | if (omap_rev() == OMAP3430_REV_ES1_0) { | 3534 | if (omap_rev() == OMAP3430_REV_ES1_0) { |
3531 | cpu_mask = RATE_IN_3430ES1; | 3535 | cpu_mask = RATE_IN_3430ES1; |
@@ -3609,7 +3613,7 @@ int __init omap3xxx_clk_init(void) | |||
3609 | * Lock DPLL5 -- here only until other device init code can | 3613 | * Lock DPLL5 -- here only until other device init code can |
3610 | * handle this | 3614 | * handle this |
3611 | */ | 3615 | */ |
3612 | if (!cpu_is_ti816x() && (omap_rev() >= OMAP3430_REV_ES2_0)) | 3616 | if (!cpu_is_ti81xx() && (omap_rev() >= OMAP3430_REV_ES2_0)) |
3613 | omap3_clk_lock_dpll5(); | 3617 | omap3_clk_lock_dpll5(); |
3614 | 3618 | ||
3615 | /* Avoid sleeping during omap3_core_dpll_m2_set_rate() */ | 3619 | /* Avoid sleeping during omap3_core_dpll_m2_set_rate() */ |
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c index c8a1b2740778..08e86d793a1f 100644 --- a/arch/arm/mach-omap2/clock44xx_data.c +++ b/arch/arm/mach-omap2/clock44xx_data.c | |||
@@ -1206,6 +1206,14 @@ static const struct clksel ocp_abe_iclk_div[] = { | |||
1206 | { .parent = NULL }, | 1206 | { .parent = NULL }, |
1207 | }; | 1207 | }; |
1208 | 1208 | ||
1209 | static struct clk mpu_periphclk = { | ||
1210 | .name = "mpu_periphclk", | ||
1211 | .parent = &dpll_mpu_ck, | ||
1212 | .ops = &clkops_null, | ||
1213 | .fixed_div = 2, | ||
1214 | .recalc = &omap_fixed_divisor_recalc, | ||
1215 | }; | ||
1216 | |||
1209 | static struct clk ocp_abe_iclk = { | 1217 | static struct clk ocp_abe_iclk = { |
1210 | .name = "ocp_abe_iclk", | 1218 | .name = "ocp_abe_iclk", |
1211 | .parent = &aess_fclk, | 1219 | .parent = &aess_fclk, |
@@ -3189,6 +3197,7 @@ static struct omap_clk omap44xx_clks[] = { | |||
3189 | CLK(NULL, "l4_div_ck", &l4_div_ck, CK_443X), | 3197 | CLK(NULL, "l4_div_ck", &l4_div_ck, CK_443X), |
3190 | CLK(NULL, "lp_clk_div_ck", &lp_clk_div_ck, CK_443X), | 3198 | CLK(NULL, "lp_clk_div_ck", &lp_clk_div_ck, CK_443X), |
3191 | CLK(NULL, "l4_wkup_clk_mux_ck", &l4_wkup_clk_mux_ck, CK_443X), | 3199 | CLK(NULL, "l4_wkup_clk_mux_ck", &l4_wkup_clk_mux_ck, CK_443X), |
3200 | CLK("smp_twd", NULL, &mpu_periphclk, CK_443X), | ||
3192 | CLK(NULL, "ocp_abe_iclk", &ocp_abe_iclk, CK_443X), | 3201 | CLK(NULL, "ocp_abe_iclk", &ocp_abe_iclk, CK_443X), |
3193 | CLK(NULL, "per_abe_24m_fclk", &per_abe_24m_fclk, CK_443X), | 3202 | CLK(NULL, "per_abe_24m_fclk", &per_abe_24m_fclk, CK_443X), |
3194 | CLK(NULL, "per_abe_nc_fclk", &per_abe_nc_fclk, CK_443X), | 3203 | CLK(NULL, "per_abe_nc_fclk", &per_abe_nc_fclk, CK_443X), |
diff --git a/arch/arm/mach-omap2/common.c b/arch/arm/mach-omap2/common.c index 684b8a7cd401..aaf421178c91 100644 --- a/arch/arm/mach-omap2/common.c +++ b/arch/arm/mach-omap2/common.c | |||
@@ -110,23 +110,49 @@ void __init omap3_map_io(void) | |||
110 | 110 | ||
111 | /* | 111 | /* |
112 | * Adjust TAP register base such that omap3_check_revision accesses the correct | 112 | * Adjust TAP register base such that omap3_check_revision accesses the correct |
113 | * TI816X register for checking device ID (it adds 0x204 to tap base while | 113 | * TI81XX register for checking device ID (it adds 0x204 to tap base while |
114 | * TI816X DEVICE ID register is at offset 0x600 from control base). | 114 | * TI81XX DEVICE ID register is at offset 0x600 from control base). |
115 | */ | 115 | */ |
116 | #define TI816X_TAP_BASE (TI816X_CTRL_BASE + \ | 116 | #define TI81XX_TAP_BASE (TI81XX_CTRL_BASE + \ |
117 | TI816X_CONTROL_DEVICE_ID - 0x204) | 117 | TI81XX_CONTROL_DEVICE_ID - 0x204) |
118 | 118 | ||
119 | static struct omap_globals ti816x_globals = { | 119 | static struct omap_globals ti81xx_globals = { |
120 | .class = OMAP343X_CLASS, | 120 | .class = OMAP343X_CLASS, |
121 | .tap = OMAP2_L4_IO_ADDRESS(TI816X_TAP_BASE), | 121 | .tap = OMAP2_L4_IO_ADDRESS(TI81XX_TAP_BASE), |
122 | .ctrl = OMAP2_L4_IO_ADDRESS(TI816X_CTRL_BASE), | 122 | .ctrl = OMAP2_L4_IO_ADDRESS(TI81XX_CTRL_BASE), |
123 | .prm = OMAP2_L4_IO_ADDRESS(TI816X_PRCM_BASE), | 123 | .prm = OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE), |
124 | .cm = OMAP2_L4_IO_ADDRESS(TI816X_PRCM_BASE), | 124 | .cm = OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE), |
125 | }; | 125 | }; |
126 | 126 | ||
127 | void __init omap2_set_globals_ti816x(void) | 127 | void __init omap2_set_globals_ti81xx(void) |
128 | { | 128 | { |
129 | __omap2_set_globals(&ti816x_globals); | 129 | __omap2_set_globals(&ti81xx_globals); |
130 | } | ||
131 | |||
132 | void __init ti81xx_map_io(void) | ||
133 | { | ||
134 | omapti81xx_map_common_io(); | ||
135 | } | ||
136 | |||
137 | #define AM33XX_TAP_BASE (AM33XX_CTRL_BASE + \ | ||
138 | TI81XX_CONTROL_DEVICE_ID - 0x204) | ||
139 | |||
140 | static struct omap_globals am33xx_globals = { | ||
141 | .class = AM335X_CLASS, | ||
142 | .tap = AM33XX_L4_WK_IO_ADDRESS(AM33XX_TAP_BASE), | ||
143 | .ctrl = AM33XX_L4_WK_IO_ADDRESS(AM33XX_CTRL_BASE), | ||
144 | .prm = AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE), | ||
145 | .cm = AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE), | ||
146 | }; | ||
147 | |||
148 | void __init omap2_set_globals_am33xx(void) | ||
149 | { | ||
150 | __omap2_set_globals(&am33xx_globals); | ||
151 | } | ||
152 | |||
153 | void __init am33xx_map_io(void) | ||
154 | { | ||
155 | omapam33xx_map_common_io(); | ||
130 | } | 156 | } |
131 | #endif | 157 | #endif |
132 | 158 | ||
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h index cda888a2e635..9403b2ce6c85 100644 --- a/arch/arm/mach-omap2/common.h +++ b/arch/arm/mach-omap2/common.h | |||
@@ -52,10 +52,18 @@ static inline void omap34xx_map_common_io(void) | |||
52 | } | 52 | } |
53 | #endif | 53 | #endif |
54 | 54 | ||
55 | #ifdef CONFIG_SOC_OMAPTI816X | 55 | #ifdef CONFIG_SOC_OMAPTI81XX |
56 | extern void omapti816x_map_common_io(void); | 56 | extern void omapti81xx_map_common_io(void); |
57 | #else | 57 | #else |
58 | static inline void omapti816x_map_common_io(void) | 58 | static inline void omapti81xx_map_common_io(void) |
59 | { | ||
60 | } | ||
61 | #endif | ||
62 | |||
63 | #ifdef CONFIG_SOC_OMAPAM33XX | ||
64 | extern void omapam33xx_map_common_io(void); | ||
65 | #else | ||
66 | static inline void omapam33xx_map_common_io(void) | ||
59 | { | 67 | { |
60 | } | 68 | } |
61 | #endif | 69 | #endif |
@@ -82,7 +90,7 @@ void omap35xx_init_early(void); | |||
82 | void omap3630_init_early(void); | 90 | void omap3630_init_early(void); |
83 | void omap3_init_early(void); /* Do not use this one */ | 91 | void omap3_init_early(void); /* Do not use this one */ |
84 | void am35xx_init_early(void); | 92 | void am35xx_init_early(void); |
85 | void ti816x_init_early(void); | 93 | void ti81xx_init_early(void); |
86 | void omap4430_init_early(void); | 94 | void omap4430_init_early(void); |
87 | void omap_prcm_restart(char, const char *); | 95 | void omap_prcm_restart(char, const char *); |
88 | 96 | ||
@@ -107,7 +115,8 @@ void omap2_set_globals_242x(void); | |||
107 | void omap2_set_globals_243x(void); | 115 | void omap2_set_globals_243x(void); |
108 | void omap2_set_globals_3xxx(void); | 116 | void omap2_set_globals_3xxx(void); |
109 | void omap2_set_globals_443x(void); | 117 | void omap2_set_globals_443x(void); |
110 | void omap2_set_globals_ti816x(void); | 118 | void omap2_set_globals_ti81xx(void); |
119 | void omap2_set_globals_am33xx(void); | ||
111 | 120 | ||
112 | /* These get called from omap2_set_globals_xxxx(), do not call these */ | 121 | /* These get called from omap2_set_globals_xxxx(), do not call these */ |
113 | void omap2_set_globals_tap(struct omap_globals *); | 122 | void omap2_set_globals_tap(struct omap_globals *); |
@@ -118,7 +127,9 @@ void omap2_set_globals_prcm(struct omap_globals *); | |||
118 | void omap242x_map_io(void); | 127 | void omap242x_map_io(void); |
119 | void omap243x_map_io(void); | 128 | void omap243x_map_io(void); |
120 | void omap3_map_io(void); | 129 | void omap3_map_io(void); |
130 | void am33xx_map_io(void); | ||
121 | void omap4_map_io(void); | 131 | void omap4_map_io(void); |
132 | void ti81xx_map_io(void); | ||
122 | 133 | ||
123 | /** | 134 | /** |
124 | * omap_test_timeout - busy-loop, testing a condition | 135 | * omap_test_timeout - busy-loop, testing a condition |
@@ -147,7 +158,7 @@ extern struct device *omap4_get_dsp_device(void); | |||
147 | 158 | ||
148 | void omap2_init_irq(void); | 159 | void omap2_init_irq(void); |
149 | void omap3_init_irq(void); | 160 | void omap3_init_irq(void); |
150 | void ti816x_init_irq(void); | 161 | void ti81xx_init_irq(void); |
151 | extern int omap_irq_pending(void); | 162 | extern int omap_irq_pending(void); |
152 | void omap_intc_save_context(void); | 163 | void omap_intc_save_context(void); |
153 | void omap_intc_restore_context(void); | 164 | void omap_intc_restore_context(void); |
diff --git a/arch/arm/mach-omap2/control.h b/arch/arm/mach-omap2/control.h index d4ef75d5a382..0ba68d3764bc 100644 --- a/arch/arm/mach-omap2/control.h +++ b/arch/arm/mach-omap2/control.h | |||
@@ -52,8 +52,8 @@ | |||
52 | #define OMAP343X_CONTROL_PADCONFS_WKUP 0xa00 | 52 | #define OMAP343X_CONTROL_PADCONFS_WKUP 0xa00 |
53 | #define OMAP343X_CONTROL_GENERAL_WKUP 0xa60 | 53 | #define OMAP343X_CONTROL_GENERAL_WKUP 0xa60 |
54 | 54 | ||
55 | /* TI816X spefic control submodules */ | 55 | /* TI81XX spefic control submodules */ |
56 | #define TI816X_CONTROL_DEVCONF 0x600 | 56 | #define TI81XX_CONTROL_DEVCONF 0x600 |
57 | 57 | ||
58 | /* Control register offsets - read/write with omap_ctrl_{read,write}{bwl}() */ | 58 | /* Control register offsets - read/write with omap_ctrl_{read,write}{bwl}() */ |
59 | 59 | ||
@@ -244,8 +244,8 @@ | |||
244 | #define OMAP3_PADCONF_SAD2D_MSTANDBY 0x250 | 244 | #define OMAP3_PADCONF_SAD2D_MSTANDBY 0x250 |
245 | #define OMAP3_PADCONF_SAD2D_IDLEACK 0x254 | 245 | #define OMAP3_PADCONF_SAD2D_IDLEACK 0x254 |
246 | 246 | ||
247 | /* TI816X CONTROL_DEVCONF register offsets */ | 247 | /* TI81XX CONTROL_DEVCONF register offsets */ |
248 | #define TI816X_CONTROL_DEVICE_ID (TI816X_CONTROL_DEVCONF + 0x000) | 248 | #define TI81XX_CONTROL_DEVICE_ID (TI81XX_CONTROL_DEVCONF + 0x000) |
249 | 249 | ||
250 | /* | 250 | /* |
251 | * REVISIT: This list of registers is not comprehensive - there are more | 251 | * REVISIT: This list of registers is not comprehensive - there are more |
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c index c15cfada5f13..35d5dffab7e1 100644 --- a/arch/arm/mach-omap2/devices.c +++ b/arch/arm/mach-omap2/devices.c | |||
@@ -336,6 +336,27 @@ static void omap_init_mcpdm(void) | |||
336 | static inline void omap_init_mcpdm(void) {} | 336 | static inline void omap_init_mcpdm(void) {} |
337 | #endif | 337 | #endif |
338 | 338 | ||
339 | #if defined(CONFIG_SND_OMAP_SOC_DMIC) || \ | ||
340 | defined(CONFIG_SND_OMAP_SOC_DMIC_MODULE) | ||
341 | |||
342 | static void omap_init_dmic(void) | ||
343 | { | ||
344 | struct omap_hwmod *oh; | ||
345 | struct platform_device *pdev; | ||
346 | |||
347 | oh = omap_hwmod_lookup("dmic"); | ||
348 | if (!oh) { | ||
349 | printk(KERN_ERR "Could not look up mcpdm hw_mod\n"); | ||
350 | return; | ||
351 | } | ||
352 | |||
353 | pdev = omap_device_build("omap-dmic", -1, oh, NULL, 0, NULL, 0, 0); | ||
354 | WARN(IS_ERR(pdev), "Can't build omap_device for omap-dmic.\n"); | ||
355 | } | ||
356 | #else | ||
357 | static inline void omap_init_dmic(void) {} | ||
358 | #endif | ||
359 | |||
339 | #if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE) | 360 | #if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE) |
340 | 361 | ||
341 | #include <plat/mcspi.h> | 362 | #include <plat/mcspi.h> |
@@ -681,6 +702,7 @@ static int __init omap2_init_devices(void) | |||
681 | */ | 702 | */ |
682 | omap_init_audio(); | 703 | omap_init_audio(); |
683 | omap_init_mcpdm(); | 704 | omap_init_mcpdm(); |
705 | omap_init_dmic(); | ||
684 | omap_init_camera(); | 706 | omap_init_camera(); |
685 | omap_init_mbox(); | 707 | omap_init_mbox(); |
686 | omap_init_mcspi(); | 708 | omap_init_mcspi(); |
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c index 27ad722df637..6c5826605eae 100644 --- a/arch/arm/mach-omap2/id.c +++ b/arch/arm/mach-omap2/id.c | |||
@@ -226,7 +226,7 @@ static void __init omap4_check_features(void) | |||
226 | } | 226 | } |
227 | } | 227 | } |
228 | 228 | ||
229 | static void __init ti816x_check_features(void) | 229 | static void __init ti81xx_check_features(void) |
230 | { | 230 | { |
231 | omap_features = OMAP3_HAS_NEON; | 231 | omap_features = OMAP3_HAS_NEON; |
232 | } | 232 | } |
@@ -340,6 +340,29 @@ static void __init omap3_check_revision(const char **cpu_rev) | |||
340 | break; | 340 | break; |
341 | } | 341 | } |
342 | break; | 342 | break; |
343 | case 0xb944: | ||
344 | omap_revision = AM335X_REV_ES1_0; | ||
345 | *cpu_rev = "1.0"; | ||
346 | case 0xb8f2: | ||
347 | switch (rev) { | ||
348 | case 0: | ||
349 | /* FALLTHROUGH */ | ||
350 | case 1: | ||
351 | omap_revision = TI8148_REV_ES1_0; | ||
352 | *cpu_rev = "1.0"; | ||
353 | break; | ||
354 | case 2: | ||
355 | omap_revision = TI8148_REV_ES2_0; | ||
356 | *cpu_rev = "2.0"; | ||
357 | break; | ||
358 | case 3: | ||
359 | /* FALLTHROUGH */ | ||
360 | default: | ||
361 | omap_revision = TI8148_REV_ES2_1; | ||
362 | *cpu_rev = "2.1"; | ||
363 | break; | ||
364 | } | ||
365 | break; | ||
343 | default: | 366 | default: |
344 | /* Unknown default to latest silicon rev as default */ | 367 | /* Unknown default to latest silicon rev as default */ |
345 | omap_revision = OMAP3630_REV_ES1_2; | 368 | omap_revision = OMAP3630_REV_ES1_2; |
@@ -367,7 +390,7 @@ static void __init omap4_check_revision(void) | |||
367 | * Few initial 4430 ES2.0 samples IDCODE is same as ES1.0 | 390 | * Few initial 4430 ES2.0 samples IDCODE is same as ES1.0 |
368 | * Use ARM register to detect the correct ES version | 391 | * Use ARM register to detect the correct ES version |
369 | */ | 392 | */ |
370 | if (!rev && (hawkeye != 0xb94e)) { | 393 | if (!rev && (hawkeye != 0xb94e) && (hawkeye != 0xb975)) { |
371 | idcode = read_cpuid(CPUID_ID); | 394 | idcode = read_cpuid(CPUID_ID); |
372 | rev = (idcode & 0xf) - 1; | 395 | rev = (idcode & 0xf) - 1; |
373 | } | 396 | } |
@@ -389,8 +412,11 @@ static void __init omap4_check_revision(void) | |||
389 | omap_revision = OMAP4430_REV_ES2_1; | 412 | omap_revision = OMAP4430_REV_ES2_1; |
390 | break; | 413 | break; |
391 | case 4: | 414 | case 4: |
392 | default: | ||
393 | omap_revision = OMAP4430_REV_ES2_2; | 415 | omap_revision = OMAP4430_REV_ES2_2; |
416 | break; | ||
417 | case 6: | ||
418 | default: | ||
419 | omap_revision = OMAP4430_REV_ES2_3; | ||
394 | } | 420 | } |
395 | break; | 421 | break; |
396 | case 0xb94e: | 422 | case 0xb94e: |
@@ -401,9 +427,17 @@ static void __init omap4_check_revision(void) | |||
401 | break; | 427 | break; |
402 | } | 428 | } |
403 | break; | 429 | break; |
430 | case 0xb975: | ||
431 | switch (rev) { | ||
432 | case 0: | ||
433 | default: | ||
434 | omap_revision = OMAP4470_REV_ES1_0; | ||
435 | break; | ||
436 | } | ||
437 | break; | ||
404 | default: | 438 | default: |
405 | /* Unknown default to latest silicon rev as default */ | 439 | /* Unknown default to latest silicon rev as default */ |
406 | omap_revision = OMAP4430_REV_ES2_2; | 440 | omap_revision = OMAP4430_REV_ES2_3; |
407 | } | 441 | } |
408 | 442 | ||
409 | pr_info("OMAP%04x ES%d.%d\n", omap_rev() >> 16, | 443 | pr_info("OMAP%04x ES%d.%d\n", omap_rev() >> 16, |
@@ -432,6 +466,10 @@ static void __init omap3_cpuinfo(const char *cpu_rev) | |||
432 | cpu_name = (omap3_has_sgx()) ? "AM3517" : "AM3505"; | 466 | cpu_name = (omap3_has_sgx()) ? "AM3517" : "AM3505"; |
433 | } else if (cpu_is_ti816x()) { | 467 | } else if (cpu_is_ti816x()) { |
434 | cpu_name = "TI816X"; | 468 | cpu_name = "TI816X"; |
469 | } else if (cpu_is_am335x()) { | ||
470 | cpu_name = "AM335X"; | ||
471 | } else if (cpu_is_ti814x()) { | ||
472 | cpu_name = "TI814X"; | ||
435 | } else if (omap3_has_iva() && omap3_has_sgx()) { | 473 | } else if (omap3_has_iva() && omap3_has_sgx()) { |
436 | /* OMAP3430, OMAP3525, OMAP3515, OMAP3503 devices */ | 474 | /* OMAP3430, OMAP3525, OMAP3515, OMAP3503 devices */ |
437 | cpu_name = "OMAP3430/3530"; | 475 | cpu_name = "OMAP3430/3530"; |
@@ -472,11 +510,11 @@ void __init omap2_check_revision(void) | |||
472 | } else if (cpu_is_omap34xx()) { | 510 | } else if (cpu_is_omap34xx()) { |
473 | omap3_check_revision(&cpu_rev); | 511 | omap3_check_revision(&cpu_rev); |
474 | 512 | ||
475 | /* TI816X doesn't have feature register */ | 513 | /* TI81XX doesn't have feature register */ |
476 | if (!cpu_is_ti816x()) | 514 | if (!cpu_is_ti81xx()) |
477 | omap3_check_features(); | 515 | omap3_check_features(); |
478 | else | 516 | else |
479 | ti816x_check_features(); | 517 | ti81xx_check_features(); |
480 | 518 | ||
481 | omap3_cpuinfo(cpu_rev); | 519 | omap3_cpuinfo(cpu_rev); |
482 | return; | 520 | return; |
diff --git a/arch/arm/mach-omap2/include/mach/debug-macro.S b/arch/arm/mach-omap2/include/mach/debug-macro.S index 13f98e59cfef..cdfc2a1f0e75 100644 --- a/arch/arm/mach-omap2/include/mach/debug-macro.S +++ b/arch/arm/mach-omap2/include/mach/debug-macro.S | |||
@@ -66,11 +66,11 @@ omap_uart_lsr: .word 0 | |||
66 | beq 34f @ configure OMAP3UART4 | 66 | beq 34f @ configure OMAP3UART4 |
67 | cmp \rp, #OMAP4UART4 @ only on 44xx | 67 | cmp \rp, #OMAP4UART4 @ only on 44xx |
68 | beq 44f @ configure OMAP4UART4 | 68 | beq 44f @ configure OMAP4UART4 |
69 | cmp \rp, #TI816XUART1 @ ti816x UART offsets different | 69 | cmp \rp, #TI81XXUART1 @ ti81Xx UART offsets different |
70 | beq 81f @ configure UART1 | 70 | beq 81f @ configure UART1 |
71 | cmp \rp, #TI816XUART2 @ ti816x UART offsets different | 71 | cmp \rp, #TI81XXUART2 @ ti81Xx UART offsets different |
72 | beq 82f @ configure UART2 | 72 | beq 82f @ configure UART2 |
73 | cmp \rp, #TI816XUART3 @ ti816x UART offsets different | 73 | cmp \rp, #TI81XXUART3 @ ti81Xx UART offsets different |
74 | beq 83f @ configure UART3 | 74 | beq 83f @ configure UART3 |
75 | cmp \rp, #ZOOM_UART @ only on zoom2/3 | 75 | cmp \rp, #ZOOM_UART @ only on zoom2/3 |
76 | beq 95f @ configure ZOOM_UART | 76 | beq 95f @ configure ZOOM_UART |
@@ -94,11 +94,11 @@ omap_uart_lsr: .word 0 | |||
94 | b 98f | 94 | b 98f |
95 | 44: mov \rp, #UART_OFFSET(OMAP4_UART4_BASE) | 95 | 44: mov \rp, #UART_OFFSET(OMAP4_UART4_BASE) |
96 | b 98f | 96 | b 98f |
97 | 81: mov \rp, #UART_OFFSET(TI816X_UART1_BASE) | 97 | 81: mov \rp, #UART_OFFSET(TI81XX_UART1_BASE) |
98 | b 98f | 98 | b 98f |
99 | 82: mov \rp, #UART_OFFSET(TI816X_UART2_BASE) | 99 | 82: mov \rp, #UART_OFFSET(TI81XX_UART2_BASE) |
100 | b 98f | 100 | b 98f |
101 | 83: mov \rp, #UART_OFFSET(TI816X_UART3_BASE) | 101 | 83: mov \rp, #UART_OFFSET(TI81XX_UART3_BASE) |
102 | b 98f | 102 | b 98f |
103 | 103 | ||
104 | 95: ldr \rp, =ZOOM_UART_BASE | 104 | 95: ldr \rp, =ZOOM_UART_BASE |
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index 3f565dd2ea8d..73d617f0dc4a 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c | |||
@@ -176,14 +176,31 @@ static struct map_desc omap34xx_io_desc[] __initdata = { | |||
176 | }; | 176 | }; |
177 | #endif | 177 | #endif |
178 | 178 | ||
179 | #ifdef CONFIG_SOC_OMAPTI816X | 179 | #ifdef CONFIG_SOC_OMAPTI81XX |
180 | static struct map_desc omapti816x_io_desc[] __initdata = { | 180 | static struct map_desc omapti81xx_io_desc[] __initdata = { |
181 | { | ||
182 | .virtual = L4_34XX_VIRT, | ||
183 | .pfn = __phys_to_pfn(L4_34XX_PHYS), | ||
184 | .length = L4_34XX_SIZE, | ||
185 | .type = MT_DEVICE | ||
186 | } | ||
187 | }; | ||
188 | #endif | ||
189 | |||
190 | #ifdef CONFIG_SOC_OMAPAM33XX | ||
191 | static struct map_desc omapam33xx_io_desc[] __initdata = { | ||
181 | { | 192 | { |
182 | .virtual = L4_34XX_VIRT, | 193 | .virtual = L4_34XX_VIRT, |
183 | .pfn = __phys_to_pfn(L4_34XX_PHYS), | 194 | .pfn = __phys_to_pfn(L4_34XX_PHYS), |
184 | .length = L4_34XX_SIZE, | 195 | .length = L4_34XX_SIZE, |
185 | .type = MT_DEVICE | 196 | .type = MT_DEVICE |
186 | }, | 197 | }, |
198 | { | ||
199 | .virtual = L4_WK_AM33XX_VIRT, | ||
200 | .pfn = __phys_to_pfn(L4_WK_AM33XX_PHYS), | ||
201 | .length = L4_WK_AM33XX_SIZE, | ||
202 | .type = MT_DEVICE | ||
203 | } | ||
187 | }; | 204 | }; |
188 | #endif | 205 | #endif |
189 | 206 | ||
@@ -263,10 +280,17 @@ void __init omap34xx_map_common_io(void) | |||
263 | } | 280 | } |
264 | #endif | 281 | #endif |
265 | 282 | ||
266 | #ifdef CONFIG_SOC_OMAPTI816X | 283 | #ifdef CONFIG_SOC_OMAPTI81XX |
267 | void __init omapti816x_map_common_io(void) | 284 | void __init omapti81xx_map_common_io(void) |
285 | { | ||
286 | iotable_init(omapti81xx_io_desc, ARRAY_SIZE(omapti81xx_io_desc)); | ||
287 | } | ||
288 | #endif | ||
289 | |||
290 | #ifdef CONFIG_SOC_OMAPAM33XX | ||
291 | void __init omapam33xx_map_common_io(void) | ||
268 | { | 292 | { |
269 | iotable_init(omapti816x_io_desc, ARRAY_SIZE(omapti816x_io_desc)); | 293 | iotable_init(omapam33xx_io_desc, ARRAY_SIZE(omapam33xx_io_desc)); |
270 | } | 294 | } |
271 | #endif | 295 | #endif |
272 | 296 | ||
@@ -418,9 +442,9 @@ void __init am35xx_init_early(void) | |||
418 | omap3_init_early(); | 442 | omap3_init_early(); |
419 | } | 443 | } |
420 | 444 | ||
421 | void __init ti816x_init_early(void) | 445 | void __init ti81xx_init_early(void) |
422 | { | 446 | { |
423 | omap2_set_globals_ti816x(); | 447 | omap2_set_globals_ti81xx(); |
424 | omap_common_init_early(); | 448 | omap_common_init_early(); |
425 | omap3xxx_voltagedomains_init(); | 449 | omap3xxx_voltagedomains_init(); |
426 | omap3xxx_powerdomains_init(); | 450 | omap3xxx_powerdomains_init(); |
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c index 42b1d6591912..1fef061f7927 100644 --- a/arch/arm/mach-omap2/irq.c +++ b/arch/arm/mach-omap2/irq.c | |||
@@ -193,7 +193,7 @@ void __init omap3_init_irq(void) | |||
193 | omap_init_irq(OMAP34XX_IC_BASE, 96); | 193 | omap_init_irq(OMAP34XX_IC_BASE, 96); |
194 | } | 194 | } |
195 | 195 | ||
196 | void __init ti816x_init_irq(void) | 196 | void __init ti81xx_init_irq(void) |
197 | { | 197 | { |
198 | omap_init_irq(OMAP34XX_IC_BASE, 128); | 198 | omap_init_irq(OMAP34XX_IC_BASE, 128); |
199 | } | 199 | } |
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 529142aff766..373d1f15c4eb 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c | |||
@@ -706,27 +706,65 @@ static void _enable_module(struct omap_hwmod *oh) | |||
706 | } | 706 | } |
707 | 707 | ||
708 | /** | 708 | /** |
709 | * _disable_module - enable CLKCTRL modulemode on OMAP4 | 709 | * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4 |
710 | * @oh: struct omap_hwmod * | ||
711 | * | ||
712 | * Wait for a module @oh to enter slave idle. Returns 0 if the module | ||
713 | * does not have an IDLEST bit or if the module successfully enters | ||
714 | * slave idle; otherwise, pass along the return value of the | ||
715 | * appropriate *_cm*_wait_module_idle() function. | ||
716 | */ | ||
717 | static int _omap4_wait_target_disable(struct omap_hwmod *oh) | ||
718 | { | ||
719 | if (!cpu_is_omap44xx()) | ||
720 | return 0; | ||
721 | |||
722 | if (!oh) | ||
723 | return -EINVAL; | ||
724 | |||
725 | if (oh->_int_flags & _HWMOD_NO_MPU_PORT) | ||
726 | return 0; | ||
727 | |||
728 | if (oh->flags & HWMOD_NO_IDLEST) | ||
729 | return 0; | ||
730 | |||
731 | return omap4_cminst_wait_module_idle(oh->clkdm->prcm_partition, | ||
732 | oh->clkdm->cm_inst, | ||
733 | oh->clkdm->clkdm_offs, | ||
734 | oh->prcm.omap4.clkctrl_offs); | ||
735 | } | ||
736 | |||
737 | /** | ||
738 | * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4 | ||
710 | * @oh: struct omap_hwmod * | 739 | * @oh: struct omap_hwmod * |
711 | * | 740 | * |
712 | * Disable the PRCM module mode related to the hwmod @oh. | 741 | * Disable the PRCM module mode related to the hwmod @oh. |
713 | * No return value. | 742 | * Return EINVAL if the modulemode is not supported and 0 in case of success. |
714 | */ | 743 | */ |
715 | static void _disable_module(struct omap_hwmod *oh) | 744 | static int _omap4_disable_module(struct omap_hwmod *oh) |
716 | { | 745 | { |
746 | int v; | ||
747 | |||
717 | /* The module mode does not exist prior OMAP4 */ | 748 | /* The module mode does not exist prior OMAP4 */ |
718 | if (cpu_is_omap24xx() || cpu_is_omap34xx()) | 749 | if (!cpu_is_omap44xx()) |
719 | return; | 750 | return -EINVAL; |
720 | 751 | ||
721 | if (!oh->clkdm || !oh->prcm.omap4.modulemode) | 752 | if (!oh->clkdm || !oh->prcm.omap4.modulemode) |
722 | return; | 753 | return -EINVAL; |
723 | 754 | ||
724 | pr_debug("omap_hwmod: %s: _disable_module\n", oh->name); | 755 | pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__); |
725 | 756 | ||
726 | omap4_cminst_module_disable(oh->clkdm->prcm_partition, | 757 | omap4_cminst_module_disable(oh->clkdm->prcm_partition, |
727 | oh->clkdm->cm_inst, | 758 | oh->clkdm->cm_inst, |
728 | oh->clkdm->clkdm_offs, | 759 | oh->clkdm->clkdm_offs, |
729 | oh->prcm.omap4.clkctrl_offs); | 760 | oh->prcm.omap4.clkctrl_offs); |
761 | |||
762 | v = _omap4_wait_target_disable(oh); | ||
763 | if (v) | ||
764 | pr_warn("omap_hwmod: %s: _wait_target_disable failed\n", | ||
765 | oh->name); | ||
766 | |||
767 | return 0; | ||
730 | } | 768 | } |
731 | 769 | ||
732 | /** | 770 | /** |
@@ -1153,36 +1191,6 @@ static int _wait_target_ready(struct omap_hwmod *oh) | |||
1153 | } | 1191 | } |
1154 | 1192 | ||
1155 | /** | 1193 | /** |
1156 | * _wait_target_disable - wait for a module to be disabled | ||
1157 | * @oh: struct omap_hwmod * | ||
1158 | * | ||
1159 | * Wait for a module @oh to enter slave idle. Returns 0 if the module | ||
1160 | * does not have an IDLEST bit or if the module successfully enters | ||
1161 | * slave idle; otherwise, pass along the return value of the | ||
1162 | * appropriate *_cm*_wait_module_idle() function. | ||
1163 | */ | ||
1164 | static int _wait_target_disable(struct omap_hwmod *oh) | ||
1165 | { | ||
1166 | /* TODO: For now just handle OMAP4+ */ | ||
1167 | if (cpu_is_omap24xx() || cpu_is_omap34xx()) | ||
1168 | return 0; | ||
1169 | |||
1170 | if (!oh) | ||
1171 | return -EINVAL; | ||
1172 | |||
1173 | if (oh->_int_flags & _HWMOD_NO_MPU_PORT) | ||
1174 | return 0; | ||
1175 | |||
1176 | if (oh->flags & HWMOD_NO_IDLEST) | ||
1177 | return 0; | ||
1178 | |||
1179 | return omap4_cminst_wait_module_idle(oh->clkdm->prcm_partition, | ||
1180 | oh->clkdm->cm_inst, | ||
1181 | oh->clkdm->clkdm_offs, | ||
1182 | oh->prcm.omap4.clkctrl_offs); | ||
1183 | } | ||
1184 | |||
1185 | /** | ||
1186 | * _lookup_hardreset - fill register bit info for this hwmod/reset line | 1194 | * _lookup_hardreset - fill register bit info for this hwmod/reset line |
1187 | * @oh: struct omap_hwmod * | 1195 | * @oh: struct omap_hwmod * |
1188 | * @name: name of the reset line in the context of this hwmod | 1196 | * @name: name of the reset line in the context of this hwmod |
@@ -1524,8 +1532,6 @@ static int _enable(struct omap_hwmod *oh) | |||
1524 | */ | 1532 | */ |
1525 | static int _idle(struct omap_hwmod *oh) | 1533 | static int _idle(struct omap_hwmod *oh) |
1526 | { | 1534 | { |
1527 | int ret; | ||
1528 | |||
1529 | pr_debug("omap_hwmod: %s: idling\n", oh->name); | 1535 | pr_debug("omap_hwmod: %s: idling\n", oh->name); |
1530 | 1536 | ||
1531 | if (oh->_state != _HWMOD_STATE_ENABLED) { | 1537 | if (oh->_state != _HWMOD_STATE_ENABLED) { |
@@ -1537,11 +1543,9 @@ static int _idle(struct omap_hwmod *oh) | |||
1537 | if (oh->class->sysc) | 1543 | if (oh->class->sysc) |
1538 | _idle_sysc(oh); | 1544 | _idle_sysc(oh); |
1539 | _del_initiator_dep(oh, mpu_oh); | 1545 | _del_initiator_dep(oh, mpu_oh); |
1540 | _disable_module(oh); | 1546 | |
1541 | ret = _wait_target_disable(oh); | 1547 | _omap4_disable_module(oh); |
1542 | if (ret) | 1548 | |
1543 | pr_warn("omap_hwmod: %s: _wait_target_disable failed\n", | ||
1544 | oh->name); | ||
1545 | /* | 1549 | /* |
1546 | * The module must be in idle mode before disabling any parents | 1550 | * The module must be in idle mode before disabling any parents |
1547 | * clocks. Otherwise, the parent clock might be disabled before | 1551 | * clocks. Otherwise, the parent clock might be disabled before |
@@ -1642,11 +1646,7 @@ static int _shutdown(struct omap_hwmod *oh) | |||
1642 | if (oh->_state == _HWMOD_STATE_ENABLED) { | 1646 | if (oh->_state == _HWMOD_STATE_ENABLED) { |
1643 | _del_initiator_dep(oh, mpu_oh); | 1647 | _del_initiator_dep(oh, mpu_oh); |
1644 | /* XXX what about the other system initiators here? dma, dsp */ | 1648 | /* XXX what about the other system initiators here? dma, dsp */ |
1645 | _disable_module(oh); | 1649 | _omap4_disable_module(oh); |
1646 | ret = _wait_target_disable(oh); | ||
1647 | if (ret) | ||
1648 | pr_warn("omap_hwmod: %s: _wait_target_disable failed\n", | ||
1649 | oh->name); | ||
1650 | _disable_clocks(oh); | 1650 | _disable_clocks(oh); |
1651 | if (oh->clkdm) | 1651 | if (oh->clkdm) |
1652 | clkdm_hwmod_disable(oh->clkdm, oh); | 1652 | clkdm_hwmod_disable(oh->clkdm, oh); |
diff --git a/arch/arm/mach-omap2/omap_phy_internal.c b/arch/arm/mach-omap2/omap_phy_internal.c index 58775e3c8476..4c90477e6f82 100644 --- a/arch/arm/mach-omap2/omap_phy_internal.c +++ b/arch/arm/mach-omap2/omap_phy_internal.c | |||
@@ -260,3 +260,38 @@ void am35x_set_mode(u8 musb_mode) | |||
260 | 260 | ||
261 | omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2); | 261 | omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2); |
262 | } | 262 | } |
263 | |||
264 | void ti81xx_musb_phy_power(u8 on) | ||
265 | { | ||
266 | void __iomem *scm_base = NULL; | ||
267 | u32 usbphycfg; | ||
268 | |||
269 | scm_base = ioremap(TI81XX_SCM_BASE, SZ_2K); | ||
270 | if (!scm_base) { | ||
271 | pr_err("system control module ioremap failed\n"); | ||
272 | return; | ||
273 | } | ||
274 | |||
275 | usbphycfg = __raw_readl(scm_base + USBCTRL0); | ||
276 | |||
277 | if (on) { | ||
278 | if (cpu_is_ti816x()) { | ||
279 | usbphycfg |= TI816X_USBPHY0_NORMAL_MODE; | ||
280 | usbphycfg &= ~TI816X_USBPHY_REFCLK_OSC; | ||
281 | } else if (cpu_is_ti814x()) { | ||
282 | usbphycfg &= ~(USBPHY_CM_PWRDN | USBPHY_OTG_PWRDN | ||
283 | | USBPHY_DPINPUT | USBPHY_DMINPUT); | ||
284 | usbphycfg |= (USBPHY_OTGVDET_EN | USBPHY_OTGSESSEND_EN | ||
285 | | USBPHY_DPOPBUFCTL | USBPHY_DMOPBUFCTL); | ||
286 | } | ||
287 | } else { | ||
288 | if (cpu_is_ti816x()) | ||
289 | usbphycfg &= ~TI816X_USBPHY0_NORMAL_MODE; | ||
290 | else if (cpu_is_ti814x()) | ||
291 | usbphycfg |= USBPHY_CM_PWRDN | USBPHY_OTG_PWRDN; | ||
292 | |||
293 | } | ||
294 | __raw_writel(usbphycfg, scm_base + USBCTRL0); | ||
295 | |||
296 | iounmap(scm_base); | ||
297 | } | ||
diff --git a/arch/arm/mach-omap2/opp2xxx.h b/arch/arm/mach-omap2/opp2xxx.h index 8affc66a92c2..8fae534eb157 100644 --- a/arch/arm/mach-omap2/opp2xxx.h +++ b/arch/arm/mach-omap2/opp2xxx.h | |||
@@ -51,7 +51,7 @@ struct prcm_config { | |||
51 | unsigned long cm_clksel2_pll; /* dpllx1 or x2 out */ | 51 | unsigned long cm_clksel2_pll; /* dpllx1 or x2 out */ |
52 | unsigned long cm_clksel_mdm; /* modem dividers 2430 only */ | 52 | unsigned long cm_clksel_mdm; /* modem dividers 2430 only */ |
53 | unsigned long base_sdrc_rfr; /* base refresh timing for a set */ | 53 | unsigned long base_sdrc_rfr; /* base refresh timing for a set */ |
54 | unsigned char flags; | 54 | unsigned short flags; |
55 | }; | 55 | }; |
56 | 56 | ||
57 | 57 | ||
diff --git a/arch/arm/mach-omap2/sdram-nokia.c b/arch/arm/mach-omap2/sdram-nokia.c index ee3a8ad304cb..7479d7ea1379 100644 --- a/arch/arm/mach-omap2/sdram-nokia.c +++ b/arch/arm/mach-omap2/sdram-nokia.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * SDRC register values for Nokia boards | 2 | * SDRC register values for Nokia boards |
3 | * | 3 | * |
4 | * Copyright (C) 2008, 2010 Nokia Corporation | 4 | * Copyright (C) 2008, 2010-2011 Nokia Corporation |
5 | * | 5 | * |
6 | * Lauri Leukkunen <lauri.leukkunen@nokia.com> | 6 | * Lauri Leukkunen <lauri.leukkunen@nokia.com> |
7 | * | 7 | * |
@@ -107,14 +107,37 @@ static const struct sdram_timings nokia_195dot2mhz_timings[] = { | |||
107 | }, | 107 | }, |
108 | }; | 108 | }; |
109 | 109 | ||
110 | static const struct sdram_timings nokia_200mhz_timings[] = { | ||
111 | { | ||
112 | .casl = 3, | ||
113 | .tDAL = 30000, | ||
114 | .tDPL = 15000, | ||
115 | .tRRD = 10000, | ||
116 | .tRCD = 20000, | ||
117 | .tRP = 15000, | ||
118 | .tRAS = 40000, | ||
119 | .tRC = 55000, | ||
120 | .tRFC = 140000, | ||
121 | .tXSR = 200000, | ||
122 | |||
123 | .tREF = 7800, | ||
124 | |||
125 | .tXP = 2, | ||
126 | .tCKE = 4, | ||
127 | .tWTR = 2 | ||
128 | }, | ||
129 | }; | ||
130 | |||
110 | static const struct { | 131 | static const struct { |
111 | long rate; | 132 | long rate; |
112 | struct sdram_timings const *data; | 133 | struct sdram_timings const *data; |
113 | } nokia_timings[] = { | 134 | } nokia_timings[] = { |
114 | { 83000000, nokia_166mhz_timings }, | 135 | { 83000000, nokia_166mhz_timings }, |
115 | { 97600000, nokia_97dot6mhz_timings }, | 136 | { 97600000, nokia_97dot6mhz_timings }, |
137 | { 100000000, nokia_200mhz_timings }, | ||
116 | { 166000000, nokia_166mhz_timings }, | 138 | { 166000000, nokia_166mhz_timings }, |
117 | { 195200000, nokia_195dot2mhz_timings }, | 139 | { 195200000, nokia_195dot2mhz_timings }, |
140 | { 200000000, nokia_200mhz_timings }, | ||
118 | }; | 141 | }; |
119 | static struct omap_sdrc_params nokia_sdrc_params[ARRAY_SIZE(nokia_timings) + 1]; | 142 | static struct omap_sdrc_params nokia_sdrc_params[ARRAY_SIZE(nokia_timings) + 1]; |
120 | 143 | ||
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c index 42c326732a29..d0f009cbfb50 100644 --- a/arch/arm/mach-omap2/serial.c +++ b/arch/arm/mach-omap2/serial.c | |||
@@ -464,7 +464,7 @@ static void omap_uart_idle_init(struct omap_uart_state *uart) | |||
464 | mod_timer(&uart->timer, jiffies + uart->timeout); | 464 | mod_timer(&uart->timer, jiffies + uart->timeout); |
465 | omap_uart_smart_idle_enable(uart, 0); | 465 | omap_uart_smart_idle_enable(uart, 0); |
466 | 466 | ||
467 | if (cpu_is_omap34xx() && !cpu_is_ti816x()) { | 467 | if (cpu_is_omap34xx() && !(cpu_is_ti81xx() || cpu_is_am33xx())) { |
468 | u32 mod = (uart->num > 1) ? OMAP3430_PER_MOD : CORE_MOD; | 468 | u32 mod = (uart->num > 1) ? OMAP3430_PER_MOD : CORE_MOD; |
469 | u32 wk_mask = 0; | 469 | u32 wk_mask = 0; |
470 | u32 padconf = 0; | 470 | u32 padconf = 0; |
@@ -746,7 +746,7 @@ void __init omap_serial_init_port(struct omap_board_data *bdata) | |||
746 | */ | 746 | */ |
747 | uart->regshift = p->regshift; | 747 | uart->regshift = p->regshift; |
748 | uart->membase = p->membase; | 748 | uart->membase = p->membase; |
749 | if (cpu_is_omap44xx() || cpu_is_ti816x()) | 749 | if (cpu_is_omap44xx() || cpu_is_ti81xx()) |
750 | uart->errata |= UART_ERRATA_FIFO_FULL_ABORT; | 750 | uart->errata |= UART_ERRATA_FIFO_FULL_ABORT; |
751 | else if ((serial_read_reg(uart, UART_OMAP_MVER) & 0xFF) | 751 | else if ((serial_read_reg(uart, UART_OMAP_MVER) & 0xFF) |
752 | >= UART_OMAP_NO_EMPTY_FIFO_READ_IP_REV) | 752 | >= UART_OMAP_NO_EMPTY_FIFO_READ_IP_REV) |
@@ -828,7 +828,7 @@ void __init omap_serial_init_port(struct omap_board_data *bdata) | |||
828 | } | 828 | } |
829 | 829 | ||
830 | /* Enable the MDR1 errata for OMAP3 */ | 830 | /* Enable the MDR1 errata for OMAP3 */ |
831 | if (cpu_is_omap34xx() && !cpu_is_ti816x()) | 831 | if (cpu_is_omap34xx() && !(cpu_is_ti81xx() || cpu_is_am33xx())) |
832 | uart->errata |= UART_ERRATA_i202_MDR1_ACCESS; | 832 | uart->errata |= UART_ERRATA_i202_MDR1_ACCESS; |
833 | } | 833 | } |
834 | 834 | ||
diff --git a/arch/arm/mach-omap2/usb-musb.c b/arch/arm/mach-omap2/usb-musb.c index 267975086a7b..8d5ed775dd56 100644 --- a/arch/arm/mach-omap2/usb-musb.c +++ b/arch/arm/mach-omap2/usb-musb.c | |||
@@ -93,6 +93,9 @@ void __init usb_musb_init(struct omap_musb_board_data *musb_board_data) | |||
93 | if (cpu_is_omap3517() || cpu_is_omap3505()) { | 93 | if (cpu_is_omap3517() || cpu_is_omap3505()) { |
94 | oh_name = "am35x_otg_hs"; | 94 | oh_name = "am35x_otg_hs"; |
95 | name = "musb-am35x"; | 95 | name = "musb-am35x"; |
96 | } else if (cpu_is_ti81xx()) { | ||
97 | oh_name = "usb_otg_hs"; | ||
98 | name = "musb-ti81xx"; | ||
96 | } else { | 99 | } else { |
97 | oh_name = "usb_otg_hs"; | 100 | oh_name = "usb_otg_hs"; |
98 | name = "musb-omap2430"; | 101 | name = "musb-omap2430"; |
diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c b/arch/arm/mach-omap2/voltagedomains3xxx_data.c index 474559d5b072..c005e2f5e383 100644 --- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c +++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c | |||
@@ -31,6 +31,14 @@ | |||
31 | * VDD data | 31 | * VDD data |
32 | */ | 32 | */ |
33 | 33 | ||
34 | /* OMAP3-common voltagedomain data */ | ||
35 | |||
36 | static struct voltagedomain omap3_voltdm_wkup = { | ||
37 | .name = "wakeup", | ||
38 | }; | ||
39 | |||
40 | /* 34xx/36xx voltagedomain data */ | ||
41 | |||
34 | static const struct omap_vfsm_instance omap3_vdd1_vfsm = { | 42 | static const struct omap_vfsm_instance omap3_vdd1_vfsm = { |
35 | .voltsetup_reg = OMAP3_PRM_VOLTSETUP1_OFFSET, | 43 | .voltsetup_reg = OMAP3_PRM_VOLTSETUP1_OFFSET, |
36 | .voltsetup_mask = OMAP3430_SETUP_TIME1_MASK, | 44 | .voltsetup_mask = OMAP3430_SETUP_TIME1_MASK, |
@@ -63,10 +71,6 @@ static struct voltagedomain omap3_voltdm_core = { | |||
63 | .vp = &omap3_vp_core, | 71 | .vp = &omap3_vp_core, |
64 | }; | 72 | }; |
65 | 73 | ||
66 | static struct voltagedomain omap3_voltdm_wkup = { | ||
67 | .name = "wakeup", | ||
68 | }; | ||
69 | |||
70 | static struct voltagedomain *voltagedomains_omap3[] __initdata = { | 74 | static struct voltagedomain *voltagedomains_omap3[] __initdata = { |
71 | &omap3_voltdm_mpu, | 75 | &omap3_voltdm_mpu, |
72 | &omap3_voltdm_core, | 76 | &omap3_voltdm_core, |
@@ -74,11 +78,30 @@ static struct voltagedomain *voltagedomains_omap3[] __initdata = { | |||
74 | NULL, | 78 | NULL, |
75 | }; | 79 | }; |
76 | 80 | ||
81 | /* AM35xx voltagedomain data */ | ||
82 | |||
83 | static struct voltagedomain am35xx_voltdm_mpu = { | ||
84 | .name = "mpu_iva", | ||
85 | }; | ||
86 | |||
87 | static struct voltagedomain am35xx_voltdm_core = { | ||
88 | .name = "core", | ||
89 | }; | ||
90 | |||
91 | static struct voltagedomain *voltagedomains_am35xx[] __initdata = { | ||
92 | &am35xx_voltdm_mpu, | ||
93 | &am35xx_voltdm_core, | ||
94 | &omap3_voltdm_wkup, | ||
95 | NULL, | ||
96 | }; | ||
97 | |||
98 | |||
77 | static const char *sys_clk_name __initdata = "sys_ck"; | 99 | static const char *sys_clk_name __initdata = "sys_ck"; |
78 | 100 | ||
79 | void __init omap3xxx_voltagedomains_init(void) | 101 | void __init omap3xxx_voltagedomains_init(void) |
80 | { | 102 | { |
81 | struct voltagedomain *voltdm; | 103 | struct voltagedomain *voltdm; |
104 | struct voltagedomain **voltdms; | ||
82 | int i; | 105 | int i; |
83 | 106 | ||
84 | /* | 107 | /* |
@@ -93,8 +116,13 @@ void __init omap3xxx_voltagedomains_init(void) | |||
93 | omap3_voltdm_core.volt_data = omap34xx_vddcore_volt_data; | 116 | omap3_voltdm_core.volt_data = omap34xx_vddcore_volt_data; |
94 | } | 117 | } |
95 | 118 | ||
96 | for (i = 0; voltdm = voltagedomains_omap3[i], voltdm; i++) | 119 | if (cpu_is_omap3517() || cpu_is_omap3505()) |
120 | voltdms = voltagedomains_am35xx; | ||
121 | else | ||
122 | voltdms = voltagedomains_omap3; | ||
123 | |||
124 | for (i = 0; voltdm = voltdms[i], voltdm; i++) | ||
97 | voltdm->sys_clk.name = sys_clk_name; | 125 | voltdm->sys_clk.name = sys_clk_name; |
98 | 126 | ||
99 | voltdm_init(voltagedomains_omap3); | 127 | voltdm_init(voltdms); |
100 | }; | 128 | }; |