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-rw-r--r--arch/arm/mach-omap2/Makefile3
-rw-r--r--arch/arm/mach-omap2/board-2430sdp.c45
-rw-r--r--arch/arm/mach-omap2/board-3430sdp.c55
-rw-r--r--arch/arm/mach-omap2/board-4430sdp.c6
-rw-r--r--arch/arm/mach-omap2/board-am3517evm.c77
-rw-r--r--arch/arm/mach-omap2/board-cm-t35.c63
-rw-r--r--arch/arm/mach-omap2/board-devkit8000.c30
-rw-r--r--arch/arm/mach-omap2/board-h4.c2
-rw-r--r--arch/arm/mach-omap2/board-igep0020.c2
-rw-r--r--arch/arm/mach-omap2/board-ldp.c63
-rw-r--r--arch/arm/mach-omap2/board-omap3beagle.c2
-rw-r--r--arch/arm/mach-omap2/board-omap3evm.c72
-rw-r--r--arch/arm/mach-omap2/board-omap3pandora.c7
-rw-r--r--arch/arm/mach-omap2/board-omap3stalker.c14
-rw-r--r--arch/arm/mach-omap2/board-overo.c61
-rw-r--r--arch/arm/mach-omap2/board-rx51-peripherals.c4
-rw-r--r--arch/arm/mach-omap2/board-rx51-video.c26
-rw-r--r--arch/arm/mach-omap2/board-zoom-display.c94
-rw-r--r--arch/arm/mach-omap2/board-zoom-peripherals.c53
-rw-r--r--arch/arm/mach-omap2/cclock44xx_data.c20
-rw-r--r--arch/arm/mach-omap2/common.h3
-rw-r--r--arch/arm/mach-omap2/dss-common.c58
-rw-r--r--arch/arm/mach-omap2/gpmc-nand.c42
-rw-r--r--arch/arm/mach-omap2/gpmc-onenand.c118
-rw-r--r--arch/arm/mach-omap2/gpmc-smc91x.c30
-rw-r--r--arch/arm/mach-omap2/gpmc.c544
-rw-r--r--arch/arm/mach-omap2/gpmc.h43
-rw-r--r--arch/arm/mach-omap2/io.c18
-rw-r--r--arch/arm/mach-omap2/omap_hwmod.c7
-rw-r--r--arch/arm/mach-omap2/omap_hwmod.h9
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_3xxx_data.c7
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_44xx_data.c6
-rw-r--r--arch/arm/mach-omap2/timer.c7
-rw-r--r--arch/arm/mach-omap2/usb-tusb6010.c62
34 files changed, 820 insertions, 833 deletions
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index b068b7fe99ef..62bb352c2d37 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -229,7 +229,6 @@ obj-$(CONFIG_MACH_DEVKIT8000) += board-devkit8000.o
229obj-$(CONFIG_MACH_OMAP_LDP) += board-ldp.o 229obj-$(CONFIG_MACH_OMAP_LDP) += board-ldp.o
230obj-$(CONFIG_MACH_OMAP3530_LV_SOM) += board-omap3logic.o 230obj-$(CONFIG_MACH_OMAP3530_LV_SOM) += board-omap3logic.o
231obj-$(CONFIG_MACH_OMAP3_TORPEDO) += board-omap3logic.o 231obj-$(CONFIG_MACH_OMAP3_TORPEDO) += board-omap3logic.o
232obj-$(CONFIG_MACH_ENCORE) += board-omap3encore.o
233obj-$(CONFIG_MACH_OVERO) += board-overo.o 232obj-$(CONFIG_MACH_OVERO) += board-overo.o
234obj-$(CONFIG_MACH_OMAP3EVM) += board-omap3evm.o 233obj-$(CONFIG_MACH_OMAP3EVM) += board-omap3evm.o
235obj-$(CONFIG_MACH_OMAP3_PANDORA) += board-omap3pandora.o 234obj-$(CONFIG_MACH_OMAP3_PANDORA) += board-omap3pandora.o
@@ -255,8 +254,6 @@ obj-$(CONFIG_MACH_TOUCHBOOK) += board-omap3touchbook.o
255obj-$(CONFIG_MACH_OMAP_4430SDP) += board-4430sdp.o 254obj-$(CONFIG_MACH_OMAP_4430SDP) += board-4430sdp.o
256obj-$(CONFIG_MACH_OMAP4_PANDA) += board-omap4panda.o 255obj-$(CONFIG_MACH_OMAP4_PANDA) += board-omap4panda.o
257 256
258obj-$(CONFIG_MACH_PCM049) += board-omap4pcm049.o
259
260obj-$(CONFIG_MACH_OMAP3517EVM) += board-am3517evm.o 257obj-$(CONFIG_MACH_OMAP3517EVM) += board-am3517evm.o
261 258
262obj-$(CONFIG_MACH_CRANEBOARD) += board-am3517crane.o 259obj-$(CONFIG_MACH_CRANEBOARD) += board-am3517crane.o
diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c
index cb0596b631cf..244d8a5aa54b 100644
--- a/arch/arm/mach-omap2/board-2430sdp.c
+++ b/arch/arm/mach-omap2/board-2430sdp.c
@@ -38,7 +38,7 @@
38#include "gpmc-smc91x.h" 38#include "gpmc-smc91x.h"
39 39
40#include <video/omapdss.h> 40#include <video/omapdss.h>
41#include <video/omap-panel-generic-dpi.h> 41#include <video/omap-panel-data.h>
42 42
43#include "mux.h" 43#include "mux.h"
44#include "hsmmc.h" 44#include "hsmmc.h"
@@ -108,24 +108,13 @@ static struct platform_device *sdp2430_devices[] __initdata = {
108#define SDP2430_LCD_PANEL_BACKLIGHT_GPIO 91 108#define SDP2430_LCD_PANEL_BACKLIGHT_GPIO 91
109#define SDP2430_LCD_PANEL_ENABLE_GPIO 154 109#define SDP2430_LCD_PANEL_ENABLE_GPIO 154
110 110
111static int sdp2430_panel_enable_lcd(struct omap_dss_device *dssdev)
112{
113 gpio_direction_output(SDP2430_LCD_PANEL_ENABLE_GPIO, 1);
114 gpio_direction_output(SDP2430_LCD_PANEL_BACKLIGHT_GPIO, 1);
115
116 return 0;
117}
118
119static void sdp2430_panel_disable_lcd(struct omap_dss_device *dssdev)
120{
121 gpio_direction_output(SDP2430_LCD_PANEL_ENABLE_GPIO, 0);
122 gpio_direction_output(SDP2430_LCD_PANEL_BACKLIGHT_GPIO, 0);
123}
124
125static struct panel_generic_dpi_data sdp2430_panel_data = { 111static struct panel_generic_dpi_data sdp2430_panel_data = {
126 .name = "nec_nl2432dr22-11b", 112 .name = "nec_nl2432dr22-11b",
127 .platform_enable = sdp2430_panel_enable_lcd, 113 .num_gpios = 2,
128 .platform_disable = sdp2430_panel_disable_lcd, 114 .gpios = {
115 SDP2430_LCD_PANEL_ENABLE_GPIO,
116 SDP2430_LCD_PANEL_BACKLIGHT_GPIO,
117 },
129}; 118};
130 119
131static struct omap_dss_device sdp2430_lcd_device = { 120static struct omap_dss_device sdp2430_lcd_device = {
@@ -146,26 +135,6 @@ static struct omap_dss_board_info sdp2430_dss_data = {
146 .default_device = &sdp2430_lcd_device, 135 .default_device = &sdp2430_lcd_device,
147}; 136};
148 137
149static void __init sdp2430_display_init(void)
150{
151 int r;
152
153 static struct gpio gpios[] __initdata = {
154 { SDP2430_LCD_PANEL_ENABLE_GPIO, GPIOF_OUT_INIT_LOW,
155 "LCD reset" },
156 { SDP2430_LCD_PANEL_BACKLIGHT_GPIO, GPIOF_OUT_INIT_LOW,
157 "LCD Backlight" },
158 };
159
160 r = gpio_request_array(gpios, ARRAY_SIZE(gpios));
161 if (r) {
162 pr_err("Cannot request LCD GPIOs, error %d\n", r);
163 return;
164 }
165
166 omap_display_init(&sdp2430_dss_data);
167}
168
169#if IS_ENABLED(CONFIG_SMC91X) 138#if IS_ENABLED(CONFIG_SMC91X)
170 139
171static struct omap_smc91x_platform_data board_smc91x_data = { 140static struct omap_smc91x_platform_data board_smc91x_data = {
@@ -273,7 +242,7 @@ static void __init omap_2430sdp_init(void)
273 gpio_request_one(SECONDARY_LCD_GPIO, GPIOF_OUT_INIT_LOW, 242 gpio_request_one(SECONDARY_LCD_GPIO, GPIOF_OUT_INIT_LOW,
274 "Secondary LCD backlight"); 243 "Secondary LCD backlight");
275 244
276 sdp2430_display_init(); 245 omap_display_init(&sdp2430_dss_data);
277} 246}
278 247
279MACHINE_START(OMAP_2430SDP, "OMAP2430 sdp2430 board") 248MACHINE_START(OMAP_2430SDP, "OMAP2430 sdp2430 board")
diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c
index 7eb9651dd0f7..23b004afa3f8 100644
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -35,7 +35,7 @@
35#include "common.h" 35#include "common.h"
36#include <linux/omap-dma.h> 36#include <linux/omap-dma.h>
37#include <video/omapdss.h> 37#include <video/omapdss.h>
38#include <video/omap-panel-tfp410.h> 38#include <video/omap-panel-data.h>
39 39
40#include "gpmc.h" 40#include "gpmc.h"
41#include "gpmc-smc91x.h" 41#include "gpmc-smc91x.h"
@@ -108,53 +108,38 @@ static struct twl4030_keypad_data sdp3430_kp_data = {
108#define SDP3430_LCD_PANEL_BACKLIGHT_GPIO 8 108#define SDP3430_LCD_PANEL_BACKLIGHT_GPIO 8
109#define SDP3430_LCD_PANEL_ENABLE_GPIO 5 109#define SDP3430_LCD_PANEL_ENABLE_GPIO 5
110 110
111static struct gpio sdp3430_dss_gpios[] __initdata = {
112 {SDP3430_LCD_PANEL_ENABLE_GPIO, GPIOF_OUT_INIT_LOW, "LCD reset" },
113 {SDP3430_LCD_PANEL_BACKLIGHT_GPIO, GPIOF_OUT_INIT_LOW, "LCD Backlight"},
114};
115
116static void __init sdp3430_display_init(void) 111static void __init sdp3430_display_init(void)
117{ 112{
118 int r; 113 int r;
119 114
120 r = gpio_request_array(sdp3430_dss_gpios, 115 /*
121 ARRAY_SIZE(sdp3430_dss_gpios)); 116 * the backlight GPIO doesn't directly go to the panel, it enables
117 * an internal circuit on 3430sdp to create the signal V_BKL_28V,
118 * this is connected to LED+ pin of the sharp panel. This GPIO
119 * is left enabled in the board file, and not passed to the panel
120 * as platform_data.
121 */
122 r = gpio_request_one(SDP3430_LCD_PANEL_BACKLIGHT_GPIO,
123 GPIOF_OUT_INIT_HIGH, "LCD Backlight");
122 if (r) 124 if (r)
123 printk(KERN_ERR "failed to get LCD control GPIOs\n"); 125 pr_err("failed to get LCD Backlight GPIO\n");
124
125}
126 126
127static int sdp3430_panel_enable_lcd(struct omap_dss_device *dssdev)
128{
129 gpio_direction_output(SDP3430_LCD_PANEL_ENABLE_GPIO, 1);
130 gpio_direction_output(SDP3430_LCD_PANEL_BACKLIGHT_GPIO, 1);
131
132 return 0;
133}
134
135static void sdp3430_panel_disable_lcd(struct omap_dss_device *dssdev)
136{
137 gpio_direction_output(SDP3430_LCD_PANEL_ENABLE_GPIO, 0);
138 gpio_direction_output(SDP3430_LCD_PANEL_BACKLIGHT_GPIO, 0);
139}
140
141static int sdp3430_panel_enable_tv(struct omap_dss_device *dssdev)
142{
143 return 0;
144}
145
146static void sdp3430_panel_disable_tv(struct omap_dss_device *dssdev)
147{
148} 127}
149 128
129static struct panel_sharp_ls037v7dw01_data sdp3430_lcd_data = {
130 .resb_gpio = SDP3430_LCD_PANEL_ENABLE_GPIO,
131 .ini_gpio = -1,
132 .mo_gpio = -1,
133 .lr_gpio = -1,
134 .ud_gpio = -1,
135};
150 136
151static struct omap_dss_device sdp3430_lcd_device = { 137static struct omap_dss_device sdp3430_lcd_device = {
152 .name = "lcd", 138 .name = "lcd",
153 .driver_name = "sharp_ls_panel", 139 .driver_name = "sharp_ls_panel",
154 .type = OMAP_DISPLAY_TYPE_DPI, 140 .type = OMAP_DISPLAY_TYPE_DPI,
155 .phy.dpi.data_lines = 16, 141 .phy.dpi.data_lines = 16,
156 .platform_enable = sdp3430_panel_enable_lcd, 142 .data = &sdp3430_lcd_data,
157 .platform_disable = sdp3430_panel_disable_lcd,
158}; 143};
159 144
160static struct tfp410_platform_data dvi_panel = { 145static struct tfp410_platform_data dvi_panel = {
@@ -175,8 +160,6 @@ static struct omap_dss_device sdp3430_tv_device = {
175 .driver_name = "venc", 160 .driver_name = "venc",
176 .type = OMAP_DISPLAY_TYPE_VENC, 161 .type = OMAP_DISPLAY_TYPE_VENC,
177 .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO, 162 .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
178 .platform_enable = sdp3430_panel_enable_tv,
179 .platform_disable = sdp3430_panel_disable_tv,
180}; 163};
181 164
182 165
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
index 306df0b40935..56a9a4f855c7 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -291,6 +291,10 @@ static struct platform_device sdp4430_leds_pwm = {
291 }, 291 },
292}; 292};
293 293
294/* Dummy regulator for pwm-backlight driver */
295static struct regulator_consumer_supply backlight_supply =
296 REGULATOR_SUPPLY("enable", "pwm-backlight");
297
294static struct platform_pwm_backlight_data sdp4430_backlight_data = { 298static struct platform_pwm_backlight_data sdp4430_backlight_data = {
295 .max_brightness = 127, 299 .max_brightness = 127,
296 .dft_brightness = 127, 300 .dft_brightness = 127,
@@ -718,6 +722,8 @@ static void __init omap_4430sdp_init(void)
718 722
719 omap4_i2c_init(); 723 omap4_i2c_init();
720 omap_sfh7741prox_init(); 724 omap_sfh7741prox_init();
725 regulator_register_always_on(0, "backlight-enable",
726 &backlight_supply, 1, 0);
721 platform_add_devices(sdp4430_devices, ARRAY_SIZE(sdp4430_devices)); 727 platform_add_devices(sdp4430_devices, ARRAY_SIZE(sdp4430_devices));
722 omap_serial_init(); 728 omap_serial_init();
723 omap_sdrc_init(NULL, NULL); 729 omap_sdrc_init(NULL, NULL);
diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c
index 191f9762ba63..d63f14b534b5 100644
--- a/arch/arm/mach-omap2/board-am3517evm.c
+++ b/arch/arm/mach-omap2/board-am3517evm.c
@@ -35,8 +35,7 @@
35 35
36#include "common.h" 36#include "common.h"
37#include <video/omapdss.h> 37#include <video/omapdss.h>
38#include <video/omap-panel-generic-dpi.h> 38#include <video/omap-panel-data.h>
39#include <video/omap-panel-tfp410.h>
40 39
41#include "am35xx-emac.h" 40#include "am35xx-emac.h"
42#include "mux.h" 41#include "mux.h"
@@ -121,63 +120,14 @@ static int __init am3517_evm_i2c_init(void)
121 return 0; 120 return 0;
122} 121}
123 122
124static int lcd_enabled;
125static int dvi_enabled;
126
127#if defined(CONFIG_PANEL_SHARP_LQ043T1DG01) || \
128 defined(CONFIG_PANEL_SHARP_LQ043T1DG01_MODULE)
129static struct gpio am3517_evm_dss_gpios[] __initdata = {
130 /* GPIO 182 = LCD Backlight Power */
131 { LCD_PANEL_BKLIGHT_PWR, GPIOF_OUT_INIT_HIGH, "lcd_backlight_pwr" },
132 /* GPIO 181 = LCD Panel PWM */
133 { LCD_PANEL_PWM, GPIOF_OUT_INIT_HIGH, "lcd bl enable" },
134 /* GPIO 176 = LCD Panel Power enable pin */
135 { LCD_PANEL_PWR, GPIOF_OUT_INIT_HIGH, "dvi enable" },
136};
137
138static void __init am3517_evm_display_init(void)
139{
140 int r;
141
142 omap_mux_init_gpio(LCD_PANEL_PWR, OMAP_PIN_INPUT_PULLUP);
143 omap_mux_init_gpio(LCD_PANEL_BKLIGHT_PWR, OMAP_PIN_INPUT_PULLDOWN);
144 omap_mux_init_gpio(LCD_PANEL_PWM, OMAP_PIN_INPUT_PULLDOWN);
145
146 r = gpio_request_array(am3517_evm_dss_gpios,
147 ARRAY_SIZE(am3517_evm_dss_gpios));
148 if (r) {
149 printk(KERN_ERR "failed to get DSS panel control GPIOs\n");
150 return;
151 }
152
153 printk(KERN_INFO "Display initialized successfully\n");
154}
155#else
156static void __init am3517_evm_display_init(void) {}
157#endif
158
159static int am3517_evm_panel_enable_lcd(struct omap_dss_device *dssdev)
160{
161 if (dvi_enabled) {
162 printk(KERN_ERR "cannot enable LCD, DVI is enabled\n");
163 return -EINVAL;
164 }
165 gpio_set_value(LCD_PANEL_PWR, 1);
166 lcd_enabled = 1;
167
168 return 0;
169}
170
171static void am3517_evm_panel_disable_lcd(struct omap_dss_device *dssdev)
172{
173 gpio_set_value(LCD_PANEL_PWR, 0);
174 lcd_enabled = 0;
175}
176
177static struct panel_generic_dpi_data lcd_panel = { 123static struct panel_generic_dpi_data lcd_panel = {
178 .name = "sharp_lq", 124 .name = "sharp_lq",
179 .platform_enable = am3517_evm_panel_enable_lcd, 125 .num_gpios = 3,
180 .platform_disable = am3517_evm_panel_disable_lcd, 126 .gpios = {
127 LCD_PANEL_PWR,
128 LCD_PANEL_BKLIGHT_PWR,
129 LCD_PANEL_PWM,
130 },
181}; 131};
182 132
183static struct omap_dss_device am3517_evm_lcd_device = { 133static struct omap_dss_device am3517_evm_lcd_device = {
@@ -188,22 +138,11 @@ static struct omap_dss_device am3517_evm_lcd_device = {
188 .phy.dpi.data_lines = 16, 138 .phy.dpi.data_lines = 16,
189}; 139};
190 140
191static int am3517_evm_panel_enable_tv(struct omap_dss_device *dssdev)
192{
193 return 0;
194}
195
196static void am3517_evm_panel_disable_tv(struct omap_dss_device *dssdev)
197{
198}
199
200static struct omap_dss_device am3517_evm_tv_device = { 141static struct omap_dss_device am3517_evm_tv_device = {
201 .type = OMAP_DISPLAY_TYPE_VENC, 142 .type = OMAP_DISPLAY_TYPE_VENC,
202 .name = "tv", 143 .name = "tv",
203 .driver_name = "venc", 144 .driver_name = "venc",
204 .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO, 145 .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
205 .platform_enable = am3517_evm_panel_enable_tv,
206 .platform_disable = am3517_evm_panel_disable_tv,
207}; 146};
208 147
209static struct tfp410_platform_data dvi_panel = { 148static struct tfp410_platform_data dvi_panel = {
@@ -366,8 +305,6 @@ static void __init am3517_evm_init(void)
366 usbhs_init_phys(phy_data, ARRAY_SIZE(phy_data)); 305 usbhs_init_phys(phy_data, ARRAY_SIZE(phy_data));
367 usbhs_init(&usbhs_bdata); 306 usbhs_init(&usbhs_bdata);
368 am3517_evm_hecc_init(&am3517_evm_hecc_pdata); 307 am3517_evm_hecc_init(&am3517_evm_hecc_pdata);
369 /* DSS */
370 am3517_evm_display_init();
371 308
372 /* RTC - S35390A */ 309 /* RTC - S35390A */
373 am3517_evm_rtc_init(); 310 am3517_evm_rtc_init();
diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c
index 7fda3f5f8a7f..ee6218c74807 100644
--- a/arch/arm/mach-omap2/board-cm-t35.c
+++ b/arch/arm/mach-omap2/board-cm-t35.c
@@ -41,8 +41,7 @@
41 41
42#include <linux/platform_data/mtd-nand-omap2.h> 42#include <linux/platform_data/mtd-nand-omap2.h>
43#include <video/omapdss.h> 43#include <video/omapdss.h>
44#include <video/omap-panel-generic-dpi.h> 44#include <video/omap-panel-data.h>
45#include <video/omap-panel-tfp410.h>
46#include <linux/platform_data/spi-omap2-mcspi.h> 45#include <linux/platform_data/spi-omap2-mcspi.h>
47 46
48#include "common.h" 47#include "common.h"
@@ -191,45 +190,12 @@ static inline void cm_t35_init_nand(void) {}
191#define CM_T35_LCD_BL_GPIO 58 190#define CM_T35_LCD_BL_GPIO 58
192#define CM_T35_DVI_EN_GPIO 54 191#define CM_T35_DVI_EN_GPIO 54
193 192
194static int lcd_enabled;
195static int dvi_enabled;
196
197static int cm_t35_panel_enable_lcd(struct omap_dss_device *dssdev)
198{
199 if (dvi_enabled) {
200 printk(KERN_ERR "cannot enable LCD, DVI is enabled\n");
201 return -EINVAL;
202 }
203
204 gpio_set_value(CM_T35_LCD_EN_GPIO, 1);
205 gpio_set_value(CM_T35_LCD_BL_GPIO, 1);
206
207 lcd_enabled = 1;
208
209 return 0;
210}
211
212static void cm_t35_panel_disable_lcd(struct omap_dss_device *dssdev)
213{
214 lcd_enabled = 0;
215
216 gpio_set_value(CM_T35_LCD_BL_GPIO, 0);
217 gpio_set_value(CM_T35_LCD_EN_GPIO, 0);
218}
219
220static int cm_t35_panel_enable_tv(struct omap_dss_device *dssdev)
221{
222 return 0;
223}
224
225static void cm_t35_panel_disable_tv(struct omap_dss_device *dssdev)
226{
227}
228
229static struct panel_generic_dpi_data lcd_panel = { 193static struct panel_generic_dpi_data lcd_panel = {
230 .name = "toppoly_tdo35s", 194 .name = "toppoly_tdo35s",
231 .platform_enable = cm_t35_panel_enable_lcd, 195 .num_gpios = 1,
232 .platform_disable = cm_t35_panel_disable_lcd, 196 .gpios = {
197 CM_T35_LCD_BL_GPIO,
198 },
233}; 199};
234 200
235static struct omap_dss_device cm_t35_lcd_device = { 201static struct omap_dss_device cm_t35_lcd_device = {
@@ -258,8 +224,6 @@ static struct omap_dss_device cm_t35_tv_device = {
258 .driver_name = "venc", 224 .driver_name = "venc",
259 .type = OMAP_DISPLAY_TYPE_VENC, 225 .type = OMAP_DISPLAY_TYPE_VENC,
260 .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO, 226 .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
261 .platform_enable = cm_t35_panel_enable_tv,
262 .platform_disable = cm_t35_panel_disable_tv,
263}; 227};
264 228
265static struct omap_dss_device *cm_t35_dss_devices[] = { 229static struct omap_dss_device *cm_t35_dss_devices[] = {
@@ -293,11 +257,6 @@ static struct spi_board_info cm_t35_lcd_spi_board_info[] __initdata = {
293 }, 257 },
294}; 258};
295 259
296static struct gpio cm_t35_dss_gpios[] __initdata = {
297 { CM_T35_LCD_EN_GPIO, GPIOF_OUT_INIT_LOW, "lcd enable" },
298 { CM_T35_LCD_BL_GPIO, GPIOF_OUT_INIT_LOW, "lcd bl enable" },
299};
300
301static void __init cm_t35_init_display(void) 260static void __init cm_t35_init_display(void)
302{ 261{
303 int err; 262 int err;
@@ -305,23 +264,21 @@ static void __init cm_t35_init_display(void)
305 spi_register_board_info(cm_t35_lcd_spi_board_info, 264 spi_register_board_info(cm_t35_lcd_spi_board_info,
306 ARRAY_SIZE(cm_t35_lcd_spi_board_info)); 265 ARRAY_SIZE(cm_t35_lcd_spi_board_info));
307 266
308 err = gpio_request_array(cm_t35_dss_gpios, 267
309 ARRAY_SIZE(cm_t35_dss_gpios)); 268 err = gpio_request_one(CM_T35_LCD_EN_GPIO, GPIOF_OUT_INIT_LOW,
269 "lcd bl enable");
310 if (err) { 270 if (err) {
311 pr_err("CM-T35: failed to request DSS control GPIOs\n"); 271 pr_err("CM-T35: failed to request LCD EN GPIO\n");
312 return; 272 return;
313 } 273 }
314 274
315 gpio_export(CM_T35_LCD_EN_GPIO, 0);
316 gpio_export(CM_T35_LCD_BL_GPIO, 0);
317
318 msleep(50); 275 msleep(50);
319 gpio_set_value(CM_T35_LCD_EN_GPIO, 1); 276 gpio_set_value(CM_T35_LCD_EN_GPIO, 1);
320 277
321 err = omap_display_init(&cm_t35_dss_data); 278 err = omap_display_init(&cm_t35_dss_data);
322 if (err) { 279 if (err) {
323 pr_err("CM-T35: failed to register DSS device\n"); 280 pr_err("CM-T35: failed to register DSS device\n");
324 gpio_free_array(cm_t35_dss_gpios, ARRAY_SIZE(cm_t35_dss_gpios)); 281 gpio_free(CM_T35_LCD_EN_GPIO);
325 } 282 }
326} 283}
327 284
diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c
index 42fbf1ef12a9..576420544178 100644
--- a/arch/arm/mach-omap2/board-devkit8000.c
+++ b/arch/arm/mach-omap2/board-devkit8000.c
@@ -43,8 +43,7 @@
43#include "gpmc.h" 43#include "gpmc.h"
44#include <linux/platform_data/mtd-nand-omap2.h> 44#include <linux/platform_data/mtd-nand-omap2.h>
45#include <video/omapdss.h> 45#include <video/omapdss.h>
46#include <video/omap-panel-generic-dpi.h> 46#include <video/omap-panel-data.h>
47#include <video/omap-panel-tfp410.h>
48 47
49#include <linux/platform_data/spi-omap2-mcspi.h> 48#include <linux/platform_data/spi-omap2-mcspi.h>
50#include <linux/input/matrix_keypad.h> 49#include <linux/input/matrix_keypad.h>
@@ -104,19 +103,6 @@ static struct omap2_hsmmc_info mmc[] = {
104 {} /* Terminator */ 103 {} /* Terminator */
105}; 104};
106 105
107static int devkit8000_panel_enable_lcd(struct omap_dss_device *dssdev)
108{
109 if (gpio_is_valid(dssdev->reset_gpio))
110 gpio_set_value_cansleep(dssdev->reset_gpio, 1);
111 return 0;
112}
113
114static void devkit8000_panel_disable_lcd(struct omap_dss_device *dssdev)
115{
116 if (gpio_is_valid(dssdev->reset_gpio))
117 gpio_set_value_cansleep(dssdev->reset_gpio, 0);
118}
119
120static struct regulator_consumer_supply devkit8000_vmmc1_supply[] = { 106static struct regulator_consumer_supply devkit8000_vmmc1_supply[] = {
121 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), 107 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
122}; 108};
@@ -128,8 +114,7 @@ static struct regulator_consumer_supply devkit8000_vio_supply[] = {
128 114
129static struct panel_generic_dpi_data lcd_panel = { 115static struct panel_generic_dpi_data lcd_panel = {
130 .name = "innolux_at070tn83", 116 .name = "innolux_at070tn83",
131 .platform_enable = devkit8000_panel_enable_lcd, 117 /* gpios filled in code */
132 .platform_disable = devkit8000_panel_disable_lcd,
133}; 118};
134 119
135static struct omap_dss_device devkit8000_lcd_device = { 120static struct omap_dss_device devkit8000_lcd_device = {
@@ -211,8 +196,6 @@ static struct gpio_led gpio_leds[];
211static int devkit8000_twl_gpio_setup(struct device *dev, 196static int devkit8000_twl_gpio_setup(struct device *dev,
212 unsigned gpio, unsigned ngpio) 197 unsigned gpio, unsigned ngpio)
213{ 198{
214 int ret;
215
216 /* gpio + 0 is "mmc0_cd" (input/IRQ) */ 199 /* gpio + 0 is "mmc0_cd" (input/IRQ) */
217 mmc[0].gpio_cd = gpio + 0; 200 mmc[0].gpio_cd = gpio + 0;
218 omap_hsmmc_late_init(mmc); 201 omap_hsmmc_late_init(mmc);
@@ -221,13 +204,8 @@ static int devkit8000_twl_gpio_setup(struct device *dev,
221 gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1; 204 gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1;
222 205
223 /* TWL4030_GPIO_MAX + 0 is "LCD_PWREN" (out, active high) */ 206 /* TWL4030_GPIO_MAX + 0 is "LCD_PWREN" (out, active high) */
224 devkit8000_lcd_device.reset_gpio = gpio + TWL4030_GPIO_MAX + 0; 207 lcd_panel.num_gpios = 1;
225 ret = gpio_request_one(devkit8000_lcd_device.reset_gpio, 208 lcd_panel.gpios[0] = gpio + TWL4030_GPIO_MAX + 0;
226 GPIOF_OUT_INIT_LOW, "LCD_PWREN");
227 if (ret < 0) {
228 devkit8000_lcd_device.reset_gpio = -EINVAL;
229 printk(KERN_ERR "Failed to request GPIO for LCD_PWRN\n");
230 }
231 209
232 /* gpio + 7 is "DVI_PD" (out, active low) */ 210 /* gpio + 7 is "DVI_PD" (out, active low) */
233 dvi_panel.power_down_gpio = gpio + 7; 211 dvi_panel.power_down_gpio = gpio + 7;
diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c
index 5b4ec51c385f..69c0acf5aa63 100644
--- a/arch/arm/mach-omap2/board-h4.c
+++ b/arch/arm/mach-omap2/board-h4.c
@@ -34,7 +34,7 @@
34#include <asm/mach/map.h> 34#include <asm/mach/map.h>
35 35
36#include <video/omapdss.h> 36#include <video/omapdss.h>
37#include <video/omap-panel-generic-dpi.h> 37#include <video/omap-panel-data.h>
38 38
39#include "common.h" 39#include "common.h"
40#include "mux.h" 40#include "mux.h"
diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c
index 95ccec0eeab9..b54562d1235e 100644
--- a/arch/arm/mach-omap2/board-igep0020.c
+++ b/arch/arm/mach-omap2/board-igep0020.c
@@ -31,7 +31,7 @@
31#include <asm/mach/arch.h> 31#include <asm/mach/arch.h>
32 32
33#include <video/omapdss.h> 33#include <video/omapdss.h>
34#include <video/omap-panel-tfp410.h> 34#include <video/omap-panel-data.h>
35#include <linux/platform_data/mtd-onenand-omap2.h> 35#include <linux/platform_data/mtd-onenand-omap2.h>
36 36
37#include "common.h" 37#include "common.h"
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c
index b12fe966a7b9..d0d17bc58d9b 100644
--- a/arch/arm/mach-omap2/board-ldp.c
+++ b/arch/arm/mach-omap2/board-ldp.c
@@ -41,7 +41,7 @@
41#include "gpmc-smsc911x.h" 41#include "gpmc-smsc911x.h"
42 42
43#include <video/omapdss.h> 43#include <video/omapdss.h>
44#include <video/omap-panel-generic-dpi.h> 44#include <video/omap-panel-data.h>
45 45
46#include "board-flash.h" 46#include "board-flash.h"
47#include "mux.h" 47#include "mux.h"
@@ -181,34 +181,13 @@ static inline void __init ldp_init_smsc911x(void)
181 181
182/* LCD */ 182/* LCD */
183 183
184static int ldp_backlight_gpio;
185static int ldp_lcd_enable_gpio;
186
187#define LCD_PANEL_RESET_GPIO 55 184#define LCD_PANEL_RESET_GPIO 55
188#define LCD_PANEL_QVGA_GPIO 56 185#define LCD_PANEL_QVGA_GPIO 56
189 186
190static int ldp_panel_enable_lcd(struct omap_dss_device *dssdev)
191{
192 if (gpio_is_valid(ldp_lcd_enable_gpio))
193 gpio_direction_output(ldp_lcd_enable_gpio, 1);
194 if (gpio_is_valid(ldp_backlight_gpio))
195 gpio_direction_output(ldp_backlight_gpio, 1);
196
197 return 0;
198}
199
200static void ldp_panel_disable_lcd(struct omap_dss_device *dssdev)
201{
202 if (gpio_is_valid(ldp_lcd_enable_gpio))
203 gpio_direction_output(ldp_lcd_enable_gpio, 0);
204 if (gpio_is_valid(ldp_backlight_gpio))
205 gpio_direction_output(ldp_backlight_gpio, 0);
206}
207
208static struct panel_generic_dpi_data ldp_panel_data = { 187static struct panel_generic_dpi_data ldp_panel_data = {
209 .name = "nec_nl2432dr22-11b", 188 .name = "nec_nl2432dr22-11b",
210 .platform_enable = ldp_panel_enable_lcd, 189 .num_gpios = 4,
211 .platform_disable = ldp_panel_disable_lcd, 190 /* gpios filled in code */
212}; 191};
213 192
214static struct omap_dss_device ldp_lcd_device = { 193static struct omap_dss_device ldp_lcd_device = {
@@ -231,41 +210,19 @@ static struct omap_dss_board_info ldp_dss_data = {
231 210
232static void __init ldp_display_init(void) 211static void __init ldp_display_init(void)
233{ 212{
234 int r; 213 ldp_panel_data.gpios[2] = LCD_PANEL_RESET_GPIO;
235 214 ldp_panel_data.gpios[3] = LCD_PANEL_QVGA_GPIO;
236 static struct gpio gpios[] __initdata = {
237 {LCD_PANEL_RESET_GPIO, GPIOF_OUT_INIT_HIGH, "LCD RESET"},
238 {LCD_PANEL_QVGA_GPIO, GPIOF_OUT_INIT_HIGH, "LCD QVGA"},
239 };
240
241 r = gpio_request_array(gpios, ARRAY_SIZE(gpios));
242 if (r) {
243 pr_err("Cannot request LCD GPIOs, error %d\n", r);
244 return;
245 }
246 215
247 omap_display_init(&ldp_dss_data); 216 omap_display_init(&ldp_dss_data);
248} 217}
249 218
250static int ldp_twl_gpio_setup(struct device *dev, unsigned gpio, unsigned ngpio) 219static int ldp_twl_gpio_setup(struct device *dev, unsigned gpio, unsigned ngpio)
251{ 220{
252 int r; 221 ldp_panel_data.gpios[0] = gpio + 7;
253 222 ldp_panel_data.gpio_invert[0] = true;
254 struct gpio gpios[] = { 223
255 {gpio + 7 , GPIOF_OUT_INIT_LOW, "LCD ENABLE"}, 224 ldp_panel_data.gpios[1] = gpio + 15;
256 {gpio + 15, GPIOF_OUT_INIT_LOW, "LCD BACKLIGHT"}, 225 ldp_panel_data.gpio_invert[1] = true;
257 };
258
259 r = gpio_request_array(gpios, ARRAY_SIZE(gpios));
260 if (r) {
261 pr_err("Cannot request LCD GPIOs, error %d\n", r);
262 ldp_backlight_gpio = -EINVAL;
263 ldp_lcd_enable_gpio = -EINVAL;
264 return r;
265 }
266
267 ldp_backlight_gpio = gpio + 15;
268 ldp_lcd_enable_gpio = gpio + 7;
269 226
270 return 0; 227 return 0;
271} 228}
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
index 6955a428f534..6de78605c0af 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -44,7 +44,7 @@
44#include <asm/mach/flash.h> 44#include <asm/mach/flash.h>
45 45
46#include <video/omapdss.h> 46#include <video/omapdss.h>
47#include <video/omap-panel-tfp410.h> 47#include <video/omap-panel-data.h>
48#include <linux/platform_data/mtd-nand-omap2.h> 48#include <linux/platform_data/mtd-nand-omap2.h>
49 49
50#include "common.h" 50#include "common.h"
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c
index 2de92facc8a3..f76d0de7b406 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
@@ -51,7 +51,7 @@
51#include "common.h" 51#include "common.h"
52#include <linux/platform_data/spi-omap2-mcspi.h> 52#include <linux/platform_data/spi-omap2-mcspi.h>
53#include <video/omapdss.h> 53#include <video/omapdss.h>
54#include <video/omap-panel-tfp410.h> 54#include <video/omap-panel-data.h>
55 55
56#include "soc.h" 56#include "soc.h"
57#include "mux.h" 57#include "mux.h"
@@ -155,61 +155,43 @@ static inline void __init omap3evm_init_smsc911x(void) { return; }
155#define OMAP3EVM_LCD_PANEL_LR 2 155#define OMAP3EVM_LCD_PANEL_LR 2
156#define OMAP3EVM_LCD_PANEL_UD 3 156#define OMAP3EVM_LCD_PANEL_UD 3
157#define OMAP3EVM_LCD_PANEL_INI 152 157#define OMAP3EVM_LCD_PANEL_INI 152
158#define OMAP3EVM_LCD_PANEL_ENVDD 153
159#define OMAP3EVM_LCD_PANEL_QVGA 154 158#define OMAP3EVM_LCD_PANEL_QVGA 154
160#define OMAP3EVM_LCD_PANEL_RESB 155 159#define OMAP3EVM_LCD_PANEL_RESB 155
160
161#define OMAP3EVM_LCD_PANEL_ENVDD 153
161#define OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO 210 162#define OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO 210
163
164/*
165 * OMAP3EVM DVI control signals
166 */
162#define OMAP3EVM_DVI_PANEL_EN_GPIO 199 167#define OMAP3EVM_DVI_PANEL_EN_GPIO 199
163 168
164static struct gpio omap3_evm_dss_gpios[] __initdata = { 169static struct panel_sharp_ls037v7dw01_data omap3_evm_lcd_data = {
165 { OMAP3EVM_LCD_PANEL_RESB, GPIOF_OUT_INIT_HIGH, "lcd_panel_resb" }, 170 .resb_gpio = OMAP3EVM_LCD_PANEL_RESB,
166 { OMAP3EVM_LCD_PANEL_INI, GPIOF_OUT_INIT_HIGH, "lcd_panel_ini" }, 171 .ini_gpio = OMAP3EVM_LCD_PANEL_INI,
167 { OMAP3EVM_LCD_PANEL_QVGA, GPIOF_OUT_INIT_LOW, "lcd_panel_qvga" }, 172 .mo_gpio = OMAP3EVM_LCD_PANEL_QVGA,
168 { OMAP3EVM_LCD_PANEL_LR, GPIOF_OUT_INIT_HIGH, "lcd_panel_lr" }, 173 .lr_gpio = OMAP3EVM_LCD_PANEL_LR,
169 { OMAP3EVM_LCD_PANEL_UD, GPIOF_OUT_INIT_HIGH, "lcd_panel_ud" }, 174 .ud_gpio = OMAP3EVM_LCD_PANEL_UD,
170 { OMAP3EVM_LCD_PANEL_ENVDD, GPIOF_OUT_INIT_LOW, "lcd_panel_envdd" },
171}; 175};
172 176
173static int lcd_enabled;
174static int dvi_enabled;
175
176static void __init omap3_evm_display_init(void) 177static void __init omap3_evm_display_init(void)
177{ 178{
178 int r; 179 int r;
179 180
180 r = gpio_request_array(omap3_evm_dss_gpios, 181 r = gpio_request_one(OMAP3EVM_LCD_PANEL_ENVDD, GPIOF_OUT_INIT_LOW,
181 ARRAY_SIZE(omap3_evm_dss_gpios)); 182 "lcd_panel_envdd");
182 if (r) 183 if (r)
183 printk(KERN_ERR "failed to get lcd_panel_* gpios\n"); 184 pr_err("failed to get lcd_panel_envdd GPIO\n");
184}
185 185
186static int omap3_evm_enable_lcd(struct omap_dss_device *dssdev) 186 r = gpio_request_one(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO,
187{ 187 GPIOF_OUT_INIT_LOW, "lcd_panel_bklight");
188 if (dvi_enabled) { 188 if (r)
189 printk(KERN_ERR "cannot enable LCD, DVI is enabled\n"); 189 pr_err("failed to get lcd_panel_bklight GPIO\n");
190 return -EINVAL;
191 }
192 gpio_set_value(OMAP3EVM_LCD_PANEL_ENVDD, 0);
193 190
194 if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2) 191 if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2)
195 gpio_set_value_cansleep(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 0); 192 gpio_set_value_cansleep(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 0);
196 else 193 else
197 gpio_set_value_cansleep(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 1); 194 gpio_set_value_cansleep(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 1);
198
199 lcd_enabled = 1;
200 return 0;
201}
202
203static void omap3_evm_disable_lcd(struct omap_dss_device *dssdev)
204{
205 gpio_set_value(OMAP3EVM_LCD_PANEL_ENVDD, 1);
206
207 if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2)
208 gpio_set_value_cansleep(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 1);
209 else
210 gpio_set_value_cansleep(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 0);
211
212 lcd_enabled = 0;
213} 195}
214 196
215static struct omap_dss_device omap3_evm_lcd_device = { 197static struct omap_dss_device omap3_evm_lcd_device = {
@@ -217,26 +199,14 @@ static struct omap_dss_device omap3_evm_lcd_device = {
217 .driver_name = "sharp_ls_panel", 199 .driver_name = "sharp_ls_panel",
218 .type = OMAP_DISPLAY_TYPE_DPI, 200 .type = OMAP_DISPLAY_TYPE_DPI,
219 .phy.dpi.data_lines = 18, 201 .phy.dpi.data_lines = 18,
220 .platform_enable = omap3_evm_enable_lcd, 202 .data = &omap3_evm_lcd_data,
221 .platform_disable = omap3_evm_disable_lcd,
222}; 203};
223 204
224static int omap3_evm_enable_tv(struct omap_dss_device *dssdev)
225{
226 return 0;
227}
228
229static void omap3_evm_disable_tv(struct omap_dss_device *dssdev)
230{
231}
232
233static struct omap_dss_device omap3_evm_tv_device = { 205static struct omap_dss_device omap3_evm_tv_device = {
234 .name = "tv", 206 .name = "tv",
235 .driver_name = "venc", 207 .driver_name = "venc",
236 .type = OMAP_DISPLAY_TYPE_VENC, 208 .type = OMAP_DISPLAY_TYPE_VENC,
237 .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO, 209 .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
238 .platform_enable = omap3_evm_enable_tv,
239 .platform_disable = omap3_evm_disable_tv,
240}; 210};
241 211
242static struct tfp410_platform_data dvi_panel = { 212static struct tfp410_platform_data dvi_panel = {
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c
index 1004d2aaa68f..28133d5b4fed 100644
--- a/arch/arm/mach-omap2/board-omap3pandora.c
+++ b/arch/arm/mach-omap2/board-omap3pandora.c
@@ -44,6 +44,7 @@
44 44
45#include "common.h" 45#include "common.h"
46#include <video/omapdss.h> 46#include <video/omapdss.h>
47#include <video/omap-panel-data.h>
47#include <linux/platform_data/mtd-nand-omap2.h> 48#include <linux/platform_data/mtd-nand-omap2.h>
48 49
49#include "mux.h" 50#include "mux.h"
@@ -230,12 +231,16 @@ static struct twl4030_keypad_data pandora_kp_data = {
230 .rep = 1, 231 .rep = 1,
231}; 232};
232 233
234static struct panel_tpo_td043_data lcd_data = {
235 .nreset_gpio = 157,
236};
237
233static struct omap_dss_device pandora_lcd_device = { 238static struct omap_dss_device pandora_lcd_device = {
234 .name = "lcd", 239 .name = "lcd",
235 .driver_name = "tpo_td043mtea1_panel", 240 .driver_name = "tpo_td043mtea1_panel",
236 .type = OMAP_DISPLAY_TYPE_DPI, 241 .type = OMAP_DISPLAY_TYPE_DPI,
237 .phy.dpi.data_lines = 24, 242 .phy.dpi.data_lines = 24,
238 .reset_gpio = 157, 243 .data = &lcd_data,
239}; 244};
240 245
241static struct omap_dss_device pandora_tv_device = { 246static struct omap_dss_device pandora_tv_device = {
diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c
index bf0956489899..d37e6b187ae4 100644
--- a/arch/arm/mach-omap2/board-omap3stalker.c
+++ b/arch/arm/mach-omap2/board-omap3stalker.c
@@ -44,8 +44,7 @@
44#include "gpmc.h" 44#include "gpmc.h"
45#include <linux/platform_data/mtd-nand-omap2.h> 45#include <linux/platform_data/mtd-nand-omap2.h>
46#include <video/omapdss.h> 46#include <video/omapdss.h>
47#include <video/omap-panel-generic-dpi.h> 47#include <video/omap-panel-data.h>
48#include <video/omap-panel-tfp410.h>
49 48
50#include <linux/platform_data/spi-omap2-mcspi.h> 49#include <linux/platform_data/spi-omap2-mcspi.h>
51 50
@@ -95,15 +94,6 @@ static void __init omap3_stalker_display_init(void)
95 return; 94 return;
96} 95}
97 96
98static int omap3_stalker_enable_tv(struct omap_dss_device *dssdev)
99{
100 return 0;
101}
102
103static void omap3_stalker_disable_tv(struct omap_dss_device *dssdev)
104{
105}
106
107static struct omap_dss_device omap3_stalker_tv_device = { 97static struct omap_dss_device omap3_stalker_tv_device = {
108 .name = "tv", 98 .name = "tv",
109 .driver_name = "venc", 99 .driver_name = "venc",
@@ -113,8 +103,6 @@ static struct omap_dss_device omap3_stalker_tv_device = {
113#elif defined(CONFIG_OMAP2_VENC_OUT_TYPE_COMPOSITE) 103#elif defined(CONFIG_OMAP2_VENC_OUT_TYPE_COMPOSITE)
114 .u.venc.type = OMAP_DSS_VENC_TYPE_COMPOSITE, 104 .u.venc.type = OMAP_DSS_VENC_TYPE_COMPOSITE,
115#endif 105#endif
116 .platform_enable = omap3_stalker_enable_tv,
117 .platform_disable = omap3_stalker_disable_tv,
118}; 106};
119 107
120static struct tfp410_platform_data dvi_panel = { 108static struct tfp410_platform_data dvi_panel = {
diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c
index ab79a4422bcc..4ca6b680aa72 100644
--- a/arch/arm/mach-omap2/board-overo.c
+++ b/arch/arm/mach-omap2/board-overo.c
@@ -47,8 +47,7 @@
47#include <asm/mach/map.h> 47#include <asm/mach/map.h>
48 48
49#include <video/omapdss.h> 49#include <video/omapdss.h>
50#include <video/omap-panel-generic-dpi.h> 50#include <video/omap-panel-data.h>
51#include <video/omap-panel-tfp410.h>
52 51
53#include "common.h" 52#include "common.h"
54#include "mux.h" 53#include "mux.h"
@@ -146,28 +145,9 @@ static inline void __init overo_init_smsc911x(void) { return; }
146#endif 145#endif
147 146
148/* DSS */ 147/* DSS */
149static int lcd_enabled;
150static int dvi_enabled;
151
152#define OVERO_GPIO_LCD_EN 144 148#define OVERO_GPIO_LCD_EN 144
153#define OVERO_GPIO_LCD_BL 145 149#define OVERO_GPIO_LCD_BL 145
154 150
155static struct gpio overo_dss_gpios[] __initdata = {
156 { OVERO_GPIO_LCD_EN, GPIOF_OUT_INIT_HIGH, "OVERO_GPIO_LCD_EN" },
157 { OVERO_GPIO_LCD_BL, GPIOF_OUT_INIT_HIGH, "OVERO_GPIO_LCD_BL" },
158};
159
160static void __init overo_display_init(void)
161{
162 if (gpio_request_array(overo_dss_gpios, ARRAY_SIZE(overo_dss_gpios))) {
163 printk(KERN_ERR "could not obtain DSS control GPIOs\n");
164 return;
165 }
166
167 gpio_export(OVERO_GPIO_LCD_EN, 0);
168 gpio_export(OVERO_GPIO_LCD_BL, 0);
169}
170
171static struct tfp410_platform_data dvi_panel = { 151static struct tfp410_platform_data dvi_panel = {
172 .i2c_bus_num = 3, 152 .i2c_bus_num = 3,
173 .power_down_gpio = -1, 153 .power_down_gpio = -1,
@@ -188,30 +168,13 @@ static struct omap_dss_device overo_tv_device = {
188 .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO, 168 .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
189}; 169};
190 170
191static int overo_panel_enable_lcd(struct omap_dss_device *dssdev)
192{
193 if (dvi_enabled) {
194 printk(KERN_ERR "cannot enable LCD, DVI is enabled\n");
195 return -EINVAL;
196 }
197
198 gpio_set_value(OVERO_GPIO_LCD_EN, 1);
199 gpio_set_value(OVERO_GPIO_LCD_BL, 1);
200 lcd_enabled = 1;
201 return 0;
202}
203
204static void overo_panel_disable_lcd(struct omap_dss_device *dssdev)
205{
206 gpio_set_value(OVERO_GPIO_LCD_EN, 0);
207 gpio_set_value(OVERO_GPIO_LCD_BL, 0);
208 lcd_enabled = 0;
209}
210
211static struct panel_generic_dpi_data lcd43_panel = { 171static struct panel_generic_dpi_data lcd43_panel = {
212 .name = "samsung_lte430wq_f0c", 172 .name = "samsung_lte430wq_f0c",
213 .platform_enable = overo_panel_enable_lcd, 173 .num_gpios = 2,
214 .platform_disable = overo_panel_disable_lcd, 174 .gpios = {
175 OVERO_GPIO_LCD_EN,
176 OVERO_GPIO_LCD_BL
177 },
215}; 178};
216 179
217static struct omap_dss_device overo_lcd43_device = { 180static struct omap_dss_device overo_lcd43_device = {
@@ -224,13 +187,20 @@ static struct omap_dss_device overo_lcd43_device = {
224 187
225#if defined(CONFIG_PANEL_LGPHILIPS_LB035Q02) || \ 188#if defined(CONFIG_PANEL_LGPHILIPS_LB035Q02) || \
226 defined(CONFIG_PANEL_LGPHILIPS_LB035Q02_MODULE) 189 defined(CONFIG_PANEL_LGPHILIPS_LB035Q02_MODULE)
190static struct panel_generic_dpi_data lcd35_panel = {
191 .num_gpios = 2,
192 .gpios = {
193 OVERO_GPIO_LCD_EN,
194 OVERO_GPIO_LCD_BL
195 },
196};
197
227static struct omap_dss_device overo_lcd35_device = { 198static struct omap_dss_device overo_lcd35_device = {
228 .type = OMAP_DISPLAY_TYPE_DPI, 199 .type = OMAP_DISPLAY_TYPE_DPI,
229 .name = "lcd35", 200 .name = "lcd35",
230 .driver_name = "lgphilips_lb035q02_panel", 201 .driver_name = "lgphilips_lb035q02_panel",
231 .phy.dpi.data_lines = 24, 202 .phy.dpi.data_lines = 24,
232 .platform_enable = overo_panel_enable_lcd, 203 .data = &lcd35_panel,
233 .platform_disable = overo_panel_disable_lcd,
234}; 204};
235#endif 205#endif
236 206
@@ -509,7 +479,6 @@ static void __init overo_init(void)
509 usbhs_init(&usbhs_bdata); 479 usbhs_init(&usbhs_bdata);
510 overo_spi_init(); 480 overo_spi_init();
511 overo_init_smsc911x(); 481 overo_init_smsc911x();
512 overo_display_init();
513 overo_init_led(); 482 overo_init_led();
514 overo_init_keys(); 483 overo_init_keys();
515 omap_twl4030_audio_init("overo", NULL); 484 omap_twl4030_audio_init("overo", NULL);
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c
index 3a077df6b8df..1a884670a6c4 100644
--- a/arch/arm/mach-omap2/board-rx51-peripherals.c
+++ b/arch/arm/mach-omap2/board-rx51-peripherals.c
@@ -547,12 +547,16 @@ static struct regulator_consumer_supply rx51_vio_supplies[] = {
547 REGULATOR_SUPPLY("DVDD", "2-0019"), 547 REGULATOR_SUPPLY("DVDD", "2-0019"),
548 /* Si4713 IO supply */ 548 /* Si4713 IO supply */
549 REGULATOR_SUPPLY("vio", "2-0063"), 549 REGULATOR_SUPPLY("vio", "2-0063"),
550 /* lis3lv02d */
551 REGULATOR_SUPPLY("Vdd_IO", "3-001d"),
550}; 552};
551 553
552static struct regulator_consumer_supply rx51_vaux1_consumers[] = { 554static struct regulator_consumer_supply rx51_vaux1_consumers[] = {
553 REGULATOR_SUPPLY("vdds_sdi", "omapdss"), 555 REGULATOR_SUPPLY("vdds_sdi", "omapdss"),
554 /* Si4713 supply */ 556 /* Si4713 supply */
555 REGULATOR_SUPPLY("vdd", "2-0063"), 557 REGULATOR_SUPPLY("vdd", "2-0063"),
558 /* lis3lv02d */
559 REGULATOR_SUPPLY("Vdd", "3-001d"),
556}; 560};
557 561
558static struct regulator_init_data rx51_vaux1 = { 562static struct regulator_init_data rx51_vaux1 = {
diff --git a/arch/arm/mach-omap2/board-rx51-video.c b/arch/arm/mach-omap2/board-rx51-video.c
index eb667261df08..bd74f9f6063b 100644
--- a/arch/arm/mach-omap2/board-rx51-video.c
+++ b/arch/arm/mach-omap2/board-rx51-video.c
@@ -16,6 +16,8 @@
16#include <linux/mm.h> 16#include <linux/mm.h>
17#include <asm/mach-types.h> 17#include <asm/mach-types.h>
18#include <video/omapdss.h> 18#include <video/omapdss.h>
19#include <video/omap-panel-data.h>
20
19#include <linux/platform_data/spi-omap2-mcspi.h> 21#include <linux/platform_data/spi-omap2-mcspi.h>
20 22
21#include "soc.h" 23#include "soc.h"
@@ -27,25 +29,16 @@
27 29
28#if defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE) 30#if defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE)
29 31
30static int rx51_lcd_enable(struct omap_dss_device *dssdev) 32static struct panel_acx565akm_data lcd_data = {
31{ 33 .reset_gpio = RX51_LCD_RESET_GPIO,
32 gpio_set_value(dssdev->reset_gpio, 1); 34};
33 return 0;
34}
35
36static void rx51_lcd_disable(struct omap_dss_device *dssdev)
37{
38 gpio_set_value(dssdev->reset_gpio, 0);
39}
40 35
41static struct omap_dss_device rx51_lcd_device = { 36static struct omap_dss_device rx51_lcd_device = {
42 .name = "lcd", 37 .name = "lcd",
43 .driver_name = "panel-acx565akm", 38 .driver_name = "panel-acx565akm",
44 .type = OMAP_DISPLAY_TYPE_SDI, 39 .type = OMAP_DISPLAY_TYPE_SDI,
45 .phy.sdi.datapairs = 2, 40 .phy.sdi.datapairs = 2,
46 .reset_gpio = RX51_LCD_RESET_GPIO, 41 .data = &lcd_data,
47 .platform_enable = rx51_lcd_enable,
48 .platform_disable = rx51_lcd_disable,
49}; 42};
50 43
51static struct omap_dss_device rx51_tv_device = { 44static struct omap_dss_device rx51_tv_device = {
@@ -76,13 +69,8 @@ static int __init rx51_video_init(void)
76 return 0; 69 return 0;
77 } 70 }
78 71
79 if (gpio_request_one(RX51_LCD_RESET_GPIO, GPIOF_OUT_INIT_HIGH,
80 "LCD ACX565AKM reset")) {
81 pr_err("%s failed to get LCD Reset GPIO\n", __func__);
82 return 0;
83 }
84
85 omap_display_init(&rx51_dss_board_info); 72 omap_display_init(&rx51_dss_board_info);
73
86 return 0; 74 return 0;
87} 75}
88 76
diff --git a/arch/arm/mach-omap2/board-zoom-display.c b/arch/arm/mach-omap2/board-zoom-display.c
index 8cef477d6b00..c2a079cb76fc 100644
--- a/arch/arm/mach-omap2/board-zoom-display.c
+++ b/arch/arm/mach-omap2/board-zoom-display.c
@@ -12,12 +12,12 @@
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/platform_device.h> 13#include <linux/platform_device.h>
14#include <linux/gpio.h> 14#include <linux/gpio.h>
15#include <linux/i2c/twl.h>
16#include <linux/spi/spi.h> 15#include <linux/spi/spi.h>
17#include <linux/platform_data/spi-omap2-mcspi.h> 16#include <linux/platform_data/spi-omap2-mcspi.h>
18#include <video/omapdss.h> 17#include <video/omapdss.h>
19#include "board-zoom.h" 18#include <video/omap-panel-data.h>
20 19
20#include "board-zoom.h"
21#include "soc.h" 21#include "soc.h"
22#include "common.h" 22#include "common.h"
23 23
@@ -25,92 +25,17 @@
25#define LCD_PANEL_RESET_GPIO_PILOT 55 25#define LCD_PANEL_RESET_GPIO_PILOT 55
26#define LCD_PANEL_QVGA_GPIO 56 26#define LCD_PANEL_QVGA_GPIO 56
27 27
28static struct gpio zoom_lcd_gpios[] __initdata = { 28static struct panel_nec_nl8048_data zoom_lcd_data = {
29 { -EINVAL, GPIOF_OUT_INIT_HIGH, "lcd reset" }, 29 /* res_gpio filled in code */
30 { LCD_PANEL_QVGA_GPIO, GPIOF_OUT_INIT_HIGH, "lcd qvga" }, 30 .qvga_gpio = LCD_PANEL_QVGA_GPIO,
31}; 31};
32 32
33static void __init zoom_lcd_panel_init(void)
34{
35 zoom_lcd_gpios[0].gpio = (omap_rev() > OMAP3430_REV_ES3_0) ?
36 LCD_PANEL_RESET_GPIO_PROD :
37 LCD_PANEL_RESET_GPIO_PILOT;
38
39 if (gpio_request_array(zoom_lcd_gpios, ARRAY_SIZE(zoom_lcd_gpios)))
40 pr_err("%s: Failed to get LCD GPIOs.\n", __func__);
41}
42
43static int zoom_panel_enable_lcd(struct omap_dss_device *dssdev)
44{
45 return 0;
46}
47
48static void zoom_panel_disable_lcd(struct omap_dss_device *dssdev)
49{
50}
51
52/* Register offsets in TWL4030_MODULE_INTBR */
53#define TWL_INTBR_PMBR1 0xD
54#define TWL_INTBR_GPBR1 0xC
55
56/* Register offsets in TWL_MODULE_PWM */
57#define TWL_LED_PWMON 0x3
58#define TWL_LED_PWMOFF 0x4
59
60static int zoom_set_bl_intensity(struct omap_dss_device *dssdev, int level)
61{
62#ifdef CONFIG_TWL4030_CORE
63 unsigned char c;
64 u8 mux_pwm, enb_pwm;
65
66 if (level > 100)
67 return -1;
68
69 twl_i2c_read_u8(TWL4030_MODULE_INTBR, &mux_pwm, TWL_INTBR_PMBR1);
70 twl_i2c_read_u8(TWL4030_MODULE_INTBR, &enb_pwm, TWL_INTBR_GPBR1);
71
72 if (level == 0) {
73 /* disable pwm1 output and clock */
74 enb_pwm = enb_pwm & 0xF5;
75 /* change pwm1 pin to gpio pin */
76 mux_pwm = mux_pwm & 0xCF;
77 twl_i2c_write_u8(TWL4030_MODULE_INTBR,
78 enb_pwm, TWL_INTBR_GPBR1);
79 twl_i2c_write_u8(TWL4030_MODULE_INTBR,
80 mux_pwm, TWL_INTBR_PMBR1);
81 return 0;
82 }
83
84 if (!((enb_pwm & 0xA) && (mux_pwm & 0x30))) {
85 /* change gpio pin to pwm1 pin */
86 mux_pwm = mux_pwm | 0x30;
87 /* enable pwm1 output and clock*/
88 enb_pwm = enb_pwm | 0x0A;
89 twl_i2c_write_u8(TWL4030_MODULE_INTBR,
90 mux_pwm, TWL_INTBR_PMBR1);
91 twl_i2c_write_u8(TWL4030_MODULE_INTBR,
92 enb_pwm, TWL_INTBR_GPBR1);
93 }
94
95 c = ((50 * (100 - level)) / 100) + 1;
96 twl_i2c_write_u8(TWL_MODULE_PWM, 0x7F, TWL_LED_PWMOFF);
97 twl_i2c_write_u8(TWL_MODULE_PWM, c, TWL_LED_PWMON);
98#else
99 pr_warn("Backlight not enabled\n");
100#endif
101
102 return 0;
103}
104
105static struct omap_dss_device zoom_lcd_device = { 33static struct omap_dss_device zoom_lcd_device = {
106 .name = "lcd", 34 .name = "lcd",
107 .driver_name = "NEC_8048_panel", 35 .driver_name = "NEC_8048_panel",
108 .type = OMAP_DISPLAY_TYPE_DPI, 36 .type = OMAP_DISPLAY_TYPE_DPI,
109 .phy.dpi.data_lines = 24, 37 .phy.dpi.data_lines = 24,
110 .platform_enable = zoom_panel_enable_lcd, 38 .data = &zoom_lcd_data,
111 .platform_disable = zoom_panel_disable_lcd,
112 .max_backlight_level = 100,
113 .set_backlight = zoom_set_bl_intensity,
114}; 39};
115 40
116static struct omap_dss_device *zoom_dss_devices[] = { 41static struct omap_dss_device *zoom_dss_devices[] = {
@@ -123,6 +48,13 @@ static struct omap_dss_board_info zoom_dss_data = {
123 .default_device = &zoom_lcd_device, 48 .default_device = &zoom_lcd_device,
124}; 49};
125 50
51static void __init zoom_lcd_panel_init(void)
52{
53 zoom_lcd_data.res_gpio = (omap_rev() > OMAP3430_REV_ES3_0) ?
54 LCD_PANEL_RESET_GPIO_PROD :
55 LCD_PANEL_RESET_GPIO_PILOT;
56}
57
126static struct omap2_mcspi_device_config dss_lcd_mcspi_config = { 58static struct omap2_mcspi_device_config dss_lcd_mcspi_config = {
127 .turbo_mode = 1, 59 .turbo_mode = 1,
128}; 60};
diff --git a/arch/arm/mach-omap2/board-zoom-peripherals.c b/arch/arm/mach-omap2/board-zoom-peripherals.c
index cdc0c1021863..a90375d5b2b6 100644
--- a/arch/arm/mach-omap2/board-zoom-peripherals.c
+++ b/arch/arm/mach-omap2/board-zoom-peripherals.c
@@ -22,6 +22,9 @@
22#include <linux/platform_data/gpio-omap.h> 22#include <linux/platform_data/gpio-omap.h>
23#include <linux/platform_data/omap-twl4030.h> 23#include <linux/platform_data/omap-twl4030.h>
24#include <linux/usb/phy.h> 24#include <linux/usb/phy.h>
25#include <linux/pwm.h>
26#include <linux/leds_pwm.h>
27#include <linux/pwm_backlight.h>
25 28
26#include <asm/mach-types.h> 29#include <asm/mach-types.h>
27#include <asm/mach/arch.h> 30#include <asm/mach/arch.h>
@@ -193,6 +196,53 @@ static struct platform_device omap_vwlan_device = {
193 }, 196 },
194}; 197};
195 198
199static struct pwm_lookup zoom_pwm_lookup[] = {
200 PWM_LOOKUP("twl-pwm", 0, "leds_pwm", "zoom::keypad"),
201 PWM_LOOKUP("twl-pwm", 1, "pwm-backlight", "backlight"),
202};
203
204static struct led_pwm zoom_pwm_leds[] = {
205 {
206 .name = "zoom::keypad",
207 .max_brightness = 127,
208 .pwm_period_ns = 7812500,
209 },
210};
211
212static struct led_pwm_platform_data zoom_pwm_data = {
213 .num_leds = ARRAY_SIZE(zoom_pwm_leds),
214 .leds = zoom_pwm_leds,
215};
216
217static struct platform_device zoom_leds_pwm = {
218 .name = "leds_pwm",
219 .id = -1,
220 .dev = {
221 .platform_data = &zoom_pwm_data,
222 },
223};
224
225static struct platform_pwm_backlight_data zoom_backlight_data = {
226 .pwm_id = 1,
227 .max_brightness = 127,
228 .dft_brightness = 127,
229 .pwm_period_ns = 7812500,
230};
231
232static struct platform_device zoom_backlight_pwm = {
233 .name = "pwm-backlight",
234 .id = -1,
235 .dev = {
236 .platform_data = &zoom_backlight_data,
237 },
238};
239
240static struct platform_device *zoom_devices[] __initdata = {
241 &omap_vwlan_device,
242 &zoom_leds_pwm,
243 &zoom_backlight_pwm,
244};
245
196static struct wl12xx_platform_data omap_zoom_wlan_data __initdata = { 246static struct wl12xx_platform_data omap_zoom_wlan_data __initdata = {
197 .board_ref_clock = WL12XX_REFCLOCK_26, /* 26 MHz */ 247 .board_ref_clock = WL12XX_REFCLOCK_26, /* 26 MHz */
198}; 248};
@@ -301,7 +351,8 @@ void __init zoom_peripherals_init(void)
301 351
302 omap_hsmmc_init(mmc); 352 omap_hsmmc_init(mmc);
303 omap_i2c_init(); 353 omap_i2c_init();
304 platform_device_register(&omap_vwlan_device); 354 pwm_add_table(zoom_pwm_lookup, ARRAY_SIZE(zoom_pwm_lookup));
355 platform_add_devices(zoom_devices, ARRAY_SIZE(zoom_devices));
305 usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb"); 356 usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb");
306 usb_musb_init(NULL); 357 usb_musb_init(NULL);
307 enable_board_wakeup_source(); 358 enable_board_wakeup_source();
diff --git a/arch/arm/mach-omap2/cclock44xx_data.c b/arch/arm/mach-omap2/cclock44xx_data.c
index 3d58f335f173..0c6834ae1fc4 100644
--- a/arch/arm/mach-omap2/cclock44xx_data.c
+++ b/arch/arm/mach-omap2/cclock44xx_data.c
@@ -52,6 +52,13 @@
52 */ 52 */
53#define OMAP4_DPLL_ABE_DEFFREQ 98304000 53#define OMAP4_DPLL_ABE_DEFFREQ 98304000
54 54
55/*
56 * OMAP4 USB DPLL default frequency. In OMAP4430 TRM version V, section
57 * "3.6.3.9.5 DPLL_USB Preferred Settings" shows that the preferred
58 * locked frequency for the USB DPLL is 960MHz.
59 */
60#define OMAP4_DPLL_USB_DEFFREQ 960000000
61
55/* Root clocks */ 62/* Root clocks */
56 63
57DEFINE_CLK_FIXED_RATE(extalt_clkin_ck, CLK_IS_ROOT, 59000000, 0x0); 64DEFINE_CLK_FIXED_RATE(extalt_clkin_ck, CLK_IS_ROOT, 59000000, 0x0);
@@ -1011,6 +1018,10 @@ DEFINE_CLK_OMAP_MUX(hsmmc2_fclk, "l3_init_clkdm", hsmmc1_fclk_sel,
1011 OMAP4430_CM_L3INIT_MMC2_CLKCTRL, OMAP4430_CLKSEL_MASK, 1018 OMAP4430_CM_L3INIT_MMC2_CLKCTRL, OMAP4430_CLKSEL_MASK,
1012 hsmmc1_fclk_parents, func_dmic_abe_gfclk_ops); 1019 hsmmc1_fclk_parents, func_dmic_abe_gfclk_ops);
1013 1020
1021DEFINE_CLK_GATE(ocp2scp_usb_phy_phy_48m, "func_48m_fclk", &func_48m_fclk, 0x0,
1022 OMAP4430_CM_L3INIT_USBPHYOCP2SCP_CLKCTRL,
1023 OMAP4430_OPTFCLKEN_PHY_48M_SHIFT, 0x0, NULL);
1024
1014DEFINE_CLK_GATE(sha2md5_fck, "l3_div_ck", &l3_div_ck, 0x0, 1025DEFINE_CLK_GATE(sha2md5_fck, "l3_div_ck", &l3_div_ck, 0x0,
1015 OMAP4430_CM_L4SEC_SHA2MD51_CLKCTRL, 1026 OMAP4430_CM_L4SEC_SHA2MD51_CLKCTRL,
1016 OMAP4430_MODULEMODE_SWCTRL_SHIFT, 0x0, NULL); 1027 OMAP4430_MODULEMODE_SWCTRL_SHIFT, 0x0, NULL);
@@ -1538,6 +1549,7 @@ static struct omap_clk omap44xx_clks[] = {
1538 CLK(NULL, "per_mcbsp4_gfclk", &per_mcbsp4_gfclk, CK_443X), 1549 CLK(NULL, "per_mcbsp4_gfclk", &per_mcbsp4_gfclk, CK_443X),
1539 CLK(NULL, "hsmmc1_fclk", &hsmmc1_fclk, CK_443X), 1550 CLK(NULL, "hsmmc1_fclk", &hsmmc1_fclk, CK_443X),
1540 CLK(NULL, "hsmmc2_fclk", &hsmmc2_fclk, CK_443X), 1551 CLK(NULL, "hsmmc2_fclk", &hsmmc2_fclk, CK_443X),
1552 CLK(NULL, "ocp2scp_usb_phy_phy_48m", &ocp2scp_usb_phy_phy_48m, CK_443X),
1541 CLK(NULL, "sha2md5_fck", &sha2md5_fck, CK_443X), 1553 CLK(NULL, "sha2md5_fck", &sha2md5_fck, CK_443X),
1542 CLK(NULL, "slimbus1_fclk_1", &slimbus1_fclk_1, CK_443X), 1554 CLK(NULL, "slimbus1_fclk_1", &slimbus1_fclk_1, CK_443X),
1543 CLK(NULL, "slimbus1_fclk_0", &slimbus1_fclk_0, CK_443X), 1555 CLK(NULL, "slimbus1_fclk_0", &slimbus1_fclk_0, CK_443X),
@@ -1705,5 +1717,13 @@ int __init omap4xxx_clk_init(void)
1705 if (rc) 1717 if (rc)
1706 pr_err("%s: failed to configure ABE DPLL!\n", __func__); 1718 pr_err("%s: failed to configure ABE DPLL!\n", __func__);
1707 1719
1720 /*
1721 * Lock USB DPLL on OMAP4 devices so that the L3INIT power
1722 * domain can transition to retention state when not in use.
1723 */
1724 rc = clk_set_rate(&dpll_usb_ck, OMAP4_DPLL_USB_DEFFREQ);
1725 if (rc)
1726 pr_err("%s: failed to configure USB DPLL!\n", __func__);
1727
1708 return 0; 1728 return 0;
1709} 1729}
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
index bf70e2b57ff8..272490e72ee0 100644
--- a/arch/arm/mach-omap2/common.h
+++ b/arch/arm/mach-omap2/common.h
@@ -292,5 +292,8 @@ extern void omap_reserve(void);
292struct omap_hwmod; 292struct omap_hwmod;
293extern int omap_dss_reset(struct omap_hwmod *); 293extern int omap_dss_reset(struct omap_hwmod *);
294 294
295/* SoC specific clock initializer */
296extern int (*omap_clk_init)(void);
297
295#endif /* __ASSEMBLER__ */ 298#endif /* __ASSEMBLER__ */
296#endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */ 299#endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */
diff --git a/arch/arm/mach-omap2/dss-common.c b/arch/arm/mach-omap2/dss-common.c
index 4be5cfc81ab8..393aeefaebb0 100644
--- a/arch/arm/mach-omap2/dss-common.c
+++ b/arch/arm/mach-omap2/dss-common.c
@@ -27,9 +27,7 @@
27#include <linux/gpio.h> 27#include <linux/gpio.h>
28 28
29#include <video/omapdss.h> 29#include <video/omapdss.h>
30#include <video/omap-panel-tfp410.h> 30#include <video/omap-panel-data.h>
31#include <video/omap-panel-nokia-dsi.h>
32#include <video/omap-panel-picodlp.h>
33 31
34#include "soc.h" 32#include "soc.h"
35#include "dss-common.h" 33#include "dss-common.h"
@@ -54,7 +52,6 @@ static struct omap_dss_device omap4_panda_dvi_device = {
54 .driver_name = "tfp410", 52 .driver_name = "tfp410",
55 .data = &omap4_dvi_panel, 53 .data = &omap4_dvi_panel,
56 .phy.dpi.data_lines = 24, 54 .phy.dpi.data_lines = 24,
57 .reset_gpio = PANDA_DVI_TFP410_POWER_DOWN_GPIO,
58 .channel = OMAP_DSS_CHANNEL_LCD2, 55 .channel = OMAP_DSS_CHANNEL_LCD2,
59}; 56};
60 57
@@ -179,45 +176,12 @@ static struct picodlp_panel_data sdp4430_picodlp_pdata = {
179 .pwrgood_gpio = 45, 176 .pwrgood_gpio = 45,
180}; 177};
181 178
182static void sdp4430_picodlp_init(void)
183{
184 int r;
185 const struct gpio picodlp_gpios[] = {
186 {DLP_POWER_ON_GPIO, GPIOF_OUT_INIT_LOW,
187 "DLP POWER ON"},
188 {sdp4430_picodlp_pdata.emu_done_gpio, GPIOF_IN,
189 "DLP EMU DONE"},
190 {sdp4430_picodlp_pdata.pwrgood_gpio, GPIOF_OUT_INIT_LOW,
191 "DLP PWRGOOD"},
192 };
193
194 r = gpio_request_array(picodlp_gpios, ARRAY_SIZE(picodlp_gpios));
195 if (r)
196 pr_err("Cannot request PicoDLP GPIOs, error %d\n", r);
197}
198
199static int sdp4430_panel_enable_picodlp(struct omap_dss_device *dssdev)
200{
201 gpio_set_value(DISPLAY_SEL_GPIO, 0);
202 gpio_set_value(DLP_POWER_ON_GPIO, 1);
203
204 return 0;
205}
206
207static void sdp4430_panel_disable_picodlp(struct omap_dss_device *dssdev)
208{
209 gpio_set_value(DLP_POWER_ON_GPIO, 0);
210 gpio_set_value(DISPLAY_SEL_GPIO, 1);
211}
212
213static struct omap_dss_device sdp4430_picodlp_device = { 179static struct omap_dss_device sdp4430_picodlp_device = {
214 .name = "picodlp", 180 .name = "picodlp",
215 .driver_name = "picodlp_panel", 181 .driver_name = "picodlp_panel",
216 .type = OMAP_DISPLAY_TYPE_DPI, 182 .type = OMAP_DISPLAY_TYPE_DPI,
217 .phy.dpi.data_lines = 24, 183 .phy.dpi.data_lines = 24,
218 .channel = OMAP_DSS_CHANNEL_LCD2, 184 .channel = OMAP_DSS_CHANNEL_LCD2,
219 .platform_enable = sdp4430_panel_enable_picodlp,
220 .platform_disable = sdp4430_panel_disable_picodlp,
221 .data = &sdp4430_picodlp_pdata, 185 .data = &sdp4430_picodlp_pdata,
222}; 186};
223 187
@@ -234,17 +198,26 @@ static struct omap_dss_board_info sdp4430_dss_data = {
234 .default_device = &sdp4430_lcd_device, 198 .default_device = &sdp4430_lcd_device,
235}; 199};
236 200
201/*
202 * we select LCD2 by default (instead of Pico DLP) by setting DISPLAY_SEL_GPIO.
203 * Setting DLP_POWER_ON gpio enables the VDLP_2V5 VDLP_1V8 and VDLP_1V0 rails
204 * used by picodlp on the 4430sdp platform. Keep this gpio disabled as LCD2 is
205 * selected by default
206 */
237void __init omap_4430sdp_display_init(void) 207void __init omap_4430sdp_display_init(void)
238{ 208{
239 int r; 209 int r;
240 210
241 /* Enable LCD2 by default (instead of Pico DLP) */
242 r = gpio_request_one(DISPLAY_SEL_GPIO, GPIOF_OUT_INIT_HIGH, 211 r = gpio_request_one(DISPLAY_SEL_GPIO, GPIOF_OUT_INIT_HIGH,
243 "display_sel"); 212 "display_sel");
244 if (r) 213 if (r)
245 pr_err("%s: Could not get display_sel GPIO\n", __func__); 214 pr_err("%s: Could not get display_sel GPIO\n", __func__);
246 215
247 sdp4430_picodlp_init(); 216 r = gpio_request_one(DLP_POWER_ON_GPIO, GPIOF_OUT_INIT_LOW,
217 "DLP POWER ON");
218 if (r)
219 pr_err("%s: Could not get DLP POWER ON GPIO\n", __func__);
220
248 omap_display_init(&sdp4430_dss_data); 221 omap_display_init(&sdp4430_dss_data);
249 /* 222 /*
250 * OMAP4460SDP/Blaze and OMAP4430 ES2.3 SDP/Blaze boards and 223 * OMAP4460SDP/Blaze and OMAP4430 ES2.3 SDP/Blaze boards and
@@ -264,12 +237,15 @@ void __init omap_4430sdp_display_init_of(void)
264{ 237{
265 int r; 238 int r;
266 239
267 /* Enable LCD2 by default (instead of Pico DLP) */
268 r = gpio_request_one(DISPLAY_SEL_GPIO, GPIOF_OUT_INIT_HIGH, 240 r = gpio_request_one(DISPLAY_SEL_GPIO, GPIOF_OUT_INIT_HIGH,
269 "display_sel"); 241 "display_sel");
270 if (r) 242 if (r)
271 pr_err("%s: Could not get display_sel GPIO\n", __func__); 243 pr_err("%s: Could not get display_sel GPIO\n", __func__);
272 244
273 sdp4430_picodlp_init(); 245 r = gpio_request_one(DLP_POWER_ON_GPIO, GPIOF_OUT_INIT_LOW,
246 "DLP POWER ON");
247 if (r)
248 pr_err("%s: Could not get DLP POWER ON GPIO\n", __func__);
249
274 omap_display_init(&sdp4430_dss_data); 250 omap_display_init(&sdp4430_dss_data);
275} 251}
diff --git a/arch/arm/mach-omap2/gpmc-nand.c b/arch/arm/mach-omap2/gpmc-nand.c
index afc1e8c32d6c..d9c27195caf0 100644
--- a/arch/arm/mach-omap2/gpmc-nand.c
+++ b/arch/arm/mach-omap2/gpmc-nand.c
@@ -74,14 +74,6 @@ static int omap2_nand_gpmc_retime(
74 t.cs_wr_off = gpmc_t->cs_wr_off; 74 t.cs_wr_off = gpmc_t->cs_wr_off;
75 t.wr_cycle = gpmc_t->wr_cycle; 75 t.wr_cycle = gpmc_t->wr_cycle;
76 76
77 /* Configure GPMC */
78 if (gpmc_nand_data->devsize == NAND_BUSWIDTH_16)
79 gpmc_cs_configure(gpmc_nand_data->cs, GPMC_CONFIG_DEV_SIZE, 1);
80 else
81 gpmc_cs_configure(gpmc_nand_data->cs, GPMC_CONFIG_DEV_SIZE, 0);
82 gpmc_cs_configure(gpmc_nand_data->cs,
83 GPMC_CONFIG_DEV_TYPE, GPMC_DEVICETYPE_NAND);
84 gpmc_cs_configure(gpmc_nand_data->cs, GPMC_CONFIG_WP, 0);
85 err = gpmc_cs_set_timings(gpmc_nand_data->cs, &t); 77 err = gpmc_cs_set_timings(gpmc_nand_data->cs, &t);
86 if (err) 78 if (err)
87 return err; 79 return err;
@@ -115,14 +107,18 @@ int gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data,
115 struct gpmc_timings *gpmc_t) 107 struct gpmc_timings *gpmc_t)
116{ 108{
117 int err = 0; 109 int err = 0;
110 struct gpmc_settings s;
118 struct device *dev = &gpmc_nand_device.dev; 111 struct device *dev = &gpmc_nand_device.dev;
119 112
113 memset(&s, 0, sizeof(struct gpmc_settings));
114
120 gpmc_nand_device.dev.platform_data = gpmc_nand_data; 115 gpmc_nand_device.dev.platform_data = gpmc_nand_data;
121 116
122 err = gpmc_cs_request(gpmc_nand_data->cs, NAND_IO_SIZE, 117 err = gpmc_cs_request(gpmc_nand_data->cs, NAND_IO_SIZE,
123 (unsigned long *)&gpmc_nand_resource[0].start); 118 (unsigned long *)&gpmc_nand_resource[0].start);
124 if (err < 0) { 119 if (err < 0) {
125 dev_err(dev, "Cannot request GPMC CS\n"); 120 dev_err(dev, "Cannot request GPMC CS %d, error %d\n",
121 gpmc_nand_data->cs, err);
126 return err; 122 return err;
127 } 123 }
128 124
@@ -140,11 +136,31 @@ int gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data,
140 dev_err(dev, "Unable to set gpmc timings: %d\n", err); 136 dev_err(dev, "Unable to set gpmc timings: %d\n", err);
141 return err; 137 return err;
142 } 138 }
143 }
144 139
145 /* Enable RD PIN Monitoring Reg */ 140 if (gpmc_nand_data->of_node) {
146 if (gpmc_nand_data->dev_ready) { 141 gpmc_read_settings_dt(gpmc_nand_data->of_node, &s);
147 gpmc_cs_configure(gpmc_nand_data->cs, GPMC_CONFIG_RDY_BSY, 1); 142 } else {
143 s.device_nand = true;
144
145 /* Enable RD PIN Monitoring Reg */
146 if (gpmc_nand_data->dev_ready) {
147 s.wait_on_read = true;
148 s.wait_on_write = true;
149 }
150 }
151
152 if (gpmc_nand_data->devsize == NAND_BUSWIDTH_16)
153 s.device_width = GPMC_DEVWIDTH_16BIT;
154 else
155 s.device_width = GPMC_DEVWIDTH_8BIT;
156
157 err = gpmc_cs_program_settings(gpmc_nand_data->cs, &s);
158 if (err < 0)
159 goto out_free_cs;
160
161 err = gpmc_configure(GPMC_CONFIG_WP, 0);
162 if (err < 0)
163 goto out_free_cs;
148 } 164 }
149 165
150 gpmc_update_nand_reg(&gpmc_nand_data->reg, gpmc_nand_data->cs); 166 gpmc_update_nand_reg(&gpmc_nand_data->reg, gpmc_nand_data->cs);
diff --git a/arch/arm/mach-omap2/gpmc-onenand.c b/arch/arm/mach-omap2/gpmc-onenand.c
index 0d75889c0a6f..64b5a8346982 100644
--- a/arch/arm/mach-omap2/gpmc-onenand.c
+++ b/arch/arm/mach-omap2/gpmc-onenand.c
@@ -47,11 +47,23 @@ static struct platform_device gpmc_onenand_device = {
47 .resource = &gpmc_onenand_resource, 47 .resource = &gpmc_onenand_resource,
48}; 48};
49 49
50static struct gpmc_timings omap2_onenand_calc_async_timings(void) 50static struct gpmc_settings onenand_async = {
51 .device_width = GPMC_DEVWIDTH_16BIT,
52 .mux_add_data = GPMC_MUX_AD,
53};
54
55static struct gpmc_settings onenand_sync = {
56 .burst_read = true,
57 .burst_wrap = true,
58 .burst_len = GPMC_BURST_16,
59 .device_width = GPMC_DEVWIDTH_16BIT,
60 .mux_add_data = GPMC_MUX_AD,
61 .wait_pin = 0,
62};
63
64static void omap2_onenand_calc_async_timings(struct gpmc_timings *t)
51{ 65{
52 struct gpmc_device_timings dev_t; 66 struct gpmc_device_timings dev_t;
53 struct gpmc_timings t;
54
55 const int t_cer = 15; 67 const int t_cer = 15;
56 const int t_avdp = 12; 68 const int t_avdp = 12;
57 const int t_aavdh = 7; 69 const int t_aavdh = 7;
@@ -64,7 +76,6 @@ static struct gpmc_timings omap2_onenand_calc_async_timings(void)
64 76
65 memset(&dev_t, 0, sizeof(dev_t)); 77 memset(&dev_t, 0, sizeof(dev_t));
66 78
67 dev_t.mux = true;
68 dev_t.t_avdp_r = max_t(int, t_avdp, t_cer) * 1000; 79 dev_t.t_avdp_r = max_t(int, t_avdp, t_cer) * 1000;
69 dev_t.t_avdp_w = dev_t.t_avdp_r; 80 dev_t.t_avdp_w = dev_t.t_avdp_r;
70 dev_t.t_aavdh = t_aavdh * 1000; 81 dev_t.t_aavdh = t_aavdh * 1000;
@@ -76,19 +87,7 @@ static struct gpmc_timings omap2_onenand_calc_async_timings(void)
76 dev_t.t_wpl = t_wpl * 1000; 87 dev_t.t_wpl = t_wpl * 1000;
77 dev_t.t_wph = t_wph * 1000; 88 dev_t.t_wph = t_wph * 1000;
78 89
79 gpmc_calc_timings(&t, &dev_t); 90 gpmc_calc_timings(t, &onenand_async, &dev_t);
80
81 return t;
82}
83
84static int gpmc_set_async_mode(int cs, struct gpmc_timings *t)
85{
86 /* Configure GPMC for asynchronous read */
87 gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1,
88 GPMC_CONFIG1_DEVICESIZE_16 |
89 GPMC_CONFIG1_MUXADDDATA);
90
91 return gpmc_cs_set_timings(cs, t);
92} 91}
93 92
94static void omap2_onenand_set_async_mode(void __iomem *onenand_base) 93static void omap2_onenand_set_async_mode(void __iomem *onenand_base)
@@ -158,12 +157,11 @@ static int omap2_onenand_get_freq(struct omap_onenand_platform_data *cfg,
158 return freq; 157 return freq;
159} 158}
160 159
161static struct gpmc_timings 160static void omap2_onenand_calc_sync_timings(struct gpmc_timings *t,
162omap2_onenand_calc_sync_timings(struct omap_onenand_platform_data *cfg, 161 unsigned int flags,
163 int freq) 162 int freq)
164{ 163{
165 struct gpmc_device_timings dev_t; 164 struct gpmc_device_timings dev_t;
166 struct gpmc_timings t;
167 const int t_cer = 15; 165 const int t_cer = 15;
168 const int t_avdp = 12; 166 const int t_avdp = 12;
169 const int t_cez = 20; /* max of t_cez, t_oez */ 167 const int t_cez = 20; /* max of t_cez, t_oez */
@@ -172,9 +170,9 @@ omap2_onenand_calc_sync_timings(struct omap_onenand_platform_data *cfg,
172 int min_gpmc_clk_period, t_ces, t_avds, t_avdh, t_ach, t_aavdh, t_rdyo; 170 int min_gpmc_clk_period, t_ces, t_avds, t_avdh, t_ach, t_aavdh, t_rdyo;
173 int div, gpmc_clk_ns; 171 int div, gpmc_clk_ns;
174 172
175 if (cfg->flags & ONENAND_SYNC_READ) 173 if (flags & ONENAND_SYNC_READ)
176 onenand_flags = ONENAND_FLAG_SYNCREAD; 174 onenand_flags = ONENAND_FLAG_SYNCREAD;
177 else if (cfg->flags & ONENAND_SYNC_READWRITE) 175 else if (flags & ONENAND_SYNC_READWRITE)
178 onenand_flags = ONENAND_FLAG_SYNCREAD | ONENAND_FLAG_SYNCWRITE; 176 onenand_flags = ONENAND_FLAG_SYNCREAD | ONENAND_FLAG_SYNCWRITE;
179 177
180 switch (freq) { 178 switch (freq) {
@@ -239,10 +237,11 @@ omap2_onenand_calc_sync_timings(struct omap_onenand_platform_data *cfg,
239 /* Set synchronous read timings */ 237 /* Set synchronous read timings */
240 memset(&dev_t, 0, sizeof(dev_t)); 238 memset(&dev_t, 0, sizeof(dev_t));
241 239
242 dev_t.mux = true; 240 if (onenand_flags & ONENAND_FLAG_SYNCREAD)
243 dev_t.sync_read = true; 241 onenand_sync.sync_read = true;
244 if (onenand_flags & ONENAND_FLAG_SYNCWRITE) { 242 if (onenand_flags & ONENAND_FLAG_SYNCWRITE) {
245 dev_t.sync_write = true; 243 onenand_sync.sync_write = true;
244 onenand_sync.burst_write = true;
246 } else { 245 } else {
247 dev_t.t_avdp_w = max(t_avdp, t_cer) * 1000; 246 dev_t.t_avdp_w = max(t_avdp, t_cer) * 1000;
248 dev_t.t_wpl = t_wpl * 1000; 247 dev_t.t_wpl = t_wpl * 1000;
@@ -265,32 +264,7 @@ omap2_onenand_calc_sync_timings(struct omap_onenand_platform_data *cfg,
265 dev_t.cyc_aavdh_oe = 1; 264 dev_t.cyc_aavdh_oe = 1;
266 dev_t.t_rdyo = t_rdyo * 1000 + min_gpmc_clk_period; 265 dev_t.t_rdyo = t_rdyo * 1000 + min_gpmc_clk_period;
267 266
268 gpmc_calc_timings(&t, &dev_t); 267 gpmc_calc_timings(t, &onenand_sync, &dev_t);
269
270 return t;
271}
272
273static int gpmc_set_sync_mode(int cs, struct gpmc_timings *t)
274{
275 unsigned sync_read = onenand_flags & ONENAND_FLAG_SYNCREAD;
276 unsigned sync_write = onenand_flags & ONENAND_FLAG_SYNCWRITE;
277
278 /* Configure GPMC for synchronous read */
279 gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1,
280 GPMC_CONFIG1_WRAPBURST_SUPP |
281 GPMC_CONFIG1_READMULTIPLE_SUPP |
282 (sync_read ? GPMC_CONFIG1_READTYPE_SYNC : 0) |
283 (sync_write ? GPMC_CONFIG1_WRITEMULTIPLE_SUPP : 0) |
284 (sync_write ? GPMC_CONFIG1_WRITETYPE_SYNC : 0) |
285 GPMC_CONFIG1_PAGE_LEN(2) |
286 (cpu_is_omap34xx() ? 0 :
287 (GPMC_CONFIG1_WAIT_READ_MON |
288 GPMC_CONFIG1_WAIT_PIN_SEL(0))) |
289 GPMC_CONFIG1_DEVICESIZE_16 |
290 GPMC_CONFIG1_DEVICETYPE_NOR |
291 GPMC_CONFIG1_MUXADDDATA);
292
293 return gpmc_cs_set_timings(cs, t);
294} 268}
295 269
296static int omap2_onenand_setup_async(void __iomem *onenand_base) 270static int omap2_onenand_setup_async(void __iomem *onenand_base)
@@ -298,11 +272,19 @@ static int omap2_onenand_setup_async(void __iomem *onenand_base)
298 struct gpmc_timings t; 272 struct gpmc_timings t;
299 int ret; 273 int ret;
300 274
275 if (gpmc_onenand_data->of_node)
276 gpmc_read_settings_dt(gpmc_onenand_data->of_node,
277 &onenand_async);
278
301 omap2_onenand_set_async_mode(onenand_base); 279 omap2_onenand_set_async_mode(onenand_base);
302 280
303 t = omap2_onenand_calc_async_timings(); 281 omap2_onenand_calc_async_timings(&t);
282
283 ret = gpmc_cs_program_settings(gpmc_onenand_data->cs, &onenand_async);
284 if (ret < 0)
285 return ret;
304 286
305 ret = gpmc_set_async_mode(gpmc_onenand_data->cs, &t); 287 ret = gpmc_cs_set_timings(gpmc_onenand_data->cs, &t);
306 if (ret < 0) 288 if (ret < 0)
307 return ret; 289 return ret;
308 290
@@ -322,9 +304,25 @@ static int omap2_onenand_setup_sync(void __iomem *onenand_base, int *freq_ptr)
322 set_onenand_cfg(onenand_base); 304 set_onenand_cfg(onenand_base);
323 } 305 }
324 306
325 t = omap2_onenand_calc_sync_timings(gpmc_onenand_data, freq); 307 if (gpmc_onenand_data->of_node) {
308 gpmc_read_settings_dt(gpmc_onenand_data->of_node,
309 &onenand_sync);
310 } else {
311 /*
312 * FIXME: Appears to be legacy code from initial ONENAND commit.
313 * Unclear what boards this is for and if this can be removed.
314 */
315 if (!cpu_is_omap34xx())
316 onenand_sync.wait_on_read = true;
317 }
326 318
327 ret = gpmc_set_sync_mode(gpmc_onenand_data->cs, &t); 319 omap2_onenand_calc_sync_timings(&t, gpmc_onenand_data->flags, freq);
320
321 ret = gpmc_cs_program_settings(gpmc_onenand_data->cs, &onenand_sync);
322 if (ret < 0)
323 return ret;
324
325 ret = gpmc_cs_set_timings(gpmc_onenand_data->cs, &t);
328 if (ret < 0) 326 if (ret < 0)
329 return ret; 327 return ret;
330 328
@@ -359,6 +357,7 @@ static int gpmc_onenand_setup(void __iomem *onenand_base, int *freq_ptr)
359void gpmc_onenand_init(struct omap_onenand_platform_data *_onenand_data) 357void gpmc_onenand_init(struct omap_onenand_platform_data *_onenand_data)
360{ 358{
361 int err; 359 int err;
360 struct device *dev = &gpmc_onenand_device.dev;
362 361
363 gpmc_onenand_data = _onenand_data; 362 gpmc_onenand_data = _onenand_data;
364 gpmc_onenand_data->onenand_setup = gpmc_onenand_setup; 363 gpmc_onenand_data->onenand_setup = gpmc_onenand_setup;
@@ -366,7 +365,7 @@ void gpmc_onenand_init(struct omap_onenand_platform_data *_onenand_data)
366 365
367 if (cpu_is_omap24xx() && 366 if (cpu_is_omap24xx() &&
368 (gpmc_onenand_data->flags & ONENAND_SYNC_READWRITE)) { 367 (gpmc_onenand_data->flags & ONENAND_SYNC_READWRITE)) {
369 printk(KERN_ERR "Onenand using only SYNC_READ on 24xx\n"); 368 dev_warn(dev, "OneNAND using only SYNC_READ on 24xx\n");
370 gpmc_onenand_data->flags &= ~ONENAND_SYNC_READWRITE; 369 gpmc_onenand_data->flags &= ~ONENAND_SYNC_READWRITE;
371 gpmc_onenand_data->flags |= ONENAND_SYNC_READ; 370 gpmc_onenand_data->flags |= ONENAND_SYNC_READ;
372 } 371 }
@@ -379,7 +378,8 @@ void gpmc_onenand_init(struct omap_onenand_platform_data *_onenand_data)
379 err = gpmc_cs_request(gpmc_onenand_data->cs, ONENAND_IO_SIZE, 378 err = gpmc_cs_request(gpmc_onenand_data->cs, ONENAND_IO_SIZE,
380 (unsigned long *)&gpmc_onenand_resource.start); 379 (unsigned long *)&gpmc_onenand_resource.start);
381 if (err < 0) { 380 if (err < 0) {
382 pr_err("%s: Cannot request GPMC CS\n", __func__); 381 dev_err(dev, "Cannot request GPMC CS %d, error %d\n",
382 gpmc_onenand_data->cs, err);
383 return; 383 return;
384 } 384 }
385 385
@@ -387,7 +387,7 @@ void gpmc_onenand_init(struct omap_onenand_platform_data *_onenand_data)
387 ONENAND_IO_SIZE - 1; 387 ONENAND_IO_SIZE - 1;
388 388
389 if (platform_device_register(&gpmc_onenand_device) < 0) { 389 if (platform_device_register(&gpmc_onenand_device) < 0) {
390 pr_err("%s: Unable to register OneNAND device\n", __func__); 390 dev_err(dev, "Unable to register OneNAND device\n");
391 gpmc_cs_free(gpmc_onenand_data->cs); 391 gpmc_cs_free(gpmc_onenand_data->cs);
392 return; 392 return;
393 } 393 }
diff --git a/arch/arm/mach-omap2/gpmc-smc91x.c b/arch/arm/mach-omap2/gpmc-smc91x.c
index 11d0b756f098..61a063595e66 100644
--- a/arch/arm/mach-omap2/gpmc-smc91x.c
+++ b/arch/arm/mach-omap2/gpmc-smc91x.c
@@ -49,6 +49,10 @@ static struct platform_device gpmc_smc91x_device = {
49 .resource = gpmc_smc91x_resources, 49 .resource = gpmc_smc91x_resources,
50}; 50};
51 51
52static struct gpmc_settings smc91x_settings = {
53 .device_width = GPMC_DEVWIDTH_16BIT,
54};
55
52/* 56/*
53 * Set the gpmc timings for smc91c96. The timings are taken 57 * Set the gpmc timings for smc91c96. The timings are taken
54 * from the data sheet available at: 58 * from the data sheet available at:
@@ -67,18 +71,6 @@ static int smc91c96_gpmc_retime(void)
67 const int t7 = 5; /* Figure 12.4 write */ 71 const int t7 = 5; /* Figure 12.4 write */
68 const int t8 = 5; /* Figure 12.4 write */ 72 const int t8 = 5; /* Figure 12.4 write */
69 const int t20 = 185; /* Figure 12.2 read and 12.4 write */ 73 const int t20 = 185; /* Figure 12.2 read and 12.4 write */
70 u32 l;
71
72 l = GPMC_CONFIG1_DEVICESIZE_16;
73 if (gpmc_cfg->flags & GPMC_MUX_ADD_DATA)
74 l |= GPMC_CONFIG1_MUXADDDATA;
75 if (gpmc_cfg->flags & GPMC_READ_MON)
76 l |= GPMC_CONFIG1_WAIT_READ_MON;
77 if (gpmc_cfg->flags & GPMC_WRITE_MON)
78 l |= GPMC_CONFIG1_WAIT_WRITE_MON;
79 if (gpmc_cfg->wait_pin)
80 l |= GPMC_CONFIG1_WAIT_PIN_SEL(gpmc_cfg->wait_pin);
81 gpmc_cs_write_reg(gpmc_cfg->cs, GPMC_CS_CONFIG1, l);
82 74
83 /* 75 /*
84 * FIXME: Calculate the address and data bus muxed timings. 76 * FIXME: Calculate the address and data bus muxed timings.
@@ -104,7 +96,7 @@ static int smc91c96_gpmc_retime(void)
104 dev_t.t_cez_w = t4_w * 1000; 96 dev_t.t_cez_w = t4_w * 1000;
105 dev_t.t_wr_cycle = (t20 - t3) * 1000; 97 dev_t.t_wr_cycle = (t20 - t3) * 1000;
106 98
107 gpmc_calc_timings(&t, &dev_t); 99 gpmc_calc_timings(&t, &smc91x_settings, &dev_t);
108 100
109 return gpmc_cs_set_timings(gpmc_cfg->cs, &t); 101 return gpmc_cs_set_timings(gpmc_cfg->cs, &t);
110} 102}
@@ -133,6 +125,18 @@ void __init gpmc_smc91x_init(struct omap_smc91x_platform_data *board_data)
133 gpmc_smc91x_resources[0].end = cs_mem_base + 0x30f; 125 gpmc_smc91x_resources[0].end = cs_mem_base + 0x30f;
134 gpmc_smc91x_resources[1].flags |= (gpmc_cfg->flags & IRQF_TRIGGER_MASK); 126 gpmc_smc91x_resources[1].flags |= (gpmc_cfg->flags & IRQF_TRIGGER_MASK);
135 127
128 if (gpmc_cfg->flags & GPMC_MUX_ADD_DATA)
129 smc91x_settings.mux_add_data = GPMC_MUX_AD;
130 if (gpmc_cfg->flags & GPMC_READ_MON)
131 smc91x_settings.wait_on_read = true;
132 if (gpmc_cfg->flags & GPMC_WRITE_MON)
133 smc91x_settings.wait_on_write = true;
134 if (gpmc_cfg->wait_pin)
135 smc91x_settings.wait_pin = gpmc_cfg->wait_pin;
136 ret = gpmc_cs_program_settings(gpmc_cfg->cs, &smc91x_settings);
137 if (ret < 0)
138 goto free1;
139
136 if (gpmc_cfg->retime) { 140 if (gpmc_cfg->retime) {
137 ret = gpmc_cfg->retime(); 141 ret = gpmc_cfg->retime();
138 if (ret != 0) 142 if (ret != 0)
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index 6de31739b45c..ed946df5ad8a 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -26,6 +26,7 @@
26#include <linux/interrupt.h> 26#include <linux/interrupt.h>
27#include <linux/platform_device.h> 27#include <linux/platform_device.h>
28#include <linux/of.h> 28#include <linux/of.h>
29#include <linux/of_address.h>
29#include <linux/of_mtd.h> 30#include <linux/of_mtd.h>
30#include <linux/of_device.h> 31#include <linux/of_device.h>
31#include <linux/mtd/nand.h> 32#include <linux/mtd/nand.h>
@@ -91,9 +92,7 @@
91#define GPMC_CS_SIZE 0x30 92#define GPMC_CS_SIZE 0x30
92#define GPMC_BCH_SIZE 0x10 93#define GPMC_BCH_SIZE 0x10
93 94
94#define GPMC_MEM_START 0x00000000
95#define GPMC_MEM_END 0x3FFFFFFF 95#define GPMC_MEM_END 0x3FFFFFFF
96#define BOOT_ROM_SPACE 0x100000 /* 1MB */
97 96
98#define GPMC_CHUNK_SHIFT 24 /* 16 MB */ 97#define GPMC_CHUNK_SHIFT 24 /* 16 MB */
99#define GPMC_SECTION_SHIFT 28 /* 128 MB */ 98#define GPMC_SECTION_SHIFT 28 /* 128 MB */
@@ -107,6 +106,9 @@
107 106
108#define GPMC_HAS_WR_ACCESS 0x1 107#define GPMC_HAS_WR_ACCESS 0x1
109#define GPMC_HAS_WR_DATA_MUX_BUS 0x2 108#define GPMC_HAS_WR_DATA_MUX_BUS 0x2
109#define GPMC_HAS_MUX_AAD 0x4
110
111#define GPMC_NR_WAITPINS 4
110 112
111/* XXX: Only NAND irq has been considered,currently these are the only ones used 113/* XXX: Only NAND irq has been considered,currently these are the only ones used
112 */ 114 */
@@ -153,6 +155,7 @@ static struct resource gpmc_cs_mem[GPMC_CS_NUM];
153static DEFINE_SPINLOCK(gpmc_mem_lock); 155static DEFINE_SPINLOCK(gpmc_mem_lock);
154/* Define chip-selects as reserved by default until probe completes */ 156/* Define chip-selects as reserved by default until probe completes */
155static unsigned int gpmc_cs_map = ((1 << GPMC_CS_NUM) - 1); 157static unsigned int gpmc_cs_map = ((1 << GPMC_CS_NUM) - 1);
158static unsigned int gpmc_nr_waitpins;
156static struct device *gpmc_dev; 159static struct device *gpmc_dev;
157static int gpmc_irq; 160static int gpmc_irq;
158static resource_size_t phys_base, mem_size; 161static resource_size_t phys_base, mem_size;
@@ -181,7 +184,7 @@ void gpmc_cs_write_reg(int cs, int idx, u32 val)
181 __raw_writel(val, reg_addr); 184 __raw_writel(val, reg_addr);
182} 185}
183 186
184u32 gpmc_cs_read_reg(int cs, int idx) 187static u32 gpmc_cs_read_reg(int cs, int idx)
185{ 188{
186 void __iomem *reg_addr; 189 void __iomem *reg_addr;
187 190
@@ -190,7 +193,7 @@ u32 gpmc_cs_read_reg(int cs, int idx)
190} 193}
191 194
192/* TODO: Add support for gpmc_fck to clock framework and use it */ 195/* TODO: Add support for gpmc_fck to clock framework and use it */
193unsigned long gpmc_get_fclk_period(void) 196static unsigned long gpmc_get_fclk_period(void)
194{ 197{
195 unsigned long rate = clk_get_rate(gpmc_l3_clk); 198 unsigned long rate = clk_get_rate(gpmc_l3_clk);
196 199
@@ -205,7 +208,7 @@ unsigned long gpmc_get_fclk_period(void)
205 return rate; 208 return rate;
206} 209}
207 210
208unsigned int gpmc_ns_to_ticks(unsigned int time_ns) 211static unsigned int gpmc_ns_to_ticks(unsigned int time_ns)
209{ 212{
210 unsigned long tick_ps; 213 unsigned long tick_ps;
211 214
@@ -215,7 +218,7 @@ unsigned int gpmc_ns_to_ticks(unsigned int time_ns)
215 return (time_ns * 1000 + tick_ps - 1) / tick_ps; 218 return (time_ns * 1000 + tick_ps - 1) / tick_ps;
216} 219}
217 220
218unsigned int gpmc_ps_to_ticks(unsigned int time_ps) 221static unsigned int gpmc_ps_to_ticks(unsigned int time_ps)
219{ 222{
220 unsigned long tick_ps; 223 unsigned long tick_ps;
221 224
@@ -230,13 +233,6 @@ unsigned int gpmc_ticks_to_ns(unsigned int ticks)
230 return ticks * gpmc_get_fclk_period() / 1000; 233 return ticks * gpmc_get_fclk_period() / 1000;
231} 234}
232 235
233unsigned int gpmc_round_ns_to_ticks(unsigned int time_ns)
234{
235 unsigned long ticks = gpmc_ns_to_ticks(time_ns);
236
237 return ticks * gpmc_get_fclk_period() / 1000;
238}
239
240static unsigned int gpmc_ticks_to_ps(unsigned int ticks) 236static unsigned int gpmc_ticks_to_ps(unsigned int ticks)
241{ 237{
242 return ticks * gpmc_get_fclk_period(); 238 return ticks * gpmc_get_fclk_period();
@@ -405,11 +401,18 @@ int gpmc_cs_set_timings(int cs, const struct gpmc_timings *t)
405 return 0; 401 return 0;
406} 402}
407 403
408static void gpmc_cs_enable_mem(int cs, u32 base, u32 size) 404static int gpmc_cs_enable_mem(int cs, u32 base, u32 size)
409{ 405{
410 u32 l; 406 u32 l;
411 u32 mask; 407 u32 mask;
412 408
409 /*
410 * Ensure that base address is aligned on a
411 * boundary equal to or greater than size.
412 */
413 if (base & (size - 1))
414 return -EINVAL;
415
413 mask = (1 << GPMC_SECTION_SHIFT) - size; 416 mask = (1 << GPMC_SECTION_SHIFT) - size;
414 l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7); 417 l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7);
415 l &= ~0x3f; 418 l &= ~0x3f;
@@ -418,6 +421,8 @@ static void gpmc_cs_enable_mem(int cs, u32 base, u32 size)
418 l |= ((mask >> GPMC_CHUNK_SHIFT) & 0x0f) << 8; 421 l |= ((mask >> GPMC_CHUNK_SHIFT) & 0x0f) << 8;
419 l |= GPMC_CONFIG7_CSVALID; 422 l |= GPMC_CONFIG7_CSVALID;
420 gpmc_cs_write_reg(cs, GPMC_CS_CONFIG7, l); 423 gpmc_cs_write_reg(cs, GPMC_CS_CONFIG7, l);
424
425 return 0;
421} 426}
422 427
423static void gpmc_cs_disable_mem(int cs) 428static void gpmc_cs_disable_mem(int cs)
@@ -448,22 +453,14 @@ static int gpmc_cs_mem_enabled(int cs)
448 return l & GPMC_CONFIG7_CSVALID; 453 return l & GPMC_CONFIG7_CSVALID;
449} 454}
450 455
451int gpmc_cs_set_reserved(int cs, int reserved) 456static void gpmc_cs_set_reserved(int cs, int reserved)
452{ 457{
453 if (cs > GPMC_CS_NUM)
454 return -ENODEV;
455
456 gpmc_cs_map &= ~(1 << cs); 458 gpmc_cs_map &= ~(1 << cs);
457 gpmc_cs_map |= (reserved ? 1 : 0) << cs; 459 gpmc_cs_map |= (reserved ? 1 : 0) << cs;
458
459 return 0;
460} 460}
461 461
462int gpmc_cs_reserved(int cs) 462static bool gpmc_cs_reserved(int cs)
463{ 463{
464 if (cs > GPMC_CS_NUM)
465 return -ENODEV;
466
467 return gpmc_cs_map & (1 << cs); 464 return gpmc_cs_map & (1 << cs);
468} 465}
469 466
@@ -510,6 +507,39 @@ static int gpmc_cs_delete_mem(int cs)
510 return r; 507 return r;
511} 508}
512 509
510/**
511 * gpmc_cs_remap - remaps a chip-select physical base address
512 * @cs: chip-select to remap
513 * @base: physical base address to re-map chip-select to
514 *
515 * Re-maps a chip-select to a new physical base address specified by
516 * "base". Returns 0 on success and appropriate negative error code
517 * on failure.
518 */
519static int gpmc_cs_remap(int cs, u32 base)
520{
521 int ret;
522 u32 old_base, size;
523
524 if (cs > GPMC_CS_NUM)
525 return -ENODEV;
526 gpmc_cs_get_memconf(cs, &old_base, &size);
527 if (base == old_base)
528 return 0;
529 gpmc_cs_disable_mem(cs);
530 ret = gpmc_cs_delete_mem(cs);
531 if (ret < 0)
532 return ret;
533 ret = gpmc_cs_insert_mem(cs, base, size);
534 if (ret < 0)
535 return ret;
536 ret = gpmc_cs_enable_mem(cs, base, size);
537 if (ret < 0)
538 return ret;
539
540 return 0;
541}
542
513int gpmc_cs_request(int cs, unsigned long size, unsigned long *base) 543int gpmc_cs_request(int cs, unsigned long size, unsigned long *base)
514{ 544{
515 struct resource *res = &gpmc_cs_mem[cs]; 545 struct resource *res = &gpmc_cs_mem[cs];
@@ -535,7 +565,12 @@ int gpmc_cs_request(int cs, unsigned long size, unsigned long *base)
535 if (r < 0) 565 if (r < 0)
536 goto out; 566 goto out;
537 567
538 gpmc_cs_enable_mem(cs, res->start, resource_size(res)); 568 r = gpmc_cs_enable_mem(cs, res->start, resource_size(res));
569 if (r < 0) {
570 release_resource(res);
571 goto out;
572 }
573
539 *base = res->start; 574 *base = res->start;
540 gpmc_cs_set_reserved(cs, 1); 575 gpmc_cs_set_reserved(cs, 1);
541out: 576out:
@@ -561,16 +596,14 @@ void gpmc_cs_free(int cs)
561EXPORT_SYMBOL(gpmc_cs_free); 596EXPORT_SYMBOL(gpmc_cs_free);
562 597
563/** 598/**
564 * gpmc_cs_configure - write request to configure gpmc 599 * gpmc_configure - write request to configure gpmc
565 * @cs: chip select number
566 * @cmd: command type 600 * @cmd: command type
567 * @wval: value to write 601 * @wval: value to write
568 * @return status of the operation 602 * @return status of the operation
569 */ 603 */
570int gpmc_cs_configure(int cs, int cmd, int wval) 604int gpmc_configure(int cmd, int wval)
571{ 605{
572 int err = 0; 606 u32 regval;
573 u32 regval = 0;
574 607
575 switch (cmd) { 608 switch (cmd) {
576 case GPMC_ENABLE_IRQ: 609 case GPMC_ENABLE_IRQ:
@@ -590,43 +623,14 @@ int gpmc_cs_configure(int cs, int cmd, int wval)
590 gpmc_write_reg(GPMC_CONFIG, regval); 623 gpmc_write_reg(GPMC_CONFIG, regval);
591 break; 624 break;
592 625
593 case GPMC_CONFIG_RDY_BSY:
594 regval = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1);
595 if (wval)
596 regval |= WR_RD_PIN_MONITORING;
597 else
598 regval &= ~WR_RD_PIN_MONITORING;
599 gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1, regval);
600 break;
601
602 case GPMC_CONFIG_DEV_SIZE:
603 regval = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1);
604
605 /* clear 2 target bits */
606 regval &= ~GPMC_CONFIG1_DEVICESIZE(3);
607
608 /* set the proper value */
609 regval |= GPMC_CONFIG1_DEVICESIZE(wval);
610
611 gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1, regval);
612 break;
613
614 case GPMC_CONFIG_DEV_TYPE:
615 regval = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1);
616 regval |= GPMC_CONFIG1_DEVICETYPE(wval);
617 if (wval == GPMC_DEVICETYPE_NOR)
618 regval |= GPMC_CONFIG1_MUXADDDATA;
619 gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1, regval);
620 break;
621
622 default: 626 default:
623 printk(KERN_ERR "gpmc_configure_cs: Not supported\n"); 627 pr_err("%s: command not supported\n", __func__);
624 err = -EINVAL; 628 return -EINVAL;
625 } 629 }
626 630
627 return err; 631 return 0;
628} 632}
629EXPORT_SYMBOL(gpmc_cs_configure); 633EXPORT_SYMBOL(gpmc_configure);
630 634
631void gpmc_update_nand_reg(struct gpmc_nand_regs *reg, int cs) 635void gpmc_update_nand_reg(struct gpmc_nand_regs *reg, int cs)
632{ 636{
@@ -781,16 +785,16 @@ static void gpmc_mem_exit(void)
781 785
782} 786}
783 787
784static int gpmc_mem_init(void) 788static void gpmc_mem_init(void)
785{ 789{
786 int cs, rc; 790 int cs;
787 unsigned long boot_rom_space = 0;
788 791
789 /* never allocate the first page, to facilitate bug detection; 792 /*
790 * even if we didn't boot from ROM. 793 * The first 1MB of GPMC address space is typically mapped to
794 * the internal ROM. Never allocate the first page, to
795 * facilitate bug detection; even if we didn't boot from ROM.
791 */ 796 */
792 boot_rom_space = BOOT_ROM_SPACE; 797 gpmc_mem_root.start = SZ_1M;
793 gpmc_mem_root.start = GPMC_MEM_START + boot_rom_space;
794 gpmc_mem_root.end = GPMC_MEM_END; 798 gpmc_mem_root.end = GPMC_MEM_END;
795 799
796 /* Reserve all regions that has been set up by bootloader */ 800 /* Reserve all regions that has been set up by bootloader */
@@ -800,16 +804,12 @@ static int gpmc_mem_init(void)
800 if (!gpmc_cs_mem_enabled(cs)) 804 if (!gpmc_cs_mem_enabled(cs))
801 continue; 805 continue;
802 gpmc_cs_get_memconf(cs, &base, &size); 806 gpmc_cs_get_memconf(cs, &base, &size);
803 rc = gpmc_cs_insert_mem(cs, base, size); 807 if (gpmc_cs_insert_mem(cs, base, size)) {
804 if (rc < 0) { 808 pr_warn("%s: disabling cs %d mapped at 0x%x-0x%x\n",
805 while (--cs >= 0) 809 __func__, cs, base, base + size);
806 if (gpmc_cs_mem_enabled(cs)) 810 gpmc_cs_disable_mem(cs);
807 gpmc_cs_delete_mem(cs);
808 return rc;
809 } 811 }
810 } 812 }
811
812 return 0;
813} 813}
814 814
815static u32 gpmc_round_ps_to_sync_clk(u32 time_ps, u32 sync_clk) 815static u32 gpmc_round_ps_to_sync_clk(u32 time_ps, u32 sync_clk)
@@ -825,9 +825,9 @@ static u32 gpmc_round_ps_to_sync_clk(u32 time_ps, u32 sync_clk)
825 825
826/* XXX: can the cycles be avoided ? */ 826/* XXX: can the cycles be avoided ? */
827static int gpmc_calc_sync_read_timings(struct gpmc_timings *gpmc_t, 827static int gpmc_calc_sync_read_timings(struct gpmc_timings *gpmc_t,
828 struct gpmc_device_timings *dev_t) 828 struct gpmc_device_timings *dev_t,
829 bool mux)
829{ 830{
830 bool mux = dev_t->mux;
831 u32 temp; 831 u32 temp;
832 832
833 /* adv_rd_off */ 833 /* adv_rd_off */
@@ -880,9 +880,9 @@ static int gpmc_calc_sync_read_timings(struct gpmc_timings *gpmc_t,
880} 880}
881 881
882static int gpmc_calc_sync_write_timings(struct gpmc_timings *gpmc_t, 882static int gpmc_calc_sync_write_timings(struct gpmc_timings *gpmc_t,
883 struct gpmc_device_timings *dev_t) 883 struct gpmc_device_timings *dev_t,
884 bool mux)
884{ 885{
885 bool mux = dev_t->mux;
886 u32 temp; 886 u32 temp;
887 887
888 /* adv_wr_off */ 888 /* adv_wr_off */
@@ -942,9 +942,9 @@ static int gpmc_calc_sync_write_timings(struct gpmc_timings *gpmc_t,
942} 942}
943 943
944static int gpmc_calc_async_read_timings(struct gpmc_timings *gpmc_t, 944static int gpmc_calc_async_read_timings(struct gpmc_timings *gpmc_t,
945 struct gpmc_device_timings *dev_t) 945 struct gpmc_device_timings *dev_t,
946 bool mux)
946{ 947{
947 bool mux = dev_t->mux;
948 u32 temp; 948 u32 temp;
949 949
950 /* adv_rd_off */ 950 /* adv_rd_off */
@@ -982,9 +982,9 @@ static int gpmc_calc_async_read_timings(struct gpmc_timings *gpmc_t,
982} 982}
983 983
984static int gpmc_calc_async_write_timings(struct gpmc_timings *gpmc_t, 984static int gpmc_calc_async_write_timings(struct gpmc_timings *gpmc_t,
985 struct gpmc_device_timings *dev_t) 985 struct gpmc_device_timings *dev_t,
986 bool mux)
986{ 987{
987 bool mux = dev_t->mux;
988 u32 temp; 988 u32 temp;
989 989
990 /* adv_wr_off */ 990 /* adv_wr_off */
@@ -1054,7 +1054,8 @@ static int gpmc_calc_sync_common_timings(struct gpmc_timings *gpmc_t,
1054} 1054}
1055 1055
1056static int gpmc_calc_common_timings(struct gpmc_timings *gpmc_t, 1056static int gpmc_calc_common_timings(struct gpmc_timings *gpmc_t,
1057 struct gpmc_device_timings *dev_t) 1057 struct gpmc_device_timings *dev_t,
1058 bool sync)
1058{ 1059{
1059 u32 temp; 1060 u32 temp;
1060 1061
@@ -1068,7 +1069,7 @@ static int gpmc_calc_common_timings(struct gpmc_timings *gpmc_t,
1068 gpmc_t->cs_on + dev_t->t_ce_avd); 1069 gpmc_t->cs_on + dev_t->t_ce_avd);
1069 gpmc_t->adv_on = gpmc_round_ps_to_ticks(temp); 1070 gpmc_t->adv_on = gpmc_round_ps_to_ticks(temp);
1070 1071
1071 if (dev_t->sync_write || dev_t->sync_read) 1072 if (sync)
1072 gpmc_calc_sync_common_timings(gpmc_t, dev_t); 1073 gpmc_calc_sync_common_timings(gpmc_t, dev_t);
1073 1074
1074 return 0; 1075 return 0;
@@ -1103,21 +1104,29 @@ static void gpmc_convert_ps_to_ns(struct gpmc_timings *t)
1103} 1104}
1104 1105
1105int gpmc_calc_timings(struct gpmc_timings *gpmc_t, 1106int gpmc_calc_timings(struct gpmc_timings *gpmc_t,
1106 struct gpmc_device_timings *dev_t) 1107 struct gpmc_settings *gpmc_s,
1108 struct gpmc_device_timings *dev_t)
1107{ 1109{
1110 bool mux = false, sync = false;
1111
1112 if (gpmc_s) {
1113 mux = gpmc_s->mux_add_data ? true : false;
1114 sync = (gpmc_s->sync_read || gpmc_s->sync_write);
1115 }
1116
1108 memset(gpmc_t, 0, sizeof(*gpmc_t)); 1117 memset(gpmc_t, 0, sizeof(*gpmc_t));
1109 1118
1110 gpmc_calc_common_timings(gpmc_t, dev_t); 1119 gpmc_calc_common_timings(gpmc_t, dev_t, sync);
1111 1120
1112 if (dev_t->sync_read) 1121 if (gpmc_s && gpmc_s->sync_read)
1113 gpmc_calc_sync_read_timings(gpmc_t, dev_t); 1122 gpmc_calc_sync_read_timings(gpmc_t, dev_t, mux);
1114 else 1123 else
1115 gpmc_calc_async_read_timings(gpmc_t, dev_t); 1124 gpmc_calc_async_read_timings(gpmc_t, dev_t, mux);
1116 1125
1117 if (dev_t->sync_write) 1126 if (gpmc_s && gpmc_s->sync_write)
1118 gpmc_calc_sync_write_timings(gpmc_t, dev_t); 1127 gpmc_calc_sync_write_timings(gpmc_t, dev_t, mux);
1119 else 1128 else
1120 gpmc_calc_async_write_timings(gpmc_t, dev_t); 1129 gpmc_calc_async_write_timings(gpmc_t, dev_t, mux);
1121 1130
1122 /* TODO: remove, see function definition */ 1131 /* TODO: remove, see function definition */
1123 gpmc_convert_ps_to_ns(gpmc_t); 1132 gpmc_convert_ps_to_ns(gpmc_t);
@@ -1125,6 +1134,90 @@ int gpmc_calc_timings(struct gpmc_timings *gpmc_t,
1125 return 0; 1134 return 0;
1126} 1135}
1127 1136
1137/**
1138 * gpmc_cs_program_settings - programs non-timing related settings
1139 * @cs: GPMC chip-select to program
1140 * @p: pointer to GPMC settings structure
1141 *
1142 * Programs non-timing related settings for a GPMC chip-select, such as
1143 * bus-width, burst configuration, etc. Function should be called once
1144 * for each chip-select that is being used and must be called before
1145 * calling gpmc_cs_set_timings() as timing parameters in the CONFIG1
1146 * register will be initialised to zero by this function. Returns 0 on
1147 * success and appropriate negative error code on failure.
1148 */
1149int gpmc_cs_program_settings(int cs, struct gpmc_settings *p)
1150{
1151 u32 config1;
1152
1153 if ((!p->device_width) || (p->device_width > GPMC_DEVWIDTH_16BIT)) {
1154 pr_err("%s: invalid width %d!", __func__, p->device_width);
1155 return -EINVAL;
1156 }
1157
1158 /* Address-data multiplexing not supported for NAND devices */
1159 if (p->device_nand && p->mux_add_data) {
1160 pr_err("%s: invalid configuration!\n", __func__);
1161 return -EINVAL;
1162 }
1163
1164 if ((p->mux_add_data > GPMC_MUX_AD) ||
1165 ((p->mux_add_data == GPMC_MUX_AAD) &&
1166 !(gpmc_capability & GPMC_HAS_MUX_AAD))) {
1167 pr_err("%s: invalid multiplex configuration!\n", __func__);
1168 return -EINVAL;
1169 }
1170
1171 /* Page/burst mode supports lengths of 4, 8 and 16 bytes */
1172 if (p->burst_read || p->burst_write) {
1173 switch (p->burst_len) {
1174 case GPMC_BURST_4:
1175 case GPMC_BURST_8:
1176 case GPMC_BURST_16:
1177 break;
1178 default:
1179 pr_err("%s: invalid page/burst-length (%d)\n",
1180 __func__, p->burst_len);
1181 return -EINVAL;
1182 }
1183 }
1184
1185 if ((p->wait_on_read || p->wait_on_write) &&
1186 (p->wait_pin > gpmc_nr_waitpins)) {
1187 pr_err("%s: invalid wait-pin (%d)\n", __func__, p->wait_pin);
1188 return -EINVAL;
1189 }
1190
1191 config1 = GPMC_CONFIG1_DEVICESIZE((p->device_width - 1));
1192
1193 if (p->sync_read)
1194 config1 |= GPMC_CONFIG1_READTYPE_SYNC;
1195 if (p->sync_write)
1196 config1 |= GPMC_CONFIG1_WRITETYPE_SYNC;
1197 if (p->wait_on_read)
1198 config1 |= GPMC_CONFIG1_WAIT_READ_MON;
1199 if (p->wait_on_write)
1200 config1 |= GPMC_CONFIG1_WAIT_WRITE_MON;
1201 if (p->wait_on_read || p->wait_on_write)
1202 config1 |= GPMC_CONFIG1_WAIT_PIN_SEL(p->wait_pin);
1203 if (p->device_nand)
1204 config1 |= GPMC_CONFIG1_DEVICETYPE(GPMC_DEVICETYPE_NAND);
1205 if (p->mux_add_data)
1206 config1 |= GPMC_CONFIG1_MUXTYPE(p->mux_add_data);
1207 if (p->burst_read)
1208 config1 |= GPMC_CONFIG1_READMULTIPLE_SUPP;
1209 if (p->burst_write)
1210 config1 |= GPMC_CONFIG1_WRITEMULTIPLE_SUPP;
1211 if (p->burst_read || p->burst_write) {
1212 config1 |= GPMC_CONFIG1_PAGE_LEN(p->burst_len >> 3);
1213 config1 |= p->burst_wrap ? GPMC_CONFIG1_WRAPBURST_SUPP : 0;
1214 }
1215
1216 gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1, config1);
1217
1218 return 0;
1219}
1220
1128#ifdef CONFIG_OF 1221#ifdef CONFIG_OF
1129static struct of_device_id gpmc_dt_ids[] = { 1222static struct of_device_id gpmc_dt_ids[] = {
1130 { .compatible = "ti,omap2420-gpmc" }, 1223 { .compatible = "ti,omap2420-gpmc" },
@@ -1136,70 +1229,110 @@ static struct of_device_id gpmc_dt_ids[] = {
1136}; 1229};
1137MODULE_DEVICE_TABLE(of, gpmc_dt_ids); 1230MODULE_DEVICE_TABLE(of, gpmc_dt_ids);
1138 1231
1232/**
1233 * gpmc_read_settings_dt - read gpmc settings from device-tree
1234 * @np: pointer to device-tree node for a gpmc child device
1235 * @p: pointer to gpmc settings structure
1236 *
1237 * Reads the GPMC settings for a GPMC child device from device-tree and
1238 * stores them in the GPMC settings structure passed. The GPMC settings
1239 * structure is initialised to zero by this function and so any
1240 * previously stored settings will be cleared.
1241 */
1242void gpmc_read_settings_dt(struct device_node *np, struct gpmc_settings *p)
1243{
1244 memset(p, 0, sizeof(struct gpmc_settings));
1245
1246 p->sync_read = of_property_read_bool(np, "gpmc,sync-read");
1247 p->sync_write = of_property_read_bool(np, "gpmc,sync-write");
1248 p->device_nand = of_property_read_bool(np, "gpmc,device-nand");
1249 of_property_read_u32(np, "gpmc,device-width", &p->device_width);
1250 of_property_read_u32(np, "gpmc,mux-add-data", &p->mux_add_data);
1251
1252 if (!of_property_read_u32(np, "gpmc,burst-length", &p->burst_len)) {
1253 p->burst_wrap = of_property_read_bool(np, "gpmc,burst-wrap");
1254 p->burst_read = of_property_read_bool(np, "gpmc,burst-read");
1255 p->burst_write = of_property_read_bool(np, "gpmc,burst-write");
1256 if (!p->burst_read && !p->burst_write)
1257 pr_warn("%s: page/burst-length set but not used!\n",
1258 __func__);
1259 }
1260
1261 if (!of_property_read_u32(np, "gpmc,wait-pin", &p->wait_pin)) {
1262 p->wait_on_read = of_property_read_bool(np,
1263 "gpmc,wait-on-read");
1264 p->wait_on_write = of_property_read_bool(np,
1265 "gpmc,wait-on-write");
1266 if (!p->wait_on_read && !p->wait_on_write)
1267 pr_warn("%s: read/write wait monitoring not enabled!\n",
1268 __func__);
1269 }
1270}
1271
1139static void __maybe_unused gpmc_read_timings_dt(struct device_node *np, 1272static void __maybe_unused gpmc_read_timings_dt(struct device_node *np,
1140 struct gpmc_timings *gpmc_t) 1273 struct gpmc_timings *gpmc_t)
1141{ 1274{
1142 u32 val; 1275 struct gpmc_bool_timings *p;
1276
1277 if (!np || !gpmc_t)
1278 return;
1143 1279
1144 memset(gpmc_t, 0, sizeof(*gpmc_t)); 1280 memset(gpmc_t, 0, sizeof(*gpmc_t));
1145 1281
1146 /* minimum clock period for syncronous mode */ 1282 /* minimum clock period for syncronous mode */
1147 if (!of_property_read_u32(np, "gpmc,sync-clk", &val)) 1283 of_property_read_u32(np, "gpmc,sync-clk-ps", &gpmc_t->sync_clk);
1148 gpmc_t->sync_clk = val;
1149 1284
1150 /* chip select timtings */ 1285 /* chip select timtings */
1151 if (!of_property_read_u32(np, "gpmc,cs-on", &val)) 1286 of_property_read_u32(np, "gpmc,cs-on-ns", &gpmc_t->cs_on);
1152 gpmc_t->cs_on = val; 1287 of_property_read_u32(np, "gpmc,cs-rd-off-ns", &gpmc_t->cs_rd_off);
1153 1288 of_property_read_u32(np, "gpmc,cs-wr-off-ns", &gpmc_t->cs_wr_off);
1154 if (!of_property_read_u32(np, "gpmc,cs-rd-off", &val))
1155 gpmc_t->cs_rd_off = val;
1156
1157 if (!of_property_read_u32(np, "gpmc,cs-wr-off", &val))
1158 gpmc_t->cs_wr_off = val;
1159 1289
1160 /* ADV signal timings */ 1290 /* ADV signal timings */
1161 if (!of_property_read_u32(np, "gpmc,adv-on", &val)) 1291 of_property_read_u32(np, "gpmc,adv-on-ns", &gpmc_t->adv_on);
1162 gpmc_t->adv_on = val; 1292 of_property_read_u32(np, "gpmc,adv-rd-off-ns", &gpmc_t->adv_rd_off);
1163 1293 of_property_read_u32(np, "gpmc,adv-wr-off-ns", &gpmc_t->adv_wr_off);
1164 if (!of_property_read_u32(np, "gpmc,adv-rd-off", &val))
1165 gpmc_t->adv_rd_off = val;
1166
1167 if (!of_property_read_u32(np, "gpmc,adv-wr-off", &val))
1168 gpmc_t->adv_wr_off = val;
1169 1294
1170 /* WE signal timings */ 1295 /* WE signal timings */
1171 if (!of_property_read_u32(np, "gpmc,we-on", &val)) 1296 of_property_read_u32(np, "gpmc,we-on-ns", &gpmc_t->we_on);
1172 gpmc_t->we_on = val; 1297 of_property_read_u32(np, "gpmc,we-off-ns", &gpmc_t->we_off);
1173
1174 if (!of_property_read_u32(np, "gpmc,we-off", &val))
1175 gpmc_t->we_off = val;
1176 1298
1177 /* OE signal timings */ 1299 /* OE signal timings */
1178 if (!of_property_read_u32(np, "gpmc,oe-on", &val)) 1300 of_property_read_u32(np, "gpmc,oe-on-ns", &gpmc_t->oe_on);
1179 gpmc_t->oe_on = val; 1301 of_property_read_u32(np, "gpmc,oe-off-ns", &gpmc_t->oe_off);
1180
1181 if (!of_property_read_u32(np, "gpmc,oe-off", &val))
1182 gpmc_t->oe_off = val;
1183 1302
1184 /* access and cycle timings */ 1303 /* access and cycle timings */
1185 if (!of_property_read_u32(np, "gpmc,page-burst-access", &val)) 1304 of_property_read_u32(np, "gpmc,page-burst-access-ns",
1186 gpmc_t->page_burst_access = val; 1305 &gpmc_t->page_burst_access);
1187 1306 of_property_read_u32(np, "gpmc,access-ns", &gpmc_t->access);
1188 if (!of_property_read_u32(np, "gpmc,access", &val)) 1307 of_property_read_u32(np, "gpmc,rd-cycle-ns", &gpmc_t->rd_cycle);
1189 gpmc_t->access = val; 1308 of_property_read_u32(np, "gpmc,wr-cycle-ns", &gpmc_t->wr_cycle);
1190 1309 of_property_read_u32(np, "gpmc,bus-turnaround-ns",
1191 if (!of_property_read_u32(np, "gpmc,rd-cycle", &val)) 1310 &gpmc_t->bus_turnaround);
1192 gpmc_t->rd_cycle = val; 1311 of_property_read_u32(np, "gpmc,cycle2cycle-delay-ns",
1193 1312 &gpmc_t->cycle2cycle_delay);
1194 if (!of_property_read_u32(np, "gpmc,wr-cycle", &val)) 1313 of_property_read_u32(np, "gpmc,wait-monitoring-ns",
1195 gpmc_t->wr_cycle = val; 1314 &gpmc_t->wait_monitoring);
1196 1315 of_property_read_u32(np, "gpmc,clk-activation-ns",
1197 /* only for OMAP3430 */ 1316 &gpmc_t->clk_activation);
1198 if (!of_property_read_u32(np, "gpmc,wr-access", &val)) 1317
1199 gpmc_t->wr_access = val; 1318 /* only applicable to OMAP3+ */
1200 1319 of_property_read_u32(np, "gpmc,wr-access-ns", &gpmc_t->wr_access);
1201 if (!of_property_read_u32(np, "gpmc,wr-data-mux-bus", &val)) 1320 of_property_read_u32(np, "gpmc,wr-data-mux-bus-ns",
1202 gpmc_t->wr_data_mux_bus = val; 1321 &gpmc_t->wr_data_mux_bus);
1322
1323 /* bool timing parameters */
1324 p = &gpmc_t->bool_timings;
1325
1326 p->cycle2cyclediffcsen =
1327 of_property_read_bool(np, "gpmc,cycle2cycle-diffcsen");
1328 p->cycle2cyclesamecsen =
1329 of_property_read_bool(np, "gpmc,cycle2cycle-samecsen");
1330 p->we_extra_delay = of_property_read_bool(np, "gpmc,we-extra-delay");
1331 p->oe_extra_delay = of_property_read_bool(np, "gpmc,oe-extra-delay");
1332 p->adv_extra_delay = of_property_read_bool(np, "gpmc,adv-extra-delay");
1333 p->cs_extra_delay = of_property_read_bool(np, "gpmc,cs-extra-delay");
1334 p->time_para_granularity =
1335 of_property_read_bool(np, "gpmc,time-para-granularity");
1203} 1336}
1204 1337
1205#ifdef CONFIG_MTD_NAND 1338#ifdef CONFIG_MTD_NAND
@@ -1295,6 +1428,81 @@ static int gpmc_probe_onenand_child(struct platform_device *pdev,
1295} 1428}
1296#endif 1429#endif
1297 1430
1431/**
1432 * gpmc_probe_generic_child - configures the gpmc for a child device
1433 * @pdev: pointer to gpmc platform device
1434 * @child: pointer to device-tree node for child device
1435 *
1436 * Allocates and configures a GPMC chip-select for a child device.
1437 * Returns 0 on success and appropriate negative error code on failure.
1438 */
1439static int gpmc_probe_generic_child(struct platform_device *pdev,
1440 struct device_node *child)
1441{
1442 struct gpmc_settings gpmc_s;
1443 struct gpmc_timings gpmc_t;
1444 struct resource res;
1445 unsigned long base;
1446 int ret, cs;
1447
1448 if (of_property_read_u32(child, "reg", &cs) < 0) {
1449 dev_err(&pdev->dev, "%s has no 'reg' property\n",
1450 child->full_name);
1451 return -ENODEV;
1452 }
1453
1454 if (of_address_to_resource(child, 0, &res) < 0) {
1455 dev_err(&pdev->dev, "%s has malformed 'reg' property\n",
1456 child->full_name);
1457 return -ENODEV;
1458 }
1459
1460 ret = gpmc_cs_request(cs, resource_size(&res), &base);
1461 if (ret < 0) {
1462 dev_err(&pdev->dev, "cannot request GPMC CS %d\n", cs);
1463 return ret;
1464 }
1465
1466 /*
1467 * FIXME: gpmc_cs_request() will map the CS to an arbitary
1468 * location in the gpmc address space. When booting with
1469 * device-tree we want the NOR flash to be mapped to the
1470 * location specified in the device-tree blob. So remap the
1471 * CS to this location. Once DT migration is complete should
1472 * just make gpmc_cs_request() map a specific address.
1473 */
1474 ret = gpmc_cs_remap(cs, res.start);
1475 if (ret < 0) {
1476 dev_err(&pdev->dev, "cannot remap GPMC CS %d to 0x%x\n",
1477 cs, res.start);
1478 goto err;
1479 }
1480
1481 gpmc_read_settings_dt(child, &gpmc_s);
1482
1483 ret = of_property_read_u32(child, "bank-width", &gpmc_s.device_width);
1484 if (ret < 0)
1485 goto err;
1486
1487 ret = gpmc_cs_program_settings(cs, &gpmc_s);
1488 if (ret < 0)
1489 goto err;
1490
1491 gpmc_read_timings_dt(child, &gpmc_t);
1492 gpmc_cs_set_timings(cs, &gpmc_t);
1493
1494 if (of_platform_device_create(child, NULL, &pdev->dev))
1495 return 0;
1496
1497 dev_err(&pdev->dev, "failed to create gpmc child %s\n", child->name);
1498 ret = -ENODEV;
1499
1500err:
1501 gpmc_cs_free(cs);
1502
1503 return ret;
1504}
1505
1298static int gpmc_probe_dt(struct platform_device *pdev) 1506static int gpmc_probe_dt(struct platform_device *pdev)
1299{ 1507{
1300 int ret; 1508 int ret;
@@ -1305,6 +1513,13 @@ static int gpmc_probe_dt(struct platform_device *pdev)
1305 if (!of_id) 1513 if (!of_id)
1306 return 0; 1514 return 0;
1307 1515
1516 ret = of_property_read_u32(pdev->dev.of_node, "gpmc,num-waitpins",
1517 &gpmc_nr_waitpins);
1518 if (ret < 0) {
1519 pr_err("%s: number of wait pins not found!\n", __func__);
1520 return ret;
1521 }
1522
1308 for_each_node_by_name(child, "nand") { 1523 for_each_node_by_name(child, "nand") {
1309 ret = gpmc_probe_nand_child(pdev, child); 1524 ret = gpmc_probe_nand_child(pdev, child);
1310 if (ret < 0) { 1525 if (ret < 0) {
@@ -1320,6 +1535,23 @@ static int gpmc_probe_dt(struct platform_device *pdev)
1320 return ret; 1535 return ret;
1321 } 1536 }
1322 } 1537 }
1538
1539 for_each_node_by_name(child, "nor") {
1540 ret = gpmc_probe_generic_child(pdev, child);
1541 if (ret < 0) {
1542 of_node_put(child);
1543 return ret;
1544 }
1545 }
1546
1547 for_each_node_by_name(child, "ethernet") {
1548 ret = gpmc_probe_generic_child(pdev, child);
1549 if (ret < 0) {
1550 of_node_put(child);
1551 return ret;
1552 }
1553 }
1554
1323 return 0; 1555 return 0;
1324} 1556}
1325#else 1557#else
@@ -1364,18 +1596,27 @@ static int gpmc_probe(struct platform_device *pdev)
1364 gpmc_dev = &pdev->dev; 1596 gpmc_dev = &pdev->dev;
1365 1597
1366 l = gpmc_read_reg(GPMC_REVISION); 1598 l = gpmc_read_reg(GPMC_REVISION);
1599
1600 /*
1601 * FIXME: Once device-tree migration is complete the below flags
1602 * should be populated based upon the device-tree compatible
1603 * string. For now just use the IP revision. OMAP3+ devices have
1604 * the wr_access and wr_data_mux_bus register fields. OMAP4+
1605 * devices support the addr-addr-data multiplex protocol.
1606 *
1607 * GPMC IP revisions:
1608 * - OMAP24xx = 2.0
1609 * - OMAP3xxx = 5.0
1610 * - OMAP44xx/54xx/AM335x = 6.0
1611 */
1367 if (GPMC_REVISION_MAJOR(l) > 0x4) 1612 if (GPMC_REVISION_MAJOR(l) > 0x4)
1368 gpmc_capability = GPMC_HAS_WR_ACCESS | GPMC_HAS_WR_DATA_MUX_BUS; 1613 gpmc_capability = GPMC_HAS_WR_ACCESS | GPMC_HAS_WR_DATA_MUX_BUS;
1614 if (GPMC_REVISION_MAJOR(l) > 0x5)
1615 gpmc_capability |= GPMC_HAS_MUX_AAD;
1369 dev_info(gpmc_dev, "GPMC revision %d.%d\n", GPMC_REVISION_MAJOR(l), 1616 dev_info(gpmc_dev, "GPMC revision %d.%d\n", GPMC_REVISION_MAJOR(l),
1370 GPMC_REVISION_MINOR(l)); 1617 GPMC_REVISION_MINOR(l));
1371 1618
1372 rc = gpmc_mem_init(); 1619 gpmc_mem_init();
1373 if (rc < 0) {
1374 clk_disable_unprepare(gpmc_l3_clk);
1375 clk_put(gpmc_l3_clk);
1376 dev_err(gpmc_dev, "failed to reserve memory\n");
1377 return rc;
1378 }
1379 1620
1380 if (gpmc_setup_irq() < 0) 1621 if (gpmc_setup_irq() < 0)
1381 dev_warn(gpmc_dev, "gpmc_setup_irq failed\n"); 1622 dev_warn(gpmc_dev, "gpmc_setup_irq failed\n");
@@ -1383,6 +1624,9 @@ static int gpmc_probe(struct platform_device *pdev)
1383 /* Now the GPMC is initialised, unreserve the chip-selects */ 1624 /* Now the GPMC is initialised, unreserve the chip-selects */
1384 gpmc_cs_map = 0; 1625 gpmc_cs_map = 0;
1385 1626
1627 if (!pdev->dev.of_node)
1628 gpmc_nr_waitpins = GPMC_NR_WAITPINS;
1629
1386 rc = gpmc_probe_dt(pdev); 1630 rc = gpmc_probe_dt(pdev);
1387 if (rc < 0) { 1631 if (rc < 0) {
1388 clk_disable_unprepare(gpmc_l3_clk); 1632 clk_disable_unprepare(gpmc_l3_clk);
diff --git a/arch/arm/mach-omap2/gpmc.h b/arch/arm/mach-omap2/gpmc.h
index fe0a844d5007..707f6d58edd5 100644
--- a/arch/arm/mach-omap2/gpmc.h
+++ b/arch/arm/mach-omap2/gpmc.h
@@ -58,7 +58,7 @@
58#define GPMC_CONFIG1_DEVICESIZE_16 GPMC_CONFIG1_DEVICESIZE(1) 58#define GPMC_CONFIG1_DEVICESIZE_16 GPMC_CONFIG1_DEVICESIZE(1)
59#define GPMC_CONFIG1_DEVICETYPE(val) ((val & 3) << 10) 59#define GPMC_CONFIG1_DEVICETYPE(val) ((val & 3) << 10)
60#define GPMC_CONFIG1_DEVICETYPE_NOR GPMC_CONFIG1_DEVICETYPE(0) 60#define GPMC_CONFIG1_DEVICETYPE_NOR GPMC_CONFIG1_DEVICETYPE(0)
61#define GPMC_CONFIG1_MUXADDDATA (1 << 9) 61#define GPMC_CONFIG1_MUXTYPE(val) ((val & 3) << 8)
62#define GPMC_CONFIG1_TIME_PARA_GRAN (1 << 4) 62#define GPMC_CONFIG1_TIME_PARA_GRAN (1 << 4)
63#define GPMC_CONFIG1_FCLK_DIV(val) (val & 3) 63#define GPMC_CONFIG1_FCLK_DIV(val) (val & 3)
64#define GPMC_CONFIG1_FCLK_DIV2 (GPMC_CONFIG1_FCLK_DIV(1)) 64#define GPMC_CONFIG1_FCLK_DIV2 (GPMC_CONFIG1_FCLK_DIV(1))
@@ -73,6 +73,13 @@
73#define GPMC_IRQ_FIFOEVENTENABLE 0x01 73#define GPMC_IRQ_FIFOEVENTENABLE 0x01
74#define GPMC_IRQ_COUNT_EVENT 0x02 74#define GPMC_IRQ_COUNT_EVENT 0x02
75 75
76#define GPMC_BURST_4 4 /* 4 word burst */
77#define GPMC_BURST_8 8 /* 8 word burst */
78#define GPMC_BURST_16 16 /* 16 word burst */
79#define GPMC_DEVWIDTH_8BIT 1 /* 8-bit device width */
80#define GPMC_DEVWIDTH_16BIT 2 /* 16-bit device width */
81#define GPMC_MUX_AAD 1 /* Addr-Addr-Data multiplex */
82#define GPMC_MUX_AD 2 /* Addr-Data multiplex */
76 83
77/* bool type time settings */ 84/* bool type time settings */
78struct gpmc_bool_timings { 85struct gpmc_bool_timings {
@@ -178,10 +185,6 @@ struct gpmc_device_timings {
178 u8 cyc_wpl; /* write deassertion time in cycles */ 185 u8 cyc_wpl; /* write deassertion time in cycles */
179 u32 cyc_iaa; /* initial access time in cycles */ 186 u32 cyc_iaa; /* initial access time in cycles */
180 187
181 bool mux; /* address & data muxed */
182 bool sync_write;/* synchronous write */
183 bool sync_read; /* synchronous read */
184
185 /* extra delays */ 188 /* extra delays */
186 bool ce_xdelay; 189 bool ce_xdelay;
187 bool avd_xdelay; 190 bool avd_xdelay;
@@ -189,28 +192,40 @@ struct gpmc_device_timings {
189 bool we_xdelay; 192 bool we_xdelay;
190}; 193};
191 194
195struct gpmc_settings {
196 bool burst_wrap; /* enables wrap bursting */
197 bool burst_read; /* enables read page/burst mode */
198 bool burst_write; /* enables write page/burst mode */
199 bool device_nand; /* device is NAND */
200 bool sync_read; /* enables synchronous reads */
201 bool sync_write; /* enables synchronous writes */
202 bool wait_on_read; /* monitor wait on reads */
203 bool wait_on_write; /* monitor wait on writes */
204 u32 burst_len; /* page/burst length */
205 u32 device_width; /* device bus width (8 or 16 bit) */
206 u32 mux_add_data; /* multiplex address & data */
207 u32 wait_pin; /* wait-pin to be used */
208};
209
192extern int gpmc_calc_timings(struct gpmc_timings *gpmc_t, 210extern int gpmc_calc_timings(struct gpmc_timings *gpmc_t,
193 struct gpmc_device_timings *dev_t); 211 struct gpmc_settings *gpmc_s,
212 struct gpmc_device_timings *dev_t);
194 213
195extern void gpmc_update_nand_reg(struct gpmc_nand_regs *reg, int cs); 214extern void gpmc_update_nand_reg(struct gpmc_nand_regs *reg, int cs);
196extern int gpmc_get_client_irq(unsigned irq_config); 215extern int gpmc_get_client_irq(unsigned irq_config);
197 216
198extern unsigned int gpmc_ns_to_ticks(unsigned int time_ns);
199extern unsigned int gpmc_ps_to_ticks(unsigned int time_ps);
200extern unsigned int gpmc_ticks_to_ns(unsigned int ticks); 217extern unsigned int gpmc_ticks_to_ns(unsigned int ticks);
201extern unsigned int gpmc_round_ns_to_ticks(unsigned int time_ns);
202extern unsigned long gpmc_get_fclk_period(void);
203 218
204extern void gpmc_cs_write_reg(int cs, int idx, u32 val); 219extern void gpmc_cs_write_reg(int cs, int idx, u32 val);
205extern u32 gpmc_cs_read_reg(int cs, int idx);
206extern int gpmc_calc_divider(unsigned int sync_clk); 220extern int gpmc_calc_divider(unsigned int sync_clk);
207extern int gpmc_cs_set_timings(int cs, const struct gpmc_timings *t); 221extern int gpmc_cs_set_timings(int cs, const struct gpmc_timings *t);
222extern int gpmc_cs_program_settings(int cs, struct gpmc_settings *p);
208extern int gpmc_cs_request(int cs, unsigned long size, unsigned long *base); 223extern int gpmc_cs_request(int cs, unsigned long size, unsigned long *base);
209extern void gpmc_cs_free(int cs); 224extern void gpmc_cs_free(int cs);
210extern int gpmc_cs_set_reserved(int cs, int reserved);
211extern int gpmc_cs_reserved(int cs);
212extern void omap3_gpmc_save_context(void); 225extern void omap3_gpmc_save_context(void);
213extern void omap3_gpmc_restore_context(void); 226extern void omap3_gpmc_restore_context(void);
214extern int gpmc_cs_configure(int cs, int cmd, int wval); 227extern int gpmc_configure(int cmd, int wval);
228extern void gpmc_read_settings_dt(struct device_node *np,
229 struct gpmc_settings *p);
215 230
216#endif 231#endif
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 2bef5a7e6af8..e210fa830f8d 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -55,6 +55,12 @@
55#include "prm44xx.h" 55#include "prm44xx.h"
56 56
57/* 57/*
58 * omap_clk_init: points to a function that does the SoC-specific
59 * clock initializations
60 */
61int (*omap_clk_init)(void);
62
63/*
58 * The machine specific code may provide the extra mapping besides the 64 * The machine specific code may provide the extra mapping besides the
59 * default mapping provided here. 65 * default mapping provided here.
60 */ 66 */
@@ -406,7 +412,7 @@ void __init omap2420_init_early(void)
406 omap242x_clockdomains_init(); 412 omap242x_clockdomains_init();
407 omap2420_hwmod_init(); 413 omap2420_hwmod_init();
408 omap_hwmod_init_postsetup(); 414 omap_hwmod_init_postsetup();
409 omap2420_clk_init(); 415 omap_clk_init = omap2420_clk_init;
410} 416}
411 417
412void __init omap2420_init_late(void) 418void __init omap2420_init_late(void)
@@ -436,7 +442,7 @@ void __init omap2430_init_early(void)
436 omap243x_clockdomains_init(); 442 omap243x_clockdomains_init();
437 omap2430_hwmod_init(); 443 omap2430_hwmod_init();
438 omap_hwmod_init_postsetup(); 444 omap_hwmod_init_postsetup();
439 omap2430_clk_init(); 445 omap_clk_init = omap2430_clk_init;
440} 446}
441 447
442void __init omap2430_init_late(void) 448void __init omap2430_init_late(void)
@@ -471,7 +477,7 @@ void __init omap3_init_early(void)
471 omap3xxx_clockdomains_init(); 477 omap3xxx_clockdomains_init();
472 omap3xxx_hwmod_init(); 478 omap3xxx_hwmod_init();
473 omap_hwmod_init_postsetup(); 479 omap_hwmod_init_postsetup();
474 omap3xxx_clk_init(); 480 omap_clk_init = omap3xxx_clk_init;
475} 481}
476 482
477void __init omap3430_init_early(void) 483void __init omap3430_init_early(void)
@@ -509,7 +515,7 @@ void __init ti81xx_init_early(void)
509 omap3xxx_clockdomains_init(); 515 omap3xxx_clockdomains_init();
510 omap3xxx_hwmod_init(); 516 omap3xxx_hwmod_init();
511 omap_hwmod_init_postsetup(); 517 omap_hwmod_init_postsetup();
512 omap3xxx_clk_init(); 518 omap_clk_init = omap3xxx_clk_init;
513} 519}
514 520
515void __init omap3_init_late(void) 521void __init omap3_init_late(void)
@@ -577,7 +583,7 @@ void __init am33xx_init_early(void)
577 am33xx_clockdomains_init(); 583 am33xx_clockdomains_init();
578 am33xx_hwmod_init(); 584 am33xx_hwmod_init();
579 omap_hwmod_init_postsetup(); 585 omap_hwmod_init_postsetup();
580 am33xx_clk_init(); 586 omap_clk_init = am33xx_clk_init;
581} 587}
582#endif 588#endif
583 589
@@ -602,7 +608,7 @@ void __init omap4430_init_early(void)
602 omap44xx_clockdomains_init(); 608 omap44xx_clockdomains_init();
603 omap44xx_hwmod_init(); 609 omap44xx_hwmod_init();
604 omap_hwmod_init_postsetup(); 610 omap_hwmod_init_postsetup();
605 omap4xxx_clk_init(); 611 omap_clk_init = omap4xxx_clk_init;
606} 612}
607 613
608void __init omap4430_init_late(void) 614void __init omap4430_init_late(void)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 2520d46c8508..3f50f680372e 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -1364,7 +1364,9 @@ static void _enable_sysc(struct omap_hwmod *oh)
1364 } 1364 }
1365 1365
1366 if (sf & SYSC_HAS_MIDLEMODE) { 1366 if (sf & SYSC_HAS_MIDLEMODE) {
1367 if (oh->flags & HWMOD_SWSUP_MSTANDBY) { 1367 if (oh->flags & HWMOD_FORCE_MSTANDBY) {
1368 idlemode = HWMOD_IDLEMODE_FORCE;
1369 } else if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
1368 idlemode = HWMOD_IDLEMODE_NO; 1370 idlemode = HWMOD_IDLEMODE_NO;
1369 } else { 1371 } else {
1370 if (sf & SYSC_HAS_ENAWAKEUP) 1372 if (sf & SYSC_HAS_ENAWAKEUP)
@@ -1436,7 +1438,8 @@ static void _idle_sysc(struct omap_hwmod *oh)
1436 } 1438 }
1437 1439
1438 if (sf & SYSC_HAS_MIDLEMODE) { 1440 if (sf & SYSC_HAS_MIDLEMODE) {
1439 if (oh->flags & HWMOD_SWSUP_MSTANDBY) { 1441 if ((oh->flags & HWMOD_SWSUP_MSTANDBY) ||
1442 (oh->flags & HWMOD_FORCE_MSTANDBY)) {
1440 idlemode = HWMOD_IDLEMODE_FORCE; 1443 idlemode = HWMOD_IDLEMODE_FORCE;
1441 } else { 1444 } else {
1442 if (sf & SYSC_HAS_ENAWAKEUP) 1445 if (sf & SYSC_HAS_ENAWAKEUP)
diff --git a/arch/arm/mach-omap2/omap_hwmod.h b/arch/arm/mach-omap2/omap_hwmod.h
index 28f4dea0512e..fe5962921f07 100644
--- a/arch/arm/mach-omap2/omap_hwmod.h
+++ b/arch/arm/mach-omap2/omap_hwmod.h
@@ -427,8 +427,8 @@ struct omap_hwmod_omap4_prcm {
427 * 427 *
428 * HWMOD_SWSUP_SIDLE: omap_hwmod code should manually bring module in and out 428 * HWMOD_SWSUP_SIDLE: omap_hwmod code should manually bring module in and out
429 * of idle, rather than relying on module smart-idle 429 * of idle, rather than relying on module smart-idle
430 * HWMOD_SWSUP_MSTDBY: omap_hwmod code should manually bring module in and out 430 * HWMOD_SWSUP_MSTANDBY: omap_hwmod code should manually bring module in and
431 * of standby, rather than relying on module smart-standby 431 * out of standby, rather than relying on module smart-standby
432 * HWMOD_INIT_NO_RESET: don't reset this module at boot - important for 432 * HWMOD_INIT_NO_RESET: don't reset this module at boot - important for
433 * SDRAM controller, etc. XXX probably belongs outside the main hwmod file 433 * SDRAM controller, etc. XXX probably belongs outside the main hwmod file
434 * XXX Should be HWMOD_SETUP_NO_RESET 434 * XXX Should be HWMOD_SETUP_NO_RESET
@@ -459,6 +459,10 @@ struct omap_hwmod_omap4_prcm {
459 * correctly, or this is being abused to deal with some PM latency 459 * correctly, or this is being abused to deal with some PM latency
460 * issues -- but we're currently suffering from a shortage of 460 * issues -- but we're currently suffering from a shortage of
461 * folks who are able to track these issues down properly. 461 * folks who are able to track these issues down properly.
462 * HWMOD_FORCE_MSTANDBY: Always keep MIDLEMODE bits cleared so that device
463 * is kept in force-standby mode. Failing to do so causes PM problems
464 * with musb on OMAP3630 at least. Note that musb has a dedicated register
465 * to control MSTANDBY signal when MIDLEMODE is set to force-standby.
462 */ 466 */
463#define HWMOD_SWSUP_SIDLE (1 << 0) 467#define HWMOD_SWSUP_SIDLE (1 << 0)
464#define HWMOD_SWSUP_MSTANDBY (1 << 1) 468#define HWMOD_SWSUP_MSTANDBY (1 << 1)
@@ -471,6 +475,7 @@ struct omap_hwmod_omap4_prcm {
471#define HWMOD_16BIT_REG (1 << 8) 475#define HWMOD_16BIT_REG (1 << 8)
472#define HWMOD_EXT_OPT_MAIN_CLK (1 << 9) 476#define HWMOD_EXT_OPT_MAIN_CLK (1 << 9)
473#define HWMOD_BLOCK_WFI (1 << 10) 477#define HWMOD_BLOCK_WFI (1 << 10)
478#define HWMOD_FORCE_MSTANDBY (1 << 11)
474 479
475/* 480/*
476 * omap_hwmod._int_flags definitions 481 * omap_hwmod._int_flags definitions
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index ac7e03ec952f..5112d04e7b79 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -1707,9 +1707,14 @@ static struct omap_hwmod omap3xxx_usbhsotg_hwmod = {
1707 * Erratum ID: i479 idle_req / idle_ack mechanism potentially 1707 * Erratum ID: i479 idle_req / idle_ack mechanism potentially
1708 * broken when autoidle is enabled 1708 * broken when autoidle is enabled
1709 * workaround is to disable the autoidle bit at module level. 1709 * workaround is to disable the autoidle bit at module level.
1710 *
1711 * Enabling the device in any other MIDLEMODE setting but force-idle
1712 * causes core_pwrdm not enter idle states at least on OMAP3630.
1713 * Note that musb has OTG_FORCESTDBY register that controls MSTANDBY
1714 * signal when MIDLEMODE is set to force-idle.
1710 */ 1715 */
1711 .flags = HWMOD_NO_OCP_AUTOIDLE | HWMOD_SWSUP_SIDLE 1716 .flags = HWMOD_NO_OCP_AUTOIDLE | HWMOD_SWSUP_SIDLE
1712 | HWMOD_SWSUP_MSTANDBY, 1717 | HWMOD_FORCE_MSTANDBY,
1713}; 1718};
1714 1719
1715/* usb_otg_hs */ 1720/* usb_otg_hs */
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 0e47d2e1687c..9e0576569e07 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -2714,6 +2714,10 @@ static struct omap_ocp2scp_dev ocp2scp_dev_attr[] = {
2714 { } 2714 { }
2715}; 2715};
2716 2716
2717static struct omap_hwmod_opt_clk ocp2scp_usb_phy_opt_clks[] = {
2718 { .role = "48mhz", .clk = "ocp2scp_usb_phy_phy_48m" },
2719};
2720
2717/* ocp2scp_usb_phy */ 2721/* ocp2scp_usb_phy */
2718static struct omap_hwmod omap44xx_ocp2scp_usb_phy_hwmod = { 2722static struct omap_hwmod omap44xx_ocp2scp_usb_phy_hwmod = {
2719 .name = "ocp2scp_usb_phy", 2723 .name = "ocp2scp_usb_phy",
@@ -2728,6 +2732,8 @@ static struct omap_hwmod omap44xx_ocp2scp_usb_phy_hwmod = {
2728 }, 2732 },
2729 }, 2733 },
2730 .dev_attr = ocp2scp_dev_attr, 2734 .dev_attr = ocp2scp_dev_attr,
2735 .opt_clks = ocp2scp_usb_phy_opt_clks,
2736 .opt_clks_cnt = ARRAY_SIZE(ocp2scp_usb_phy_opt_clks),
2731}; 2737};
2732 2738
2733/* 2739/*
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index 31ae76481737..fdf1c039062c 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -46,7 +46,6 @@
46#include <asm/smp_twd.h> 46#include <asm/smp_twd.h>
47#include <asm/sched_clock.h> 47#include <asm/sched_clock.h>
48 48
49#include <asm/arch_timer.h>
50#include "omap_hwmod.h" 49#include "omap_hwmod.h"
51#include "omap_device.h" 50#include "omap_device.h"
52#include <plat/counter-32k.h> 51#include <plat/counter-32k.h>
@@ -626,14 +625,10 @@ void __init omap4_local_timer_init(void)
626#ifdef CONFIG_SOC_OMAP5 625#ifdef CONFIG_SOC_OMAP5
627void __init omap5_realtime_timer_init(void) 626void __init omap5_realtime_timer_init(void)
628{ 627{
629 int err;
630
631 omap4_sync32k_timer_init(); 628 omap4_sync32k_timer_init();
632 realtime_counter_init(); 629 realtime_counter_init();
633 630
634 err = arch_timer_of_register(); 631 clocksource_of_init();
635 if (err)
636 pr_err("%s: arch_timer_register failed %d\n", __func__, err);
637} 632}
638#endif /* CONFIG_SOC_OMAP5 */ 633#endif /* CONFIG_SOC_OMAP5 */
639 634
diff --git a/arch/arm/mach-omap2/usb-tusb6010.c b/arch/arm/mach-omap2/usb-tusb6010.c
index c5a3c6f9504e..e832bc7b8e2d 100644
--- a/arch/arm/mach-omap2/usb-tusb6010.c
+++ b/arch/arm/mach-omap2/usb-tusb6010.c
@@ -8,6 +8,7 @@
8 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
9 */ 9 */
10 10
11#include <linux/err.h>
11#include <linux/string.h> 12#include <linux/string.h>
12#include <linux/types.h> 13#include <linux/types.h>
13#include <linux/errno.h> 14#include <linux/errno.h>
@@ -26,6 +27,24 @@
26static u8 async_cs, sync_cs; 27static u8 async_cs, sync_cs;
27static unsigned refclk_psec; 28static unsigned refclk_psec;
28 29
30static struct gpmc_settings tusb_async = {
31 .wait_on_read = true,
32 .wait_on_write = true,
33 .device_width = GPMC_DEVWIDTH_16BIT,
34 .mux_add_data = GPMC_MUX_AD,
35};
36
37static struct gpmc_settings tusb_sync = {
38 .burst_read = true,
39 .burst_write = true,
40 .sync_read = true,
41 .sync_write = true,
42 .wait_on_read = true,
43 .wait_on_write = true,
44 .burst_len = GPMC_BURST_16,
45 .device_width = GPMC_DEVWIDTH_16BIT,
46 .mux_add_data = GPMC_MUX_AD,
47};
29 48
30/* NOTE: timings are from tusb 6010 datasheet Rev 1.8, 12-Sept 2006 */ 49/* NOTE: timings are from tusb 6010 datasheet Rev 1.8, 12-Sept 2006 */
31 50
@@ -37,8 +56,6 @@ static int tusb_set_async_mode(unsigned sysclk_ps)
37 56
38 memset(&dev_t, 0, sizeof(dev_t)); 57 memset(&dev_t, 0, sizeof(dev_t));
39 58
40 dev_t.mux = true;
41
42 dev_t.t_ceasu = 8 * 1000; 59 dev_t.t_ceasu = 8 * 1000;
43 dev_t.t_avdasu = t_acsnh_advnh - 7000; 60 dev_t.t_avdasu = t_acsnh_advnh - 7000;
44 dev_t.t_ce_avd = 1000; 61 dev_t.t_ce_avd = 1000;
@@ -52,7 +69,7 @@ static int tusb_set_async_mode(unsigned sysclk_ps)
52 dev_t.t_wpl = 300; 69 dev_t.t_wpl = 300;
53 dev_t.cyc_aavdh_we = 1; 70 dev_t.cyc_aavdh_we = 1;
54 71
55 gpmc_calc_timings(&t, &dev_t); 72 gpmc_calc_timings(&t, &tusb_async, &dev_t);
56 73
57 return gpmc_cs_set_timings(async_cs, &t); 74 return gpmc_cs_set_timings(async_cs, &t);
58} 75}
@@ -65,10 +82,6 @@ static int tusb_set_sync_mode(unsigned sysclk_ps)
65 82
66 memset(&dev_t, 0, sizeof(dev_t)); 83 memset(&dev_t, 0, sizeof(dev_t));
67 84
68 dev_t.mux = true;
69 dev_t.sync_read = true;
70 dev_t.sync_write = true;
71
72 dev_t.clk = 11100; 85 dev_t.clk = 11100;
73 dev_t.t_bacc = 1000; 86 dev_t.t_bacc = 1000;
74 dev_t.t_ces = 1000; 87 dev_t.t_ces = 1000;
@@ -84,7 +97,7 @@ static int tusb_set_sync_mode(unsigned sysclk_ps)
84 dev_t.cyc_wpl = 6; 97 dev_t.cyc_wpl = 6;
85 dev_t.t_ce_rdyz = 7000; 98 dev_t.t_ce_rdyz = 7000;
86 99
87 gpmc_calc_timings(&t, &dev_t); 100 gpmc_calc_timings(&t, &tusb_sync, &dev_t);
88 101
89 return gpmc_cs_set_timings(sync_cs, &t); 102 return gpmc_cs_set_timings(sync_cs, &t);
90} 103}
@@ -165,18 +178,12 @@ tusb6010_setup_interface(struct musb_hdrc_platform_data *data,
165 return status; 178 return status;
166 } 179 }
167 tusb_resources[0].end = tusb_resources[0].start + 0x9ff; 180 tusb_resources[0].end = tusb_resources[0].start + 0x9ff;
181 tusb_async.wait_pin = waitpin;
168 async_cs = async; 182 async_cs = async;
169 gpmc_cs_write_reg(async, GPMC_CS_CONFIG1,
170 GPMC_CONFIG1_PAGE_LEN(2)
171 | GPMC_CONFIG1_WAIT_READ_MON
172 | GPMC_CONFIG1_WAIT_WRITE_MON
173 | GPMC_CONFIG1_WAIT_PIN_SEL(waitpin)
174 | GPMC_CONFIG1_READTYPE_ASYNC
175 | GPMC_CONFIG1_WRITETYPE_ASYNC
176 | GPMC_CONFIG1_DEVICESIZE_16
177 | GPMC_CONFIG1_DEVICETYPE_NOR
178 | GPMC_CONFIG1_MUXADDDATA);
179 183
184 status = gpmc_cs_program_settings(async_cs, &tusb_async);
185 if (status < 0)
186 return status;
180 187
181 /* SYNC region, primarily for DMA */ 188 /* SYNC region, primarily for DMA */
182 status = gpmc_cs_request(sync, SZ_16M, (unsigned long *) 189 status = gpmc_cs_request(sync, SZ_16M, (unsigned long *)
@@ -186,21 +193,12 @@ tusb6010_setup_interface(struct musb_hdrc_platform_data *data,
186 return status; 193 return status;
187 } 194 }
188 tusb_resources[1].end = tusb_resources[1].start + 0x9ff; 195 tusb_resources[1].end = tusb_resources[1].start + 0x9ff;
196 tusb_sync.wait_pin = waitpin;
189 sync_cs = sync; 197 sync_cs = sync;
190 gpmc_cs_write_reg(sync, GPMC_CS_CONFIG1, 198
191 GPMC_CONFIG1_READMULTIPLE_SUPP 199 status = gpmc_cs_program_settings(sync_cs, &tusb_sync);
192 | GPMC_CONFIG1_READTYPE_SYNC 200 if (status < 0)
193 | GPMC_CONFIG1_WRITEMULTIPLE_SUPP 201 return status;
194 | GPMC_CONFIG1_WRITETYPE_SYNC
195 | GPMC_CONFIG1_PAGE_LEN(2)
196 | GPMC_CONFIG1_WAIT_READ_MON
197 | GPMC_CONFIG1_WAIT_WRITE_MON
198 | GPMC_CONFIG1_WAIT_PIN_SEL(waitpin)
199 | GPMC_CONFIG1_DEVICESIZE_16
200 | GPMC_CONFIG1_DEVICETYPE_NOR
201 | GPMC_CONFIG1_MUXADDDATA
202 /* fclk divider gets set later */
203 );
204 202
205 /* IRQ */ 203 /* IRQ */
206 status = gpio_request_one(irq, GPIOF_IN, "TUSB6010 irq"); 204 status = gpio_request_one(irq, GPIOF_IN, "TUSB6010 irq");
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-14 12:08:16 -0500