4 files changed, 5 insertions, 17 deletions

diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index 759c72a48f7f..7565f8e40a0e 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -300,17 +300,6 @@ u32 omap2_get_dpll_rate(struct clk *clk)
         return dpll_clk;
 }
 
-/*
- * Used for clocks that have the same value as the parent clock,
- * divided by some factor
- */
-unsigned long omap2_fixed_divisor_recalc(struct clk *clk)
-{
-        WARN_ON(!clk->fixed_div);
-
-        return clk->parent->rate / clk->fixed_div;
-}
-
 /**
  * omap2_clk_dflt_find_companion - find companion clock to @clk
  * @clk: struct clk * to find the companion clock of
diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h
index 93c48df3b5b1..0d70dc09370b 100644
--- a/arch/arm/mach-omap2/clock.h
+++ b/arch/arm/mach-omap2/clock.h
@@ -78,7 +78,6 @@ u32 omap2_clksel_round_rate_div(struct clk *clk, unsigned long target_rate,
                                 u32 *new_div);
 u32 omap2_clksel_to_divisor(struct clk *clk, u32 field_val);
 u32 omap2_divisor_to_clksel(struct clk *clk, u32 div);
-unsigned long omap2_fixed_divisor_recalc(struct clk *clk);
 long omap2_clksel_round_rate(struct clk *clk, unsigned long target_rate);
 int omap2_clksel_set_rate(struct clk *clk, unsigned long rate);
 u32 omap2_get_dpll_rate(struct clk *clk);
diff --git a/arch/arm/mach-omap2/clock2xxx_data.c b/arch/arm/mach-omap2/clock2xxx_data.c
index 97dc7cf7751d..402115fa9c12 100644
--- a/arch/arm/mach-omap2/clock2xxx_data.c
+++ b/arch/arm/mach-omap2/clock2xxx_data.c
@@ -261,7 +261,7 @@ static struct clk func_12m_ck = {
         .parent         = &func_48m_ck,
         .fixed_div      = 4,
         .clkdm_name     = "wkup_clkdm",
-        .recalc         = &omap2_fixed_divisor_recalc,
+        .recalc         = &omap_fixed_divisor_recalc,
 };
 
 /* Secure timer, only available in secure mode */
@@ -557,7 +557,7 @@ static struct clk iva1_mpu_int_ifck = {
         .enable_reg     = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_FCLKEN),
         .enable_bit     = OMAP2420_EN_IVA_MPU_SHIFT,
         .fixed_div      = 2,
-        .recalc         = &omap2_fixed_divisor_recalc,
+        .recalc         = &omap_fixed_divisor_recalc,
 };
 
 /*
diff --git a/arch/arm/mach-omap2/clock34xx_data.c b/arch/arm/mach-omap2/clock34xx_data.c
index cbb421a45763..9e7f68a8fca2 100644
--- a/arch/arm/mach-omap2/clock34xx_data.c
+++ b/arch/arm/mach-omap2/clock34xx_data.c
@@ -735,7 +735,7 @@ static struct clk omap_12m_fck = {
         .ops            = &clkops_null,
         .parent         = &omap_48m_fck,
         .fixed_div      = 4,
-        .recalc         = &omap2_fixed_divisor_recalc,
+        .recalc         = &omap_fixed_divisor_recalc,
 };
 
 /* This virstual clock is the source for dpll4_m4x2_ck */
@@ -1588,7 +1588,7 @@ static struct clk ssi_sst_fck_3430es1 = {
         .ops            = &clkops_null,
         .parent         = &ssi_ssr_fck_3430es1,
         .fixed_div      = 2,
-        .recalc         = &omap2_fixed_divisor_recalc,
+        .recalc         = &omap_fixed_divisor_recalc,
 };
 
 static struct clk ssi_sst_fck_3430es2 = {
@@ -1596,7 +1596,7 @@ static struct clk ssi_sst_fck_3430es2 = {
         .ops            = &clkops_null,
         .parent         = &ssi_ssr_fck_3430es2,
         .fixed_div      = 2,
-        .recalc         = &omap2_fixed_divisor_recalc,
+        .recalc         = &omap_fixed_divisor_recalc,
 };