diff options
Diffstat (limited to 'arch/arm/mach-omap2/usb-musb.c')
-rw-r--r-- | arch/arm/mach-omap2/usb-musb.c | 104 |
1 files changed, 102 insertions, 2 deletions
diff --git a/arch/arm/mach-omap2/usb-musb.c b/arch/arm/mach-omap2/usb-musb.c index 72605584bfff..5298949d4b11 100644 --- a/arch/arm/mach-omap2/usb-musb.c +++ b/arch/arm/mach-omap2/usb-musb.c | |||
@@ -30,8 +30,101 @@ | |||
30 | #include <mach/irqs.h> | 30 | #include <mach/irqs.h> |
31 | #include <mach/am35xx.h> | 31 | #include <mach/am35xx.h> |
32 | #include <plat/usb.h> | 32 | #include <plat/usb.h> |
33 | #include "control.h" | ||
33 | 34 | ||
34 | #ifdef CONFIG_USB_MUSB_SOC | 35 | #if defined(CONFIG_USB_MUSB_OMAP2PLUS) || defined (CONFIG_USB_MUSB_AM35X) |
36 | |||
37 | static void am35x_musb_reset(void) | ||
38 | { | ||
39 | u32 regval; | ||
40 | |||
41 | /* Reset the musb interface */ | ||
42 | regval = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET); | ||
43 | |||
44 | regval |= AM35XX_USBOTGSS_SW_RST; | ||
45 | omap_ctrl_writel(regval, AM35XX_CONTROL_IP_SW_RESET); | ||
46 | |||
47 | regval &= ~AM35XX_USBOTGSS_SW_RST; | ||
48 | omap_ctrl_writel(regval, AM35XX_CONTROL_IP_SW_RESET); | ||
49 | |||
50 | regval = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET); | ||
51 | } | ||
52 | |||
53 | static void am35x_musb_phy_power(u8 on) | ||
54 | { | ||
55 | unsigned long timeout = jiffies + msecs_to_jiffies(100); | ||
56 | u32 devconf2; | ||
57 | |||
58 | if (on) { | ||
59 | /* | ||
60 | * Start the on-chip PHY and its PLL. | ||
61 | */ | ||
62 | devconf2 = omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2); | ||
63 | |||
64 | devconf2 &= ~(CONF2_RESET | CONF2_PHYPWRDN | CONF2_OTGPWRDN); | ||
65 | devconf2 |= CONF2_PHY_PLLON; | ||
66 | |||
67 | omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2); | ||
68 | |||
69 | pr_info(KERN_INFO "Waiting for PHY clock good...\n"); | ||
70 | while (!(omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2) | ||
71 | & CONF2_PHYCLKGD)) { | ||
72 | cpu_relax(); | ||
73 | |||
74 | if (time_after(jiffies, timeout)) { | ||
75 | pr_err(KERN_ERR "musb PHY clock good timed out\n"); | ||
76 | break; | ||
77 | } | ||
78 | } | ||
79 | } else { | ||
80 | /* | ||
81 | * Power down the on-chip PHY. | ||
82 | */ | ||
83 | devconf2 = omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2); | ||
84 | |||
85 | devconf2 &= ~CONF2_PHY_PLLON; | ||
86 | devconf2 |= CONF2_PHYPWRDN | CONF2_OTGPWRDN; | ||
87 | omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2); | ||
88 | } | ||
89 | } | ||
90 | |||
91 | static void am35x_musb_clear_irq(void) | ||
92 | { | ||
93 | u32 regval; | ||
94 | |||
95 | regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR); | ||
96 | regval |= AM35XX_USBOTGSS_INT_CLR; | ||
97 | omap_ctrl_writel(regval, AM35XX_CONTROL_LVL_INTR_CLEAR); | ||
98 | regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR); | ||
99 | } | ||
100 | |||
101 | static void am35x_musb_set_mode(u8 musb_mode) | ||
102 | { | ||
103 | u32 devconf2 = omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2); | ||
104 | |||
105 | devconf2 &= ~CONF2_OTGMODE; | ||
106 | switch (musb_mode) { | ||
107 | #ifdef CONFIG_USB_MUSB_HDRC_HCD | ||
108 | case MUSB_HOST: /* Force VBUS valid, ID = 0 */ | ||
109 | devconf2 |= CONF2_FORCE_HOST; | ||
110 | break; | ||
111 | #endif | ||
112 | #ifdef CONFIG_USB_GADGET_MUSB_HDRC | ||
113 | case MUSB_PERIPHERAL: /* Force VBUS valid, ID = 1 */ | ||
114 | devconf2 |= CONF2_FORCE_DEVICE; | ||
115 | break; | ||
116 | #endif | ||
117 | #ifdef CONFIG_USB_MUSB_OTG | ||
118 | case MUSB_OTG: /* Don't override the VBUS/ID comparators */ | ||
119 | devconf2 |= CONF2_NO_OVERRIDE; | ||
120 | break; | ||
121 | #endif | ||
122 | default: | ||
123 | pr_info(KERN_INFO "Unsupported mode %u\n", musb_mode); | ||
124 | } | ||
125 | |||
126 | omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2); | ||
127 | } | ||
35 | 128 | ||
36 | static struct resource musb_resources[] = { | 129 | static struct resource musb_resources[] = { |
37 | [0] = { /* start and end set dynamically */ | 130 | [0] = { /* start and end set dynamically */ |
@@ -40,10 +133,12 @@ static struct resource musb_resources[] = { | |||
40 | [1] = { /* general IRQ */ | 133 | [1] = { /* general IRQ */ |
41 | .start = INT_243X_HS_USB_MC, | 134 | .start = INT_243X_HS_USB_MC, |
42 | .flags = IORESOURCE_IRQ, | 135 | .flags = IORESOURCE_IRQ, |
136 | .name = "mc", | ||
43 | }, | 137 | }, |
44 | [2] = { /* DMA IRQ */ | 138 | [2] = { /* DMA IRQ */ |
45 | .start = INT_243X_HS_USB_DMA, | 139 | .start = INT_243X_HS_USB_DMA, |
46 | .flags = IORESOURCE_IRQ, | 140 | .flags = IORESOURCE_IRQ, |
141 | .name = "dma", | ||
47 | }, | 142 | }, |
48 | }; | 143 | }; |
49 | 144 | ||
@@ -75,7 +170,7 @@ static struct musb_hdrc_platform_data musb_plat = { | |||
75 | static u64 musb_dmamask = DMA_BIT_MASK(32); | 170 | static u64 musb_dmamask = DMA_BIT_MASK(32); |
76 | 171 | ||
77 | static struct platform_device musb_device = { | 172 | static struct platform_device musb_device = { |
78 | .name = "musb_hdrc", | 173 | .name = "musb-omap2430", |
79 | .id = -1, | 174 | .id = -1, |
80 | .dev = { | 175 | .dev = { |
81 | .dma_mask = &musb_dmamask, | 176 | .dma_mask = &musb_dmamask, |
@@ -91,8 +186,13 @@ void __init usb_musb_init(struct omap_musb_board_data *board_data) | |||
91 | if (cpu_is_omap243x()) { | 186 | if (cpu_is_omap243x()) { |
92 | musb_resources[0].start = OMAP243X_HS_BASE; | 187 | musb_resources[0].start = OMAP243X_HS_BASE; |
93 | } else if (cpu_is_omap3517() || cpu_is_omap3505()) { | 188 | } else if (cpu_is_omap3517() || cpu_is_omap3505()) { |
189 | musb_device.name = "musb-am35x"; | ||
94 | musb_resources[0].start = AM35XX_IPSS_USBOTGSS_BASE; | 190 | musb_resources[0].start = AM35XX_IPSS_USBOTGSS_BASE; |
95 | musb_resources[1].start = INT_35XX_USBOTG_IRQ; | 191 | musb_resources[1].start = INT_35XX_USBOTG_IRQ; |
192 | board_data->set_phy_power = am35x_musb_phy_power; | ||
193 | board_data->clear_irq = am35x_musb_clear_irq; | ||
194 | board_data->set_mode = am35x_musb_set_mode; | ||
195 | board_data->reset = am35x_musb_reset; | ||
96 | } else if (cpu_is_omap34xx()) { | 196 | } else if (cpu_is_omap34xx()) { |
97 | musb_resources[0].start = OMAP34XX_HSUSB_OTG_BASE; | 197 | musb_resources[0].start = OMAP34XX_HSUSB_OTG_BASE; |
98 | } else if (cpu_is_omap44xx()) { | 198 | } else if (cpu_is_omap44xx()) { |