1 files changed, 5 insertions, 16 deletions

diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index 5975a42e16d4..d86074745c50 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -131,7 +131,6 @@ static void omap2_gp_timer_set_mode(enum clock_event_mode mode,
 static struct clock_event_device clockevent_gpt = {
         .name           = "gp_timer",
         .features       = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
-        .shift          = 32,
         .rating         = 300,
         .set_next_event = omap2_gp_timer_set_next_event,
         .set_mode       = omap2_gp_timer_set_mode,
@@ -165,15 +164,11 @@ static struct device_node * __init omap_get_timer_dt(struct of_device_id *match,
         struct device_node *np;
 
         for_each_matching_node(np, match) {
-                if (!of_device_is_available(np)) {
-                        of_node_put(np);
+                if (!of_device_is_available(np))
                         continue;
-                }
 
-                if (property && !of_get_property(np, property, NULL)) {
-                        of_node_put(np);
+                if (property && !of_get_property(np, property, NULL))
                         continue;
-                }
 
                 of_add_property(np, &device_disabled);
                 return np;
@@ -340,17 +335,11 @@ static void __init omap2_gp_clockevent_init(int gptimer_id,
 
         __omap_dm_timer_int_enable(&clkev, OMAP_TIMER_INT_OVERFLOW);
 
-        clockevent_gpt.mult = div_sc(clkev.rate, NSEC_PER_SEC,
-                                     clockevent_gpt.shift);
-        clockevent_gpt.max_delta_ns =
-                clockevent_delta2ns(0xffffffff, &clockevent_gpt);
-        clockevent_gpt.min_delta_ns =
-                clockevent_delta2ns(3, &clockevent_gpt);
-                /* Timer internal resynch latency. */
-
         clockevent_gpt.cpumask = cpu_possible_mask;
         clockevent_gpt.irq = omap_dm_timer_get_irq(&clkev);
-        clockevents_register_device(&clockevent_gpt);
+        clockevents_config_and_register(&clockevent_gpt, clkev.rate,
+                                        3, /* Timer internal resynch latency */
+                                        0xffffffff);
 
         pr_info("OMAP clockevent source: GPTIMER%d at %lu Hz\n",
                 gptimer_id, clkev.rate);