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Diffstat (limited to 'arch/arm/mach-omap2/timer.c')
-rw-r--r--arch/arm/mach-omap2/timer.c20
1 files changed, 4 insertions, 16 deletions
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index 9edcd520510f..5c9acea95761 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -254,7 +254,6 @@ static struct omap_dm_timer clksrc;
254/* 254/*
255 * clocksource 255 * clocksource
256 */ 256 */
257static DEFINE_CLOCK_DATA(cd);
258static cycle_t clocksource_read_cycles(struct clocksource *cs) 257static cycle_t clocksource_read_cycles(struct clocksource *cs)
259{ 258{
260 return (cycle_t)__omap_dm_timer_read_counter(&clksrc, 1); 259 return (cycle_t)__omap_dm_timer_read_counter(&clksrc, 1);
@@ -268,23 +267,12 @@ static struct clocksource clocksource_gpt = {
268 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 267 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
269}; 268};
270 269
271static void notrace dmtimer_update_sched_clock(void) 270static u32 notrace dmtimer_read_sched_clock(void)
272{ 271{
273 u32 cyc;
274
275 cyc = __omap_dm_timer_read_counter(&clksrc, 1);
276
277 update_sched_clock(&cd, cyc, (u32)~0);
278}
279
280unsigned long long notrace sched_clock(void)
281{
282 u32 cyc = 0;
283
284 if (clksrc.reserved) 272 if (clksrc.reserved)
285 cyc = __omap_dm_timer_read_counter(&clksrc, 1); 273 return __omap_dm_timer_read_counter(&clksrc, 1);
286 274
287 return cyc_to_sched_clock(&cd, cyc, (u32)~0); 275 return 0;
288} 276}
289 277
290/* Setup free-running counter for clocksource */ 278/* Setup free-running counter for clocksource */
@@ -301,7 +289,7 @@ static void __init omap2_gp_clocksource_init(int gptimer_id,
301 289
302 __omap_dm_timer_load_start(&clksrc, 290 __omap_dm_timer_load_start(&clksrc,
303 OMAP_TIMER_CTRL_ST | OMAP_TIMER_CTRL_AR, 0, 1); 291 OMAP_TIMER_CTRL_ST | OMAP_TIMER_CTRL_AR, 0, 1);
304 init_sched_clock(&cd, dmtimer_update_sched_clock, 32, clksrc.rate); 292 setup_sched_clock(dmtimer_read_sched_clock, 32, clksrc.rate);
305 293
306 if (clocksource_register_hz(&clocksource_gpt, clksrc.rate)) 294 if (clocksource_register_hz(&clocksource_gpt, clksrc.rate))
307 pr_err("Could not register clocksource %s\n", 295 pr_err("Could not register clocksource %s\n",