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-rw-r--r--arch/arm/mach-omap2/sram34xx.S4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-omap2/sram34xx.S b/arch/arm/mach-omap2/sram34xx.S
index 2c7146136342..f4a356d5d2d8 100644
--- a/arch/arm/mach-omap2/sram34xx.S
+++ b/arch/arm/mach-omap2/sram34xx.S
@@ -43,6 +43,7 @@
43 */ 43 */
44ENTRY(omap3_sram_configure_core_dpll) 44ENTRY(omap3_sram_configure_core_dpll)
45 stmfd sp!, {r1-r12, lr} @ store regs to stack 45 stmfd sp!, {r1-r12, lr} @ store regs to stack
46 dsb @ flush buffered writes to interconnect
46 cmp r3, #0x2 47 cmp r3, #0x2
47 blne configure_sdrc 48 blne configure_sdrc
48 cmp r3, #0x2 49 cmp r3, #0x2
@@ -58,6 +59,7 @@ ENTRY(omap3_sram_configure_core_dpll)
58 blne wait_dll_lock 59 blne wait_dll_lock
59 cmp r3, #0x1 60 cmp r3, #0x1
60 blne configure_sdrc 61 blne configure_sdrc
62 isb @ prevent speculative exec past here
61 mov r0, #0 @ return value 63 mov r0, #0 @ return value
62 ldmfd sp!, {r1-r12, pc} @ restore regs and return 64 ldmfd sp!, {r1-r12, pc} @ restore regs and return
63unlock_dll: 65unlock_dll:
@@ -73,8 +75,6 @@ lock_dll:
73 str r5, [r4] 75 str r5, [r4]
74 bx lr 76 bx lr
75sdram_in_selfrefresh: 77sdram_in_selfrefresh:
76 mov r5, #0x0 @ Move 0 to R5
77 mcr p15, 0, r5, c7, c10, 5 @ memory barrier
78 ldr r4, omap3_sdrc_power @ read the SDRC_POWER register 78 ldr r4, omap3_sdrc_power @ read the SDRC_POWER register
79 ldr r5, [r4] @ read the contents of SDRC_POWER 79 ldr r5, [r4] @ read the contents of SDRC_POWER
80 orr r5, r5, #0x40 @ enable self refresh on idle req 80 orr r5, r5, #0x40 @ enable self refresh on idle req