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-rw-r--r--arch/arm/mach-omap2/sleep34xx.S61
1 files changed, 58 insertions, 3 deletions
diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S
index c3626ea48143..d522cd70bf53 100644
--- a/arch/arm/mach-omap2/sleep34xx.S
+++ b/arch/arm/mach-omap2/sleep34xx.S
@@ -33,12 +33,14 @@
33#include "prm.h" 33#include "prm.h"
34#include "sdrc.h" 34#include "sdrc.h"
35 35
36#define SDRC_SCRATCHPAD_SEM_V 0xfa00291c
37
36#define PM_PREPWSTST_CORE_V OMAP34XX_PRM_REGADDR(CORE_MOD, \ 38#define PM_PREPWSTST_CORE_V OMAP34XX_PRM_REGADDR(CORE_MOD, \
37 OMAP3430_PM_PREPWSTST) 39 OMAP3430_PM_PREPWSTST)
38#define PM_PREPWSTST_CORE_P 0x48306AE8 40#define PM_PREPWSTST_CORE_P 0x48306AE8
39#define PM_PREPWSTST_MPU_V OMAP34XX_PRM_REGADDR(MPU_MOD, \ 41#define PM_PREPWSTST_MPU_V OMAP34XX_PRM_REGADDR(MPU_MOD, \
40 OMAP3430_PM_PREPWSTST) 42 OMAP3430_PM_PREPWSTST)
41#define PM_PWSTCTRL_MPU_P OMAP3430_PRM_BASE + MPU_MOD + PM_PWSTCTRL 43#define PM_PWSTCTRL_MPU_P OMAP3430_PRM_BASE + MPU_MOD + OMAP2_PM_PWSTCTRL
42#define CM_IDLEST1_CORE_V OMAP34XX_CM_REGADDR(CORE_MOD, CM_IDLEST1) 44#define CM_IDLEST1_CORE_V OMAP34XX_CM_REGADDR(CORE_MOD, CM_IDLEST1)
43#define SRAM_BASE_P 0x40200000 45#define SRAM_BASE_P 0x40200000
44#define CONTROL_STAT 0x480022F0 46#define CONTROL_STAT 0x480022F0
@@ -57,6 +59,37 @@
57#define SDRC_DLLA_STATUS_V OMAP34XX_SDRC_REGADDR(SDRC_DLLA_STATUS) 59#define SDRC_DLLA_STATUS_V OMAP34XX_SDRC_REGADDR(SDRC_DLLA_STATUS)
58#define SDRC_DLLA_CTRL_V OMAP34XX_SDRC_REGADDR(SDRC_DLLA_CTRL) 60#define SDRC_DLLA_CTRL_V OMAP34XX_SDRC_REGADDR(SDRC_DLLA_CTRL)
59 61
62 .text
63/* Function to aquire the semaphore in scratchpad */
64ENTRY(lock_scratchpad_sem)
65 stmfd sp!, {lr} @ save registers on stack
66wait_sem:
67 mov r0,#1
68 ldr r1, sdrc_scratchpad_sem
69wait_loop:
70 ldr r2, [r1] @ load the lock value
71 cmp r2, r0 @ is the lock free ?
72 beq wait_loop @ not free...
73 swp r2, r0, [r1] @ semaphore free so lock it and proceed
74 cmp r2, r0 @ did we succeed ?
75 beq wait_sem @ no - try again
76 ldmfd sp!, {pc} @ restore regs and return
77sdrc_scratchpad_sem:
78 .word SDRC_SCRATCHPAD_SEM_V
79ENTRY(lock_scratchpad_sem_sz)
80 .word . - lock_scratchpad_sem
81
82 .text
83/* Function to release the scratchpad semaphore */
84ENTRY(unlock_scratchpad_sem)
85 stmfd sp!, {lr} @ save registers on stack
86 ldr r3, sdrc_scratchpad_sem
87 mov r2,#0
88 str r2,[r3]
89 ldmfd sp!, {pc} @ restore regs and return
90ENTRY(unlock_scratchpad_sem_sz)
91 .word . - unlock_scratchpad_sem
92
60 .text 93 .text
61/* Function call to get the restore pointer for resume from OFF */ 94/* Function call to get the restore pointer for resume from OFF */
62ENTRY(get_restore_pointer) 95ENTRY(get_restore_pointer)
@@ -251,6 +284,21 @@ restore:
251 mcr p15, 0, r0, c7, c10, 5 @ data memory barrier 284 mcr p15, 0, r0, c7, c10, 5 @ data memory barrier
252 .word 0xE1600071 @ call SMI monitor (smi #1) 285 .word 0xE1600071 @ call SMI monitor (smi #1)
253 286
287#ifdef CONFIG_OMAP3_L2_AUX_SECURE_SAVE_RESTORE
288 /* Restore L2 aux control register */
289 @ set service ID for PPA
290 mov r0, #CONFIG_OMAP3_L2_AUX_SECURE_SERVICE_SET_ID
291 mov r12, r0 @ copy service ID in r12
292 mov r1, #0 @ set task ID for ROM code in r1
293 mov r2, #4 @ set some flags in r2, r6
294 mov r6, #0xff
295 ldr r4, scratchpad_base
296 ldr r3, [r4, #0xBC]
297 adds r3, r3, #8 @ r3 points to parameters
298 mcr p15, 0, r0, c7, c10, 4 @ data write barrier
299 mcr p15, 0, r0, c7, c10, 5 @ data memory barrier
300 .word 0xE1600071 @ call SMI monitor (smi #1)
301#endif
254 b logic_l1_restore 302 b logic_l1_restore
255l2_inv_api_params: 303l2_inv_api_params:
256 .word 0x1, 0x00 304 .word 0x1, 0x00
@@ -264,6 +312,11 @@ smi: .word 0xE1600070 @ Call SMI monitor (smieq)
264 ldr r0, [r3,#4] 312 ldr r0, [r3,#4]
265 mov r12, #0x3 313 mov r12, #0x3
266 .word 0xE1600070 @ Call SMI monitor (smieq) 314 .word 0xE1600070 @ Call SMI monitor (smieq)
315 ldr r4, scratchpad_base
316 ldr r3, [r4,#0xBC]
317 ldr r0, [r3,#12]
318 mov r12, #0x2
319 .word 0xE1600070 @ Call SMI monitor (smieq)
267logic_l1_restore: 320logic_l1_restore:
268 mov r1, #0 321 mov r1, #0
269 /* Invalidate all instruction caches to PoU 322 /* Invalidate all instruction caches to PoU
@@ -272,7 +325,7 @@ logic_l1_restore:
272 325
273 ldr r4, scratchpad_base 326 ldr r4, scratchpad_base
274 ldr r3, [r4,#0xBC] 327 ldr r3, [r4,#0xBC]
275 adds r3, r3, #8 328 adds r3, r3, #16
276 ldmia r3!, {r4-r6} 329 ldmia r3!, {r4-r6}
277 mov sp, r4 330 mov sp, r4
278 msr spsr_cxsf, r5 331 msr spsr_cxsf, r5
@@ -391,7 +444,9 @@ save_context_wfi:
391 mov r8, r0 /* Store SDRAM address in r8 */ 444 mov r8, r0 /* Store SDRAM address in r8 */
392 mrc p15, 0, r5, c1, c0, 1 @ Read Auxiliary Control Register 445 mrc p15, 0, r5, c1, c0, 1 @ Read Auxiliary Control Register
393 mov r4, #0x1 @ Number of parameters for restore call 446 mov r4, #0x1 @ Number of parameters for restore call
394 stmia r8!, {r4-r5} 447 stmia r8!, {r4-r5} @ Push parameters for restore call
448 mrc p15, 1, r5, c9, c0, 2 @ Read L2 AUX ctrl register
449 stmia r8!, {r4-r5} @ Push parameters for restore call
395 /* Check what that target sleep state is:stored in r1*/ 450 /* Check what that target sleep state is:stored in r1*/
396 /* 1 - Only L1 and logic lost */ 451 /* 1 - Only L1 and logic lost */
397 /* 2 - Only L2 lost */ 452 /* 2 - Only L2 lost */