diff options
Diffstat (limited to 'arch/arm/mach-omap2/serial.c')
| -rw-r--r-- | arch/arm/mach-omap2/serial.c | 23 |
1 files changed, 19 insertions, 4 deletions
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c index 19805a7de06c..e10a02df6e1d 100644 --- a/arch/arm/mach-omap2/serial.c +++ b/arch/arm/mach-omap2/serial.c | |||
| @@ -36,7 +36,13 @@ | |||
| 36 | #define UART_OMAP_NO_EMPTY_FIFO_READ_IP_REV 0x52 | 36 | #define UART_OMAP_NO_EMPTY_FIFO_READ_IP_REV 0x52 |
| 37 | #define UART_OMAP_WER 0x17 /* Wake-up enable register */ | 37 | #define UART_OMAP_WER 0x17 /* Wake-up enable register */ |
| 38 | 38 | ||
| 39 | #define DEFAULT_TIMEOUT (5 * HZ) | 39 | /* |
| 40 | * NOTE: By default the serial timeout is disabled as it causes lost characters | ||
| 41 | * over the serial ports. This means that the UART clocks will stay on until | ||
| 42 | * disabled via sysfs. This also causes that any deeper omap sleep states are | ||
| 43 | * blocked. | ||
| 44 | */ | ||
| 45 | #define DEFAULT_TIMEOUT 0 | ||
| 40 | 46 | ||
| 41 | struct omap_uart_state { | 47 | struct omap_uart_state { |
| 42 | int num; | 48 | int num; |
| @@ -125,6 +131,13 @@ static struct plat_serial8250_port serial_platform_data3[] = { | |||
| 125 | } | 131 | } |
| 126 | }; | 132 | }; |
| 127 | #endif | 133 | #endif |
| 134 | static inline unsigned int __serial_read_reg(struct uart_port *up, | ||
| 135 | int offset) | ||
| 136 | { | ||
| 137 | offset <<= up->regshift; | ||
| 138 | return (unsigned int)__raw_readb(up->membase + offset); | ||
| 139 | } | ||
| 140 | |||
| 128 | static inline unsigned int serial_read_reg(struct plat_serial8250_port *up, | 141 | static inline unsigned int serial_read_reg(struct plat_serial8250_port *up, |
| 129 | int offset) | 142 | int offset) |
| 130 | { | 143 | { |
| @@ -415,7 +428,8 @@ static void omap_uart_idle_init(struct omap_uart_state *uart) | |||
| 415 | uart->timeout = DEFAULT_TIMEOUT; | 428 | uart->timeout = DEFAULT_TIMEOUT; |
| 416 | setup_timer(&uart->timer, omap_uart_idle_timer, | 429 | setup_timer(&uart->timer, omap_uart_idle_timer, |
| 417 | (unsigned long) uart); | 430 | (unsigned long) uart); |
| 418 | mod_timer(&uart->timer, jiffies + uart->timeout); | 431 | if (uart->timeout) |
| 432 | mod_timer(&uart->timer, jiffies + uart->timeout); | ||
| 419 | omap_uart_smart_idle_enable(uart, 0); | 433 | omap_uart_smart_idle_enable(uart, 0); |
| 420 | 434 | ||
| 421 | if (cpu_is_omap34xx()) { | 435 | if (cpu_is_omap34xx()) { |
| @@ -583,11 +597,12 @@ static unsigned int serial_in_override(struct uart_port *up, int offset) | |||
| 583 | { | 597 | { |
| 584 | if (UART_RX == offset) { | 598 | if (UART_RX == offset) { |
| 585 | unsigned int lsr; | 599 | unsigned int lsr; |
| 586 | lsr = serial_read_reg(omap_uart[up->line].p, UART_LSR); | 600 | lsr = __serial_read_reg(up, UART_LSR); |
| 587 | if (!(lsr & UART_LSR_DR)) | 601 | if (!(lsr & UART_LSR_DR)) |
| 588 | return -EPERM; | 602 | return -EPERM; |
| 589 | } | 603 | } |
| 590 | return serial_read_reg(omap_uart[up->line].p, offset); | 604 | |
| 605 | return __serial_read_reg(up, offset); | ||
| 591 | } | 606 | } |
| 592 | 607 | ||
| 593 | void __init omap_serial_early_init(void) | 608 | void __init omap_serial_early_init(void) |
