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-rw-r--r--arch/arm/mach-omap2/prm44xx.c81
1 files changed, 80 insertions, 1 deletions
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index a1ff918d9bed..a2a04bfa9628 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -15,12 +15,13 @@
15#include <linux/delay.h> 15#include <linux/delay.h>
16#include <linux/errno.h> 16#include <linux/errno.h>
17#include <linux/err.h> 17#include <linux/err.h>
18#include <linux/io.h>
18 19
19#include <plat/common.h> 20#include <plat/common.h>
20#include <plat/cpu.h> 21#include <plat/cpu.h>
21#include <plat/prcm.h> 22#include <plat/prcm.h>
22 23
23#include "prm.h" 24#include "prm44xx.h"
24#include "prm-regbits-44xx.h" 25#include "prm-regbits-44xx.h"
25 26
26/* 27/*
@@ -29,6 +30,70 @@
29 */ 30 */
30#define OMAP4_RST_CTRL_ST_OFFSET 4 31#define OMAP4_RST_CTRL_ST_OFFSET 4
31 32
33/* PRM low-level functions */
34
35/* Read a register in a CM/PRM instance in the PRM module */
36u32 omap4_prm_read_inst_reg(s16 inst, u16 reg)
37{
38 return __raw_readl(OMAP44XX_PRM_REGADDR(inst, reg));
39}
40
41/* Write into a register in a CM/PRM instance in the PRM module */
42void omap4_prm_write_inst_reg(u32 val, s16 inst, u16 reg)
43{
44 __raw_writel(val, OMAP44XX_PRM_REGADDR(inst, reg));
45}
46
47/* Read-modify-write a register in a PRM module. Caller must lock */
48u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 reg)
49{
50 u32 v;
51
52 v = omap4_prm_read_inst_reg(inst, reg);
53 v &= ~mask;
54 v |= bits;
55 omap4_prm_write_inst_reg(v, inst, reg);
56
57 return v;
58}
59
60/* Read a PRM register, AND it, and shift the result down to bit 0 */
61/* XXX deprecated */
62u32 omap4_prm_read_bits_shift(void __iomem *reg, u32 mask)
63{
64 u32 v;
65
66 v = __raw_readl(reg);
67 v &= mask;
68 v >>= __ffs(mask);
69
70 return v;
71}
72
73/* Read-modify-write a register in a PRM module. Caller must lock */
74/* XXX deprecated */
75u32 omap4_prm_rmw_reg_bits(u32 mask, u32 bits, void __iomem *reg)
76{
77 u32 v;
78
79 v = __raw_readl(reg);
80 v &= ~mask;
81 v |= bits;
82 __raw_writel(v, reg);
83
84 return v;
85}
86
87u32 omap4_prm_set_inst_reg_bits(u32 bits, s16 inst, s16 reg)
88{
89 return omap4_prm_rmw_inst_reg_bits(bits, bits, inst, reg);
90}
91
92u32 omap4_prm_clear_inst_reg_bits(u32 bits, s16 inst, s16 reg)
93{
94 return omap4_prm_rmw_inst_reg_bits(bits, 0x0, inst, reg);
95}
96
32/** 97/**
33 * omap4_prm_is_hardreset_asserted - read the HW reset line state of 98 * omap4_prm_is_hardreset_asserted - read the HW reset line state of
34 * submodules contained in the hwmod module 99 * submodules contained in the hwmod module
@@ -114,3 +179,17 @@ int omap4_prm_deassert_hardreset(void __iomem *rstctrl_reg, u8 shift)
114 return (c == MAX_MODULE_HARDRESET_WAIT) ? -EBUSY : 0; 179 return (c == MAX_MODULE_HARDRESET_WAIT) ? -EBUSY : 0;
115} 180}
116 181
182void omap4_prm_global_warm_sw_reset(void)
183{
184 u32 v;
185
186 v = omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST,
187 OMAP4_RM_RSTCTRL);
188 v |= OMAP4430_RST_GLOBAL_WARM_SW_MASK;
189 omap4_prm_write_inst_reg(v, OMAP4430_PRM_DEVICE_INST,
190 OMAP4_RM_RSTCTRL);
191
192 /* OCP barrier */
193 v = omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST,
194 OMAP4_RM_RSTCTRL);
195}