diff options
Diffstat (limited to 'arch/arm/mach-omap2/prm2xxx.c')
-rw-r--r-- | arch/arm/mach-omap2/prm2xxx.c | 91 |
1 files changed, 86 insertions, 5 deletions
diff --git a/arch/arm/mach-omap2/prm2xxx.c b/arch/arm/mach-omap2/prm2xxx.c index faeab18696df..418de9c3b319 100644 --- a/arch/arm/mach-omap2/prm2xxx.c +++ b/arch/arm/mach-omap2/prm2xxx.c | |||
@@ -18,9 +18,8 @@ | |||
18 | #include <linux/io.h> | 18 | #include <linux/io.h> |
19 | #include <linux/irq.h> | 19 | #include <linux/irq.h> |
20 | 20 | ||
21 | #include "soc.h" | ||
21 | #include "common.h" | 22 | #include "common.h" |
22 | #include <plat/cpu.h> | ||
23 | |||
24 | #include "vp.h" | 23 | #include "vp.h" |
25 | #include "powerdomain.h" | 24 | #include "powerdomain.h" |
26 | #include "clockdomain.h" | 25 | #include "clockdomain.h" |
@@ -29,6 +28,14 @@ | |||
29 | #include "prm-regbits-24xx.h" | 28 | #include "prm-regbits-24xx.h" |
30 | 29 | ||
31 | /* | 30 | /* |
31 | * OMAP24xx PM_PWSTCTRL_*.POWERSTATE and PM_PWSTST_*.LASTSTATEENTERED bits - | ||
32 | * these are reversed from the bits used on OMAP3+ | ||
33 | */ | ||
34 | #define OMAP24XX_PWRDM_POWER_ON 0x0 | ||
35 | #define OMAP24XX_PWRDM_POWER_RET 0x1 | ||
36 | #define OMAP24XX_PWRDM_POWER_OFF 0x3 | ||
37 | |||
38 | /* | ||
32 | * omap2xxx_prm_reset_src_map - map from bits in the PRM_RSTST_WKUP | 39 | * omap2xxx_prm_reset_src_map - map from bits in the PRM_RSTST_WKUP |
33 | * hardware register (which are specific to the OMAP2xxx SoCs) to | 40 | * hardware register (which are specific to the OMAP2xxx SoCs) to |
34 | * reset source ID bit shifts (which is an OMAP SoC-independent | 41 | * reset source ID bit shifts (which is an OMAP SoC-independent |
@@ -69,6 +76,34 @@ static u32 omap2xxx_prm_read_reset_sources(void) | |||
69 | } | 76 | } |
70 | 77 | ||
71 | /** | 78 | /** |
79 | * omap2xxx_pwrst_to_common_pwrst - convert OMAP2xxx pwrst to common pwrst | ||
80 | * @omap2xxx_pwrst: OMAP2xxx hardware power state to convert | ||
81 | * | ||
82 | * Return the common power state bits corresponding to the OMAP2xxx | ||
83 | * hardware power state bits @omap2xxx_pwrst, or -EINVAL upon error. | ||
84 | */ | ||
85 | static int omap2xxx_pwrst_to_common_pwrst(u8 omap2xxx_pwrst) | ||
86 | { | ||
87 | u8 pwrst; | ||
88 | |||
89 | switch (omap2xxx_pwrst) { | ||
90 | case OMAP24XX_PWRDM_POWER_OFF: | ||
91 | pwrst = PWRDM_POWER_OFF; | ||
92 | break; | ||
93 | case OMAP24XX_PWRDM_POWER_RET: | ||
94 | pwrst = PWRDM_POWER_RET; | ||
95 | break; | ||
96 | case OMAP24XX_PWRDM_POWER_ON: | ||
97 | pwrst = PWRDM_POWER_ON; | ||
98 | break; | ||
99 | default: | ||
100 | return -EINVAL; | ||
101 | } | ||
102 | |||
103 | return pwrst; | ||
104 | } | ||
105 | |||
106 | /** | ||
72 | * omap2xxx_prm_dpll_reset - use DPLL reset to reboot the OMAP SoC | 107 | * omap2xxx_prm_dpll_reset - use DPLL reset to reboot the OMAP SoC |
73 | * | 108 | * |
74 | * Set the DPLL reset bit, which should reboot the SoC. This is the | 109 | * Set the DPLL reset bit, which should reboot the SoC. This is the |
@@ -98,10 +133,56 @@ int omap2xxx_clkdm_wakeup(struct clockdomain *clkdm) | |||
98 | return 0; | 133 | return 0; |
99 | } | 134 | } |
100 | 135 | ||
136 | static int omap2xxx_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst) | ||
137 | { | ||
138 | u8 omap24xx_pwrst; | ||
139 | |||
140 | switch (pwrst) { | ||
141 | case PWRDM_POWER_OFF: | ||
142 | omap24xx_pwrst = OMAP24XX_PWRDM_POWER_OFF; | ||
143 | break; | ||
144 | case PWRDM_POWER_RET: | ||
145 | omap24xx_pwrst = OMAP24XX_PWRDM_POWER_RET; | ||
146 | break; | ||
147 | case PWRDM_POWER_ON: | ||
148 | omap24xx_pwrst = OMAP24XX_PWRDM_POWER_ON; | ||
149 | break; | ||
150 | default: | ||
151 | return -EINVAL; | ||
152 | } | ||
153 | |||
154 | omap2_prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK, | ||
155 | (omap24xx_pwrst << OMAP_POWERSTATE_SHIFT), | ||
156 | pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL); | ||
157 | return 0; | ||
158 | } | ||
159 | |||
160 | static int omap2xxx_pwrdm_read_next_pwrst(struct powerdomain *pwrdm) | ||
161 | { | ||
162 | u8 omap2xxx_pwrst; | ||
163 | |||
164 | omap2xxx_pwrst = omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, | ||
165 | OMAP2_PM_PWSTCTRL, | ||
166 | OMAP_POWERSTATE_MASK); | ||
167 | |||
168 | return omap2xxx_pwrst_to_common_pwrst(omap2xxx_pwrst); | ||
169 | } | ||
170 | |||
171 | static int omap2xxx_pwrdm_read_pwrst(struct powerdomain *pwrdm) | ||
172 | { | ||
173 | u8 omap2xxx_pwrst; | ||
174 | |||
175 | omap2xxx_pwrst = omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, | ||
176 | OMAP2_PM_PWSTST, | ||
177 | OMAP_POWERSTATEST_MASK); | ||
178 | |||
179 | return omap2xxx_pwrst_to_common_pwrst(omap2xxx_pwrst); | ||
180 | } | ||
181 | |||
101 | struct pwrdm_ops omap2_pwrdm_operations = { | 182 | struct pwrdm_ops omap2_pwrdm_operations = { |
102 | .pwrdm_set_next_pwrst = omap2_pwrdm_set_next_pwrst, | 183 | .pwrdm_set_next_pwrst = omap2xxx_pwrdm_set_next_pwrst, |
103 | .pwrdm_read_next_pwrst = omap2_pwrdm_read_next_pwrst, | 184 | .pwrdm_read_next_pwrst = omap2xxx_pwrdm_read_next_pwrst, |
104 | .pwrdm_read_pwrst = omap2_pwrdm_read_pwrst, | 185 | .pwrdm_read_pwrst = omap2xxx_pwrdm_read_pwrst, |
105 | .pwrdm_set_logic_retst = omap2_pwrdm_set_logic_retst, | 186 | .pwrdm_set_logic_retst = omap2_pwrdm_set_logic_retst, |
106 | .pwrdm_set_mem_onst = omap2_pwrdm_set_mem_onst, | 187 | .pwrdm_set_mem_onst = omap2_pwrdm_set_mem_onst, |
107 | .pwrdm_set_mem_retst = omap2_pwrdm_set_mem_retst, | 188 | .pwrdm_set_mem_retst = omap2_pwrdm_set_mem_retst, |