diff options
Diffstat (limited to 'arch/arm/mach-omap2/prm.h')
| -rw-r--r-- | arch/arm/mach-omap2/prm.h | 24 |
1 files changed, 13 insertions, 11 deletions
diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h index e4dc4b17881d..826d326b8062 100644 --- a/arch/arm/mach-omap2/prm.h +++ b/arch/arm/mach-omap2/prm.h | |||
| @@ -141,6 +141,19 @@ | |||
| 141 | #define PM_PWSTCTRL 0x00e0 | 141 | #define PM_PWSTCTRL 0x00e0 |
| 142 | #define PM_PWSTST 0x00e4 | 142 | #define PM_PWSTST 0x00e4 |
| 143 | 143 | ||
| 144 | /* Omap2 specific registers */ | ||
| 145 | #define OMAP24XX_PM_WKEN2 0x00a4 | ||
| 146 | #define OMAP24XX_PM_WKST2 0x00b4 | ||
| 147 | |||
| 148 | #define OMAP24XX_PRCM_IRQSTATUS_DSP 0x00f0 /* IVA mod */ | ||
| 149 | #define OMAP24XX_PRCM_IRQENABLE_DSP 0x00f4 /* IVA mod */ | ||
| 150 | #define OMAP24XX_PRCM_IRQSTATUS_IVA 0x00f8 | ||
| 151 | #define OMAP24XX_PRCM_IRQENABLE_IVA 0x00fc | ||
| 152 | |||
| 153 | /* Omap3 specific registers */ | ||
| 154 | #define OMAP3430ES2_PM_WKEN3 0x00f0 | ||
| 155 | #define OMAP3430ES2_PM_WKST3 0x00b8 | ||
| 156 | |||
| 144 | #define OMAP3430_PM_MPUGRPSEL 0x00a4 | 157 | #define OMAP3430_PM_MPUGRPSEL 0x00a4 |
| 145 | #define OMAP3430_PM_MPUGRPSEL1 OMAP3430_PM_MPUGRPSEL | 158 | #define OMAP3430_PM_MPUGRPSEL1 OMAP3430_PM_MPUGRPSEL |
| 146 | 159 | ||
| @@ -153,16 +166,6 @@ | |||
| 153 | #define OMAP3430_PRM_IRQENABLE_IVA2 0x00fc | 166 | #define OMAP3430_PRM_IRQENABLE_IVA2 0x00fc |
| 154 | 167 | ||
| 155 | 168 | ||
| 156 | /* Architecture-specific registers */ | ||
| 157 | |||
| 158 | #define OMAP24XX_PM_WKEN2 0x00a4 | ||
| 159 | #define OMAP24XX_PM_WKST2 0x00b4 | ||
| 160 | |||
| 161 | #define OMAP24XX_PRCM_IRQSTATUS_DSP 0x00f0 /* IVA mod */ | ||
| 162 | #define OMAP24XX_PRCM_IRQENABLE_DSP 0x00f4 /* IVA mod */ | ||
| 163 | #define OMAP24XX_PRCM_IRQSTATUS_IVA 0x00f8 | ||
| 164 | #define OMAP24XX_PRCM_IRQENABLE_IVA 0x00fc | ||
| 165 | |||
| 166 | #ifndef __ASSEMBLER__ | 169 | #ifndef __ASSEMBLER__ |
| 167 | 170 | ||
| 168 | /* Power/reset management domain register get/set */ | 171 | /* Power/reset management domain register get/set */ |
| @@ -228,7 +231,6 @@ static inline u32 prm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx) | |||
| 228 | #define OMAP_RSTTIME1_SHIFT 0 | 231 | #define OMAP_RSTTIME1_SHIFT 0 |
| 229 | #define OMAP_RSTTIME1_MASK (0xff << 0) | 232 | #define OMAP_RSTTIME1_MASK (0xff << 0) |
| 230 | 233 | ||
| 231 | |||
| 232 | /* PRM_RSTCTRL */ | 234 | /* PRM_RSTCTRL */ |
| 233 | /* Named RM_RSTCTRL_WKUP on the 24xx */ | 235 | /* Named RM_RSTCTRL_WKUP on the 24xx */ |
| 234 | /* 2420 calls RST_DPLL3 'RST_DPLL' */ | 236 | /* 2420 calls RST_DPLL3 'RST_DPLL' */ |