diff options
Diffstat (limited to 'arch/arm/mach-omap2/prcm-common.h')
-rw-r--r-- | arch/arm/mach-omap2/prcm-common.h | 85 |
1 files changed, 13 insertions, 72 deletions
diff --git a/arch/arm/mach-omap2/prcm-common.h b/arch/arm/mach-omap2/prcm-common.h index f81acee4738d..87486f559784 100644 --- a/arch/arm/mach-omap2/prcm-common.h +++ b/arch/arm/mach-omap2/prcm-common.h | |||
@@ -8,15 +8,12 @@ | |||
8 | * Copyright (C) 2007-2009 Nokia Corporation | 8 | * Copyright (C) 2007-2009 Nokia Corporation |
9 | * | 9 | * |
10 | * Written by Paul Walmsley | 10 | * Written by Paul Walmsley |
11 | * OMAP4 defines in this file are automatically generated from the OMAP hardware | ||
12 | * databases. | ||
13 | * | 11 | * |
14 | * This program is free software; you can redistribute it and/or modify | 12 | * This program is free software; you can redistribute it and/or modify |
15 | * it under the terms of the GNU General Public License version 2 as | 13 | * it under the terms of the GNU General Public License version 2 as |
16 | * published by the Free Software Foundation. | 14 | * published by the Free Software Foundation. |
17 | */ | 15 | */ |
18 | 16 | ||
19 | |||
20 | /* Module offsets from both CM_BASE & PRM_BASE */ | 17 | /* Module offsets from both CM_BASE & PRM_BASE */ |
21 | 18 | ||
22 | /* | 19 | /* |
@@ -51,75 +48,6 @@ | |||
51 | #define OMAP3430_NEON_MOD 0xb00 | 48 | #define OMAP3430_NEON_MOD 0xb00 |
52 | #define OMAP3430ES2_USBHOST_MOD 0xc00 | 49 | #define OMAP3430ES2_USBHOST_MOD 0xc00 |
53 | 50 | ||
54 | #define BITS(n_bit) \ | ||
55 | (((1 << n_bit) - 1) | (1 << n_bit)) | ||
56 | |||
57 | #define BITFIELD(l_bit, u_bit) \ | ||
58 | (BITS(u_bit) & ~((BITS(l_bit)) >> 1)) | ||
59 | |||
60 | /* OMAP44XX specific module offsets */ | ||
61 | |||
62 | /* CM1 instances */ | ||
63 | |||
64 | #define OMAP4430_CM1_OCP_SOCKET_MOD 0x0000 | ||
65 | #define OMAP4430_CM1_CKGEN_MOD 0x0100 | ||
66 | #define OMAP4430_CM1_MPU_MOD 0x0300 | ||
67 | #define OMAP4430_CM1_TESLA_MOD 0x0400 | ||
68 | #define OMAP4430_CM1_ABE_MOD 0x0500 | ||
69 | #define OMAP4430_CM1_RESTORE_MOD 0x0e00 | ||
70 | #define OMAP4430_CM1_INSTR_MOD 0x0f00 | ||
71 | |||
72 | /* CM2 instances */ | ||
73 | |||
74 | #define OMAP4430_CM2_OCP_SOCKET_MOD 0x0000 | ||
75 | #define OMAP4430_CM2_CKGEN_MOD 0x0100 | ||
76 | #define OMAP4430_CM2_ALWAYS_ON_MOD 0x0600 | ||
77 | #define OMAP4430_CM2_CORE_MOD 0x0700 | ||
78 | #define OMAP4430_CM2_IVAHD_MOD 0x0f00 | ||
79 | #define OMAP4430_CM2_CAM_MOD 0x1000 | ||
80 | #define OMAP4430_CM2_DSS_MOD 0x1100 | ||
81 | #define OMAP4430_CM2_GFX_MOD 0x1200 | ||
82 | #define OMAP4430_CM2_L3INIT_MOD 0x1300 | ||
83 | #define OMAP4430_CM2_L4PER_MOD 0x1400 | ||
84 | #define OMAP4430_CM2_CEFUSE_MOD 0x1600 | ||
85 | #define OMAP4430_CM2_RESTORE_MOD 0x1e00 | ||
86 | #define OMAP4430_CM2_INSTR_MOD 0x1f00 | ||
87 | |||
88 | /* PRM instances */ | ||
89 | |||
90 | #define OMAP4430_PRM_OCP_SOCKET_MOD 0x0000 | ||
91 | #define OMAP4430_PRM_CKGEN_MOD 0x0100 | ||
92 | #define OMAP4430_PRM_MPU_MOD 0x0300 | ||
93 | #define OMAP4430_PRM_TESLA_MOD 0x0400 | ||
94 | #define OMAP4430_PRM_ABE_MOD 0x0500 | ||
95 | #define OMAP4430_PRM_ALWAYS_ON_MOD 0x0600 | ||
96 | #define OMAP4430_PRM_CORE_MOD 0x0700 | ||
97 | #define OMAP4430_PRM_IVAHD_MOD 0x0f00 | ||
98 | #define OMAP4430_PRM_CAM_MOD 0x1000 | ||
99 | #define OMAP4430_PRM_DSS_MOD 0x1100 | ||
100 | #define OMAP4430_PRM_GFX_MOD 0x1200 | ||
101 | #define OMAP4430_PRM_L3INIT_MOD 0x1300 | ||
102 | #define OMAP4430_PRM_L4PER_MOD 0x1400 | ||
103 | #define OMAP4430_PRM_CEFUSE_MOD 0x1600 | ||
104 | #define OMAP4430_PRM_WKUP_MOD 0x1700 | ||
105 | #define OMAP4430_PRM_WKUP_CM_MOD 0x1800 | ||
106 | #define OMAP4430_PRM_EMU_MOD 0x1900 | ||
107 | #define OMAP4430_PRM_EMU_CM_MOD 0x1a00 | ||
108 | #define OMAP4430_PRM_DEVICE_MOD 0x1b00 | ||
109 | #define OMAP4430_PRM_INSTR_MOD 0x1f00 | ||
110 | |||
111 | /* SCRM instances */ | ||
112 | |||
113 | #define OMAP4430_SCRM_SCRM_MOD 0x0000 | ||
114 | |||
115 | /* PRCM_MPU instances */ | ||
116 | |||
117 | #define OMAP4430_PRCM_MPU_OCP_SOCKET_PRCM_MOD 0x0000 | ||
118 | #define OMAP4430_PRCM_MPU_DEVICE_PRM_MOD 0x0200 | ||
119 | #define OMAP4430_PRCM_MPU_CPU0_MOD 0x0400 | ||
120 | #define OMAP4430_PRCM_MPU_CPU1_MOD 0x0800 | ||
121 | |||
122 | |||
123 | /* 24XX register bits shared between CM & PRM registers */ | 51 | /* 24XX register bits shared between CM & PRM registers */ |
124 | 52 | ||
125 | /* CM_FCLKEN1_CORE, CM_ICLKEN1_CORE, PM_WKEN1_CORE shared bits */ | 53 | /* CM_FCLKEN1_CORE, CM_ICLKEN1_CORE, PM_WKEN1_CORE shared bits */ |
@@ -461,5 +389,18 @@ | |||
461 | #define OMAP3430_EN_CORE_SHIFT 0 | 389 | #define OMAP3430_EN_CORE_SHIFT 0 |
462 | #define OMAP3430_EN_CORE_MASK (1 << 0) | 390 | #define OMAP3430_EN_CORE_MASK (1 << 0) |
463 | 391 | ||
392 | |||
393 | /* | ||
394 | * MAX_MODULE_HARDRESET_WAIT: Maximum microseconds to wait for an OMAP | ||
395 | * submodule to exit hardreset | ||
396 | */ | ||
397 | #define MAX_MODULE_HARDRESET_WAIT 10000 | ||
398 | |||
399 | # ifndef __ASSEMBLER__ | ||
400 | extern void __iomem *prm_base; | ||
401 | extern void __iomem *cm_base; | ||
402 | extern void __iomem *cm2_base; | ||
403 | # endif | ||
404 | |||
464 | #endif | 405 | #endif |
465 | 406 | ||