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-rw-r--r--arch/arm/mach-omap2/powerdomains3xxx_data.c38
1 files changed, 19 insertions, 19 deletions
diff --git a/arch/arm/mach-omap2/powerdomains3xxx_data.c b/arch/arm/mach-omap2/powerdomains3xxx_data.c
index e1bec562625b..9c9c113788b9 100644
--- a/arch/arm/mach-omap2/powerdomains3xxx_data.c
+++ b/arch/arm/mach-omap2/powerdomains3xxx_data.c
@@ -2,7 +2,7 @@
2 * OMAP3 powerdomain definitions 2 * OMAP3 powerdomain definitions
3 * 3 *
4 * Copyright (C) 2007-2008 Texas Instruments, Inc. 4 * Copyright (C) 2007-2008 Texas Instruments, Inc.
5 * Copyright (C) 2007-2010 Nokia Corporation 5 * Copyright (C) 2007-2011 Nokia Corporation
6 * 6 *
7 * Paul Walmsley, Jouni Högander 7 * Paul Walmsley, Jouni Högander
8 * 8 *
@@ -47,10 +47,10 @@ static struct powerdomain iva2_pwrdm = {
47 [3] = PWRSTS_OFF_RET, 47 [3] = PWRSTS_OFF_RET,
48 }, 48 },
49 .pwrsts_mem_on = { 49 .pwrsts_mem_on = {
50 [0] = PWRDM_POWER_ON, 50 [0] = PWRSTS_ON,
51 [1] = PWRDM_POWER_ON, 51 [1] = PWRSTS_ON,
52 [2] = PWRSTS_OFF_ON, 52 [2] = PWRSTS_OFF_ON,
53 [3] = PWRDM_POWER_ON, 53 [3] = PWRSTS_ON,
54 }, 54 },
55}; 55};
56 56
@@ -128,13 +128,13 @@ static struct powerdomain dss_pwrdm = {
128 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), 128 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
129 .prcm_offs = OMAP3430_DSS_MOD, 129 .prcm_offs = OMAP3430_DSS_MOD,
130 .pwrsts = PWRSTS_OFF_RET_ON, 130 .pwrsts = PWRSTS_OFF_RET_ON,
131 .pwrsts_logic_ret = PWRDM_POWER_RET, 131 .pwrsts_logic_ret = PWRSTS_RET,
132 .banks = 1, 132 .banks = 1,
133 .pwrsts_mem_ret = { 133 .pwrsts_mem_ret = {
134 [0] = PWRDM_POWER_RET, /* MEMRETSTATE */ 134 [0] = PWRSTS_RET, /* MEMRETSTATE */
135 }, 135 },
136 .pwrsts_mem_on = { 136 .pwrsts_mem_on = {
137 [0] = PWRDM_POWER_ON, /* MEMONSTATE */ 137 [0] = PWRSTS_ON, /* MEMONSTATE */
138 }, 138 },
139}; 139};
140 140
@@ -149,13 +149,13 @@ static struct powerdomain sgx_pwrdm = {
149 .omap_chip = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES2), 149 .omap_chip = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES2),
150 /* XXX This is accurate for 3430 SGX, but what about GFX? */ 150 /* XXX This is accurate for 3430 SGX, but what about GFX? */
151 .pwrsts = PWRSTS_OFF_ON, 151 .pwrsts = PWRSTS_OFF_ON,
152 .pwrsts_logic_ret = PWRDM_POWER_RET, 152 .pwrsts_logic_ret = PWRSTS_RET,
153 .banks = 1, 153 .banks = 1,
154 .pwrsts_mem_ret = { 154 .pwrsts_mem_ret = {
155 [0] = PWRDM_POWER_RET, /* MEMRETSTATE */ 155 [0] = PWRSTS_RET, /* MEMRETSTATE */
156 }, 156 },
157 .pwrsts_mem_on = { 157 .pwrsts_mem_on = {
158 [0] = PWRDM_POWER_ON, /* MEMONSTATE */ 158 [0] = PWRSTS_ON, /* MEMONSTATE */
159 }, 159 },
160}; 160};
161 161
@@ -164,13 +164,13 @@ static struct powerdomain cam_pwrdm = {
164 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), 164 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
165 .prcm_offs = OMAP3430_CAM_MOD, 165 .prcm_offs = OMAP3430_CAM_MOD,
166 .pwrsts = PWRSTS_OFF_RET_ON, 166 .pwrsts = PWRSTS_OFF_RET_ON,
167 .pwrsts_logic_ret = PWRDM_POWER_RET, 167 .pwrsts_logic_ret = PWRSTS_RET,
168 .banks = 1, 168 .banks = 1,
169 .pwrsts_mem_ret = { 169 .pwrsts_mem_ret = {
170 [0] = PWRDM_POWER_RET, /* MEMRETSTATE */ 170 [0] = PWRSTS_RET, /* MEMRETSTATE */
171 }, 171 },
172 .pwrsts_mem_on = { 172 .pwrsts_mem_on = {
173 [0] = PWRDM_POWER_ON, /* MEMONSTATE */ 173 [0] = PWRSTS_ON, /* MEMONSTATE */
174 }, 174 },
175}; 175};
176 176
@@ -182,10 +182,10 @@ static struct powerdomain per_pwrdm = {
182 .pwrsts_logic_ret = PWRSTS_OFF_RET, 182 .pwrsts_logic_ret = PWRSTS_OFF_RET,
183 .banks = 1, 183 .banks = 1,
184 .pwrsts_mem_ret = { 184 .pwrsts_mem_ret = {
185 [0] = PWRDM_POWER_RET, /* MEMRETSTATE */ 185 [0] = PWRSTS_RET, /* MEMRETSTATE */
186 }, 186 },
187 .pwrsts_mem_on = { 187 .pwrsts_mem_on = {
188 [0] = PWRDM_POWER_ON, /* MEMONSTATE */ 188 [0] = PWRSTS_ON, /* MEMONSTATE */
189 }, 189 },
190}; 190};
191 191
@@ -200,7 +200,7 @@ static struct powerdomain neon_pwrdm = {
200 .prcm_offs = OMAP3430_NEON_MOD, 200 .prcm_offs = OMAP3430_NEON_MOD,
201 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), 201 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
202 .pwrsts = PWRSTS_OFF_RET_ON, 202 .pwrsts = PWRSTS_OFF_RET_ON,
203 .pwrsts_logic_ret = PWRDM_POWER_RET, 203 .pwrsts_logic_ret = PWRSTS_RET,
204}; 204};
205 205
206static struct powerdomain usbhost_pwrdm = { 206static struct powerdomain usbhost_pwrdm = {
@@ -208,7 +208,7 @@ static struct powerdomain usbhost_pwrdm = {
208 .prcm_offs = OMAP3430ES2_USBHOST_MOD, 208 .prcm_offs = OMAP3430ES2_USBHOST_MOD,
209 .omap_chip = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES2), 209 .omap_chip = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES2),
210 .pwrsts = PWRSTS_OFF_RET_ON, 210 .pwrsts = PWRSTS_OFF_RET_ON,
211 .pwrsts_logic_ret = PWRDM_POWER_RET, 211 .pwrsts_logic_ret = PWRSTS_RET,
212 /* 212 /*
213 * REVISIT: Enabling usb host save and restore mechanism seems to 213 * REVISIT: Enabling usb host save and restore mechanism seems to
214 * leave the usb host domain permanently in ACTIVE mode after 214 * leave the usb host domain permanently in ACTIVE mode after
@@ -218,10 +218,10 @@ static struct powerdomain usbhost_pwrdm = {
218 /*.flags = PWRDM_HAS_HDWR_SAR,*/ /* for USBHOST ctrlr only */ 218 /*.flags = PWRDM_HAS_HDWR_SAR,*/ /* for USBHOST ctrlr only */
219 .banks = 1, 219 .banks = 1,
220 .pwrsts_mem_ret = { 220 .pwrsts_mem_ret = {
221 [0] = PWRDM_POWER_RET, /* MEMRETSTATE */ 221 [0] = PWRSTS_RET, /* MEMRETSTATE */
222 }, 222 },
223 .pwrsts_mem_on = { 223 .pwrsts_mem_on = {
224 [0] = PWRDM_POWER_ON, /* MEMONSTATE */ 224 [0] = PWRSTS_ON, /* MEMONSTATE */
225 }, 225 },
226}; 226};
227 227