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Diffstat (limited to 'arch/arm/mach-omap2/pm34xx.c')
-rw-r--r--arch/arm/mach-omap2/pm34xx.c25
1 files changed, 23 insertions, 2 deletions
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 54876aca2d45..f72e25465429 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -415,14 +415,32 @@ static void __init omap3_iva_idle(void)
415 OMAP3430_IVA2_MOD, RM_RSTCTRL); 415 OMAP3430_IVA2_MOD, RM_RSTCTRL);
416} 416}
417 417
418static void __init prcm_setup_regs(void) 418static void __init omap3_d2d_idle(void)
419{ 419{
420 u16 mask, padconf;
421
422 /* In a stand alone OMAP3430 where there is not a stacked
423 * modem for the D2D Idle Ack and D2D MStandby must be pulled
424 * high. S CONTROL_PADCONF_SAD2D_IDLEACK and
425 * CONTROL_PADCONF_SAD2D_MSTDBY to have a pull up. */
426 mask = (1 << 4) | (1 << 3); /* pull-up, enabled */
427 padconf = omap_ctrl_readw(OMAP3_PADCONF_SAD2D_MSTANDBY);
428 padconf |= mask;
429 omap_ctrl_writew(padconf, OMAP3_PADCONF_SAD2D_MSTANDBY);
430
431 padconf = omap_ctrl_readw(OMAP3_PADCONF_SAD2D_IDLEACK);
432 padconf |= mask;
433 omap_ctrl_writew(padconf, OMAP3_PADCONF_SAD2D_IDLEACK);
434
420 /* reset modem */ 435 /* reset modem */
421 prm_write_mod_reg(OMAP3430_RM_RSTCTRL_CORE_MODEM_SW_RSTPWRON | 436 prm_write_mod_reg(OMAP3430_RM_RSTCTRL_CORE_MODEM_SW_RSTPWRON |
422 OMAP3430_RM_RSTCTRL_CORE_MODEM_SW_RST, 437 OMAP3430_RM_RSTCTRL_CORE_MODEM_SW_RST,
423 CORE_MOD, RM_RSTCTRL); 438 CORE_MOD, RM_RSTCTRL);
424 prm_write_mod_reg(0, CORE_MOD, RM_RSTCTRL); 439 prm_write_mod_reg(0, CORE_MOD, RM_RSTCTRL);
440}
425 441
442static void __init prcm_setup_regs(void)
443{
426 /* XXX Reset all wkdeps. This should be done when initializing 444 /* XXX Reset all wkdeps. This should be done when initializing
427 * powerdomains */ 445 * powerdomains */
428 prm_write_mod_reg(0, OMAP3430_IVA2_MOD, PM_WKDEP); 446 prm_write_mod_reg(0, OMAP3430_IVA2_MOD, PM_WKDEP);
@@ -442,6 +460,7 @@ static void __init prcm_setup_regs(void)
442 * Note that in the long run this should be done by clockfw 460 * Note that in the long run this should be done by clockfw
443 */ 461 */
444 cm_write_mod_reg( 462 cm_write_mod_reg(
463 OMAP3430_AUTO_MODEM |
445 OMAP3430ES2_AUTO_MMC3 | 464 OMAP3430ES2_AUTO_MMC3 |
446 OMAP3430ES2_AUTO_ICR | 465 OMAP3430ES2_AUTO_ICR |
447 OMAP3430_AUTO_AES2 | 466 OMAP3430_AUTO_AES2 |
@@ -469,7 +488,7 @@ static void __init prcm_setup_regs(void)
469 OMAP3430_AUTO_OMAPCTRL | 488 OMAP3430_AUTO_OMAPCTRL |
470 OMAP3430ES1_AUTO_FSHOSTUSB | 489 OMAP3430ES1_AUTO_FSHOSTUSB |
471 OMAP3430_AUTO_HSOTGUSB | 490 OMAP3430_AUTO_HSOTGUSB |
472 OMAP3430ES1_AUTO_D2D | /* This is es1 only */ 491 OMAP3430_AUTO_SAD2D |
473 OMAP3430_AUTO_SSI, 492 OMAP3430_AUTO_SSI,
474 CORE_MOD, CM_AUTOIDLE1); 493 CORE_MOD, CM_AUTOIDLE1);
475 494
@@ -483,6 +502,7 @@ static void __init prcm_setup_regs(void)
483 502
484 if (omap_rev() > OMAP3430_REV_ES1_0) { 503 if (omap_rev() > OMAP3430_REV_ES1_0) {
485 cm_write_mod_reg( 504 cm_write_mod_reg(
505 OMAP3430_AUTO_MAD2D |
486 OMAP3430ES2_AUTO_USBTLL, 506 OMAP3430ES2_AUTO_USBTLL,
487 CORE_MOD, CM_AUTOIDLE3); 507 CORE_MOD, CM_AUTOIDLE3);
488 } 508 }
@@ -576,6 +596,7 @@ static void __init prcm_setup_regs(void)
576 OCP_MOD, OMAP3_PRM_IRQENABLE_MPU_OFFSET); 596 OCP_MOD, OMAP3_PRM_IRQENABLE_MPU_OFFSET);
577 597
578 omap3_iva_idle(); 598 omap3_iva_idle();
599 omap3_d2d_idle();
579} 600}
580 601
581static int __init pwrdms_setup(struct powerdomain *pwrdm) 602static int __init pwrdms_setup(struct powerdomain *pwrdm)