1 files changed, 10 insertions, 33 deletions

diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c
index c333fa6dffa8..b2a4df623545 100644
--- a/arch/arm/mach-omap2/pm24xx.c
+++ b/arch/arm/mach-omap2/pm24xx.c
@@ -90,11 +90,7 @@ static int omap2_enter_full_retention(void)
         omap2_prm_write_mod_reg(0xffffffff, CORE_MOD, OMAP24XX_PM_WKST2);
         omap2_prm_write_mod_reg(0xffffffff, WKUP_MOD, PM_WKST);
 
-        /*
-         * Set MPU powerdomain's next power state to RETENTION;
-         * preserve logic state during retention
-         */
-        pwrdm_set_logic_retst(mpu_pwrdm, PWRDM_POWER_RET);
+        pwrdm_set_next_pwrst(core_pwrdm, PWRDM_POWER_RET);
         pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_RET);
 
         /* Workaround to kill USB */
@@ -137,15 +133,10 @@ no_sleep:
         /* Mask future PRCM-to-MPU interrupts */
         omap2_prm_write_mod_reg(0x0, OCP_MOD, OMAP2_PRCM_IRQSTATUS_MPU_OFFSET);
 
-        return 0;
-}
-
-static int omap2_i2c_active(void)
-{
-        u32 l;
+        pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_ON);
+        pwrdm_set_next_pwrst(core_pwrdm, PWRDM_POWER_ON);
 
-        l = omap2_cm_read_mod_reg(CORE_MOD, CM_FCLKEN1);
-        return l & (OMAP2420_EN_I2C2_MASK | OMAP2420_EN_I2C1_MASK);
+        return 0;
 }
 
 static int sti_console_enabled;
@@ -172,11 +163,6 @@ static int omap2_allow_mpu_retention(void)
 
 static void omap2_enter_mpu_retention(void)
 {
-        /* Putting MPU into the WFI state while a transfer is active
-         * seems to cause the I2C block to timeout. Why? Good question. */
-        if (omap2_i2c_active())
-                return;
-
         /* The peripherals seem not to be able to wake up the MPU when
          * it is in retention mode. */
         if (omap2_allow_mpu_retention()) {
@@ -186,17 +172,16 @@ static void omap2_enter_mpu_retention(void)
                 omap2_prm_write_mod_reg(0xffffffff, WKUP_MOD, PM_WKST);
 
                 /* Try to enter MPU retention */
-                omap2_prm_write_mod_reg((0x01 << OMAP_POWERSTATE_SHIFT) |
-                                  OMAP_LOGICRETSTATE_MASK,
-                                  MPU_MOD, OMAP2_PM_PWSTCTRL);
+                pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_RET);
+
         } else {
                 /* Block MPU retention */
-
-                omap2_prm_write_mod_reg(OMAP_LOGICRETSTATE_MASK, MPU_MOD,
-                                                 OMAP2_PM_PWSTCTRL);
+                pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_ON);
         }
 
         omap2_sram_idle();
+
+        pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_ON);
 }
 
 static int omap2_can_sleep(void)
@@ -251,25 +236,17 @@ static void __init prcm_setup_regs(void)
         for (i = 0; i < num_mem_banks; i++)
                 pwrdm_set_mem_retst(core_pwrdm, i, PWRDM_POWER_RET);
 
-        /* Set CORE powerdomain's next power state to RETENTION */
-        pwrdm_set_next_pwrst(core_pwrdm, PWRDM_POWER_RET);
+        pwrdm_set_logic_retst(core_pwrdm, PWRDM_POWER_RET);
 
-        /*
-         * Set MPU powerdomain's next power state to RETENTION;
-         * preserve logic state during retention
-         */
         pwrdm_set_logic_retst(mpu_pwrdm, PWRDM_POWER_RET);
-        pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_RET);
 
         /* Force-power down DSP, GFX powerdomains */
 
         pwrdm = clkdm_get_pwrdm(dsp_clkdm);
         pwrdm_set_next_pwrst(pwrdm, PWRDM_POWER_OFF);
-        clkdm_sleep(dsp_clkdm);
 
         pwrdm = clkdm_get_pwrdm(gfx_clkdm);
         pwrdm_set_next_pwrst(pwrdm, PWRDM_POWER_OFF);
-        clkdm_sleep(gfx_clkdm);
 
         /* Enable hardware-supervised idle for all clkdms */
         clkdm_for_each(omap_pm_clkdms_setup, NULL);