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-rw-r--r--arch/arm/mach-omap2/omap_l3_noc.c147
1 files changed, 82 insertions, 65 deletions
diff --git a/arch/arm/mach-omap2/omap_l3_noc.c b/arch/arm/mach-omap2/omap_l3_noc.c
index 7b9f1909ddb2..c8b1bef92e5a 100644
--- a/arch/arm/mach-omap2/omap_l3_noc.c
+++ b/arch/arm/mach-omap2/omap_l3_noc.c
@@ -1,25 +1,25 @@
1/* 1/*
2 * OMAP4XXX L3 Interconnect error handling driver 2 * OMAP4XXX L3 Interconnect error handling driver
3 * 3 *
4 * Copyright (C) 2011 Texas Corporation 4 * Copyright (C) 2011 Texas Corporation
5 * Santosh Shilimkar <santosh.shilimkar@ti.com> 5 * Santosh Shilimkar <santosh.shilimkar@ti.com>
6 * Sricharan <r.sricharan@ti.com> 6 * Sricharan <r.sricharan@ti.com>
7 * 7 *
8 * This program is free software; you can redistribute it and/or modify 8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by 9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or 10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version. 11 * (at your option) any later version.
12 * 12 *
13 * This program is distributed in the hope that it will be useful, 13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details. 16 * GNU General Public License for more details.
17 * 17 *
18 * You should have received a copy of the GNU General Public License 18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software 19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
21 * USA 21 * USA
22 */ 22 */
23#include <linux/init.h> 23#include <linux/init.h>
24#include <linux/io.h> 24#include <linux/io.h>
25#include <linux/platform_device.h> 25#include <linux/platform_device.h>
@@ -55,12 +55,12 @@
55static irqreturn_t l3_interrupt_handler(int irq, void *_l3) 55static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
56{ 56{
57 57
58 struct omap4_l3 *l3 = _l3; 58 struct omap4_l3 *l3 = _l3;
59 int inttype, i, j; 59 int inttype, i, k;
60 int err_src = 0; 60 int err_src = 0;
61 u32 std_err_main_addr, std_err_main, err_reg; 61 u32 std_err_main, err_reg, clear, masterid;
62 u32 base, slave_addr, clear; 62 void __iomem *base, *l3_targ_base;
63 char *source_name; 63 char *target_name, *master_name = "UN IDENTIFIED";
64 64
65 /* Get the Type of interrupt */ 65 /* Get the Type of interrupt */
66 inttype = irq == l3->app_irq ? L3_APPLICATION_ERROR : L3_DEBUG_ERROR; 66 inttype = irq == l3->app_irq ? L3_APPLICATION_ERROR : L3_DEBUG_ERROR;
@@ -70,43 +70,50 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
70 * Read the regerr register of the clock domain 70 * Read the regerr register of the clock domain
71 * to determine the source 71 * to determine the source
72 */ 72 */
73 base = (u32)l3->l3_base[i]; 73 base = l3->l3_base[i];
74 err_reg = readl(base + l3_flagmux[i] + (inttype << 3)); 74 err_reg = __raw_readl(base + l3_flagmux[i] +
75 + L3_FLAGMUX_REGERR0 + (inttype << 3));
75 76
76 /* Get the corresponding error and analyse */ 77 /* Get the corresponding error and analyse */
77 if (err_reg) { 78 if (err_reg) {
78 /* Identify the source from control status register */ 79 /* Identify the source from control status register */
79 for (j = 0; !(err_reg & (1 << j)); j++) 80 err_src = __ffs(err_reg);
80 ;
81 81
82 err_src = j;
83 /* Read the stderrlog_main_source from clk domain */ 82 /* Read the stderrlog_main_source from clk domain */
84 std_err_main_addr = base + *(l3_targ[i] + err_src); 83 l3_targ_base = base + *(l3_targ[i] + err_src);
85 std_err_main = readl(std_err_main_addr); 84 std_err_main = __raw_readl(l3_targ_base +
85 L3_TARG_STDERRLOG_MAIN);
86 masterid = __raw_readl(l3_targ_base +
87 L3_TARG_STDERRLOG_MSTADDR);
86 88
87 switch (std_err_main & CUSTOM_ERROR) { 89 switch (std_err_main & CUSTOM_ERROR) {
88 case STANDARD_ERROR: 90 case STANDARD_ERROR:
89 source_name = 91 target_name =
90 l3_targ_stderrlog_main_name[i][err_src]; 92 l3_targ_inst_name[i][err_src];
91 93 WARN(true, "L3 standard error: TARGET:%s at address 0x%x\n",
92 slave_addr = std_err_main_addr + 94 target_name,
93 L3_SLAVE_ADDRESS_OFFSET; 95 __raw_readl(l3_targ_base +
94 WARN(true, "L3 standard error: SOURCE:%s at address 0x%x\n", 96 L3_TARG_STDERRLOG_SLVOFSLSB));
95 source_name, readl(slave_addr));
96 /* clear the std error log*/ 97 /* clear the std error log*/
97 clear = std_err_main | CLEAR_STDERR_LOG; 98 clear = std_err_main | CLEAR_STDERR_LOG;
98 writel(clear, std_err_main_addr); 99 writel(clear, l3_targ_base +
100 L3_TARG_STDERRLOG_MAIN);
99 break; 101 break;
100 102
101 case CUSTOM_ERROR: 103 case CUSTOM_ERROR:
102 source_name = 104 target_name =
103 l3_targ_stderrlog_main_name[i][err_src]; 105 l3_targ_inst_name[i][err_src];
104 106 for (k = 0; k < NUM_OF_L3_MASTERS; k++) {
105 WARN(true, "CUSTOM SRESP error with SOURCE:%s\n", 107 if (masterid == l3_masters[k].id)
106 source_name); 108 master_name =
109 l3_masters[k].name;
110 }
111 WARN(true, "L3 custom error: MASTER:%s TARGET:%s\n",
112 master_name, target_name);
107 /* clear the std error log*/ 113 /* clear the std error log*/
108 clear = std_err_main | CLEAR_STDERR_LOG; 114 clear = std_err_main | CLEAR_STDERR_LOG;
109 writel(clear, std_err_main_addr); 115 writel(clear, l3_targ_base +
116 L3_TARG_STDERRLOG_MAIN);
110 break; 117 break;
111 118
112 default: 119 default:
@@ -120,12 +127,11 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
120 return IRQ_HANDLED; 127 return IRQ_HANDLED;
121} 128}
122 129
123static int __init omap4_l3_probe(struct platform_device *pdev) 130static int __devinit omap4_l3_probe(struct platform_device *pdev)
124{ 131{
125 static struct omap4_l3 *l3; 132 static struct omap4_l3 *l3;
126 struct resource *res; 133 struct resource *res;
127 int ret; 134 int ret;
128 int irq;
129 135
130 l3 = kzalloc(sizeof(*l3), GFP_KERNEL); 136 l3 = kzalloc(sizeof(*l3), GFP_KERNEL);
131 if (!l3) 137 if (!l3)
@@ -177,27 +183,25 @@ static int __init omap4_l3_probe(struct platform_device *pdev)
177 /* 183 /*
178 * Setup interrupt Handlers 184 * Setup interrupt Handlers
179 */ 185 */
180 irq = platform_get_irq(pdev, 0); 186 l3->debug_irq = platform_get_irq(pdev, 0);
181 ret = request_irq(irq, 187 ret = request_irq(l3->debug_irq,
182 l3_interrupt_handler, 188 l3_interrupt_handler,
183 IRQF_DISABLED, "l3-dbg-irq", l3); 189 IRQF_DISABLED, "l3-dbg-irq", l3);
184 if (ret) { 190 if (ret) {
185 pr_crit("L3: request_irq failed to register for 0x%x\n", 191 pr_crit("L3: request_irq failed to register for 0x%x\n",
186 OMAP44XX_IRQ_L3_DBG); 192 OMAP44XX_IRQ_L3_DBG);
187 goto err3; 193 goto err3;
188 } 194 }
189 l3->debug_irq = irq;
190 195
191 irq = platform_get_irq(pdev, 1); 196 l3->app_irq = platform_get_irq(pdev, 1);
192 ret = request_irq(irq, 197 ret = request_irq(l3->app_irq,
193 l3_interrupt_handler, 198 l3_interrupt_handler,
194 IRQF_DISABLED, "l3-app-irq", l3); 199 IRQF_DISABLED, "l3-app-irq", l3);
195 if (ret) { 200 if (ret) {
196 pr_crit("L3: request_irq failed to register for 0x%x\n", 201 pr_crit("L3: request_irq failed to register for 0x%x\n",
197 OMAP44XX_IRQ_L3_APP); 202 OMAP44XX_IRQ_L3_APP);
198 goto err4; 203 goto err4;
199 } 204 }
200 l3->app_irq = irq;
201 205
202 return 0; 206 return 0;
203 207
@@ -214,9 +218,9 @@ err0:
214 return ret; 218 return ret;
215} 219}
216 220
217static int __exit omap4_l3_remove(struct platform_device *pdev) 221static int __devexit omap4_l3_remove(struct platform_device *pdev)
218{ 222{
219 struct omap4_l3 *l3 = platform_get_drvdata(pdev); 223 struct omap4_l3 *l3 = platform_get_drvdata(pdev);
220 224
221 free_irq(l3->app_irq, l3); 225 free_irq(l3->app_irq, l3);
222 free_irq(l3->debug_irq, l3); 226 free_irq(l3->debug_irq, l3);
@@ -228,16 +232,29 @@ static int __exit omap4_l3_remove(struct platform_device *pdev)
228 return 0; 232 return 0;
229} 233}
230 234
235#if defined(CONFIG_OF)
236static const struct of_device_id l3_noc_match[] = {
237 {.compatible = "ti,omap4-l3-noc", },
238 {},
239}
240MODULE_DEVICE_TABLE(of, l3_noc_match);
241#else
242#define l3_noc_match NULL
243#endif
244
231static struct platform_driver omap4_l3_driver = { 245static struct platform_driver omap4_l3_driver = {
232 .remove = __exit_p(omap4_l3_remove), 246 .probe = omap4_l3_probe,
247 .remove = __devexit_p(omap4_l3_remove),
233 .driver = { 248 .driver = {
234 .name = "omap_l3_noc", 249 .name = "omap_l3_noc",
250 .owner = THIS_MODULE,
251 .of_match_table = l3_noc_match,
235 }, 252 },
236}; 253};
237 254
238static int __init omap4_l3_init(void) 255static int __init omap4_l3_init(void)
239{ 256{
240 return platform_driver_probe(&omap4_l3_driver, omap4_l3_probe); 257 return platform_driver_register(&omap4_l3_driver);
241} 258}
242postcore_initcall_sync(omap4_l3_init); 259postcore_initcall_sync(omap4_l3_init);
243 260