1 files changed, 255 insertions, 11 deletions

diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c
index 4f3547c2a49e..5178e40e84f9 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c
@@ -15,10 +15,12 @@
 
 #include <plat/omap_hwmod.h>
 #include <plat/serial.h>
+#include <plat/l3_2xxx.h>
+#include <plat/l4_2xxx.h>
 
 #include "omap_hwmod_common_data.h"
 
-struct omap_hwmod_addr_space omap2xxx_uart1_addr_space[] = {
+static struct omap_hwmod_addr_space omap2xxx_uart1_addr_space[] = {
         {
                 .pa_start       = OMAP2_UART1_BASE,
                 .pa_end         = OMAP2_UART1_BASE + SZ_8K - 1,
@@ -27,7 +29,7 @@ struct omap_hwmod_addr_space omap2xxx_uart1_addr_space[] = {
         { }
 };
 
-struct omap_hwmod_addr_space omap2xxx_uart2_addr_space[] = {
+static struct omap_hwmod_addr_space omap2xxx_uart2_addr_space[] = {
         {
                 .pa_start       = OMAP2_UART2_BASE,
                 .pa_end         = OMAP2_UART2_BASE + SZ_1K - 1,
@@ -36,7 +38,7 @@ struct omap_hwmod_addr_space omap2xxx_uart2_addr_space[] = {
         { }
 };
 
-struct omap_hwmod_addr_space omap2xxx_uart3_addr_space[] = {
+static struct omap_hwmod_addr_space omap2xxx_uart3_addr_space[] = {
         {
                 .pa_start       = OMAP2_UART3_BASE,
                 .pa_end         = OMAP2_UART3_BASE + SZ_1K - 1,
@@ -45,7 +47,7 @@ struct omap_hwmod_addr_space omap2xxx_uart3_addr_space[] = {
         { }
 };
 
-struct omap_hwmod_addr_space omap2xxx_timer2_addrs[] = {
+static struct omap_hwmod_addr_space omap2xxx_timer2_addrs[] = {
         {
                 .pa_start       = 0x4802a000,
                 .pa_end         = 0x4802a000 + SZ_1K - 1,
@@ -54,7 +56,7 @@ struct omap_hwmod_addr_space omap2xxx_timer2_addrs[] = {
         { }
 };
 
-struct omap_hwmod_addr_space omap2xxx_timer3_addrs[] = {
+static struct omap_hwmod_addr_space omap2xxx_timer3_addrs[] = {
         {
                 .pa_start       = 0x48078000,
                 .pa_end         = 0x48078000 + SZ_1K - 1,
@@ -63,7 +65,7 @@ struct omap_hwmod_addr_space omap2xxx_timer3_addrs[] = {
         { }
 };
 
-struct omap_hwmod_addr_space omap2xxx_timer4_addrs[] = {
+static struct omap_hwmod_addr_space omap2xxx_timer4_addrs[] = {
         {
                 .pa_start       = 0x4807a000,
                 .pa_end         = 0x4807a000 + SZ_1K - 1,
@@ -72,7 +74,7 @@ struct omap_hwmod_addr_space omap2xxx_timer4_addrs[] = {
         { }
 };
 
-struct omap_hwmod_addr_space omap2xxx_timer5_addrs[] = {
+static struct omap_hwmod_addr_space omap2xxx_timer5_addrs[] = {
         {
                 .pa_start       = 0x4807c000,
                 .pa_end         = 0x4807c000 + SZ_1K - 1,
@@ -81,7 +83,7 @@ struct omap_hwmod_addr_space omap2xxx_timer5_addrs[] = {
         { }
 };
 
-struct omap_hwmod_addr_space omap2xxx_timer6_addrs[] = {
+static struct omap_hwmod_addr_space omap2xxx_timer6_addrs[] = {
         {
                 .pa_start       = 0x4807e000,
                 .pa_end         = 0x4807e000 + SZ_1K - 1,
@@ -90,7 +92,7 @@ struct omap_hwmod_addr_space omap2xxx_timer6_addrs[] = {
         { }
 };
 
-struct omap_hwmod_addr_space omap2xxx_timer7_addrs[] = {
+static struct omap_hwmod_addr_space omap2xxx_timer7_addrs[] = {
         {
                 .pa_start       = 0x48080000,
                 .pa_end         = 0x48080000 + SZ_1K - 1,
@@ -99,7 +101,7 @@ struct omap_hwmod_addr_space omap2xxx_timer7_addrs[] = {
         { }
 };
 
-struct omap_hwmod_addr_space omap2xxx_timer8_addrs[] = {
+static struct omap_hwmod_addr_space omap2xxx_timer8_addrs[] = {
         {
                 .pa_start       = 0x48082000,
                 .pa_end         = 0x48082000 + SZ_1K - 1,
@@ -108,7 +110,7 @@ struct omap_hwmod_addr_space omap2xxx_timer8_addrs[] = {
         { }
 };
 
-struct omap_hwmod_addr_space omap2xxx_timer9_addrs[] = {
+static struct omap_hwmod_addr_space omap2xxx_timer9_addrs[] = {
         {
                 .pa_start       = 0x48084000,
                 .pa_end         = 0x48084000 + SZ_1K - 1,
@@ -127,4 +129,246 @@ struct omap_hwmod_addr_space omap2xxx_mcbsp2_addrs[] = {
         { }
 };
 
+/*
+ * Common interconnect data
+ */
+
+/* L3 -> L4_CORE interface */
+struct omap_hwmod_ocp_if omap2xxx_l3_main__l4_core = {
+        .master = &omap2xxx_l3_main_hwmod,
+        .slave  = &omap2xxx_l4_core_hwmod,
+        .user   = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* MPU -> L3 interface */
+struct omap_hwmod_ocp_if omap2xxx_mpu__l3_main = {
+        .master = &omap2xxx_mpu_hwmod,
+        .slave  = &omap2xxx_l3_main_hwmod,
+        .user   = OCP_USER_MPU,
+};
+
+/* DSS -> l3 */
+struct omap_hwmod_ocp_if omap2xxx_dss__l3 = {
+        .master         = &omap2xxx_dss_core_hwmod,
+        .slave          = &omap2xxx_l3_main_hwmod,
+        .fw = {
+                .omap2 = {
+                        .l3_perm_bit  = OMAP2_L3_CORE_FW_CONNID_DSS,
+                        .flags  = OMAP_FIREWALL_L3,
+                }
+        },
+        .user           = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* L4_CORE -> L4_WKUP interface */
+struct omap_hwmod_ocp_if omap2xxx_l4_core__l4_wkup = {
+        .master = &omap2xxx_l4_core_hwmod,
+        .slave  = &omap2xxx_l4_wkup_hwmod,
+        .user   = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* L4 CORE -> UART1 interface */
+struct omap_hwmod_ocp_if omap2_l4_core__uart1 = {
+        .master         = &omap2xxx_l4_core_hwmod,
+        .slave          = &omap2xxx_uart1_hwmod,
+        .clk            = "uart1_ick",
+        .addr           = omap2xxx_uart1_addr_space,
+        .user           = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* L4 CORE -> UART2 interface */
+struct omap_hwmod_ocp_if omap2_l4_core__uart2 = {
+        .master         = &omap2xxx_l4_core_hwmod,
+        .slave          = &omap2xxx_uart2_hwmod,
+        .clk            = "uart2_ick",
+        .addr           = omap2xxx_uart2_addr_space,
+        .user           = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* L4 PER -> UART3 interface */
+struct omap_hwmod_ocp_if omap2_l4_core__uart3 = {
+        .master         = &omap2xxx_l4_core_hwmod,
+        .slave          = &omap2xxx_uart3_hwmod,
+        .clk            = "uart3_ick",
+        .addr           = omap2xxx_uart3_addr_space,
+        .user           = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* l4 core -> mcspi1 interface */
+struct omap_hwmod_ocp_if omap2xxx_l4_core__mcspi1 = {
+        .master         = &omap2xxx_l4_core_hwmod,
+        .slave          = &omap2xxx_mcspi1_hwmod,
+        .clk            = "mcspi1_ick",
+        .addr           = omap2_mcspi1_addr_space,
+        .user           = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* l4 core -> mcspi2 interface */
+struct omap_hwmod_ocp_if omap2xxx_l4_core__mcspi2 = {
+        .master         = &omap2xxx_l4_core_hwmod,
+        .slave          = &omap2xxx_mcspi2_hwmod,
+        .clk            = "mcspi2_ick",
+        .addr           = omap2_mcspi2_addr_space,
+        .user           = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* l4_core -> timer2 */
+struct omap_hwmod_ocp_if omap2xxx_l4_core__timer2 = {
+        .master         = &omap2xxx_l4_core_hwmod,
+        .slave          = &omap2xxx_timer2_hwmod,
+        .clk            = "gpt2_ick",
+        .addr           = omap2xxx_timer2_addrs,
+        .user           = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* l4_core -> timer3 */
+struct omap_hwmod_ocp_if omap2xxx_l4_core__timer3 = {
+        .master         = &omap2xxx_l4_core_hwmod,
+        .slave          = &omap2xxx_timer3_hwmod,
+        .clk            = "gpt3_ick",
+        .addr           = omap2xxx_timer3_addrs,
+        .user           = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* l4_core -> timer4 */
+struct omap_hwmod_ocp_if omap2xxx_l4_core__timer4 = {
+        .master         = &omap2xxx_l4_core_hwmod,
+        .slave          = &omap2xxx_timer4_hwmod,
+        .clk            = "gpt4_ick",
+        .addr           = omap2xxx_timer4_addrs,
+        .user           = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* l4_core -> timer5 */
+struct omap_hwmod_ocp_if omap2xxx_l4_core__timer5 = {
+        .master         = &omap2xxx_l4_core_hwmod,
+        .slave          = &omap2xxx_timer5_hwmod,
+        .clk            = "gpt5_ick",
+        .addr           = omap2xxx_timer5_addrs,
+        .user           = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* l4_core -> timer6 */
+struct omap_hwmod_ocp_if omap2xxx_l4_core__timer6 = {
+        .master         = &omap2xxx_l4_core_hwmod,
+        .slave          = &omap2xxx_timer6_hwmod,
+        .clk            = "gpt6_ick",
+        .addr           = omap2xxx_timer6_addrs,
+        .user           = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* l4_core -> timer7 */
+struct omap_hwmod_ocp_if omap2xxx_l4_core__timer7 = {
+        .master         = &omap2xxx_l4_core_hwmod,
+        .slave          = &omap2xxx_timer7_hwmod,
+        .clk            = "gpt7_ick",
+        .addr           = omap2xxx_timer7_addrs,
+        .user           = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* l4_core -> timer8 */
+struct omap_hwmod_ocp_if omap2xxx_l4_core__timer8 = {
+        .master         = &omap2xxx_l4_core_hwmod,
+        .slave          = &omap2xxx_timer8_hwmod,
+        .clk            = "gpt8_ick",
+        .addr           = omap2xxx_timer8_addrs,
+        .user           = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* l4_core -> timer9 */
+struct omap_hwmod_ocp_if omap2xxx_l4_core__timer9 = {
+        .master         = &omap2xxx_l4_core_hwmod,
+        .slave          = &omap2xxx_timer9_hwmod,
+        .clk            = "gpt9_ick",
+        .addr           = omap2xxx_timer9_addrs,
+        .user           = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* l4_core -> timer10 */
+struct omap_hwmod_ocp_if omap2xxx_l4_core__timer10 = {
+        .master         = &omap2xxx_l4_core_hwmod,
+        .slave          = &omap2xxx_timer10_hwmod,
+        .clk            = "gpt10_ick",
+        .addr           = omap2_timer10_addrs,
+        .user           = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* l4_core -> timer11 */
+struct omap_hwmod_ocp_if omap2xxx_l4_core__timer11 = {
+        .master         = &omap2xxx_l4_core_hwmod,
+        .slave          = &omap2xxx_timer11_hwmod,
+        .clk            = "gpt11_ick",
+        .addr           = omap2_timer11_addrs,
+        .user           = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* l4_core -> timer12 */
+struct omap_hwmod_ocp_if omap2xxx_l4_core__timer12 = {
+        .master         = &omap2xxx_l4_core_hwmod,
+        .slave          = &omap2xxx_timer12_hwmod,
+        .clk            = "gpt12_ick",
+        .addr           = omap2xxx_timer12_addrs,
+        .user           = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* l4_core -> dss */
+struct omap_hwmod_ocp_if omap2xxx_l4_core__dss = {
+        .master         = &omap2xxx_l4_core_hwmod,
+        .slave          = &omap2xxx_dss_core_hwmod,
+        .clk            = "dss_ick",
+        .addr           = omap2_dss_addrs,
+        .fw = {
+                .omap2 = {
+                        .l4_fw_region  = OMAP2420_L4_CORE_FW_DSS_CORE_REGION,
+                        .flags  = OMAP_FIREWALL_L4,
+                }
+        },
+        .user           = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* l4_core -> dss_dispc */
+struct omap_hwmod_ocp_if omap2xxx_l4_core__dss_dispc = {
+        .master         = &omap2xxx_l4_core_hwmod,
+        .slave          = &omap2xxx_dss_dispc_hwmod,
+        .clk            = "dss_ick",
+        .addr           = omap2_dss_dispc_addrs,
+        .fw = {
+                .omap2 = {
+                        .l4_fw_region  = OMAP2420_L4_CORE_FW_DSS_DISPC_REGION,
+                        .flags  = OMAP_FIREWALL_L4,
+                }
+        },
+        .user           = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* l4_core -> dss_rfbi */
+struct omap_hwmod_ocp_if omap2xxx_l4_core__dss_rfbi = {
+        .master         = &omap2xxx_l4_core_hwmod,
+        .slave          = &omap2xxx_dss_rfbi_hwmod,
+        .clk            = "dss_ick",
+        .addr           = omap2_dss_rfbi_addrs,
+        .fw = {
+                .omap2 = {
+                        .l4_fw_region  = OMAP2420_L4_CORE_FW_DSS_CORE_REGION,
+                        .flags  = OMAP_FIREWALL_L4,
+                }
+        },
+        .user           = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* l4_core -> dss_venc */
+struct omap_hwmod_ocp_if omap2xxx_l4_core__dss_venc = {
+        .master         = &omap2xxx_l4_core_hwmod,
+        .slave          = &omap2xxx_dss_venc_hwmod,
+        .clk            = "dss_ick",
+        .addr           = omap2_dss_venc_addrs,
+        .fw = {
+                .omap2 = {
+                        .l4_fw_region  = OMAP2420_L4_CORE_FW_DSS_VENC_REGION,
+                        .flags  = OMAP_FIREWALL_L4,
+                }
+        },
+        .flags          = OCPIF_SWSUP_IDLE,
+        .user           = OCP_USER_MPU | OCP_USER_SDMA,
+};