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Diffstat (limited to 'arch/arm/mach-omap2/omap_hwmod.c')
-rw-r--r--arch/arm/mach-omap2/omap_hwmod.c32
1 files changed, 16 insertions, 16 deletions
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index f4014179d601..df91bb1dc972 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -1250,15 +1250,6 @@ static int _enable(struct omap_hwmod *oh)
1250 1250
1251 pr_debug("omap_hwmod: %s: enabling\n", oh->name); 1251 pr_debug("omap_hwmod: %s: enabling\n", oh->name);
1252 1252
1253 /*
1254 * If an IP contains only one HW reset line, then de-assert it in order
1255 * to allow to enable the clocks. Otherwise the PRCM will return
1256 * Intransition status, and the init will failed.
1257 */
1258 if ((oh->_state == _HWMOD_STATE_INITIALIZED ||
1259 oh->_state == _HWMOD_STATE_DISABLED) && oh->rst_lines_cnt == 1)
1260 _deassert_hardreset(oh, oh->rst_lines[0].name);
1261
1262 /* Mux pins for device runtime if populated */ 1253 /* Mux pins for device runtime if populated */
1263 if (oh->mux && (!oh->mux->enabled || 1254 if (oh->mux && (!oh->mux->enabled ||
1264 ((oh->_state == _HWMOD_STATE_IDLE) && 1255 ((oh->_state == _HWMOD_STATE_IDLE) &&
@@ -1268,6 +1259,15 @@ static int _enable(struct omap_hwmod *oh)
1268 _add_initiator_dep(oh, mpu_oh); 1259 _add_initiator_dep(oh, mpu_oh);
1269 _enable_clocks(oh); 1260 _enable_clocks(oh);
1270 1261
1262 /*
1263 * If an IP contains only one HW reset line, then de-assert it in order
1264 * to allow the module state transition. Otherwise the PRCM will return
1265 * Intransition status, and the init will failed.
1266 */
1267 if ((oh->_state == _HWMOD_STATE_INITIALIZED ||
1268 oh->_state == _HWMOD_STATE_DISABLED) && oh->rst_lines_cnt == 1)
1269 _deassert_hardreset(oh, oh->rst_lines[0].name);
1270
1271 r = _wait_target_ready(oh); 1271 r = _wait_target_ready(oh);
1272 if (!r) { 1272 if (!r) {
1273 oh->_state = _HWMOD_STATE_ENABLED; 1273 oh->_state = _HWMOD_STATE_ENABLED;
@@ -1396,13 +1396,6 @@ static int _shutdown(struct omap_hwmod *oh)
1396 _shutdown_sysc(oh); 1396 _shutdown_sysc(oh);
1397 } 1397 }
1398 1398
1399 /*
1400 * If an IP contains only one HW reset line, then assert it
1401 * before disabling the clocks and shutting down the IP.
1402 */
1403 if (oh->rst_lines_cnt == 1)
1404 _assert_hardreset(oh, oh->rst_lines[0].name);
1405
1406 /* clocks and deps are already disabled in idle */ 1399 /* clocks and deps are already disabled in idle */
1407 if (oh->_state == _HWMOD_STATE_ENABLED) { 1400 if (oh->_state == _HWMOD_STATE_ENABLED) {
1408 _del_initiator_dep(oh, mpu_oh); 1401 _del_initiator_dep(oh, mpu_oh);
@@ -1411,6 +1404,13 @@ static int _shutdown(struct omap_hwmod *oh)
1411 } 1404 }
1412 /* XXX Should this code also force-disable the optional clocks? */ 1405 /* XXX Should this code also force-disable the optional clocks? */
1413 1406
1407 /*
1408 * If an IP contains only one HW reset line, then assert it
1409 * after disabling the clocks and before shutting down the IP.
1410 */
1411 if (oh->rst_lines_cnt == 1)
1412 _assert_hardreset(oh, oh->rst_lines[0].name);
1413
1414 /* Mux pins to safe mode or use populated off mode values */ 1414 /* Mux pins to safe mode or use populated off mode values */
1415 if (oh->mux) 1415 if (oh->mux)
1416 omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED); 1416 omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);