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-rw-r--r--arch/arm/mach-omap2/omap4-sar-layout.h15
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/omap4-sar-layout.h b/arch/arm/mach-omap2/omap4-sar-layout.h
index 970a2eef3ab9..aa14a8dd2505 100644
--- a/arch/arm/mach-omap2/omap4-sar-layout.h
+++ b/arch/arm/mach-omap2/omap4-sar-layout.h
@@ -28,4 +28,19 @@
28#define CPU0_WAKEUP_NS_PA_ADDR_OFFSET 0xa04 28#define CPU0_WAKEUP_NS_PA_ADDR_OFFSET 0xa04
29#define CPU1_WAKEUP_NS_PA_ADDR_OFFSET 0xa08 29#define CPU1_WAKEUP_NS_PA_ADDR_OFFSET 0xa08
30 30
31#define SAR_BACKUP_STATUS_OFFSET (SAR_BANK3_OFFSET + 0x500)
32#define SAR_SECURE_RAM_SIZE_OFFSET (SAR_BANK3_OFFSET + 0x504)
33#define SAR_SECRAM_SAVED_AT_OFFSET (SAR_BANK3_OFFSET + 0x508)
34
35/* WakeUpGen save restore offset from OMAP44XX_SAR_RAM_BASE */
36#define WAKEUPGENENB_OFFSET_CPU0 (SAR_BANK3_OFFSET + 0x684)
37#define WAKEUPGENENB_SECURE_OFFSET_CPU0 (SAR_BANK3_OFFSET + 0x694)
38#define WAKEUPGENENB_OFFSET_CPU1 (SAR_BANK3_OFFSET + 0x6a4)
39#define WAKEUPGENENB_SECURE_OFFSET_CPU1 (SAR_BANK3_OFFSET + 0x6b4)
40#define AUXCOREBOOT0_OFFSET (SAR_BANK3_OFFSET + 0x6c4)
41#define AUXCOREBOOT1_OFFSET (SAR_BANK3_OFFSET + 0x6c8)
42#define PTMSYNCREQ_MASK_OFFSET (SAR_BANK3_OFFSET + 0x6cc)
43#define PTMSYNCREQ_EN_OFFSET (SAR_BANK3_OFFSET + 0x6d0)
44#define SAR_BACKUP_STATUS_WAKEUPGEN 0x10
45
31#endif 46#endif