diff options
Diffstat (limited to 'arch/arm/mach-omap2/omap4-common.c')
-rw-r--r-- | arch/arm/mach-omap2/omap4-common.c | 69 |
1 files changed, 0 insertions, 69 deletions
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c index 7bb116a6f86f..16350eefa66c 100644 --- a/arch/arm/mach-omap2/omap4-common.c +++ b/arch/arm/mach-omap2/omap4-common.c | |||
@@ -51,75 +51,6 @@ static void __iomem *twd_base; | |||
51 | 51 | ||
52 | #define IRQ_LOCALTIMER 29 | 52 | #define IRQ_LOCALTIMER 29 |
53 | 53 | ||
54 | #ifdef CONFIG_OMAP4_ERRATA_I688 | ||
55 | /* Used to implement memory barrier on DRAM path */ | ||
56 | #define OMAP4_DRAM_BARRIER_VA 0xfe600000 | ||
57 | |||
58 | void __iomem *dram_sync, *sram_sync; | ||
59 | |||
60 | static phys_addr_t paddr; | ||
61 | static u32 size; | ||
62 | |||
63 | void omap_bus_sync(void) | ||
64 | { | ||
65 | if (dram_sync && sram_sync) { | ||
66 | writel_relaxed(readl_relaxed(dram_sync), dram_sync); | ||
67 | writel_relaxed(readl_relaxed(sram_sync), sram_sync); | ||
68 | isb(); | ||
69 | } | ||
70 | } | ||
71 | EXPORT_SYMBOL(omap_bus_sync); | ||
72 | |||
73 | static int __init omap4_sram_init(void) | ||
74 | { | ||
75 | struct device_node *np; | ||
76 | struct gen_pool *sram_pool; | ||
77 | |||
78 | np = of_find_compatible_node(NULL, NULL, "ti,omap4-mpu"); | ||
79 | if (!np) | ||
80 | pr_warn("%s:Unable to allocate sram needed to handle errata I688\n", | ||
81 | __func__); | ||
82 | sram_pool = of_get_named_gen_pool(np, "sram", 0); | ||
83 | if (!sram_pool) | ||
84 | pr_warn("%s:Unable to get sram pool needed to handle errata I688\n", | ||
85 | __func__); | ||
86 | else | ||
87 | sram_sync = (void *)gen_pool_alloc(sram_pool, PAGE_SIZE); | ||
88 | |||
89 | return 0; | ||
90 | } | ||
91 | omap_arch_initcall(omap4_sram_init); | ||
92 | |||
93 | /* Steal one page physical memory for barrier implementation */ | ||
94 | int __init omap_barrier_reserve_memblock(void) | ||
95 | { | ||
96 | |||
97 | size = ALIGN(PAGE_SIZE, SZ_1M); | ||
98 | paddr = arm_memblock_steal(size, SZ_1M); | ||
99 | |||
100 | return 0; | ||
101 | } | ||
102 | |||
103 | void __init omap_barriers_init(void) | ||
104 | { | ||
105 | struct map_desc dram_io_desc[1]; | ||
106 | |||
107 | dram_io_desc[0].virtual = OMAP4_DRAM_BARRIER_VA; | ||
108 | dram_io_desc[0].pfn = __phys_to_pfn(paddr); | ||
109 | dram_io_desc[0].length = size; | ||
110 | dram_io_desc[0].type = MT_MEMORY_RW_SO; | ||
111 | iotable_init(dram_io_desc, ARRAY_SIZE(dram_io_desc)); | ||
112 | dram_sync = (void __iomem *) dram_io_desc[0].virtual; | ||
113 | |||
114 | pr_info("OMAP4: Map 0x%08llx to 0x%08lx for dram barrier\n", | ||
115 | (long long) paddr, dram_io_desc[0].virtual); | ||
116 | |||
117 | } | ||
118 | #else | ||
119 | void __init omap_barriers_init(void) | ||
120 | {} | ||
121 | #endif | ||
122 | |||
123 | void gic_dist_disable(void) | 54 | void gic_dist_disable(void) |
124 | { | 55 | { |
125 | if (gic_dist_base_addr) | 56 | if (gic_dist_base_addr) |