diff options
Diffstat (limited to 'arch/arm/mach-omap2/omap-smp.c')
-rw-r--r-- | arch/arm/mach-omap2/omap-smp.c | 24 |
1 files changed, 8 insertions, 16 deletions
diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c index 4890bcf4dadd..59e847843af5 100644 --- a/arch/arm/mach-omap2/omap-smp.c +++ b/arch/arm/mach-omap2/omap-smp.c | |||
@@ -21,15 +21,12 @@ | |||
21 | #include <linux/smp.h> | 21 | #include <linux/smp.h> |
22 | #include <linux/io.h> | 22 | #include <linux/io.h> |
23 | 23 | ||
24 | #include <asm/cacheflush.h> | ||
24 | #include <asm/localtimer.h> | 25 | #include <asm/localtimer.h> |
25 | #include <asm/smp_scu.h> | 26 | #include <asm/smp_scu.h> |
26 | #include <mach/hardware.h> | 27 | #include <mach/hardware.h> |
27 | #include <plat/common.h> | 28 | #include <plat/common.h> |
28 | 29 | ||
29 | /* Registers used for communicating startup information */ | ||
30 | static void __iomem *omap4_auxcoreboot_reg0; | ||
31 | static void __iomem *omap4_auxcoreboot_reg1; | ||
32 | |||
33 | /* SCU base address */ | 30 | /* SCU base address */ |
34 | static void __iomem *scu_base; | 31 | static void __iomem *scu_base; |
35 | 32 | ||
@@ -74,12 +71,13 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) | |||
74 | spin_lock(&boot_lock); | 71 | spin_lock(&boot_lock); |
75 | 72 | ||
76 | /* | 73 | /* |
77 | * Update the AuxCoreBoot1 with boot state for secondary core. | 74 | * Update the AuxCoreBoot0 with boot state for secondary core. |
78 | * omap_secondary_startup() routine will hold the secondary core till | 75 | * omap_secondary_startup() routine will hold the secondary core till |
79 | * the AuxCoreBoot1 register is updated with cpu state | 76 | * the AuxCoreBoot1 register is updated with cpu state |
80 | * A barrier is added to ensure that write buffer is drained | 77 | * A barrier is added to ensure that write buffer is drained |
81 | */ | 78 | */ |
82 | __raw_writel(cpu, omap4_auxcoreboot_reg1); | 79 | omap_modify_auxcoreboot0(0x200, 0x0); |
80 | flush_cache_all(); | ||
83 | smp_wmb(); | 81 | smp_wmb(); |
84 | 82 | ||
85 | timeout = jiffies + (1 * HZ); | 83 | timeout = jiffies + (1 * HZ); |
@@ -99,17 +97,18 @@ static void __init wakeup_secondary(void) | |||
99 | { | 97 | { |
100 | /* | 98 | /* |
101 | * Write the address of secondary startup routine into the | 99 | * Write the address of secondary startup routine into the |
102 | * AuxCoreBoot0 where ROM code will jump and start executing | 100 | * AuxCoreBoot1 where ROM code will jump and start executing |
103 | * on secondary core once out of WFE | 101 | * on secondary core once out of WFE |
104 | * A barrier is added to ensure that write buffer is drained | 102 | * A barrier is added to ensure that write buffer is drained |
105 | */ | 103 | */ |
106 | __raw_writel(virt_to_phys(omap_secondary_startup), \ | 104 | omap_auxcoreboot_addr(virt_to_phys(omap_secondary_startup)); |
107 | omap4_auxcoreboot_reg0); | ||
108 | smp_wmb(); | 105 | smp_wmb(); |
109 | 106 | ||
110 | /* | 107 | /* |
111 | * Send a 'sev' to wake the secondary core from WFE. | 108 | * Send a 'sev' to wake the secondary core from WFE. |
109 | * Drain the outstanding writes to memory | ||
112 | */ | 110 | */ |
111 | dsb(); | ||
113 | set_event(); | 112 | set_event(); |
114 | mb(); | 113 | mb(); |
115 | } | 114 | } |
@@ -136,7 +135,6 @@ void __init smp_prepare_cpus(unsigned int max_cpus) | |||
136 | { | 135 | { |
137 | unsigned int ncores = get_core_count(); | 136 | unsigned int ncores = get_core_count(); |
138 | unsigned int cpu = smp_processor_id(); | 137 | unsigned int cpu = smp_processor_id(); |
139 | void __iomem *omap4_wkupgen_base; | ||
140 | int i; | 138 | int i; |
141 | 139 | ||
142 | /* sanity check */ | 140 | /* sanity check */ |
@@ -168,12 +166,6 @@ void __init smp_prepare_cpus(unsigned int max_cpus) | |||
168 | for (i = 0; i < max_cpus; i++) | 166 | for (i = 0; i < max_cpus; i++) |
169 | set_cpu_present(i, true); | 167 | set_cpu_present(i, true); |
170 | 168 | ||
171 | /* Never released */ | ||
172 | omap4_wkupgen_base = ioremap(OMAP44XX_WKUPGEN_BASE, SZ_4K); | ||
173 | BUG_ON(!omap4_wkupgen_base); | ||
174 | omap4_auxcoreboot_reg0 = omap4_wkupgen_base + 0x800; | ||
175 | omap4_auxcoreboot_reg1 = omap4_wkupgen_base + 0x804; | ||
176 | |||
177 | if (max_cpus > 1) { | 169 | if (max_cpus > 1) { |
178 | /* | 170 | /* |
179 | * Enable the local timer or broadcast device for the | 171 | * Enable the local timer or broadcast device for the |