diff options
Diffstat (limited to 'arch/arm/mach-omap2/omap-headsmp.S')
-rw-r--r-- | arch/arm/mach-omap2/omap-headsmp.S | 6 |
1 files changed, 1 insertions, 5 deletions
diff --git a/arch/arm/mach-omap2/omap-headsmp.S b/arch/arm/mach-omap2/omap-headsmp.S index 40c5d5f1451c..4993d4bfe9b2 100644 --- a/arch/arm/mach-omap2/omap-headsmp.S +++ b/arch/arm/mach-omap2/omap-headsmp.S | |||
@@ -31,10 +31,6 @@ | |||
31 | * register AuxCoreBoot0. | 31 | * register AuxCoreBoot0. |
32 | */ | 32 | */ |
33 | ENTRY(omap5_secondary_startup) | 33 | ENTRY(omap5_secondary_startup) |
34 | .arm | ||
35 | THUMB( adr r9, BSYM(wait) ) @ CPU may be entered in ARM mode. | ||
36 | THUMB( bx r9 ) @ If this is a Thumb-2 kernel, | ||
37 | THUMB( .thumb ) @ switch to Thumb now. | ||
38 | wait: ldr r2, =AUX_CORE_BOOT0_PA @ read from AuxCoreBoot0 | 34 | wait: ldr r2, =AUX_CORE_BOOT0_PA @ read from AuxCoreBoot0 |
39 | ldr r0, [r2] | 35 | ldr r0, [r2] |
40 | mov r0, r0, lsr #5 | 36 | mov r0, r0, lsr #5 |
@@ -43,7 +39,7 @@ wait: ldr r2, =AUX_CORE_BOOT0_PA @ read from AuxCoreBoot0 | |||
43 | cmp r0, r4 | 39 | cmp r0, r4 |
44 | bne wait | 40 | bne wait |
45 | b secondary_startup | 41 | b secondary_startup |
46 | END(omap5_secondary_startup) | 42 | ENDPROC(omap5_secondary_startup) |
47 | /* | 43 | /* |
48 | * OMAP4 specific entry point for secondary CPU to jump from ROM | 44 | * OMAP4 specific entry point for secondary CPU to jump from ROM |
49 | * code. This routine also provides a holding flag into which | 45 | * code. This routine also provides a holding flag into which |