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Diffstat (limited to 'arch/arm/mach-omap2/mux.c')
-rw-r--r--arch/arm/mach-omap2/mux.c121
1 files changed, 112 insertions, 9 deletions
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index 05750975d746..930770012a75 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -1,11 +1,12 @@
1/* 1/*
2 * linux/arch/arm/mach-omap2/mux.c 2 * linux/arch/arm/mach-omap2/mux.c
3 * 3 *
4 * OMAP1 pin multiplexing configurations 4 * OMAP2 pin multiplexing configurations
5 * 5 *
6 * Copyright (C) 2003 - 2005 Nokia Corporation 6 * Copyright (C) 2004 - 2008 Texas Instruments Inc.
7 * Copyright (C) 2003 - 2008 Nokia Corporation
7 * 8 *
8 * Written by Tony Lindgren <tony.lindgren@nokia.com> 9 * Written by Tony Lindgren
9 * 10 *
10 * This program is free software; you can redistribute it and/or modify 11 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by 12 * it under the terms of the GNU General Public License as published by
@@ -28,13 +29,17 @@
28#include <asm/io.h> 29#include <asm/io.h>
29#include <linux/spinlock.h> 30#include <linux/spinlock.h>
30 31
32#include <asm/arch/control.h>
31#include <asm/arch/mux.h> 33#include <asm/arch/mux.h>
32 34
33#ifdef CONFIG_OMAP_MUX 35#ifdef CONFIG_OMAP_MUX
34 36
37static struct omap_mux_cfg arch_mux_cfg;
38
35/* NOTE: See mux.h for the enumeration */ 39/* NOTE: See mux.h for the enumeration */
36 40
37struct pin_config __initdata_or_module omap24xx_pins[] = { 41#ifdef CONFIG_ARCH_OMAP24XX
42static struct pin_config __initdata_or_module omap24xx_pins[] = {
38/* 43/*
39 * description mux mux pull pull debug 44 * description mux mux pull pull debug
40 * offset mode ena type 45 * offset mode ena type
@@ -77,7 +82,12 @@ MUX_CFG_24XX("AA12_242X_GPIO17", 0x0e9, 3, 0, 0, 1)
77MUX_CFG_24XX("AA8_242X_GPIO58", 0x0ea, 3, 0, 0, 1) 82MUX_CFG_24XX("AA8_242X_GPIO58", 0x0ea, 3, 0, 0, 1)
78MUX_CFG_24XX("Y20_24XX_GPIO60", 0x12c, 3, 0, 0, 1) 83MUX_CFG_24XX("Y20_24XX_GPIO60", 0x12c, 3, 0, 0, 1)
79MUX_CFG_24XX("W4__24XX_GPIO74", 0x0f2, 3, 0, 0, 1) 84MUX_CFG_24XX("W4__24XX_GPIO74", 0x0f2, 3, 0, 0, 1)
85MUX_CFG_24XX("N15_24XX_GPIO85", 0x103, 3, 0, 0, 1)
80MUX_CFG_24XX("M15_24XX_GPIO92", 0x10a, 3, 0, 0, 1) 86MUX_CFG_24XX("M15_24XX_GPIO92", 0x10a, 3, 0, 0, 1)
87MUX_CFG_24XX("P20_24XX_GPIO93", 0x10b, 3, 0, 0, 1)
88MUX_CFG_24XX("P18_24XX_GPIO95", 0x10d, 3, 0, 0, 1)
89MUX_CFG_24XX("M18_24XX_GPIO96", 0x10e, 3, 0, 0, 1)
90MUX_CFG_24XX("L14_24XX_GPIO97", 0x10f, 3, 0, 0, 1)
81MUX_CFG_24XX("J15_24XX_GPIO99", 0x113, 3, 1, 1, 1) 91MUX_CFG_24XX("J15_24XX_GPIO99", 0x113, 3, 1, 1, 1)
82MUX_CFG_24XX("V14_24XX_GPIO117", 0x128, 3, 1, 0, 1) 92MUX_CFG_24XX("V14_24XX_GPIO117", 0x128, 3, 1, 0, 1)
83MUX_CFG_24XX("P14_24XX_GPIO125", 0x140, 3, 1, 1, 1) 93MUX_CFG_24XX("P14_24XX_GPIO125", 0x140, 3, 1, 1, 1)
@@ -102,9 +112,6 @@ MUX_CFG_24XX("G4_242X_DMAREQ3", 0x073, 2, 0, 0, 1)
102MUX_CFG_24XX("D3_242X_DMAREQ4", 0x072, 2, 0, 0, 1) 112MUX_CFG_24XX("D3_242X_DMAREQ4", 0x072, 2, 0, 0, 1)
103MUX_CFG_24XX("E3_242X_DMAREQ5", 0x071, 2, 0, 0, 1) 113MUX_CFG_24XX("E3_242X_DMAREQ5", 0x071, 2, 0, 0, 1)
104 114
105/* TSC IRQ */
106MUX_CFG_24XX("P20_24XX_TSC_IRQ", 0x108, 0, 0, 0, 1)
107
108/* UART3 */ 115/* UART3 */
109MUX_CFG_24XX("K15_24XX_UART3_TX", 0x118, 0, 0, 0, 1) 116MUX_CFG_24XX("K15_24XX_UART3_TX", 0x118, 0, 0, 0, 1)
110MUX_CFG_24XX("K14_24XX_UART3_RX", 0x119, 0, 0, 0, 1) 117MUX_CFG_24XX("K14_24XX_UART3_RX", 0x119, 0, 0, 0, 1)
@@ -167,12 +174,108 @@ MUX_CFG_24XX("B3__24XX_KBR5", 0x30, 3, 1, 1, 1)
167MUX_CFG_24XX("AA4_24XX_KBC2", 0xe7, 3, 0, 0, 1) 174MUX_CFG_24XX("AA4_24XX_KBC2", 0xe7, 3, 0, 0, 1)
168MUX_CFG_24XX("B13_24XX_KBC6", 0x110, 3, 0, 0, 1) 175MUX_CFG_24XX("B13_24XX_KBC6", 0x110, 3, 0, 0, 1)
169 176
177/* 2430 USB */
178MUX_CFG_24XX("AD9_2430_USB0_PUEN", 0x133, 4, 0, 0, 1)
179MUX_CFG_24XX("Y11_2430_USB0_VP", 0x134, 4, 0, 0, 1)
180MUX_CFG_24XX("AD7_2430_USB0_VM", 0x135, 4, 0, 0, 1)
181MUX_CFG_24XX("AE7_2430_USB0_RCV", 0x136, 4, 0, 0, 1)
182MUX_CFG_24XX("AD4_2430_USB0_TXEN", 0x137, 4, 0, 0, 1)
183MUX_CFG_24XX("AF9_2430_USB0_SE0", 0x138, 4, 0, 0, 1)
184MUX_CFG_24XX("AE6_2430_USB0_DAT", 0x139, 4, 0, 0, 1)
185MUX_CFG_24XX("AD24_2430_USB1_SE0", 0x107, 2, 0, 0, 1)
186MUX_CFG_24XX("AB24_2430_USB1_RCV", 0x108, 2, 0, 0, 1)
187MUX_CFG_24XX("Y25_2430_USB1_TXEN", 0x109, 2, 0, 0, 1)
188MUX_CFG_24XX("AA26_2430_USB1_DAT", 0x10A, 2, 0, 0, 1)
189
190/* 2430 HS-USB */
191MUX_CFG_24XX("AD9_2430_USB0HS_DATA3", 0x133, 0, 0, 0, 1)
192MUX_CFG_24XX("Y11_2430_USB0HS_DATA4", 0x134, 0, 0, 0, 1)
193MUX_CFG_24XX("AD7_2430_USB0HS_DATA5", 0x135, 0, 0, 0, 1)
194MUX_CFG_24XX("AE7_2430_USB0HS_DATA6", 0x136, 0, 0, 0, 1)
195MUX_CFG_24XX("AD4_2430_USB0HS_DATA2", 0x137, 0, 0, 0, 1)
196MUX_CFG_24XX("AF9_2430_USB0HS_DATA0", 0x138, 0, 0, 0, 1)
197MUX_CFG_24XX("AE6_2430_USB0HS_DATA1", 0x139, 0, 0, 0, 1)
198MUX_CFG_24XX("AE8_2430_USB0HS_CLK", 0x13A, 0, 0, 0, 1)
199MUX_CFG_24XX("AD8_2430_USB0HS_DIR", 0x13B, 0, 0, 0, 1)
200MUX_CFG_24XX("AE5_2430_USB0HS_STP", 0x13c, 0, 1, 1, 1)
201MUX_CFG_24XX("AE9_2430_USB0HS_NXT", 0x13D, 0, 0, 0, 1)
202MUX_CFG_24XX("AC7_2430_USB0HS_DATA7", 0x13E, 0, 0, 0, 1)
203
204/* 2430 McBSP */
205MUX_CFG_24XX("AC10_2430_MCBSP2_FSX", 0x012E, 1, 0, 0, 1)
206MUX_CFG_24XX("AD16_2430_MCBSP2_CLX", 0x012F, 1, 0, 0, 1)
207MUX_CFG_24XX("AE13_2430_MCBSP2_DX", 0x0130, 1, 0, 0, 1)
208MUX_CFG_24XX("AD13_2430_MCBSP2_DR", 0x0131, 1, 0, 0, 1)
209MUX_CFG_24XX("AC10_2430_MCBSP2_FSX_OFF",0x012E, 0, 0, 0, 1)
210MUX_CFG_24XX("AD16_2430_MCBSP2_CLX_OFF",0x012F, 0, 0, 0, 1)
211MUX_CFG_24XX("AE13_2430_MCBSP2_DX_OFF", 0x0130, 0, 0, 0, 1)
212MUX_CFG_24XX("AD13_2430_MCBSP2_DR_OFF", 0x0131, 0, 0, 0, 1)
170}; 213};
171 214
172int __init omap2_mux_init(void) 215#define OMAP24XX_PINS_SZ ARRAY_SIZE(omap24xx_pins)
216
217#else
218#define omap24xx_pins NULL
219#define OMAP24XX_PINS_SZ 0
220#endif /* CONFIG_ARCH_OMAP24XX */
221
222#define OMAP24XX_PULL_ENA (1 << 3)
223#define OMAP24XX_PULL_UP (1 << 4)
224
225#if defined(CONFIG_OMAP_MUX_DEBUG) || defined(CONFIG_OMAP_MUX_WARNINGS)
226void __init_or_module omap2_cfg_debug(const struct pin_config *cfg, u8 reg)
173{ 227{
174 omap_mux_register(omap24xx_pins, ARRAY_SIZE(omap24xx_pins)); 228 u16 orig;
229 u8 warn = 0, debug = 0;
230
231 orig = omap_ctrl_readb(cfg->mux_reg);
232
233#ifdef CONFIG_OMAP_MUX_DEBUG
234 debug = cfg->debug;
235#endif
236 warn = (orig != reg);
237 if (debug || warn)
238 printk(KERN_WARNING
239 "MUX: setup %s (0x%08x): 0x%02x -> 0x%02x\n",
240 cfg->name, omap_ctrl_base_get() + cfg->mux_reg,
241 orig, reg);
242}
243#else
244#define omap2_cfg_debug(x, y) do {} while (0)
245#endif
246
247#ifdef CONFIG_ARCH_OMAP24XX
248int __init_or_module omap24xx_cfg_reg(const struct pin_config *cfg)
249{
250 static DEFINE_SPINLOCK(mux_spin_lock);
251 unsigned long flags;
252 u8 reg = 0;
253
254 spin_lock_irqsave(&mux_spin_lock, flags);
255 reg |= cfg->mask & 0x7;
256 if (cfg->pull_val)
257 reg |= OMAP24XX_PULL_ENA;
258 if (cfg->pu_pd_val)
259 reg |= OMAP24XX_PULL_UP;
260 omap2_cfg_debug(cfg, reg);
261 omap_ctrl_writeb(reg, cfg->mux_reg);
262 spin_unlock_irqrestore(&mux_spin_lock, flags);
263
175 return 0; 264 return 0;
176} 265}
266#else
267#define omap24xx_cfg_reg 0
268#endif
269
270int __init omap2_mux_init(void)
271{
272 if (cpu_is_omap24xx()) {
273 arch_mux_cfg.pins = omap24xx_pins;
274 arch_mux_cfg.size = OMAP24XX_PINS_SZ;
275 arch_mux_cfg.cfg_reg = omap24xx_cfg_reg;
276 }
277
278 return omap_mux_register(&arch_mux_cfg);
279}
177 280
178#endif 281#endif
generated by cgit v1.2.2 (git 2.25.0) at 2024-09-21 16:08:18 -0400