diff options
Diffstat (limited to 'arch/arm/mach-omap2/mcbsp.c')
-rw-r--r-- | arch/arm/mach-omap2/mcbsp.c | 151 |
1 files changed, 128 insertions, 23 deletions
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c index b261f1f80b5e..cae3ebe249b3 100644 --- a/arch/arm/mach-omap2/mcbsp.c +++ b/arch/arm/mach-omap2/mcbsp.c | |||
@@ -89,6 +89,30 @@ static struct mcbsp_internal_clk omap_mcbsp_clks[] = { | |||
89 | .disable = omap_mcbsp_clk_disable, | 89 | .disable = omap_mcbsp_clk_disable, |
90 | }, | 90 | }, |
91 | }, | 91 | }, |
92 | { | ||
93 | .clk = { | ||
94 | .name = "mcbsp_clk", | ||
95 | .id = 3, | ||
96 | .enable = omap_mcbsp_clk_enable, | ||
97 | .disable = omap_mcbsp_clk_disable, | ||
98 | }, | ||
99 | }, | ||
100 | { | ||
101 | .clk = { | ||
102 | .name = "mcbsp_clk", | ||
103 | .id = 4, | ||
104 | .enable = omap_mcbsp_clk_enable, | ||
105 | .disable = omap_mcbsp_clk_disable, | ||
106 | }, | ||
107 | }, | ||
108 | { | ||
109 | .clk = { | ||
110 | .name = "mcbsp_clk", | ||
111 | .id = 5, | ||
112 | .enable = omap_mcbsp_clk_enable, | ||
113 | .disable = omap_mcbsp_clk_disable, | ||
114 | }, | ||
115 | }, | ||
92 | }; | 116 | }; |
93 | 117 | ||
94 | #define omap_mcbsp_clks_size ARRAY_SIZE(omap_mcbsp_clks) | 118 | #define omap_mcbsp_clks_size ARRAY_SIZE(omap_mcbsp_clks) |
@@ -117,25 +141,14 @@ static void omap2_mcbsp_request(unsigned int id) | |||
117 | omap2_mcbsp2_mux_setup(); | 141 | omap2_mcbsp2_mux_setup(); |
118 | } | 142 | } |
119 | 143 | ||
120 | static int omap2_mcbsp_check(unsigned int id) | ||
121 | { | ||
122 | if (id > OMAP_MAX_MCBSP_COUNT - 1) { | ||
123 | printk(KERN_ERR "OMAP-McBSP: McBSP%d doesn't exist\n", id + 1); | ||
124 | return -ENODEV; | ||
125 | } | ||
126 | return 0; | ||
127 | } | ||
128 | |||
129 | static struct omap_mcbsp_ops omap2_mcbsp_ops = { | 144 | static struct omap_mcbsp_ops omap2_mcbsp_ops = { |
130 | .request = omap2_mcbsp_request, | 145 | .request = omap2_mcbsp_request, |
131 | .check = omap2_mcbsp_check, | ||
132 | }; | 146 | }; |
133 | 147 | ||
134 | #ifdef CONFIG_ARCH_OMAP24XX | 148 | #ifdef CONFIG_ARCH_OMAP2420 |
135 | static struct omap_mcbsp_platform_data omap24xx_mcbsp_pdata[] = { | 149 | static struct omap_mcbsp_platform_data omap2420_mcbsp_pdata[] = { |
136 | { | 150 | { |
137 | .phys_base = OMAP24XX_MCBSP1_BASE, | 151 | .phys_base = OMAP24XX_MCBSP1_BASE, |
138 | .virt_base = IO_ADDRESS(OMAP24XX_MCBSP1_BASE), | ||
139 | .dma_rx_sync = OMAP24XX_DMA_MCBSP1_RX, | 152 | .dma_rx_sync = OMAP24XX_DMA_MCBSP1_RX, |
140 | .dma_tx_sync = OMAP24XX_DMA_MCBSP1_TX, | 153 | .dma_tx_sync = OMAP24XX_DMA_MCBSP1_TX, |
141 | .rx_irq = INT_24XX_MCBSP1_IRQ_RX, | 154 | .rx_irq = INT_24XX_MCBSP1_IRQ_RX, |
@@ -145,7 +158,6 @@ static struct omap_mcbsp_platform_data omap24xx_mcbsp_pdata[] = { | |||
145 | }, | 158 | }, |
146 | { | 159 | { |
147 | .phys_base = OMAP24XX_MCBSP2_BASE, | 160 | .phys_base = OMAP24XX_MCBSP2_BASE, |
148 | .virt_base = IO_ADDRESS(OMAP24XX_MCBSP2_BASE), | ||
149 | .dma_rx_sync = OMAP24XX_DMA_MCBSP2_RX, | 161 | .dma_rx_sync = OMAP24XX_DMA_MCBSP2_RX, |
150 | .dma_tx_sync = OMAP24XX_DMA_MCBSP2_TX, | 162 | .dma_tx_sync = OMAP24XX_DMA_MCBSP2_TX, |
151 | .rx_irq = INT_24XX_MCBSP2_IRQ_RX, | 163 | .rx_irq = INT_24XX_MCBSP2_IRQ_RX, |
@@ -154,17 +166,70 @@ static struct omap_mcbsp_platform_data omap24xx_mcbsp_pdata[] = { | |||
154 | .clk_name = "mcbsp_clk", | 166 | .clk_name = "mcbsp_clk", |
155 | }, | 167 | }, |
156 | }; | 168 | }; |
157 | #define OMAP24XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap24xx_mcbsp_pdata) | 169 | #define OMAP2420_MCBSP_PDATA_SZ ARRAY_SIZE(omap2420_mcbsp_pdata) |
158 | #else | 170 | #else |
159 | #define omap24xx_mcbsp_pdata NULL | 171 | #define omap2420_mcbsp_pdata NULL |
160 | #define OMAP24XX_MCBSP_PDATA_SZ 0 | 172 | #define OMAP2420_MCBSP_PDATA_SZ 0 |
173 | #endif | ||
174 | |||
175 | #ifdef CONFIG_ARCH_OMAP2430 | ||
176 | static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = { | ||
177 | { | ||
178 | .phys_base = OMAP24XX_MCBSP1_BASE, | ||
179 | .dma_rx_sync = OMAP24XX_DMA_MCBSP1_RX, | ||
180 | .dma_tx_sync = OMAP24XX_DMA_MCBSP1_TX, | ||
181 | .rx_irq = INT_24XX_MCBSP1_IRQ_RX, | ||
182 | .tx_irq = INT_24XX_MCBSP1_IRQ_TX, | ||
183 | .ops = &omap2_mcbsp_ops, | ||
184 | .clk_name = "mcbsp_clk", | ||
185 | }, | ||
186 | { | ||
187 | .phys_base = OMAP24XX_MCBSP2_BASE, | ||
188 | .dma_rx_sync = OMAP24XX_DMA_MCBSP2_RX, | ||
189 | .dma_tx_sync = OMAP24XX_DMA_MCBSP2_TX, | ||
190 | .rx_irq = INT_24XX_MCBSP2_IRQ_RX, | ||
191 | .tx_irq = INT_24XX_MCBSP2_IRQ_TX, | ||
192 | .ops = &omap2_mcbsp_ops, | ||
193 | .clk_name = "mcbsp_clk", | ||
194 | }, | ||
195 | { | ||
196 | .phys_base = OMAP2430_MCBSP3_BASE, | ||
197 | .dma_rx_sync = OMAP24XX_DMA_MCBSP3_RX, | ||
198 | .dma_tx_sync = OMAP24XX_DMA_MCBSP3_TX, | ||
199 | .rx_irq = INT_24XX_MCBSP3_IRQ_RX, | ||
200 | .tx_irq = INT_24XX_MCBSP3_IRQ_TX, | ||
201 | .ops = &omap2_mcbsp_ops, | ||
202 | .clk_name = "mcbsp_clk", | ||
203 | }, | ||
204 | { | ||
205 | .phys_base = OMAP2430_MCBSP4_BASE, | ||
206 | .dma_rx_sync = OMAP24XX_DMA_MCBSP4_RX, | ||
207 | .dma_tx_sync = OMAP24XX_DMA_MCBSP4_TX, | ||
208 | .rx_irq = INT_24XX_MCBSP4_IRQ_RX, | ||
209 | .tx_irq = INT_24XX_MCBSP4_IRQ_TX, | ||
210 | .ops = &omap2_mcbsp_ops, | ||
211 | .clk_name = "mcbsp_clk", | ||
212 | }, | ||
213 | { | ||
214 | .phys_base = OMAP2430_MCBSP5_BASE, | ||
215 | .dma_rx_sync = OMAP24XX_DMA_MCBSP5_RX, | ||
216 | .dma_tx_sync = OMAP24XX_DMA_MCBSP5_TX, | ||
217 | .rx_irq = INT_24XX_MCBSP5_IRQ_RX, | ||
218 | .tx_irq = INT_24XX_MCBSP5_IRQ_TX, | ||
219 | .ops = &omap2_mcbsp_ops, | ||
220 | .clk_name = "mcbsp_clk", | ||
221 | }, | ||
222 | }; | ||
223 | #define OMAP2430_MCBSP_PDATA_SZ ARRAY_SIZE(omap2430_mcbsp_pdata) | ||
224 | #else | ||
225 | #define omap2430_mcbsp_pdata NULL | ||
226 | #define OMAP2430_MCBSP_PDATA_SZ 0 | ||
161 | #endif | 227 | #endif |
162 | 228 | ||
163 | #ifdef CONFIG_ARCH_OMAP34XX | 229 | #ifdef CONFIG_ARCH_OMAP34XX |
164 | static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { | 230 | static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { |
165 | { | 231 | { |
166 | .phys_base = OMAP34XX_MCBSP1_BASE, | 232 | .phys_base = OMAP34XX_MCBSP1_BASE, |
167 | .virt_base = IO_ADDRESS(OMAP34XX_MCBSP1_BASE), | ||
168 | .dma_rx_sync = OMAP24XX_DMA_MCBSP1_RX, | 233 | .dma_rx_sync = OMAP24XX_DMA_MCBSP1_RX, |
169 | .dma_tx_sync = OMAP24XX_DMA_MCBSP1_TX, | 234 | .dma_tx_sync = OMAP24XX_DMA_MCBSP1_TX, |
170 | .rx_irq = INT_24XX_MCBSP1_IRQ_RX, | 235 | .rx_irq = INT_24XX_MCBSP1_IRQ_RX, |
@@ -174,7 +239,6 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { | |||
174 | }, | 239 | }, |
175 | { | 240 | { |
176 | .phys_base = OMAP34XX_MCBSP2_BASE, | 241 | .phys_base = OMAP34XX_MCBSP2_BASE, |
177 | .virt_base = IO_ADDRESS(OMAP34XX_MCBSP2_BASE), | ||
178 | .dma_rx_sync = OMAP24XX_DMA_MCBSP2_RX, | 242 | .dma_rx_sync = OMAP24XX_DMA_MCBSP2_RX, |
179 | .dma_tx_sync = OMAP24XX_DMA_MCBSP2_TX, | 243 | .dma_tx_sync = OMAP24XX_DMA_MCBSP2_TX, |
180 | .rx_irq = INT_24XX_MCBSP2_IRQ_RX, | 244 | .rx_irq = INT_24XX_MCBSP2_IRQ_RX, |
@@ -182,6 +246,33 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { | |||
182 | .ops = &omap2_mcbsp_ops, | 246 | .ops = &omap2_mcbsp_ops, |
183 | .clk_name = "mcbsp_clk", | 247 | .clk_name = "mcbsp_clk", |
184 | }, | 248 | }, |
249 | { | ||
250 | .phys_base = OMAP34XX_MCBSP3_BASE, | ||
251 | .dma_rx_sync = OMAP24XX_DMA_MCBSP3_RX, | ||
252 | .dma_tx_sync = OMAP24XX_DMA_MCBSP3_TX, | ||
253 | .rx_irq = INT_24XX_MCBSP3_IRQ_RX, | ||
254 | .tx_irq = INT_24XX_MCBSP3_IRQ_TX, | ||
255 | .ops = &omap2_mcbsp_ops, | ||
256 | .clk_name = "mcbsp_clk", | ||
257 | }, | ||
258 | { | ||
259 | .phys_base = OMAP34XX_MCBSP4_BASE, | ||
260 | .dma_rx_sync = OMAP24XX_DMA_MCBSP4_RX, | ||
261 | .dma_tx_sync = OMAP24XX_DMA_MCBSP4_TX, | ||
262 | .rx_irq = INT_24XX_MCBSP4_IRQ_RX, | ||
263 | .tx_irq = INT_24XX_MCBSP4_IRQ_TX, | ||
264 | .ops = &omap2_mcbsp_ops, | ||
265 | .clk_name = "mcbsp_clk", | ||
266 | }, | ||
267 | { | ||
268 | .phys_base = OMAP34XX_MCBSP5_BASE, | ||
269 | .dma_rx_sync = OMAP24XX_DMA_MCBSP5_RX, | ||
270 | .dma_tx_sync = OMAP24XX_DMA_MCBSP5_TX, | ||
271 | .rx_irq = INT_24XX_MCBSP5_IRQ_RX, | ||
272 | .tx_irq = INT_24XX_MCBSP5_IRQ_TX, | ||
273 | .ops = &omap2_mcbsp_ops, | ||
274 | .clk_name = "mcbsp_clk", | ||
275 | }, | ||
185 | }; | 276 | }; |
186 | #define OMAP34XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap34xx_mcbsp_pdata) | 277 | #define OMAP34XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap34xx_mcbsp_pdata) |
187 | #else | 278 | #else |
@@ -189,7 +280,7 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { | |||
189 | #define OMAP34XX_MCBSP_PDATA_SZ 0 | 280 | #define OMAP34XX_MCBSP_PDATA_SZ 0 |
190 | #endif | 281 | #endif |
191 | 282 | ||
192 | int __init omap2_mcbsp_init(void) | 283 | static int __init omap2_mcbsp_init(void) |
193 | { | 284 | { |
194 | int i; | 285 | int i; |
195 | 286 | ||
@@ -199,10 +290,24 @@ int __init omap2_mcbsp_init(void) | |||
199 | clk_register(&omap_mcbsp_clks[i].clk); | 290 | clk_register(&omap_mcbsp_clks[i].clk); |
200 | } | 291 | } |
201 | 292 | ||
202 | if (cpu_is_omap24xx()) | 293 | if (cpu_is_omap2420()) |
203 | omap_mcbsp_register_board_cfg(omap24xx_mcbsp_pdata, | 294 | omap_mcbsp_count = OMAP2420_MCBSP_PDATA_SZ; |
204 | OMAP24XX_MCBSP_PDATA_SZ); | 295 | if (cpu_is_omap2430()) |
296 | omap_mcbsp_count = OMAP2430_MCBSP_PDATA_SZ; | ||
297 | if (cpu_is_omap34xx()) | ||
298 | omap_mcbsp_count = OMAP34XX_MCBSP_PDATA_SZ; | ||
299 | |||
300 | mcbsp_ptr = kzalloc(omap_mcbsp_count * sizeof(struct omap_mcbsp *), | ||
301 | GFP_KERNEL); | ||
302 | if (!mcbsp_ptr) | ||
303 | return -ENOMEM; | ||
205 | 304 | ||
305 | if (cpu_is_omap2420()) | ||
306 | omap_mcbsp_register_board_cfg(omap2420_mcbsp_pdata, | ||
307 | OMAP2420_MCBSP_PDATA_SZ); | ||
308 | if (cpu_is_omap2430()) | ||
309 | omap_mcbsp_register_board_cfg(omap2430_mcbsp_pdata, | ||
310 | OMAP2430_MCBSP_PDATA_SZ); | ||
206 | if (cpu_is_omap34xx()) | 311 | if (cpu_is_omap34xx()) |
207 | omap_mcbsp_register_board_cfg(omap34xx_mcbsp_pdata, | 312 | omap_mcbsp_register_board_cfg(omap34xx_mcbsp_pdata, |
208 | OMAP34XX_MCBSP_PDATA_SZ); | 313 | OMAP34XX_MCBSP_PDATA_SZ); |